1b2441318SGreg Kroah-Hartman /* SPDX-License-Identifier: GPL-2.0 */ 26ac24381SMichael Welling #ifndef _TSC200X_CORE_H 36ac24381SMichael Welling #define _TSC200X_CORE_H 46ac24381SMichael Welling 56ac24381SMichael Welling /* control byte 1 */ 6ef3b98c2SMichael Welling #define TSC200X_CMD 0x80 7ef3b98c2SMichael Welling #define TSC200X_CMD_NORMAL 0x00 8ef3b98c2SMichael Welling #define TSC200X_CMD_STOP 0x01 9ef3b98c2SMichael Welling #define TSC200X_CMD_12BIT 0x04 106ac24381SMichael Welling 116ac24381SMichael Welling /* control byte 0 */ 12ef3b98c2SMichael Welling #define TSC200X_REG_READ 0x01 /* R/W access */ 13ef3b98c2SMichael Welling #define TSC200X_REG_PND0 0x02 /* Power Not Down Control */ 14ef3b98c2SMichael Welling #define TSC200X_REG_X (0x0 << 3) 15ef3b98c2SMichael Welling #define TSC200X_REG_Y (0x1 << 3) 16ef3b98c2SMichael Welling #define TSC200X_REG_Z1 (0x2 << 3) 17ef3b98c2SMichael Welling #define TSC200X_REG_Z2 (0x3 << 3) 18ef3b98c2SMichael Welling #define TSC200X_REG_AUX (0x4 << 3) 19ef3b98c2SMichael Welling #define TSC200X_REG_TEMP1 (0x5 << 3) 20ef3b98c2SMichael Welling #define TSC200X_REG_TEMP2 (0x6 << 3) 21ef3b98c2SMichael Welling #define TSC200X_REG_STATUS (0x7 << 3) 22ef3b98c2SMichael Welling #define TSC200X_REG_AUX_HIGH (0x8 << 3) 23ef3b98c2SMichael Welling #define TSC200X_REG_AUX_LOW (0x9 << 3) 24ef3b98c2SMichael Welling #define TSC200X_REG_TEMP_HIGH (0xA << 3) 25ef3b98c2SMichael Welling #define TSC200X_REG_TEMP_LOW (0xB << 3) 26ef3b98c2SMichael Welling #define TSC200X_REG_CFR0 (0xC << 3) 27ef3b98c2SMichael Welling #define TSC200X_REG_CFR1 (0xD << 3) 28ef3b98c2SMichael Welling #define TSC200X_REG_CFR2 (0xE << 3) 29ef3b98c2SMichael Welling #define TSC200X_REG_CONV_FUNC (0xF << 3) 306ac24381SMichael Welling 316ac24381SMichael Welling /* configuration register 0 */ 32ef3b98c2SMichael Welling #define TSC200X_CFR0_PRECHARGE_276US 0x0040 33ef3b98c2SMichael Welling #define TSC200X_CFR0_STABTIME_1MS 0x0300 34ef3b98c2SMichael Welling #define TSC200X_CFR0_CLOCK_1MHZ 0x1000 35ef3b98c2SMichael Welling #define TSC200X_CFR0_RESOLUTION12 0x2000 36ef3b98c2SMichael Welling #define TSC200X_CFR0_PENMODE 0x8000 37ef3b98c2SMichael Welling #define TSC200X_CFR0_INITVALUE (TSC200X_CFR0_STABTIME_1MS | \ 38ef3b98c2SMichael Welling TSC200X_CFR0_CLOCK_1MHZ | \ 39ef3b98c2SMichael Welling TSC200X_CFR0_RESOLUTION12 | \ 40ef3b98c2SMichael Welling TSC200X_CFR0_PRECHARGE_276US | \ 41ef3b98c2SMichael Welling TSC200X_CFR0_PENMODE) 426ac24381SMichael Welling 436ac24381SMichael Welling /* bits common to both read and write of configuration register 0 */ 44ef3b98c2SMichael Welling #define TSC200X_CFR0_RW_MASK 0x3fff 456ac24381SMichael Welling 466ac24381SMichael Welling /* configuration register 1 */ 47ef3b98c2SMichael Welling #define TSC200X_CFR1_BATCHDELAY_4MS 0x0003 48ef3b98c2SMichael Welling #define TSC200X_CFR1_INITVALUE TSC200X_CFR1_BATCHDELAY_4MS 496ac24381SMichael Welling 506ac24381SMichael Welling /* configuration register 2 */ 51ef3b98c2SMichael Welling #define TSC200X_CFR2_MAVE_Z 0x0004 52ef3b98c2SMichael Welling #define TSC200X_CFR2_MAVE_Y 0x0008 53ef3b98c2SMichael Welling #define TSC200X_CFR2_MAVE_X 0x0010 54ef3b98c2SMichael Welling #define TSC200X_CFR2_AVG_7 0x0800 55ef3b98c2SMichael Welling #define TSC200X_CFR2_MEDIUM_15 0x3000 56ef3b98c2SMichael Welling #define TSC200X_CFR2_INITVALUE (TSC200X_CFR2_MAVE_X | \ 57ef3b98c2SMichael Welling TSC200X_CFR2_MAVE_Y | \ 58ef3b98c2SMichael Welling TSC200X_CFR2_MAVE_Z | \ 59ef3b98c2SMichael Welling TSC200X_CFR2_MEDIUM_15 | \ 60ef3b98c2SMichael Welling TSC200X_CFR2_AVG_7) 616ac24381SMichael Welling 626ac24381SMichael Welling #define MAX_12BIT 0xfff 63ef3b98c2SMichael Welling #define TSC200X_DEF_X_FUZZ 4 64ef3b98c2SMichael Welling #define TSC200X_DEF_Y_FUZZ 8 65ef3b98c2SMichael Welling #define TSC200X_DEF_P_FUZZ 2 66ef3b98c2SMichael Welling #define TSC200X_DEF_RESISTOR 280 676ac24381SMichael Welling 686ac24381SMichael Welling #define TSC2005_SPI_MAX_SPEED_HZ 10000000 69ef3b98c2SMichael Welling #define TSC200X_PENUP_TIME_MS 40 706ac24381SMichael Welling 716ac24381SMichael Welling extern const struct regmap_config tsc200x_regmap_config; 726ac24381SMichael Welling extern const struct dev_pm_ops tsc200x_pm_ops; 73*97f2bedbSDmitry Torokhov extern const struct attribute_group *tsc200x_groups[]; 746ac24381SMichael Welling 75e9003c9cSMichael Welling int tsc200x_probe(struct device *dev, int irq, const struct input_id *tsc_id, 766ac24381SMichael Welling struct regmap *regmap, 776ac24381SMichael Welling int (*tsc200x_cmd)(struct device *dev, u8 cmd)); 786ac24381SMichael Welling 796ac24381SMichael Welling #endif 80