1 /* 2 * Freescale i.MX6UL touchscreen controller driver 3 * 4 * Copyright (C) 2015 Freescale Semiconductor, Inc. 5 * 6 * This program is free software; you can redistribute it and/or modify 7 * it under the terms of the GNU General Public License version 2 as 8 * published by the Free Software Foundation. 9 */ 10 11 #include <linux/errno.h> 12 #include <linux/kernel.h> 13 #include <linux/module.h> 14 #include <linux/gpio/consumer.h> 15 #include <linux/input.h> 16 #include <linux/slab.h> 17 #include <linux/completion.h> 18 #include <linux/delay.h> 19 #include <linux/of.h> 20 #include <linux/interrupt.h> 21 #include <linux/platform_device.h> 22 #include <linux/clk.h> 23 #include <linux/io.h> 24 #include <linux/log2.h> 25 26 /* ADC configuration registers field define */ 27 #define ADC_AIEN (0x1 << 7) 28 #define ADC_CONV_DISABLE 0x1F 29 #define ADC_AVGE (0x1 << 5) 30 #define ADC_CAL (0x1 << 7) 31 #define ADC_CALF 0x2 32 #define ADC_12BIT_MODE (0x2 << 2) 33 #define ADC_CONV_MODE_MASK (0x3 << 2) 34 #define ADC_IPG_CLK 0x00 35 #define ADC_INPUT_CLK_MASK 0x3 36 #define ADC_CLK_DIV_8 (0x03 << 5) 37 #define ADC_CLK_DIV_MASK (0x3 << 5) 38 #define ADC_SHORT_SAMPLE_MODE (0x0 << 4) 39 #define ADC_SAMPLE_MODE_MASK (0x1 << 4) 40 #define ADC_HARDWARE_TRIGGER (0x1 << 13) 41 #define ADC_AVGS_SHIFT 14 42 #define ADC_AVGS_MASK (0x3 << 14) 43 #define SELECT_CHANNEL_4 0x04 44 #define SELECT_CHANNEL_1 0x01 45 #define DISABLE_CONVERSION_INT (0x0 << 7) 46 47 /* ADC registers */ 48 #define REG_ADC_HC0 0x00 49 #define REG_ADC_HC1 0x04 50 #define REG_ADC_HC2 0x08 51 #define REG_ADC_HC3 0x0C 52 #define REG_ADC_HC4 0x10 53 #define REG_ADC_HS 0x14 54 #define REG_ADC_R0 0x18 55 #define REG_ADC_CFG 0x2C 56 #define REG_ADC_GC 0x30 57 #define REG_ADC_GS 0x34 58 59 #define ADC_TIMEOUT msecs_to_jiffies(100) 60 61 /* TSC registers */ 62 #define REG_TSC_BASIC_SETING 0x00 63 #define REG_TSC_PRE_CHARGE_TIME 0x10 64 #define REG_TSC_FLOW_CONTROL 0x20 65 #define REG_TSC_MEASURE_VALUE 0x30 66 #define REG_TSC_INT_EN 0x40 67 #define REG_TSC_INT_SIG_EN 0x50 68 #define REG_TSC_INT_STATUS 0x60 69 #define REG_TSC_DEBUG_MODE 0x70 70 #define REG_TSC_DEBUG_MODE2 0x80 71 72 /* TSC configuration registers field define */ 73 #define DETECT_4_WIRE_MODE (0x0 << 4) 74 #define AUTO_MEASURE 0x1 75 #define MEASURE_SIGNAL 0x1 76 #define DETECT_SIGNAL (0x1 << 4) 77 #define VALID_SIGNAL (0x1 << 8) 78 #define MEASURE_INT_EN 0x1 79 #define MEASURE_SIG_EN 0x1 80 #define VALID_SIG_EN (0x1 << 8) 81 #define DE_GLITCH_2 (0x2 << 29) 82 #define START_SENSE (0x1 << 12) 83 #define TSC_DISABLE (0x1 << 16) 84 #define DETECT_MODE 0x2 85 86 struct imx6ul_tsc { 87 struct device *dev; 88 struct input_dev *input; 89 void __iomem *tsc_regs; 90 void __iomem *adc_regs; 91 struct clk *tsc_clk; 92 struct clk *adc_clk; 93 struct gpio_desc *xnur_gpio; 94 95 u32 measure_delay_time; 96 u32 pre_charge_time; 97 bool average_enable; 98 u32 average_select; 99 100 struct completion completion; 101 }; 102 103 /* 104 * TSC module need ADC to get the measure value. So 105 * before config TSC, we should initialize ADC module. 106 */ 107 static int imx6ul_adc_init(struct imx6ul_tsc *tsc) 108 { 109 u32 adc_hc = 0; 110 u32 adc_gc; 111 u32 adc_gs; 112 u32 adc_cfg; 113 unsigned long timeout; 114 115 reinit_completion(&tsc->completion); 116 117 adc_cfg = readl(tsc->adc_regs + REG_ADC_CFG); 118 adc_cfg &= ~(ADC_CONV_MODE_MASK | ADC_INPUT_CLK_MASK); 119 adc_cfg |= ADC_12BIT_MODE | ADC_IPG_CLK; 120 adc_cfg &= ~(ADC_CLK_DIV_MASK | ADC_SAMPLE_MODE_MASK); 121 adc_cfg |= ADC_CLK_DIV_8 | ADC_SHORT_SAMPLE_MODE; 122 if (tsc->average_enable) { 123 adc_cfg &= ~ADC_AVGS_MASK; 124 adc_cfg |= (tsc->average_select) << ADC_AVGS_SHIFT; 125 } 126 adc_cfg &= ~ADC_HARDWARE_TRIGGER; 127 writel(adc_cfg, tsc->adc_regs + REG_ADC_CFG); 128 129 /* enable calibration interrupt */ 130 adc_hc |= ADC_AIEN; 131 adc_hc |= ADC_CONV_DISABLE; 132 writel(adc_hc, tsc->adc_regs + REG_ADC_HC0); 133 134 /* start ADC calibration */ 135 adc_gc = readl(tsc->adc_regs + REG_ADC_GC); 136 adc_gc |= ADC_CAL; 137 if (tsc->average_enable) 138 adc_gc |= ADC_AVGE; 139 writel(adc_gc, tsc->adc_regs + REG_ADC_GC); 140 141 timeout = wait_for_completion_timeout 142 (&tsc->completion, ADC_TIMEOUT); 143 if (timeout == 0) { 144 dev_err(tsc->dev, "Timeout for adc calibration\n"); 145 return -ETIMEDOUT; 146 } 147 148 adc_gs = readl(tsc->adc_regs + REG_ADC_GS); 149 if (adc_gs & ADC_CALF) { 150 dev_err(tsc->dev, "ADC calibration failed\n"); 151 return -EINVAL; 152 } 153 154 /* TSC need the ADC work in hardware trigger */ 155 adc_cfg = readl(tsc->adc_regs + REG_ADC_CFG); 156 adc_cfg |= ADC_HARDWARE_TRIGGER; 157 writel(adc_cfg, tsc->adc_regs + REG_ADC_CFG); 158 159 return 0; 160 } 161 162 /* 163 * This is a TSC workaround. Currently TSC misconnect two 164 * ADC channels, this function remap channel configure for 165 * hardware trigger. 166 */ 167 static void imx6ul_tsc_channel_config(struct imx6ul_tsc *tsc) 168 { 169 u32 adc_hc0, adc_hc1, adc_hc2, adc_hc3, adc_hc4; 170 171 adc_hc0 = DISABLE_CONVERSION_INT; 172 writel(adc_hc0, tsc->adc_regs + REG_ADC_HC0); 173 174 adc_hc1 = DISABLE_CONVERSION_INT | SELECT_CHANNEL_4; 175 writel(adc_hc1, tsc->adc_regs + REG_ADC_HC1); 176 177 adc_hc2 = DISABLE_CONVERSION_INT; 178 writel(adc_hc2, tsc->adc_regs + REG_ADC_HC2); 179 180 adc_hc3 = DISABLE_CONVERSION_INT | SELECT_CHANNEL_1; 181 writel(adc_hc3, tsc->adc_regs + REG_ADC_HC3); 182 183 adc_hc4 = DISABLE_CONVERSION_INT; 184 writel(adc_hc4, tsc->adc_regs + REG_ADC_HC4); 185 } 186 187 /* 188 * TSC setting, confige the pre-charge time and measure delay time. 189 * different touch screen may need different pre-charge time and 190 * measure delay time. 191 */ 192 static void imx6ul_tsc_set(struct imx6ul_tsc *tsc) 193 { 194 u32 basic_setting = 0; 195 u32 start; 196 197 basic_setting |= tsc->measure_delay_time << 8; 198 basic_setting |= DETECT_4_WIRE_MODE | AUTO_MEASURE; 199 writel(basic_setting, tsc->tsc_regs + REG_TSC_BASIC_SETING); 200 201 writel(DE_GLITCH_2, tsc->tsc_regs + REG_TSC_DEBUG_MODE2); 202 203 writel(tsc->pre_charge_time, tsc->tsc_regs + REG_TSC_PRE_CHARGE_TIME); 204 writel(MEASURE_INT_EN, tsc->tsc_regs + REG_TSC_INT_EN); 205 writel(MEASURE_SIG_EN | VALID_SIG_EN, 206 tsc->tsc_regs + REG_TSC_INT_SIG_EN); 207 208 /* start sense detection */ 209 start = readl(tsc->tsc_regs + REG_TSC_FLOW_CONTROL); 210 start |= START_SENSE; 211 start &= ~TSC_DISABLE; 212 writel(start, tsc->tsc_regs + REG_TSC_FLOW_CONTROL); 213 } 214 215 static int imx6ul_tsc_init(struct imx6ul_tsc *tsc) 216 { 217 int err; 218 219 err = imx6ul_adc_init(tsc); 220 if (err) 221 return err; 222 imx6ul_tsc_channel_config(tsc); 223 imx6ul_tsc_set(tsc); 224 225 return 0; 226 } 227 228 static void imx6ul_tsc_disable(struct imx6ul_tsc *tsc) 229 { 230 u32 tsc_flow; 231 u32 adc_cfg; 232 233 /* TSC controller enters to idle status */ 234 tsc_flow = readl(tsc->tsc_regs + REG_TSC_FLOW_CONTROL); 235 tsc_flow |= TSC_DISABLE; 236 writel(tsc_flow, tsc->tsc_regs + REG_TSC_FLOW_CONTROL); 237 238 /* ADC controller enters to stop mode */ 239 adc_cfg = readl(tsc->adc_regs + REG_ADC_HC0); 240 adc_cfg |= ADC_CONV_DISABLE; 241 writel(adc_cfg, tsc->adc_regs + REG_ADC_HC0); 242 } 243 244 /* Delay some time (max 2ms), wait the pre-charge done. */ 245 static bool tsc_wait_detect_mode(struct imx6ul_tsc *tsc) 246 { 247 unsigned long timeout = jiffies + msecs_to_jiffies(2); 248 u32 state_machine; 249 u32 debug_mode2; 250 251 do { 252 if (time_after(jiffies, timeout)) 253 return false; 254 255 usleep_range(200, 400); 256 debug_mode2 = readl(tsc->tsc_regs + REG_TSC_DEBUG_MODE2); 257 state_machine = (debug_mode2 >> 20) & 0x7; 258 } while (state_machine != DETECT_MODE); 259 260 usleep_range(200, 400); 261 return true; 262 } 263 264 static irqreturn_t tsc_irq_fn(int irq, void *dev_id) 265 { 266 struct imx6ul_tsc *tsc = dev_id; 267 u32 status; 268 u32 value; 269 u32 x, y; 270 u32 start; 271 272 status = readl(tsc->tsc_regs + REG_TSC_INT_STATUS); 273 274 /* write 1 to clear the bit measure-signal */ 275 writel(MEASURE_SIGNAL | DETECT_SIGNAL, 276 tsc->tsc_regs + REG_TSC_INT_STATUS); 277 278 /* It's a HW self-clean bit. Set this bit and start sense detection */ 279 start = readl(tsc->tsc_regs + REG_TSC_FLOW_CONTROL); 280 start |= START_SENSE; 281 writel(start, tsc->tsc_regs + REG_TSC_FLOW_CONTROL); 282 283 if (status & MEASURE_SIGNAL) { 284 value = readl(tsc->tsc_regs + REG_TSC_MEASURE_VALUE); 285 x = (value >> 16) & 0x0fff; 286 y = value & 0x0fff; 287 288 /* 289 * In detect mode, we can get the xnur gpio value, 290 * otherwise assume contact is stiull active. 291 */ 292 if (!tsc_wait_detect_mode(tsc) || 293 gpiod_get_value_cansleep(tsc->xnur_gpio)) { 294 input_report_key(tsc->input, BTN_TOUCH, 1); 295 input_report_abs(tsc->input, ABS_X, x); 296 input_report_abs(tsc->input, ABS_Y, y); 297 } else { 298 input_report_key(tsc->input, BTN_TOUCH, 0); 299 } 300 301 input_sync(tsc->input); 302 } 303 304 return IRQ_HANDLED; 305 } 306 307 static irqreturn_t adc_irq_fn(int irq, void *dev_id) 308 { 309 struct imx6ul_tsc *tsc = dev_id; 310 u32 coco; 311 u32 value; 312 313 coco = readl(tsc->adc_regs + REG_ADC_HS); 314 if (coco & 0x01) { 315 value = readl(tsc->adc_regs + REG_ADC_R0); 316 complete(&tsc->completion); 317 } 318 319 return IRQ_HANDLED; 320 } 321 322 static int imx6ul_tsc_open(struct input_dev *input_dev) 323 { 324 struct imx6ul_tsc *tsc = input_get_drvdata(input_dev); 325 int err; 326 327 err = clk_prepare_enable(tsc->adc_clk); 328 if (err) { 329 dev_err(tsc->dev, 330 "Could not prepare or enable the adc clock: %d\n", 331 err); 332 return err; 333 } 334 335 err = clk_prepare_enable(tsc->tsc_clk); 336 if (err) { 337 dev_err(tsc->dev, 338 "Could not prepare or enable the tsc clock: %d\n", 339 err); 340 goto disable_adc_clk; 341 } 342 343 err = imx6ul_tsc_init(tsc); 344 if (err) 345 goto disable_tsc_clk; 346 347 return 0; 348 349 disable_tsc_clk: 350 clk_disable_unprepare(tsc->tsc_clk); 351 disable_adc_clk: 352 clk_disable_unprepare(tsc->adc_clk); 353 return err; 354 } 355 356 static void imx6ul_tsc_close(struct input_dev *input_dev) 357 { 358 struct imx6ul_tsc *tsc = input_get_drvdata(input_dev); 359 360 imx6ul_tsc_disable(tsc); 361 362 clk_disable_unprepare(tsc->tsc_clk); 363 clk_disable_unprepare(tsc->adc_clk); 364 } 365 366 static int imx6ul_tsc_probe(struct platform_device *pdev) 367 { 368 struct device_node *np = pdev->dev.of_node; 369 struct imx6ul_tsc *tsc; 370 struct input_dev *input_dev; 371 struct resource *tsc_mem; 372 struct resource *adc_mem; 373 int err; 374 int tsc_irq; 375 int adc_irq; 376 u32 average_samples; 377 378 tsc = devm_kzalloc(&pdev->dev, sizeof(*tsc), GFP_KERNEL); 379 if (!tsc) 380 return -ENOMEM; 381 382 input_dev = devm_input_allocate_device(&pdev->dev); 383 if (!input_dev) 384 return -ENOMEM; 385 386 input_dev->name = "iMX6UL Touchscreen Controller"; 387 input_dev->id.bustype = BUS_HOST; 388 389 input_dev->open = imx6ul_tsc_open; 390 input_dev->close = imx6ul_tsc_close; 391 392 input_set_capability(input_dev, EV_KEY, BTN_TOUCH); 393 input_set_abs_params(input_dev, ABS_X, 0, 0xFFF, 0, 0); 394 input_set_abs_params(input_dev, ABS_Y, 0, 0xFFF, 0, 0); 395 396 input_set_drvdata(input_dev, tsc); 397 398 tsc->dev = &pdev->dev; 399 tsc->input = input_dev; 400 init_completion(&tsc->completion); 401 402 tsc->xnur_gpio = devm_gpiod_get(&pdev->dev, "xnur", GPIOD_IN); 403 if (IS_ERR(tsc->xnur_gpio)) { 404 err = PTR_ERR(tsc->xnur_gpio); 405 dev_err(&pdev->dev, 406 "failed to request GPIO tsc_X- (xnur): %d\n", err); 407 return err; 408 } 409 410 tsc_mem = platform_get_resource(pdev, IORESOURCE_MEM, 0); 411 tsc->tsc_regs = devm_ioremap_resource(&pdev->dev, tsc_mem); 412 if (IS_ERR(tsc->tsc_regs)) { 413 err = PTR_ERR(tsc->tsc_regs); 414 dev_err(&pdev->dev, "failed to remap tsc memory: %d\n", err); 415 return err; 416 } 417 418 adc_mem = platform_get_resource(pdev, IORESOURCE_MEM, 1); 419 tsc->adc_regs = devm_ioremap_resource(&pdev->dev, adc_mem); 420 if (IS_ERR(tsc->adc_regs)) { 421 err = PTR_ERR(tsc->adc_regs); 422 dev_err(&pdev->dev, "failed to remap adc memory: %d\n", err); 423 return err; 424 } 425 426 tsc->tsc_clk = devm_clk_get(&pdev->dev, "tsc"); 427 if (IS_ERR(tsc->tsc_clk)) { 428 err = PTR_ERR(tsc->tsc_clk); 429 dev_err(&pdev->dev, "failed getting tsc clock: %d\n", err); 430 return err; 431 } 432 433 tsc->adc_clk = devm_clk_get(&pdev->dev, "adc"); 434 if (IS_ERR(tsc->adc_clk)) { 435 err = PTR_ERR(tsc->adc_clk); 436 dev_err(&pdev->dev, "failed getting adc clock: %d\n", err); 437 return err; 438 } 439 440 tsc_irq = platform_get_irq(pdev, 0); 441 if (tsc_irq < 0) { 442 dev_err(&pdev->dev, "no tsc irq resource?\n"); 443 return tsc_irq; 444 } 445 446 adc_irq = platform_get_irq(pdev, 1); 447 if (adc_irq < 0) { 448 dev_err(&pdev->dev, "no adc irq resource?\n"); 449 return adc_irq; 450 } 451 452 err = devm_request_threaded_irq(tsc->dev, tsc_irq, 453 NULL, tsc_irq_fn, IRQF_ONESHOT, 454 dev_name(&pdev->dev), tsc); 455 if (err) { 456 dev_err(&pdev->dev, 457 "failed requesting tsc irq %d: %d\n", 458 tsc_irq, err); 459 return err; 460 } 461 462 err = devm_request_irq(tsc->dev, adc_irq, adc_irq_fn, 0, 463 dev_name(&pdev->dev), tsc); 464 if (err) { 465 dev_err(&pdev->dev, 466 "failed requesting adc irq %d: %d\n", 467 adc_irq, err); 468 return err; 469 } 470 471 err = of_property_read_u32(np, "measure-delay-time", 472 &tsc->measure_delay_time); 473 if (err) 474 tsc->measure_delay_time = 0xffff; 475 476 err = of_property_read_u32(np, "pre-charge-time", 477 &tsc->pre_charge_time); 478 if (err) 479 tsc->pre_charge_time = 0xfff; 480 481 err = of_property_read_u32(np, "touchscreen-average-samples", 482 &average_samples); 483 if (err) 484 average_samples = 1; 485 486 switch (average_samples) { 487 case 1: 488 tsc->average_enable = false; 489 tsc->average_select = 0; /* value unused; initialize anyway */ 490 break; 491 case 4: 492 case 8: 493 case 16: 494 case 32: 495 tsc->average_enable = true; 496 tsc->average_select = ilog2(average_samples) - 2; 497 break; 498 default: 499 dev_err(&pdev->dev, 500 "touchscreen-average-samples (%u) must be 1, 4, 8, 16 or 32\n", 501 average_samples); 502 return -EINVAL; 503 } 504 505 err = input_register_device(tsc->input); 506 if (err) { 507 dev_err(&pdev->dev, 508 "failed to register input device: %d\n", err); 509 return err; 510 } 511 512 platform_set_drvdata(pdev, tsc); 513 return 0; 514 } 515 516 static int __maybe_unused imx6ul_tsc_suspend(struct device *dev) 517 { 518 struct platform_device *pdev = to_platform_device(dev); 519 struct imx6ul_tsc *tsc = platform_get_drvdata(pdev); 520 struct input_dev *input_dev = tsc->input; 521 522 mutex_lock(&input_dev->mutex); 523 524 if (input_dev->users) { 525 imx6ul_tsc_disable(tsc); 526 527 clk_disable_unprepare(tsc->tsc_clk); 528 clk_disable_unprepare(tsc->adc_clk); 529 } 530 531 mutex_unlock(&input_dev->mutex); 532 533 return 0; 534 } 535 536 static int __maybe_unused imx6ul_tsc_resume(struct device *dev) 537 { 538 struct platform_device *pdev = to_platform_device(dev); 539 struct imx6ul_tsc *tsc = platform_get_drvdata(pdev); 540 struct input_dev *input_dev = tsc->input; 541 int retval = 0; 542 543 mutex_lock(&input_dev->mutex); 544 545 if (input_dev->users) { 546 retval = clk_prepare_enable(tsc->adc_clk); 547 if (retval) 548 goto out; 549 550 retval = clk_prepare_enable(tsc->tsc_clk); 551 if (retval) { 552 clk_disable_unprepare(tsc->adc_clk); 553 goto out; 554 } 555 556 retval = imx6ul_tsc_init(tsc); 557 } 558 559 out: 560 mutex_unlock(&input_dev->mutex); 561 return retval; 562 } 563 564 static SIMPLE_DEV_PM_OPS(imx6ul_tsc_pm_ops, 565 imx6ul_tsc_suspend, imx6ul_tsc_resume); 566 567 static const struct of_device_id imx6ul_tsc_match[] = { 568 { .compatible = "fsl,imx6ul-tsc", }, 569 { /* sentinel */ } 570 }; 571 MODULE_DEVICE_TABLE(of, imx6ul_tsc_match); 572 573 static struct platform_driver imx6ul_tsc_driver = { 574 .driver = { 575 .name = "imx6ul-tsc", 576 .of_match_table = imx6ul_tsc_match, 577 .pm = &imx6ul_tsc_pm_ops, 578 }, 579 .probe = imx6ul_tsc_probe, 580 }; 581 module_platform_driver(imx6ul_tsc_driver); 582 583 MODULE_AUTHOR("Haibo Chen <haibo.chen@freescale.com>"); 584 MODULE_DESCRIPTION("Freescale i.MX6UL Touchscreen controller driver"); 585 MODULE_LICENSE("GPL v2"); 586