1 /* 2 * i8042 keyboard and mouse controller driver for Linux 3 * 4 * Copyright (c) 1999-2004 Vojtech Pavlik 5 */ 6 7 /* 8 * This program is free software; you can redistribute it and/or modify it 9 * under the terms of the GNU General Public License version 2 as published by 10 * the Free Software Foundation. 11 */ 12 13 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt 14 15 #include <linux/types.h> 16 #include <linux/delay.h> 17 #include <linux/module.h> 18 #include <linux/interrupt.h> 19 #include <linux/ioport.h> 20 #include <linux/init.h> 21 #include <linux/serio.h> 22 #include <linux/err.h> 23 #include <linux/rcupdate.h> 24 #include <linux/platform_device.h> 25 #include <linux/i8042.h> 26 #include <linux/slab.h> 27 28 #include <asm/io.h> 29 30 MODULE_AUTHOR("Vojtech Pavlik <vojtech@suse.cz>"); 31 MODULE_DESCRIPTION("i8042 keyboard and mouse controller driver"); 32 MODULE_LICENSE("GPL"); 33 34 static bool i8042_nokbd; 35 module_param_named(nokbd, i8042_nokbd, bool, 0); 36 MODULE_PARM_DESC(nokbd, "Do not probe or use KBD port."); 37 38 static bool i8042_noaux; 39 module_param_named(noaux, i8042_noaux, bool, 0); 40 MODULE_PARM_DESC(noaux, "Do not probe or use AUX (mouse) port."); 41 42 static bool i8042_nomux; 43 module_param_named(nomux, i8042_nomux, bool, 0); 44 MODULE_PARM_DESC(nomux, "Do not check whether an active multiplexing controller is present."); 45 46 static bool i8042_unlock; 47 module_param_named(unlock, i8042_unlock, bool, 0); 48 MODULE_PARM_DESC(unlock, "Ignore keyboard lock."); 49 50 static bool i8042_reset; 51 module_param_named(reset, i8042_reset, bool, 0); 52 MODULE_PARM_DESC(reset, "Reset controller during init and cleanup."); 53 54 static bool i8042_direct; 55 module_param_named(direct, i8042_direct, bool, 0); 56 MODULE_PARM_DESC(direct, "Put keyboard port into non-translated mode."); 57 58 static bool i8042_dumbkbd; 59 module_param_named(dumbkbd, i8042_dumbkbd, bool, 0); 60 MODULE_PARM_DESC(dumbkbd, "Pretend that controller can only read data from keyboard"); 61 62 static bool i8042_noloop; 63 module_param_named(noloop, i8042_noloop, bool, 0); 64 MODULE_PARM_DESC(noloop, "Disable the AUX Loopback command while probing for the AUX port"); 65 66 static bool i8042_notimeout; 67 module_param_named(notimeout, i8042_notimeout, bool, 0); 68 MODULE_PARM_DESC(notimeout, "Ignore timeouts signalled by i8042"); 69 70 static bool i8042_kbdreset; 71 module_param_named(kbdreset, i8042_kbdreset, bool, 0); 72 MODULE_PARM_DESC(kbdreset, "Reset device connected to KBD port"); 73 74 #ifdef CONFIG_X86 75 static bool i8042_dritek; 76 module_param_named(dritek, i8042_dritek, bool, 0); 77 MODULE_PARM_DESC(dritek, "Force enable the Dritek keyboard extension"); 78 #endif 79 80 #ifdef CONFIG_PNP 81 static bool i8042_nopnp; 82 module_param_named(nopnp, i8042_nopnp, bool, 0); 83 MODULE_PARM_DESC(nopnp, "Do not use PNP to detect controller settings"); 84 #endif 85 86 #define DEBUG 87 #ifdef DEBUG 88 static bool i8042_debug; 89 module_param_named(debug, i8042_debug, bool, 0600); 90 MODULE_PARM_DESC(debug, "Turn i8042 debugging mode on and off"); 91 92 static bool i8042_unmask_kbd_data; 93 module_param_named(unmask_kbd_data, i8042_unmask_kbd_data, bool, 0600); 94 MODULE_PARM_DESC(unmask_kbd_data, "Unconditional enable (may reveal sensitive data) of normally sanitize-filtered kbd data traffic debug log [pre-condition: i8042.debug=1 enabled]"); 95 #endif 96 97 static bool i8042_bypass_aux_irq_test; 98 static char i8042_kbd_firmware_id[128]; 99 static char i8042_aux_firmware_id[128]; 100 101 #include "i8042.h" 102 103 /* 104 * i8042_lock protects serialization between i8042_command and 105 * the interrupt handler. 106 */ 107 static DEFINE_SPINLOCK(i8042_lock); 108 109 /* 110 * Writers to AUX and KBD ports as well as users issuing i8042_command 111 * directly should acquire i8042_mutex (by means of calling 112 * i8042_lock_chip() and i8042_unlock_ship() helpers) to ensure that 113 * they do not disturb each other (unfortunately in many i8042 114 * implementations write to one of the ports will immediately abort 115 * command that is being processed by another port). 116 */ 117 static DEFINE_MUTEX(i8042_mutex); 118 119 struct i8042_port { 120 struct serio *serio; 121 int irq; 122 bool exists; 123 bool driver_bound; 124 signed char mux; 125 }; 126 127 #define I8042_KBD_PORT_NO 0 128 #define I8042_AUX_PORT_NO 1 129 #define I8042_MUX_PORT_NO 2 130 #define I8042_NUM_PORTS (I8042_NUM_MUX_PORTS + 2) 131 132 static struct i8042_port i8042_ports[I8042_NUM_PORTS]; 133 134 static unsigned char i8042_initial_ctr; 135 static unsigned char i8042_ctr; 136 static bool i8042_mux_present; 137 static bool i8042_kbd_irq_registered; 138 static bool i8042_aux_irq_registered; 139 static unsigned char i8042_suppress_kbd_ack; 140 static struct platform_device *i8042_platform_device; 141 static struct notifier_block i8042_kbd_bind_notifier_block; 142 143 static irqreturn_t i8042_interrupt(int irq, void *dev_id); 144 static bool (*i8042_platform_filter)(unsigned char data, unsigned char str, 145 struct serio *serio); 146 147 void i8042_lock_chip(void) 148 { 149 mutex_lock(&i8042_mutex); 150 } 151 EXPORT_SYMBOL(i8042_lock_chip); 152 153 void i8042_unlock_chip(void) 154 { 155 mutex_unlock(&i8042_mutex); 156 } 157 EXPORT_SYMBOL(i8042_unlock_chip); 158 159 int i8042_install_filter(bool (*filter)(unsigned char data, unsigned char str, 160 struct serio *serio)) 161 { 162 unsigned long flags; 163 int ret = 0; 164 165 spin_lock_irqsave(&i8042_lock, flags); 166 167 if (i8042_platform_filter) { 168 ret = -EBUSY; 169 goto out; 170 } 171 172 i8042_platform_filter = filter; 173 174 out: 175 spin_unlock_irqrestore(&i8042_lock, flags); 176 return ret; 177 } 178 EXPORT_SYMBOL(i8042_install_filter); 179 180 int i8042_remove_filter(bool (*filter)(unsigned char data, unsigned char str, 181 struct serio *port)) 182 { 183 unsigned long flags; 184 int ret = 0; 185 186 spin_lock_irqsave(&i8042_lock, flags); 187 188 if (i8042_platform_filter != filter) { 189 ret = -EINVAL; 190 goto out; 191 } 192 193 i8042_platform_filter = NULL; 194 195 out: 196 spin_unlock_irqrestore(&i8042_lock, flags); 197 return ret; 198 } 199 EXPORT_SYMBOL(i8042_remove_filter); 200 201 /* 202 * The i8042_wait_read() and i8042_wait_write functions wait for the i8042 to 203 * be ready for reading values from it / writing values to it. 204 * Called always with i8042_lock held. 205 */ 206 207 static int i8042_wait_read(void) 208 { 209 int i = 0; 210 211 while ((~i8042_read_status() & I8042_STR_OBF) && (i < I8042_CTL_TIMEOUT)) { 212 udelay(50); 213 i++; 214 } 215 return -(i == I8042_CTL_TIMEOUT); 216 } 217 218 static int i8042_wait_write(void) 219 { 220 int i = 0; 221 222 while ((i8042_read_status() & I8042_STR_IBF) && (i < I8042_CTL_TIMEOUT)) { 223 udelay(50); 224 i++; 225 } 226 return -(i == I8042_CTL_TIMEOUT); 227 } 228 229 /* 230 * i8042_flush() flushes all data that may be in the keyboard and mouse buffers 231 * of the i8042 down the toilet. 232 */ 233 234 static int i8042_flush(void) 235 { 236 unsigned long flags; 237 unsigned char data, str; 238 int count = 0; 239 int retval = 0; 240 241 spin_lock_irqsave(&i8042_lock, flags); 242 243 while ((str = i8042_read_status()) & I8042_STR_OBF) { 244 if (count++ < I8042_BUFFER_SIZE) { 245 udelay(50); 246 data = i8042_read_data(); 247 dbg("%02x <- i8042 (flush, %s)\n", 248 data, str & I8042_STR_AUXDATA ? "aux" : "kbd"); 249 } else { 250 retval = -EIO; 251 break; 252 } 253 } 254 255 spin_unlock_irqrestore(&i8042_lock, flags); 256 257 return retval; 258 } 259 260 /* 261 * i8042_command() executes a command on the i8042. It also sends the input 262 * parameter(s) of the commands to it, and receives the output value(s). The 263 * parameters are to be stored in the param array, and the output is placed 264 * into the same array. The number of the parameters and output values is 265 * encoded in bits 8-11 of the command number. 266 */ 267 268 static int __i8042_command(unsigned char *param, int command) 269 { 270 int i, error; 271 272 if (i8042_noloop && command == I8042_CMD_AUX_LOOP) 273 return -1; 274 275 error = i8042_wait_write(); 276 if (error) 277 return error; 278 279 dbg("%02x -> i8042 (command)\n", command & 0xff); 280 i8042_write_command(command & 0xff); 281 282 for (i = 0; i < ((command >> 12) & 0xf); i++) { 283 error = i8042_wait_write(); 284 if (error) 285 return error; 286 dbg("%02x -> i8042 (parameter)\n", param[i]); 287 i8042_write_data(param[i]); 288 } 289 290 for (i = 0; i < ((command >> 8) & 0xf); i++) { 291 error = i8042_wait_read(); 292 if (error) { 293 dbg(" -- i8042 (timeout)\n"); 294 return error; 295 } 296 297 if (command == I8042_CMD_AUX_LOOP && 298 !(i8042_read_status() & I8042_STR_AUXDATA)) { 299 dbg(" -- i8042 (auxerr)\n"); 300 return -1; 301 } 302 303 param[i] = i8042_read_data(); 304 dbg("%02x <- i8042 (return)\n", param[i]); 305 } 306 307 return 0; 308 } 309 310 int i8042_command(unsigned char *param, int command) 311 { 312 unsigned long flags; 313 int retval; 314 315 spin_lock_irqsave(&i8042_lock, flags); 316 retval = __i8042_command(param, command); 317 spin_unlock_irqrestore(&i8042_lock, flags); 318 319 return retval; 320 } 321 EXPORT_SYMBOL(i8042_command); 322 323 /* 324 * i8042_kbd_write() sends a byte out through the keyboard interface. 325 */ 326 327 static int i8042_kbd_write(struct serio *port, unsigned char c) 328 { 329 unsigned long flags; 330 int retval = 0; 331 332 spin_lock_irqsave(&i8042_lock, flags); 333 334 if (!(retval = i8042_wait_write())) { 335 dbg("%02x -> i8042 (kbd-data)\n", c); 336 i8042_write_data(c); 337 } 338 339 spin_unlock_irqrestore(&i8042_lock, flags); 340 341 return retval; 342 } 343 344 /* 345 * i8042_aux_write() sends a byte out through the aux interface. 346 */ 347 348 static int i8042_aux_write(struct serio *serio, unsigned char c) 349 { 350 struct i8042_port *port = serio->port_data; 351 352 return i8042_command(&c, port->mux == -1 ? 353 I8042_CMD_AUX_SEND : 354 I8042_CMD_MUX_SEND + port->mux); 355 } 356 357 358 /* 359 * i8042_aux_close attempts to clear AUX or KBD port state by disabling 360 * and then re-enabling it. 361 */ 362 363 static void i8042_port_close(struct serio *serio) 364 { 365 int irq_bit; 366 int disable_bit; 367 const char *port_name; 368 369 if (serio == i8042_ports[I8042_AUX_PORT_NO].serio) { 370 irq_bit = I8042_CTR_AUXINT; 371 disable_bit = I8042_CTR_AUXDIS; 372 port_name = "AUX"; 373 } else { 374 irq_bit = I8042_CTR_KBDINT; 375 disable_bit = I8042_CTR_KBDDIS; 376 port_name = "KBD"; 377 } 378 379 i8042_ctr &= ~irq_bit; 380 if (i8042_command(&i8042_ctr, I8042_CMD_CTL_WCTR)) 381 pr_warn("Can't write CTR while closing %s port\n", port_name); 382 383 udelay(50); 384 385 i8042_ctr &= ~disable_bit; 386 i8042_ctr |= irq_bit; 387 if (i8042_command(&i8042_ctr, I8042_CMD_CTL_WCTR)) 388 pr_err("Can't reactivate %s port\n", port_name); 389 390 /* 391 * See if there is any data appeared while we were messing with 392 * port state. 393 */ 394 i8042_interrupt(0, NULL); 395 } 396 397 /* 398 * i8042_start() is called by serio core when port is about to finish 399 * registering. It will mark port as existing so i8042_interrupt can 400 * start sending data through it. 401 */ 402 static int i8042_start(struct serio *serio) 403 { 404 struct i8042_port *port = serio->port_data; 405 406 port->exists = true; 407 mb(); 408 return 0; 409 } 410 411 /* 412 * i8042_stop() marks serio port as non-existing so i8042_interrupt 413 * will not try to send data to the port that is about to go away. 414 * The function is called by serio core as part of unregister procedure. 415 */ 416 static void i8042_stop(struct serio *serio) 417 { 418 struct i8042_port *port = serio->port_data; 419 420 port->exists = false; 421 422 /* 423 * We synchronize with both AUX and KBD IRQs because there is 424 * a (very unlikely) chance that AUX IRQ is raised for KBD port 425 * and vice versa. 426 */ 427 synchronize_irq(I8042_AUX_IRQ); 428 synchronize_irq(I8042_KBD_IRQ); 429 port->serio = NULL; 430 } 431 432 /* 433 * i8042_filter() filters out unwanted bytes from the input data stream. 434 * It is called from i8042_interrupt and thus is running with interrupts 435 * off and i8042_lock held. 436 */ 437 static bool i8042_filter(unsigned char data, unsigned char str, 438 struct serio *serio) 439 { 440 if (unlikely(i8042_suppress_kbd_ack)) { 441 if ((~str & I8042_STR_AUXDATA) && 442 (data == 0xfa || data == 0xfe)) { 443 i8042_suppress_kbd_ack--; 444 dbg("Extra keyboard ACK - filtered out\n"); 445 return true; 446 } 447 } 448 449 if (i8042_platform_filter && i8042_platform_filter(data, str, serio)) { 450 dbg("Filtered out by platform filter\n"); 451 return true; 452 } 453 454 return false; 455 } 456 457 /* 458 * i8042_interrupt() is the most important function in this driver - 459 * it handles the interrupts from the i8042, and sends incoming bytes 460 * to the upper layers. 461 */ 462 463 static irqreturn_t i8042_interrupt(int irq, void *dev_id) 464 { 465 struct i8042_port *port; 466 struct serio *serio; 467 unsigned long flags; 468 unsigned char str, data; 469 unsigned int dfl; 470 unsigned int port_no; 471 bool filtered; 472 int ret = 1; 473 474 spin_lock_irqsave(&i8042_lock, flags); 475 476 str = i8042_read_status(); 477 if (unlikely(~str & I8042_STR_OBF)) { 478 spin_unlock_irqrestore(&i8042_lock, flags); 479 if (irq) 480 dbg("Interrupt %d, without any data\n", irq); 481 ret = 0; 482 goto out; 483 } 484 485 data = i8042_read_data(); 486 487 if (i8042_mux_present && (str & I8042_STR_AUXDATA)) { 488 static unsigned long last_transmit; 489 static unsigned char last_str; 490 491 dfl = 0; 492 if (str & I8042_STR_MUXERR) { 493 dbg("MUX error, status is %02x, data is %02x\n", 494 str, data); 495 /* 496 * When MUXERR condition is signalled the data register can only contain 497 * 0xfd, 0xfe or 0xff if implementation follows the spec. Unfortunately 498 * it is not always the case. Some KBCs also report 0xfc when there is 499 * nothing connected to the port while others sometimes get confused which 500 * port the data came from and signal error leaving the data intact. They 501 * _do not_ revert to legacy mode (actually I've never seen KBC reverting 502 * to legacy mode yet, when we see one we'll add proper handling). 503 * Anyway, we process 0xfc, 0xfd, 0xfe and 0xff as timeouts, and for the 504 * rest assume that the data came from the same serio last byte 505 * was transmitted (if transmission happened not too long ago). 506 */ 507 508 switch (data) { 509 default: 510 if (time_before(jiffies, last_transmit + HZ/10)) { 511 str = last_str; 512 break; 513 } 514 /* fall through - report timeout */ 515 case 0xfc: 516 case 0xfd: 517 case 0xfe: dfl = SERIO_TIMEOUT; data = 0xfe; break; 518 case 0xff: dfl = SERIO_PARITY; data = 0xfe; break; 519 } 520 } 521 522 port_no = I8042_MUX_PORT_NO + ((str >> 6) & 3); 523 last_str = str; 524 last_transmit = jiffies; 525 } else { 526 527 dfl = ((str & I8042_STR_PARITY) ? SERIO_PARITY : 0) | 528 ((str & I8042_STR_TIMEOUT && !i8042_notimeout) ? SERIO_TIMEOUT : 0); 529 530 port_no = (str & I8042_STR_AUXDATA) ? 531 I8042_AUX_PORT_NO : I8042_KBD_PORT_NO; 532 } 533 534 port = &i8042_ports[port_no]; 535 serio = port->exists ? port->serio : NULL; 536 537 filter_dbg(port->driver_bound, data, "<- i8042 (interrupt, %d, %d%s%s)\n", 538 port_no, irq, 539 dfl & SERIO_PARITY ? ", bad parity" : "", 540 dfl & SERIO_TIMEOUT ? ", timeout" : ""); 541 542 filtered = i8042_filter(data, str, serio); 543 544 spin_unlock_irqrestore(&i8042_lock, flags); 545 546 if (likely(port->exists && !filtered)) 547 serio_interrupt(serio, data, dfl); 548 549 out: 550 return IRQ_RETVAL(ret); 551 } 552 553 /* 554 * i8042_enable_kbd_port enables keyboard port on chip 555 */ 556 557 static int i8042_enable_kbd_port(void) 558 { 559 i8042_ctr &= ~I8042_CTR_KBDDIS; 560 i8042_ctr |= I8042_CTR_KBDINT; 561 562 if (i8042_command(&i8042_ctr, I8042_CMD_CTL_WCTR)) { 563 i8042_ctr &= ~I8042_CTR_KBDINT; 564 i8042_ctr |= I8042_CTR_KBDDIS; 565 pr_err("Failed to enable KBD port\n"); 566 return -EIO; 567 } 568 569 return 0; 570 } 571 572 /* 573 * i8042_enable_aux_port enables AUX (mouse) port on chip 574 */ 575 576 static int i8042_enable_aux_port(void) 577 { 578 i8042_ctr &= ~I8042_CTR_AUXDIS; 579 i8042_ctr |= I8042_CTR_AUXINT; 580 581 if (i8042_command(&i8042_ctr, I8042_CMD_CTL_WCTR)) { 582 i8042_ctr &= ~I8042_CTR_AUXINT; 583 i8042_ctr |= I8042_CTR_AUXDIS; 584 pr_err("Failed to enable AUX port\n"); 585 return -EIO; 586 } 587 588 return 0; 589 } 590 591 /* 592 * i8042_enable_mux_ports enables 4 individual AUX ports after 593 * the controller has been switched into Multiplexed mode 594 */ 595 596 static int i8042_enable_mux_ports(void) 597 { 598 unsigned char param; 599 int i; 600 601 for (i = 0; i < I8042_NUM_MUX_PORTS; i++) { 602 i8042_command(¶m, I8042_CMD_MUX_PFX + i); 603 i8042_command(¶m, I8042_CMD_AUX_ENABLE); 604 } 605 606 return i8042_enable_aux_port(); 607 } 608 609 /* 610 * i8042_set_mux_mode checks whether the controller has an 611 * active multiplexor and puts the chip into Multiplexed (true) 612 * or Legacy (false) mode. 613 */ 614 615 static int i8042_set_mux_mode(bool multiplex, unsigned char *mux_version) 616 { 617 618 unsigned char param, val; 619 /* 620 * Get rid of bytes in the queue. 621 */ 622 623 i8042_flush(); 624 625 /* 626 * Internal loopback test - send three bytes, they should come back from the 627 * mouse interface, the last should be version. 628 */ 629 630 param = val = 0xf0; 631 if (i8042_command(¶m, I8042_CMD_AUX_LOOP) || param != val) 632 return -1; 633 param = val = multiplex ? 0x56 : 0xf6; 634 if (i8042_command(¶m, I8042_CMD_AUX_LOOP) || param != val) 635 return -1; 636 param = val = multiplex ? 0xa4 : 0xa5; 637 if (i8042_command(¶m, I8042_CMD_AUX_LOOP) || param == val) 638 return -1; 639 640 /* 641 * Workaround for interference with USB Legacy emulation 642 * that causes a v10.12 MUX to be found. 643 */ 644 if (param == 0xac) 645 return -1; 646 647 if (mux_version) 648 *mux_version = param; 649 650 return 0; 651 } 652 653 /* 654 * i8042_check_mux() checks whether the controller supports the PS/2 Active 655 * Multiplexing specification by Synaptics, Phoenix, Insyde and 656 * LCS/Telegraphics. 657 */ 658 659 static int __init i8042_check_mux(void) 660 { 661 unsigned char mux_version; 662 663 if (i8042_set_mux_mode(true, &mux_version)) 664 return -1; 665 666 pr_info("Detected active multiplexing controller, rev %d.%d\n", 667 (mux_version >> 4) & 0xf, mux_version & 0xf); 668 669 /* 670 * Disable all muxed ports by disabling AUX. 671 */ 672 i8042_ctr |= I8042_CTR_AUXDIS; 673 i8042_ctr &= ~I8042_CTR_AUXINT; 674 675 if (i8042_command(&i8042_ctr, I8042_CMD_CTL_WCTR)) { 676 pr_err("Failed to disable AUX port, can't use MUX\n"); 677 return -EIO; 678 } 679 680 i8042_mux_present = true; 681 682 return 0; 683 } 684 685 /* 686 * The following is used to test AUX IRQ delivery. 687 */ 688 static struct completion i8042_aux_irq_delivered __initdata; 689 static bool i8042_irq_being_tested __initdata; 690 691 static irqreturn_t __init i8042_aux_test_irq(int irq, void *dev_id) 692 { 693 unsigned long flags; 694 unsigned char str, data; 695 int ret = 0; 696 697 spin_lock_irqsave(&i8042_lock, flags); 698 str = i8042_read_status(); 699 if (str & I8042_STR_OBF) { 700 data = i8042_read_data(); 701 dbg("%02x <- i8042 (aux_test_irq, %s)\n", 702 data, str & I8042_STR_AUXDATA ? "aux" : "kbd"); 703 if (i8042_irq_being_tested && 704 data == 0xa5 && (str & I8042_STR_AUXDATA)) 705 complete(&i8042_aux_irq_delivered); 706 ret = 1; 707 } 708 spin_unlock_irqrestore(&i8042_lock, flags); 709 710 return IRQ_RETVAL(ret); 711 } 712 713 /* 714 * i8042_toggle_aux - enables or disables AUX port on i8042 via command and 715 * verifies success by readinng CTR. Used when testing for presence of AUX 716 * port. 717 */ 718 static int __init i8042_toggle_aux(bool on) 719 { 720 unsigned char param; 721 int i; 722 723 if (i8042_command(¶m, 724 on ? I8042_CMD_AUX_ENABLE : I8042_CMD_AUX_DISABLE)) 725 return -1; 726 727 /* some chips need some time to set the I8042_CTR_AUXDIS bit */ 728 for (i = 0; i < 100; i++) { 729 udelay(50); 730 731 if (i8042_command(¶m, I8042_CMD_CTL_RCTR)) 732 return -1; 733 734 if (!(param & I8042_CTR_AUXDIS) == on) 735 return 0; 736 } 737 738 return -1; 739 } 740 741 /* 742 * i8042_check_aux() applies as much paranoia as it can at detecting 743 * the presence of an AUX interface. 744 */ 745 746 static int __init i8042_check_aux(void) 747 { 748 int retval = -1; 749 bool irq_registered = false; 750 bool aux_loop_broken = false; 751 unsigned long flags; 752 unsigned char param; 753 754 /* 755 * Get rid of bytes in the queue. 756 */ 757 758 i8042_flush(); 759 760 /* 761 * Internal loopback test - filters out AT-type i8042's. Unfortunately 762 * SiS screwed up and their 5597 doesn't support the LOOP command even 763 * though it has an AUX port. 764 */ 765 766 param = 0x5a; 767 retval = i8042_command(¶m, I8042_CMD_AUX_LOOP); 768 if (retval || param != 0x5a) { 769 770 /* 771 * External connection test - filters out AT-soldered PS/2 i8042's 772 * 0x00 - no error, 0x01-0x03 - clock/data stuck, 0xff - general error 773 * 0xfa - no error on some notebooks which ignore the spec 774 * Because it's common for chipsets to return error on perfectly functioning 775 * AUX ports, we test for this only when the LOOP command failed. 776 */ 777 778 if (i8042_command(¶m, I8042_CMD_AUX_TEST) || 779 (param && param != 0xfa && param != 0xff)) 780 return -1; 781 782 /* 783 * If AUX_LOOP completed without error but returned unexpected data 784 * mark it as broken 785 */ 786 if (!retval) 787 aux_loop_broken = true; 788 } 789 790 /* 791 * Bit assignment test - filters out PS/2 i8042's in AT mode 792 */ 793 794 if (i8042_toggle_aux(false)) { 795 pr_warn("Failed to disable AUX port, but continuing anyway... Is this a SiS?\n"); 796 pr_warn("If AUX port is really absent please use the 'i8042.noaux' option\n"); 797 } 798 799 if (i8042_toggle_aux(true)) 800 return -1; 801 802 /* 803 * Reset keyboard (needed on some laptops to successfully detect 804 * touchpad, e.g., some Gigabyte laptop models with Elantech 805 * touchpads). 806 */ 807 if (i8042_kbdreset) { 808 pr_warn("Attempting to reset device connected to KBD port\n"); 809 i8042_kbd_write(NULL, (unsigned char) 0xff); 810 } 811 812 /* 813 * Test AUX IRQ delivery to make sure BIOS did not grab the IRQ and 814 * used it for a PCI card or somethig else. 815 */ 816 817 if (i8042_noloop || i8042_bypass_aux_irq_test || aux_loop_broken) { 818 /* 819 * Without LOOP command we can't test AUX IRQ delivery. Assume the port 820 * is working and hope we are right. 821 */ 822 retval = 0; 823 goto out; 824 } 825 826 if (request_irq(I8042_AUX_IRQ, i8042_aux_test_irq, IRQF_SHARED, 827 "i8042", i8042_platform_device)) 828 goto out; 829 830 irq_registered = true; 831 832 if (i8042_enable_aux_port()) 833 goto out; 834 835 spin_lock_irqsave(&i8042_lock, flags); 836 837 init_completion(&i8042_aux_irq_delivered); 838 i8042_irq_being_tested = true; 839 840 param = 0xa5; 841 retval = __i8042_command(¶m, I8042_CMD_AUX_LOOP & 0xf0ff); 842 843 spin_unlock_irqrestore(&i8042_lock, flags); 844 845 if (retval) 846 goto out; 847 848 if (wait_for_completion_timeout(&i8042_aux_irq_delivered, 849 msecs_to_jiffies(250)) == 0) { 850 /* 851 * AUX IRQ was never delivered so we need to flush the controller to 852 * get rid of the byte we put there; otherwise keyboard may not work. 853 */ 854 dbg(" -- i8042 (aux irq test timeout)\n"); 855 i8042_flush(); 856 retval = -1; 857 } 858 859 out: 860 861 /* 862 * Disable the interface. 863 */ 864 865 i8042_ctr |= I8042_CTR_AUXDIS; 866 i8042_ctr &= ~I8042_CTR_AUXINT; 867 868 if (i8042_command(&i8042_ctr, I8042_CMD_CTL_WCTR)) 869 retval = -1; 870 871 if (irq_registered) 872 free_irq(I8042_AUX_IRQ, i8042_platform_device); 873 874 return retval; 875 } 876 877 static int i8042_controller_check(void) 878 { 879 if (i8042_flush()) { 880 pr_info("No controller found\n"); 881 return -ENODEV; 882 } 883 884 return 0; 885 } 886 887 static int i8042_controller_selftest(void) 888 { 889 unsigned char param; 890 int i = 0; 891 892 /* 893 * We try this 5 times; on some really fragile systems this does not 894 * take the first time... 895 */ 896 do { 897 898 if (i8042_command(¶m, I8042_CMD_CTL_TEST)) { 899 pr_err("i8042 controller selftest timeout\n"); 900 return -ENODEV; 901 } 902 903 if (param == I8042_RET_CTL_TEST) 904 return 0; 905 906 dbg("i8042 controller selftest: %#x != %#x\n", 907 param, I8042_RET_CTL_TEST); 908 msleep(50); 909 } while (i++ < 5); 910 911 #ifdef CONFIG_X86 912 /* 913 * On x86, we don't fail entire i8042 initialization if controller 914 * reset fails in hopes that keyboard port will still be functional 915 * and user will still get a working keyboard. This is especially 916 * important on netbooks. On other arches we trust hardware more. 917 */ 918 pr_info("giving up on controller selftest, continuing anyway...\n"); 919 return 0; 920 #else 921 pr_err("i8042 controller selftest failed\n"); 922 return -EIO; 923 #endif 924 } 925 926 /* 927 * i8042_controller init initializes the i8042 controller, and, 928 * most importantly, sets it into non-xlated mode if that's 929 * desired. 930 */ 931 932 static int i8042_controller_init(void) 933 { 934 unsigned long flags; 935 int n = 0; 936 unsigned char ctr[2]; 937 938 /* 939 * Save the CTR for restore on unload / reboot. 940 */ 941 942 do { 943 if (n >= 10) { 944 pr_err("Unable to get stable CTR read\n"); 945 return -EIO; 946 } 947 948 if (n != 0) 949 udelay(50); 950 951 if (i8042_command(&ctr[n++ % 2], I8042_CMD_CTL_RCTR)) { 952 pr_err("Can't read CTR while initializing i8042\n"); 953 return -EIO; 954 } 955 956 } while (n < 2 || ctr[0] != ctr[1]); 957 958 i8042_initial_ctr = i8042_ctr = ctr[0]; 959 960 /* 961 * Disable the keyboard interface and interrupt. 962 */ 963 964 i8042_ctr |= I8042_CTR_KBDDIS; 965 i8042_ctr &= ~I8042_CTR_KBDINT; 966 967 /* 968 * Handle keylock. 969 */ 970 971 spin_lock_irqsave(&i8042_lock, flags); 972 if (~i8042_read_status() & I8042_STR_KEYLOCK) { 973 if (i8042_unlock) 974 i8042_ctr |= I8042_CTR_IGNKEYLOCK; 975 else 976 pr_warn("Warning: Keylock active\n"); 977 } 978 spin_unlock_irqrestore(&i8042_lock, flags); 979 980 /* 981 * If the chip is configured into nontranslated mode by the BIOS, don't 982 * bother enabling translating and be happy. 983 */ 984 985 if (~i8042_ctr & I8042_CTR_XLATE) 986 i8042_direct = true; 987 988 /* 989 * Set nontranslated mode for the kbd interface if requested by an option. 990 * After this the kbd interface becomes a simple serial in/out, like the aux 991 * interface is. We don't do this by default, since it can confuse notebook 992 * BIOSes. 993 */ 994 995 if (i8042_direct) 996 i8042_ctr &= ~I8042_CTR_XLATE; 997 998 /* 999 * Write CTR back. 1000 */ 1001 1002 if (i8042_command(&i8042_ctr, I8042_CMD_CTL_WCTR)) { 1003 pr_err("Can't write CTR while initializing i8042\n"); 1004 return -EIO; 1005 } 1006 1007 /* 1008 * Flush whatever accumulated while we were disabling keyboard port. 1009 */ 1010 1011 i8042_flush(); 1012 1013 return 0; 1014 } 1015 1016 1017 /* 1018 * Reset the controller and reset CRT to the original value set by BIOS. 1019 */ 1020 1021 static void i8042_controller_reset(bool force_reset) 1022 { 1023 i8042_flush(); 1024 1025 /* 1026 * Disable both KBD and AUX interfaces so they don't get in the way 1027 */ 1028 1029 i8042_ctr |= I8042_CTR_KBDDIS | I8042_CTR_AUXDIS; 1030 i8042_ctr &= ~(I8042_CTR_KBDINT | I8042_CTR_AUXINT); 1031 1032 if (i8042_command(&i8042_ctr, I8042_CMD_CTL_WCTR)) 1033 pr_warn("Can't write CTR while resetting\n"); 1034 1035 /* 1036 * Disable MUX mode if present. 1037 */ 1038 1039 if (i8042_mux_present) 1040 i8042_set_mux_mode(false, NULL); 1041 1042 /* 1043 * Reset the controller if requested. 1044 */ 1045 1046 if (i8042_reset || force_reset) 1047 i8042_controller_selftest(); 1048 1049 /* 1050 * Restore the original control register setting. 1051 */ 1052 1053 if (i8042_command(&i8042_initial_ctr, I8042_CMD_CTL_WCTR)) 1054 pr_warn("Can't restore CTR\n"); 1055 } 1056 1057 1058 /* 1059 * i8042_panic_blink() will turn the keyboard LEDs on or off and is called 1060 * when kernel panics. Flashing LEDs is useful for users running X who may 1061 * not see the console and will help distinguishing panics from "real" 1062 * lockups. 1063 * 1064 * Note that DELAY has a limit of 10ms so we will not get stuck here 1065 * waiting for KBC to free up even if KBD interrupt is off 1066 */ 1067 1068 #define DELAY do { mdelay(1); if (++delay > 10) return delay; } while(0) 1069 1070 static long i8042_panic_blink(int state) 1071 { 1072 long delay = 0; 1073 char led; 1074 1075 led = (state) ? 0x01 | 0x04 : 0; 1076 while (i8042_read_status() & I8042_STR_IBF) 1077 DELAY; 1078 dbg("%02x -> i8042 (panic blink)\n", 0xed); 1079 i8042_suppress_kbd_ack = 2; 1080 i8042_write_data(0xed); /* set leds */ 1081 DELAY; 1082 while (i8042_read_status() & I8042_STR_IBF) 1083 DELAY; 1084 DELAY; 1085 dbg("%02x -> i8042 (panic blink)\n", led); 1086 i8042_write_data(led); 1087 DELAY; 1088 return delay; 1089 } 1090 1091 #undef DELAY 1092 1093 #ifdef CONFIG_X86 1094 static void i8042_dritek_enable(void) 1095 { 1096 unsigned char param = 0x90; 1097 int error; 1098 1099 error = i8042_command(¶m, 0x1059); 1100 if (error) 1101 pr_warn("Failed to enable DRITEK extension: %d\n", error); 1102 } 1103 #endif 1104 1105 #ifdef CONFIG_PM 1106 1107 /* 1108 * Here we try to reset everything back to a state we had 1109 * before suspending. 1110 */ 1111 1112 static int i8042_controller_resume(bool force_reset) 1113 { 1114 int error; 1115 1116 error = i8042_controller_check(); 1117 if (error) 1118 return error; 1119 1120 if (i8042_reset || force_reset) { 1121 error = i8042_controller_selftest(); 1122 if (error) 1123 return error; 1124 } 1125 1126 /* 1127 * Restore original CTR value and disable all ports 1128 */ 1129 1130 i8042_ctr = i8042_initial_ctr; 1131 if (i8042_direct) 1132 i8042_ctr &= ~I8042_CTR_XLATE; 1133 i8042_ctr |= I8042_CTR_AUXDIS | I8042_CTR_KBDDIS; 1134 i8042_ctr &= ~(I8042_CTR_AUXINT | I8042_CTR_KBDINT); 1135 if (i8042_command(&i8042_ctr, I8042_CMD_CTL_WCTR)) { 1136 pr_warn("Can't write CTR to resume, retrying...\n"); 1137 msleep(50); 1138 if (i8042_command(&i8042_ctr, I8042_CMD_CTL_WCTR)) { 1139 pr_err("CTR write retry failed\n"); 1140 return -EIO; 1141 } 1142 } 1143 1144 1145 #ifdef CONFIG_X86 1146 if (i8042_dritek) 1147 i8042_dritek_enable(); 1148 #endif 1149 1150 if (i8042_mux_present) { 1151 if (i8042_set_mux_mode(true, NULL) || i8042_enable_mux_ports()) 1152 pr_warn("failed to resume active multiplexor, mouse won't work\n"); 1153 } else if (i8042_ports[I8042_AUX_PORT_NO].serio) 1154 i8042_enable_aux_port(); 1155 1156 if (i8042_ports[I8042_KBD_PORT_NO].serio) 1157 i8042_enable_kbd_port(); 1158 1159 i8042_interrupt(0, NULL); 1160 1161 return 0; 1162 } 1163 1164 /* 1165 * Here we try to restore the original BIOS settings to avoid 1166 * upsetting it. 1167 */ 1168 1169 static int i8042_pm_suspend(struct device *dev) 1170 { 1171 int i; 1172 1173 i8042_controller_reset(true); 1174 1175 /* Set up serio interrupts for system wakeup. */ 1176 for (i = 0; i < I8042_NUM_PORTS; i++) { 1177 struct serio *serio = i8042_ports[i].serio; 1178 1179 if (serio && device_may_wakeup(&serio->dev)) 1180 enable_irq_wake(i8042_ports[i].irq); 1181 } 1182 1183 return 0; 1184 } 1185 1186 static int i8042_pm_resume(struct device *dev) 1187 { 1188 int i; 1189 1190 for (i = 0; i < I8042_NUM_PORTS; i++) { 1191 struct serio *serio = i8042_ports[i].serio; 1192 1193 if (serio && device_may_wakeup(&serio->dev)) 1194 disable_irq_wake(i8042_ports[i].irq); 1195 } 1196 1197 /* 1198 * On resume from S2R we always try to reset the controller 1199 * to bring it in a sane state. (In case of S2D we expect 1200 * BIOS to reset the controller for us.) 1201 */ 1202 return i8042_controller_resume(true); 1203 } 1204 1205 static int i8042_pm_thaw(struct device *dev) 1206 { 1207 i8042_interrupt(0, NULL); 1208 1209 return 0; 1210 } 1211 1212 static int i8042_pm_reset(struct device *dev) 1213 { 1214 i8042_controller_reset(false); 1215 1216 return 0; 1217 } 1218 1219 static int i8042_pm_restore(struct device *dev) 1220 { 1221 return i8042_controller_resume(false); 1222 } 1223 1224 static const struct dev_pm_ops i8042_pm_ops = { 1225 .suspend = i8042_pm_suspend, 1226 .resume = i8042_pm_resume, 1227 .thaw = i8042_pm_thaw, 1228 .poweroff = i8042_pm_reset, 1229 .restore = i8042_pm_restore, 1230 }; 1231 1232 #endif /* CONFIG_PM */ 1233 1234 /* 1235 * We need to reset the 8042 back to original mode on system shutdown, 1236 * because otherwise BIOSes will be confused. 1237 */ 1238 1239 static void i8042_shutdown(struct platform_device *dev) 1240 { 1241 i8042_controller_reset(false); 1242 } 1243 1244 static int __init i8042_create_kbd_port(void) 1245 { 1246 struct serio *serio; 1247 struct i8042_port *port = &i8042_ports[I8042_KBD_PORT_NO]; 1248 1249 serio = kzalloc(sizeof(struct serio), GFP_KERNEL); 1250 if (!serio) 1251 return -ENOMEM; 1252 1253 serio->id.type = i8042_direct ? SERIO_8042 : SERIO_8042_XL; 1254 serio->write = i8042_dumbkbd ? NULL : i8042_kbd_write; 1255 serio->start = i8042_start; 1256 serio->stop = i8042_stop; 1257 serio->close = i8042_port_close; 1258 serio->port_data = port; 1259 serio->dev.parent = &i8042_platform_device->dev; 1260 strlcpy(serio->name, "i8042 KBD port", sizeof(serio->name)); 1261 strlcpy(serio->phys, I8042_KBD_PHYS_DESC, sizeof(serio->phys)); 1262 strlcpy(serio->firmware_id, i8042_kbd_firmware_id, 1263 sizeof(serio->firmware_id)); 1264 1265 port->serio = serio; 1266 port->irq = I8042_KBD_IRQ; 1267 1268 return 0; 1269 } 1270 1271 static int __init i8042_create_aux_port(int idx) 1272 { 1273 struct serio *serio; 1274 int port_no = idx < 0 ? I8042_AUX_PORT_NO : I8042_MUX_PORT_NO + idx; 1275 struct i8042_port *port = &i8042_ports[port_no]; 1276 1277 serio = kzalloc(sizeof(struct serio), GFP_KERNEL); 1278 if (!serio) 1279 return -ENOMEM; 1280 1281 serio->id.type = SERIO_8042; 1282 serio->write = i8042_aux_write; 1283 serio->start = i8042_start; 1284 serio->stop = i8042_stop; 1285 serio->port_data = port; 1286 serio->dev.parent = &i8042_platform_device->dev; 1287 if (idx < 0) { 1288 strlcpy(serio->name, "i8042 AUX port", sizeof(serio->name)); 1289 strlcpy(serio->phys, I8042_AUX_PHYS_DESC, sizeof(serio->phys)); 1290 strlcpy(serio->firmware_id, i8042_aux_firmware_id, 1291 sizeof(serio->firmware_id)); 1292 serio->close = i8042_port_close; 1293 } else { 1294 snprintf(serio->name, sizeof(serio->name), "i8042 AUX%d port", idx); 1295 snprintf(serio->phys, sizeof(serio->phys), I8042_MUX_PHYS_DESC, idx + 1); 1296 strlcpy(serio->firmware_id, i8042_aux_firmware_id, 1297 sizeof(serio->firmware_id)); 1298 } 1299 1300 port->serio = serio; 1301 port->mux = idx; 1302 port->irq = I8042_AUX_IRQ; 1303 1304 return 0; 1305 } 1306 1307 static void __init i8042_free_kbd_port(void) 1308 { 1309 kfree(i8042_ports[I8042_KBD_PORT_NO].serio); 1310 i8042_ports[I8042_KBD_PORT_NO].serio = NULL; 1311 } 1312 1313 static void __init i8042_free_aux_ports(void) 1314 { 1315 int i; 1316 1317 for (i = I8042_AUX_PORT_NO; i < I8042_NUM_PORTS; i++) { 1318 kfree(i8042_ports[i].serio); 1319 i8042_ports[i].serio = NULL; 1320 } 1321 } 1322 1323 static void __init i8042_register_ports(void) 1324 { 1325 int i; 1326 1327 for (i = 0; i < I8042_NUM_PORTS; i++) { 1328 struct serio *serio = i8042_ports[i].serio; 1329 1330 if (serio) { 1331 printk(KERN_INFO "serio: %s at %#lx,%#lx irq %d\n", 1332 serio->name, 1333 (unsigned long) I8042_DATA_REG, 1334 (unsigned long) I8042_COMMAND_REG, 1335 i8042_ports[i].irq); 1336 serio_register_port(serio); 1337 device_set_wakeup_capable(&serio->dev, true); 1338 } 1339 } 1340 } 1341 1342 static void i8042_unregister_ports(void) 1343 { 1344 int i; 1345 1346 for (i = 0; i < I8042_NUM_PORTS; i++) { 1347 if (i8042_ports[i].serio) { 1348 serio_unregister_port(i8042_ports[i].serio); 1349 i8042_ports[i].serio = NULL; 1350 } 1351 } 1352 } 1353 1354 /* 1355 * Checks whether port belongs to i8042 controller. 1356 */ 1357 bool i8042_check_port_owner(const struct serio *port) 1358 { 1359 int i; 1360 1361 for (i = 0; i < I8042_NUM_PORTS; i++) 1362 if (i8042_ports[i].serio == port) 1363 return true; 1364 1365 return false; 1366 } 1367 EXPORT_SYMBOL(i8042_check_port_owner); 1368 1369 static void i8042_free_irqs(void) 1370 { 1371 if (i8042_aux_irq_registered) 1372 free_irq(I8042_AUX_IRQ, i8042_platform_device); 1373 if (i8042_kbd_irq_registered) 1374 free_irq(I8042_KBD_IRQ, i8042_platform_device); 1375 1376 i8042_aux_irq_registered = i8042_kbd_irq_registered = false; 1377 } 1378 1379 static int __init i8042_setup_aux(void) 1380 { 1381 int (*aux_enable)(void); 1382 int error; 1383 int i; 1384 1385 if (i8042_check_aux()) 1386 return -ENODEV; 1387 1388 if (i8042_nomux || i8042_check_mux()) { 1389 error = i8042_create_aux_port(-1); 1390 if (error) 1391 goto err_free_ports; 1392 aux_enable = i8042_enable_aux_port; 1393 } else { 1394 for (i = 0; i < I8042_NUM_MUX_PORTS; i++) { 1395 error = i8042_create_aux_port(i); 1396 if (error) 1397 goto err_free_ports; 1398 } 1399 aux_enable = i8042_enable_mux_ports; 1400 } 1401 1402 error = request_irq(I8042_AUX_IRQ, i8042_interrupt, IRQF_SHARED, 1403 "i8042", i8042_platform_device); 1404 if (error) 1405 goto err_free_ports; 1406 1407 if (aux_enable()) 1408 goto err_free_irq; 1409 1410 i8042_aux_irq_registered = true; 1411 return 0; 1412 1413 err_free_irq: 1414 free_irq(I8042_AUX_IRQ, i8042_platform_device); 1415 err_free_ports: 1416 i8042_free_aux_ports(); 1417 return error; 1418 } 1419 1420 static int __init i8042_setup_kbd(void) 1421 { 1422 int error; 1423 1424 error = i8042_create_kbd_port(); 1425 if (error) 1426 return error; 1427 1428 error = request_irq(I8042_KBD_IRQ, i8042_interrupt, IRQF_SHARED, 1429 "i8042", i8042_platform_device); 1430 if (error) 1431 goto err_free_port; 1432 1433 error = i8042_enable_kbd_port(); 1434 if (error) 1435 goto err_free_irq; 1436 1437 i8042_kbd_irq_registered = true; 1438 return 0; 1439 1440 err_free_irq: 1441 free_irq(I8042_KBD_IRQ, i8042_platform_device); 1442 err_free_port: 1443 i8042_free_kbd_port(); 1444 return error; 1445 } 1446 1447 static int i8042_kbd_bind_notifier(struct notifier_block *nb, 1448 unsigned long action, void *data) 1449 { 1450 struct device *dev = data; 1451 struct serio *serio = to_serio_port(dev); 1452 struct i8042_port *port = serio->port_data; 1453 1454 if (serio != i8042_ports[I8042_KBD_PORT_NO].serio) 1455 return 0; 1456 1457 switch (action) { 1458 case BUS_NOTIFY_BOUND_DRIVER: 1459 port->driver_bound = true; 1460 break; 1461 1462 case BUS_NOTIFY_UNBIND_DRIVER: 1463 port->driver_bound = false; 1464 break; 1465 } 1466 1467 return 0; 1468 } 1469 1470 static int __init i8042_probe(struct platform_device *dev) 1471 { 1472 int error; 1473 1474 i8042_platform_device = dev; 1475 1476 if (i8042_reset) { 1477 error = i8042_controller_selftest(); 1478 if (error) 1479 return error; 1480 } 1481 1482 error = i8042_controller_init(); 1483 if (error) 1484 return error; 1485 1486 #ifdef CONFIG_X86 1487 if (i8042_dritek) 1488 i8042_dritek_enable(); 1489 #endif 1490 1491 if (!i8042_noaux) { 1492 error = i8042_setup_aux(); 1493 if (error && error != -ENODEV && error != -EBUSY) 1494 goto out_fail; 1495 } 1496 1497 if (!i8042_nokbd) { 1498 error = i8042_setup_kbd(); 1499 if (error) 1500 goto out_fail; 1501 } 1502 /* 1503 * Ok, everything is ready, let's register all serio ports 1504 */ 1505 i8042_register_ports(); 1506 1507 return 0; 1508 1509 out_fail: 1510 i8042_free_aux_ports(); /* in case KBD failed but AUX not */ 1511 i8042_free_irqs(); 1512 i8042_controller_reset(false); 1513 i8042_platform_device = NULL; 1514 1515 return error; 1516 } 1517 1518 static int i8042_remove(struct platform_device *dev) 1519 { 1520 i8042_unregister_ports(); 1521 i8042_free_irqs(); 1522 i8042_controller_reset(false); 1523 i8042_platform_device = NULL; 1524 1525 return 0; 1526 } 1527 1528 static struct platform_driver i8042_driver = { 1529 .driver = { 1530 .name = "i8042", 1531 #ifdef CONFIG_PM 1532 .pm = &i8042_pm_ops, 1533 #endif 1534 }, 1535 .remove = i8042_remove, 1536 .shutdown = i8042_shutdown, 1537 }; 1538 1539 static struct notifier_block i8042_kbd_bind_notifier_block = { 1540 .notifier_call = i8042_kbd_bind_notifier, 1541 }; 1542 1543 static int __init i8042_init(void) 1544 { 1545 struct platform_device *pdev; 1546 int err; 1547 1548 dbg_init(); 1549 1550 err = i8042_platform_init(); 1551 if (err) 1552 return err; 1553 1554 err = i8042_controller_check(); 1555 if (err) 1556 goto err_platform_exit; 1557 1558 pdev = platform_create_bundle(&i8042_driver, i8042_probe, NULL, 0, NULL, 0); 1559 if (IS_ERR(pdev)) { 1560 err = PTR_ERR(pdev); 1561 goto err_platform_exit; 1562 } 1563 1564 bus_register_notifier(&serio_bus, &i8042_kbd_bind_notifier_block); 1565 panic_blink = i8042_panic_blink; 1566 1567 return 0; 1568 1569 err_platform_exit: 1570 i8042_platform_exit(); 1571 return err; 1572 } 1573 1574 static void __exit i8042_exit(void) 1575 { 1576 platform_device_unregister(i8042_platform_device); 1577 platform_driver_unregister(&i8042_driver); 1578 i8042_platform_exit(); 1579 1580 bus_unregister_notifier(&serio_bus, &i8042_kbd_bind_notifier_block); 1581 panic_blink = NULL; 1582 } 1583 1584 module_init(i8042_init); 1585 module_exit(i8042_exit); 1586