1 // SPDX-License-Identifier: GPL-2.0-only 2 /* 3 * i8042 keyboard and mouse controller driver for Linux 4 * 5 * Copyright (c) 1999-2004 Vojtech Pavlik 6 */ 7 8 9 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt 10 11 #include <linux/types.h> 12 #include <linux/delay.h> 13 #include <linux/module.h> 14 #include <linux/interrupt.h> 15 #include <linux/ioport.h> 16 #include <linux/init.h> 17 #include <linux/serio.h> 18 #include <linux/err.h> 19 #include <linux/rcupdate.h> 20 #include <linux/platform_device.h> 21 #include <linux/i8042.h> 22 #include <linux/slab.h> 23 #include <linux/suspend.h> 24 #include <linux/property.h> 25 26 #include <asm/io.h> 27 28 MODULE_AUTHOR("Vojtech Pavlik <vojtech@suse.cz>"); 29 MODULE_DESCRIPTION("i8042 keyboard and mouse controller driver"); 30 MODULE_LICENSE("GPL"); 31 32 static bool i8042_nokbd; 33 module_param_named(nokbd, i8042_nokbd, bool, 0); 34 MODULE_PARM_DESC(nokbd, "Do not probe or use KBD port."); 35 36 static bool i8042_noaux; 37 module_param_named(noaux, i8042_noaux, bool, 0); 38 MODULE_PARM_DESC(noaux, "Do not probe or use AUX (mouse) port."); 39 40 static bool i8042_nomux; 41 module_param_named(nomux, i8042_nomux, bool, 0); 42 MODULE_PARM_DESC(nomux, "Do not check whether an active multiplexing controller is present."); 43 44 static bool i8042_unlock; 45 module_param_named(unlock, i8042_unlock, bool, 0); 46 MODULE_PARM_DESC(unlock, "Ignore keyboard lock."); 47 48 static bool i8042_probe_defer; 49 module_param_named(probe_defer, i8042_probe_defer, bool, 0); 50 MODULE_PARM_DESC(probe_defer, "Allow deferred probing."); 51 52 enum i8042_controller_reset_mode { 53 I8042_RESET_NEVER, 54 I8042_RESET_ALWAYS, 55 I8042_RESET_ON_S2RAM, 56 #define I8042_RESET_DEFAULT I8042_RESET_ON_S2RAM 57 }; 58 static enum i8042_controller_reset_mode i8042_reset = I8042_RESET_DEFAULT; 59 static int i8042_set_reset(const char *val, const struct kernel_param *kp) 60 { 61 enum i8042_controller_reset_mode *arg = kp->arg; 62 int error; 63 bool reset; 64 65 if (val) { 66 error = kstrtobool(val, &reset); 67 if (error) 68 return error; 69 } else { 70 reset = true; 71 } 72 73 *arg = reset ? I8042_RESET_ALWAYS : I8042_RESET_NEVER; 74 return 0; 75 } 76 77 static const struct kernel_param_ops param_ops_reset_param = { 78 .flags = KERNEL_PARAM_OPS_FL_NOARG, 79 .set = i8042_set_reset, 80 }; 81 #define param_check_reset_param(name, p) \ 82 __param_check(name, p, enum i8042_controller_reset_mode) 83 module_param_named(reset, i8042_reset, reset_param, 0); 84 MODULE_PARM_DESC(reset, "Reset controller on resume, cleanup or both"); 85 86 static bool i8042_direct; 87 module_param_named(direct, i8042_direct, bool, 0); 88 MODULE_PARM_DESC(direct, "Put keyboard port into non-translated mode."); 89 90 static bool i8042_dumbkbd; 91 module_param_named(dumbkbd, i8042_dumbkbd, bool, 0); 92 MODULE_PARM_DESC(dumbkbd, "Pretend that controller can only read data from keyboard"); 93 94 static bool i8042_noloop; 95 module_param_named(noloop, i8042_noloop, bool, 0); 96 MODULE_PARM_DESC(noloop, "Disable the AUX Loopback command while probing for the AUX port"); 97 98 static bool i8042_notimeout; 99 module_param_named(notimeout, i8042_notimeout, bool, 0); 100 MODULE_PARM_DESC(notimeout, "Ignore timeouts signalled by i8042"); 101 102 static bool i8042_kbdreset; 103 module_param_named(kbdreset, i8042_kbdreset, bool, 0); 104 MODULE_PARM_DESC(kbdreset, "Reset device connected to KBD port"); 105 106 #ifdef CONFIG_X86 107 static bool i8042_dritek; 108 module_param_named(dritek, i8042_dritek, bool, 0); 109 MODULE_PARM_DESC(dritek, "Force enable the Dritek keyboard extension"); 110 #endif 111 112 #ifdef CONFIG_PNP 113 static bool i8042_nopnp; 114 module_param_named(nopnp, i8042_nopnp, bool, 0); 115 MODULE_PARM_DESC(nopnp, "Do not use PNP to detect controller settings"); 116 #endif 117 118 static bool i8042_forcenorestore; 119 module_param_named(forcenorestore, i8042_forcenorestore, bool, 0); 120 MODULE_PARM_DESC(forcenorestore, "Force no restore on s3 resume, copying s2idle behaviour"); 121 122 #define DEBUG 123 #ifdef DEBUG 124 static bool i8042_debug; 125 module_param_named(debug, i8042_debug, bool, 0600); 126 MODULE_PARM_DESC(debug, "Turn i8042 debugging mode on and off"); 127 128 static bool i8042_unmask_kbd_data; 129 module_param_named(unmask_kbd_data, i8042_unmask_kbd_data, bool, 0600); 130 MODULE_PARM_DESC(unmask_kbd_data, "Unconditional enable (may reveal sensitive data) of normally sanitize-filtered kbd data traffic debug log [pre-condition: i8042.debug=1 enabled]"); 131 #endif 132 133 static bool i8042_present; 134 static bool i8042_bypass_aux_irq_test; 135 static char i8042_kbd_firmware_id[128]; 136 static char i8042_aux_firmware_id[128]; 137 static struct fwnode_handle *i8042_kbd_fwnode; 138 139 #include "i8042.h" 140 141 /* 142 * i8042_lock protects serialization between i8042_command and 143 * the interrupt handler. 144 */ 145 static DEFINE_SPINLOCK(i8042_lock); 146 147 /* 148 * Writers to AUX and KBD ports as well as users issuing i8042_command 149 * directly should acquire i8042_mutex (by means of calling 150 * i8042_lock_chip() and i8042_unlock_chip() helpers) to ensure that 151 * they do not disturb each other (unfortunately in many i8042 152 * implementations write to one of the ports will immediately abort 153 * command that is being processed by another port). 154 */ 155 static DEFINE_MUTEX(i8042_mutex); 156 157 struct i8042_port { 158 struct serio *serio; 159 int irq; 160 bool exists; 161 bool driver_bound; 162 signed char mux; 163 }; 164 165 #define I8042_KBD_PORT_NO 0 166 #define I8042_AUX_PORT_NO 1 167 #define I8042_MUX_PORT_NO 2 168 #define I8042_NUM_PORTS (I8042_NUM_MUX_PORTS + 2) 169 170 static struct i8042_port i8042_ports[I8042_NUM_PORTS]; 171 172 static unsigned char i8042_initial_ctr; 173 static unsigned char i8042_ctr; 174 static bool i8042_mux_present; 175 static bool i8042_kbd_irq_registered; 176 static bool i8042_aux_irq_registered; 177 static unsigned char i8042_suppress_kbd_ack; 178 static struct platform_device *i8042_platform_device; 179 static struct notifier_block i8042_kbd_bind_notifier_block; 180 181 static irqreturn_t i8042_interrupt(int irq, void *dev_id); 182 static bool (*i8042_platform_filter)(unsigned char data, unsigned char str, 183 struct serio *serio); 184 185 void i8042_lock_chip(void) 186 { 187 mutex_lock(&i8042_mutex); 188 } 189 EXPORT_SYMBOL(i8042_lock_chip); 190 191 void i8042_unlock_chip(void) 192 { 193 mutex_unlock(&i8042_mutex); 194 } 195 EXPORT_SYMBOL(i8042_unlock_chip); 196 197 int i8042_install_filter(bool (*filter)(unsigned char data, unsigned char str, 198 struct serio *serio)) 199 { 200 unsigned long flags; 201 int ret = 0; 202 203 spin_lock_irqsave(&i8042_lock, flags); 204 205 if (i8042_platform_filter) { 206 ret = -EBUSY; 207 goto out; 208 } 209 210 i8042_platform_filter = filter; 211 212 out: 213 spin_unlock_irqrestore(&i8042_lock, flags); 214 return ret; 215 } 216 EXPORT_SYMBOL(i8042_install_filter); 217 218 int i8042_remove_filter(bool (*filter)(unsigned char data, unsigned char str, 219 struct serio *port)) 220 { 221 unsigned long flags; 222 int ret = 0; 223 224 spin_lock_irqsave(&i8042_lock, flags); 225 226 if (i8042_platform_filter != filter) { 227 ret = -EINVAL; 228 goto out; 229 } 230 231 i8042_platform_filter = NULL; 232 233 out: 234 spin_unlock_irqrestore(&i8042_lock, flags); 235 return ret; 236 } 237 EXPORT_SYMBOL(i8042_remove_filter); 238 239 /* 240 * The i8042_wait_read() and i8042_wait_write functions wait for the i8042 to 241 * be ready for reading values from it / writing values to it. 242 * Called always with i8042_lock held. 243 */ 244 245 static int i8042_wait_read(void) 246 { 247 int i = 0; 248 249 while ((~i8042_read_status() & I8042_STR_OBF) && (i < I8042_CTL_TIMEOUT)) { 250 udelay(50); 251 i++; 252 } 253 return -(i == I8042_CTL_TIMEOUT); 254 } 255 256 static int i8042_wait_write(void) 257 { 258 int i = 0; 259 260 while ((i8042_read_status() & I8042_STR_IBF) && (i < I8042_CTL_TIMEOUT)) { 261 udelay(50); 262 i++; 263 } 264 return -(i == I8042_CTL_TIMEOUT); 265 } 266 267 /* 268 * i8042_flush() flushes all data that may be in the keyboard and mouse buffers 269 * of the i8042 down the toilet. 270 */ 271 272 static int i8042_flush(void) 273 { 274 unsigned long flags; 275 unsigned char data, str; 276 int count = 0; 277 int retval = 0; 278 279 spin_lock_irqsave(&i8042_lock, flags); 280 281 while ((str = i8042_read_status()) & I8042_STR_OBF) { 282 if (count++ < I8042_BUFFER_SIZE) { 283 udelay(50); 284 data = i8042_read_data(); 285 dbg("%02x <- i8042 (flush, %s)\n", 286 data, str & I8042_STR_AUXDATA ? "aux" : "kbd"); 287 } else { 288 retval = -EIO; 289 break; 290 } 291 } 292 293 spin_unlock_irqrestore(&i8042_lock, flags); 294 295 return retval; 296 } 297 298 /* 299 * i8042_command() executes a command on the i8042. It also sends the input 300 * parameter(s) of the commands to it, and receives the output value(s). The 301 * parameters are to be stored in the param array, and the output is placed 302 * into the same array. The number of the parameters and output values is 303 * encoded in bits 8-11 of the command number. 304 */ 305 306 static int __i8042_command(unsigned char *param, int command) 307 { 308 int i, error; 309 310 if (i8042_noloop && command == I8042_CMD_AUX_LOOP) 311 return -1; 312 313 error = i8042_wait_write(); 314 if (error) 315 return error; 316 317 dbg("%02x -> i8042 (command)\n", command & 0xff); 318 i8042_write_command(command & 0xff); 319 320 for (i = 0; i < ((command >> 12) & 0xf); i++) { 321 error = i8042_wait_write(); 322 if (error) { 323 dbg(" -- i8042 (wait write timeout)\n"); 324 return error; 325 } 326 dbg("%02x -> i8042 (parameter)\n", param[i]); 327 i8042_write_data(param[i]); 328 } 329 330 for (i = 0; i < ((command >> 8) & 0xf); i++) { 331 error = i8042_wait_read(); 332 if (error) { 333 dbg(" -- i8042 (wait read timeout)\n"); 334 return error; 335 } 336 337 if (command == I8042_CMD_AUX_LOOP && 338 !(i8042_read_status() & I8042_STR_AUXDATA)) { 339 dbg(" -- i8042 (auxerr)\n"); 340 return -1; 341 } 342 343 param[i] = i8042_read_data(); 344 dbg("%02x <- i8042 (return)\n", param[i]); 345 } 346 347 return 0; 348 } 349 350 int i8042_command(unsigned char *param, int command) 351 { 352 unsigned long flags; 353 int retval; 354 355 if (!i8042_present) 356 return -1; 357 358 spin_lock_irqsave(&i8042_lock, flags); 359 retval = __i8042_command(param, command); 360 spin_unlock_irqrestore(&i8042_lock, flags); 361 362 return retval; 363 } 364 EXPORT_SYMBOL(i8042_command); 365 366 /* 367 * i8042_kbd_write() sends a byte out through the keyboard interface. 368 */ 369 370 static int i8042_kbd_write(struct serio *port, unsigned char c) 371 { 372 unsigned long flags; 373 int retval = 0; 374 375 spin_lock_irqsave(&i8042_lock, flags); 376 377 if (!(retval = i8042_wait_write())) { 378 dbg("%02x -> i8042 (kbd-data)\n", c); 379 i8042_write_data(c); 380 } 381 382 spin_unlock_irqrestore(&i8042_lock, flags); 383 384 return retval; 385 } 386 387 /* 388 * i8042_aux_write() sends a byte out through the aux interface. 389 */ 390 391 static int i8042_aux_write(struct serio *serio, unsigned char c) 392 { 393 struct i8042_port *port = serio->port_data; 394 395 return i8042_command(&c, port->mux == -1 ? 396 I8042_CMD_AUX_SEND : 397 I8042_CMD_MUX_SEND + port->mux); 398 } 399 400 401 /* 402 * i8042_port_close attempts to clear AUX or KBD port state by disabling 403 * and then re-enabling it. 404 */ 405 406 static void i8042_port_close(struct serio *serio) 407 { 408 int irq_bit; 409 int disable_bit; 410 const char *port_name; 411 412 if (serio == i8042_ports[I8042_AUX_PORT_NO].serio) { 413 irq_bit = I8042_CTR_AUXINT; 414 disable_bit = I8042_CTR_AUXDIS; 415 port_name = "AUX"; 416 } else { 417 irq_bit = I8042_CTR_KBDINT; 418 disable_bit = I8042_CTR_KBDDIS; 419 port_name = "KBD"; 420 } 421 422 i8042_ctr &= ~irq_bit; 423 if (i8042_command(&i8042_ctr, I8042_CMD_CTL_WCTR)) 424 pr_warn("Can't write CTR while closing %s port\n", port_name); 425 426 udelay(50); 427 428 i8042_ctr &= ~disable_bit; 429 i8042_ctr |= irq_bit; 430 if (i8042_command(&i8042_ctr, I8042_CMD_CTL_WCTR)) 431 pr_err("Can't reactivate %s port\n", port_name); 432 433 /* 434 * See if there is any data appeared while we were messing with 435 * port state. 436 */ 437 i8042_interrupt(0, NULL); 438 } 439 440 /* 441 * i8042_start() is called by serio core when port is about to finish 442 * registering. It will mark port as existing so i8042_interrupt can 443 * start sending data through it. 444 */ 445 static int i8042_start(struct serio *serio) 446 { 447 struct i8042_port *port = serio->port_data; 448 449 device_set_wakeup_capable(&serio->dev, true); 450 451 /* 452 * On platforms using suspend-to-idle, allow the keyboard to 453 * wake up the system from sleep by enabling keyboard wakeups 454 * by default. This is consistent with keyboard wakeup 455 * behavior on many platforms using suspend-to-RAM (ACPI S3) 456 * by default. 457 */ 458 if (pm_suspend_default_s2idle() && 459 serio == i8042_ports[I8042_KBD_PORT_NO].serio) { 460 device_set_wakeup_enable(&serio->dev, true); 461 } 462 463 spin_lock_irq(&i8042_lock); 464 port->exists = true; 465 spin_unlock_irq(&i8042_lock); 466 467 return 0; 468 } 469 470 /* 471 * i8042_stop() marks serio port as non-existing so i8042_interrupt 472 * will not try to send data to the port that is about to go away. 473 * The function is called by serio core as part of unregister procedure. 474 */ 475 static void i8042_stop(struct serio *serio) 476 { 477 struct i8042_port *port = serio->port_data; 478 479 spin_lock_irq(&i8042_lock); 480 port->exists = false; 481 port->serio = NULL; 482 spin_unlock_irq(&i8042_lock); 483 484 /* 485 * We need to make sure that interrupt handler finishes using 486 * our serio port before we return from this function. 487 * We synchronize with both AUX and KBD IRQs because there is 488 * a (very unlikely) chance that AUX IRQ is raised for KBD port 489 * and vice versa. 490 */ 491 synchronize_irq(I8042_AUX_IRQ); 492 synchronize_irq(I8042_KBD_IRQ); 493 } 494 495 /* 496 * i8042_filter() filters out unwanted bytes from the input data stream. 497 * It is called from i8042_interrupt and thus is running with interrupts 498 * off and i8042_lock held. 499 */ 500 static bool i8042_filter(unsigned char data, unsigned char str, 501 struct serio *serio) 502 { 503 if (unlikely(i8042_suppress_kbd_ack)) { 504 if ((~str & I8042_STR_AUXDATA) && 505 (data == 0xfa || data == 0xfe)) { 506 i8042_suppress_kbd_ack--; 507 dbg("Extra keyboard ACK - filtered out\n"); 508 return true; 509 } 510 } 511 512 if (i8042_platform_filter && i8042_platform_filter(data, str, serio)) { 513 dbg("Filtered out by platform filter\n"); 514 return true; 515 } 516 517 return false; 518 } 519 520 /* 521 * i8042_interrupt() is the most important function in this driver - 522 * it handles the interrupts from the i8042, and sends incoming bytes 523 * to the upper layers. 524 */ 525 526 static irqreturn_t i8042_interrupt(int irq, void *dev_id) 527 { 528 struct i8042_port *port; 529 struct serio *serio; 530 unsigned long flags; 531 unsigned char str, data; 532 unsigned int dfl; 533 unsigned int port_no; 534 bool filtered; 535 int ret = 1; 536 537 spin_lock_irqsave(&i8042_lock, flags); 538 539 str = i8042_read_status(); 540 if (unlikely(~str & I8042_STR_OBF)) { 541 spin_unlock_irqrestore(&i8042_lock, flags); 542 if (irq) 543 dbg("Interrupt %d, without any data\n", irq); 544 ret = 0; 545 goto out; 546 } 547 548 data = i8042_read_data(); 549 550 if (i8042_mux_present && (str & I8042_STR_AUXDATA)) { 551 static unsigned long last_transmit; 552 static unsigned char last_str; 553 554 dfl = 0; 555 if (str & I8042_STR_MUXERR) { 556 dbg("MUX error, status is %02x, data is %02x\n", 557 str, data); 558 /* 559 * When MUXERR condition is signalled the data register can only contain 560 * 0xfd, 0xfe or 0xff if implementation follows the spec. Unfortunately 561 * it is not always the case. Some KBCs also report 0xfc when there is 562 * nothing connected to the port while others sometimes get confused which 563 * port the data came from and signal error leaving the data intact. They 564 * _do not_ revert to legacy mode (actually I've never seen KBC reverting 565 * to legacy mode yet, when we see one we'll add proper handling). 566 * Anyway, we process 0xfc, 0xfd, 0xfe and 0xff as timeouts, and for the 567 * rest assume that the data came from the same serio last byte 568 * was transmitted (if transmission happened not too long ago). 569 */ 570 571 switch (data) { 572 default: 573 if (time_before(jiffies, last_transmit + HZ/10)) { 574 str = last_str; 575 break; 576 } 577 fallthrough; /* report timeout */ 578 case 0xfc: 579 case 0xfd: 580 case 0xfe: dfl = SERIO_TIMEOUT; data = 0xfe; break; 581 case 0xff: dfl = SERIO_PARITY; data = 0xfe; break; 582 } 583 } 584 585 port_no = I8042_MUX_PORT_NO + ((str >> 6) & 3); 586 last_str = str; 587 last_transmit = jiffies; 588 } else { 589 590 dfl = ((str & I8042_STR_PARITY) ? SERIO_PARITY : 0) | 591 ((str & I8042_STR_TIMEOUT && !i8042_notimeout) ? SERIO_TIMEOUT : 0); 592 593 port_no = (str & I8042_STR_AUXDATA) ? 594 I8042_AUX_PORT_NO : I8042_KBD_PORT_NO; 595 } 596 597 port = &i8042_ports[port_no]; 598 serio = port->exists ? port->serio : NULL; 599 600 filter_dbg(port->driver_bound, data, "<- i8042 (interrupt, %d, %d%s%s)\n", 601 port_no, irq, 602 dfl & SERIO_PARITY ? ", bad parity" : "", 603 dfl & SERIO_TIMEOUT ? ", timeout" : ""); 604 605 filtered = i8042_filter(data, str, serio); 606 607 spin_unlock_irqrestore(&i8042_lock, flags); 608 609 if (likely(serio && !filtered)) 610 serio_interrupt(serio, data, dfl); 611 612 out: 613 return IRQ_RETVAL(ret); 614 } 615 616 /* 617 * i8042_enable_kbd_port enables keyboard port on chip 618 */ 619 620 static int i8042_enable_kbd_port(void) 621 { 622 i8042_ctr &= ~I8042_CTR_KBDDIS; 623 i8042_ctr |= I8042_CTR_KBDINT; 624 625 if (i8042_command(&i8042_ctr, I8042_CMD_CTL_WCTR)) { 626 i8042_ctr &= ~I8042_CTR_KBDINT; 627 i8042_ctr |= I8042_CTR_KBDDIS; 628 pr_err("Failed to enable KBD port\n"); 629 return -EIO; 630 } 631 632 return 0; 633 } 634 635 /* 636 * i8042_enable_aux_port enables AUX (mouse) port on chip 637 */ 638 639 static int i8042_enable_aux_port(void) 640 { 641 i8042_ctr &= ~I8042_CTR_AUXDIS; 642 i8042_ctr |= I8042_CTR_AUXINT; 643 644 if (i8042_command(&i8042_ctr, I8042_CMD_CTL_WCTR)) { 645 i8042_ctr &= ~I8042_CTR_AUXINT; 646 i8042_ctr |= I8042_CTR_AUXDIS; 647 pr_err("Failed to enable AUX port\n"); 648 return -EIO; 649 } 650 651 return 0; 652 } 653 654 /* 655 * i8042_enable_mux_ports enables 4 individual AUX ports after 656 * the controller has been switched into Multiplexed mode 657 */ 658 659 static int i8042_enable_mux_ports(void) 660 { 661 unsigned char param; 662 int i; 663 664 for (i = 0; i < I8042_NUM_MUX_PORTS; i++) { 665 i8042_command(¶m, I8042_CMD_MUX_PFX + i); 666 i8042_command(¶m, I8042_CMD_AUX_ENABLE); 667 } 668 669 return i8042_enable_aux_port(); 670 } 671 672 /* 673 * i8042_set_mux_mode checks whether the controller has an 674 * active multiplexor and puts the chip into Multiplexed (true) 675 * or Legacy (false) mode. 676 */ 677 678 static int i8042_set_mux_mode(bool multiplex, unsigned char *mux_version) 679 { 680 681 unsigned char param, val; 682 /* 683 * Get rid of bytes in the queue. 684 */ 685 686 i8042_flush(); 687 688 /* 689 * Internal loopback test - send three bytes, they should come back from the 690 * mouse interface, the last should be version. 691 */ 692 693 param = val = 0xf0; 694 if (i8042_command(¶m, I8042_CMD_AUX_LOOP) || param != val) 695 return -1; 696 param = val = multiplex ? 0x56 : 0xf6; 697 if (i8042_command(¶m, I8042_CMD_AUX_LOOP) || param != val) 698 return -1; 699 param = val = multiplex ? 0xa4 : 0xa5; 700 if (i8042_command(¶m, I8042_CMD_AUX_LOOP) || param == val) 701 return -1; 702 703 /* 704 * Workaround for interference with USB Legacy emulation 705 * that causes a v10.12 MUX to be found. 706 */ 707 if (param == 0xac) 708 return -1; 709 710 if (mux_version) 711 *mux_version = param; 712 713 return 0; 714 } 715 716 /* 717 * i8042_check_mux() checks whether the controller supports the PS/2 Active 718 * Multiplexing specification by Synaptics, Phoenix, Insyde and 719 * LCS/Telegraphics. 720 */ 721 722 static int i8042_check_mux(void) 723 { 724 unsigned char mux_version; 725 726 if (i8042_set_mux_mode(true, &mux_version)) 727 return -1; 728 729 pr_info("Detected active multiplexing controller, rev %d.%d\n", 730 (mux_version >> 4) & 0xf, mux_version & 0xf); 731 732 /* 733 * Disable all muxed ports by disabling AUX. 734 */ 735 i8042_ctr |= I8042_CTR_AUXDIS; 736 i8042_ctr &= ~I8042_CTR_AUXINT; 737 738 if (i8042_command(&i8042_ctr, I8042_CMD_CTL_WCTR)) { 739 pr_err("Failed to disable AUX port, can't use MUX\n"); 740 return -EIO; 741 } 742 743 i8042_mux_present = true; 744 745 return 0; 746 } 747 748 /* 749 * The following is used to test AUX IRQ delivery. 750 */ 751 static struct completion i8042_aux_irq_delivered; 752 static bool i8042_irq_being_tested; 753 754 static irqreturn_t i8042_aux_test_irq(int irq, void *dev_id) 755 { 756 unsigned long flags; 757 unsigned char str, data; 758 int ret = 0; 759 760 spin_lock_irqsave(&i8042_lock, flags); 761 str = i8042_read_status(); 762 if (str & I8042_STR_OBF) { 763 data = i8042_read_data(); 764 dbg("%02x <- i8042 (aux_test_irq, %s)\n", 765 data, str & I8042_STR_AUXDATA ? "aux" : "kbd"); 766 if (i8042_irq_being_tested && 767 data == 0xa5 && (str & I8042_STR_AUXDATA)) 768 complete(&i8042_aux_irq_delivered); 769 ret = 1; 770 } 771 spin_unlock_irqrestore(&i8042_lock, flags); 772 773 return IRQ_RETVAL(ret); 774 } 775 776 /* 777 * i8042_toggle_aux - enables or disables AUX port on i8042 via command and 778 * verifies success by readinng CTR. Used when testing for presence of AUX 779 * port. 780 */ 781 static int i8042_toggle_aux(bool on) 782 { 783 unsigned char param; 784 int i; 785 786 if (i8042_command(¶m, 787 on ? I8042_CMD_AUX_ENABLE : I8042_CMD_AUX_DISABLE)) 788 return -1; 789 790 /* some chips need some time to set the I8042_CTR_AUXDIS bit */ 791 for (i = 0; i < 100; i++) { 792 udelay(50); 793 794 if (i8042_command(¶m, I8042_CMD_CTL_RCTR)) 795 return -1; 796 797 if (!(param & I8042_CTR_AUXDIS) == on) 798 return 0; 799 } 800 801 return -1; 802 } 803 804 /* 805 * i8042_check_aux() applies as much paranoia as it can at detecting 806 * the presence of an AUX interface. 807 */ 808 809 static int i8042_check_aux(void) 810 { 811 int retval = -1; 812 bool irq_registered = false; 813 bool aux_loop_broken = false; 814 unsigned long flags; 815 unsigned char param; 816 817 /* 818 * Get rid of bytes in the queue. 819 */ 820 821 i8042_flush(); 822 823 /* 824 * Internal loopback test - filters out AT-type i8042's. Unfortunately 825 * SiS screwed up and their 5597 doesn't support the LOOP command even 826 * though it has an AUX port. 827 */ 828 829 param = 0x5a; 830 retval = i8042_command(¶m, I8042_CMD_AUX_LOOP); 831 if (retval || param != 0x5a) { 832 833 /* 834 * External connection test - filters out AT-soldered PS/2 i8042's 835 * 0x00 - no error, 0x01-0x03 - clock/data stuck, 0xff - general error 836 * 0xfa - no error on some notebooks which ignore the spec 837 * Because it's common for chipsets to return error on perfectly functioning 838 * AUX ports, we test for this only when the LOOP command failed. 839 */ 840 841 if (i8042_command(¶m, I8042_CMD_AUX_TEST) || 842 (param && param != 0xfa && param != 0xff)) 843 return -1; 844 845 /* 846 * If AUX_LOOP completed without error but returned unexpected data 847 * mark it as broken 848 */ 849 if (!retval) 850 aux_loop_broken = true; 851 } 852 853 /* 854 * Bit assignment test - filters out PS/2 i8042's in AT mode 855 */ 856 857 if (i8042_toggle_aux(false)) { 858 pr_warn("Failed to disable AUX port, but continuing anyway... Is this a SiS?\n"); 859 pr_warn("If AUX port is really absent please use the 'i8042.noaux' option\n"); 860 } 861 862 if (i8042_toggle_aux(true)) 863 return -1; 864 865 /* 866 * Reset keyboard (needed on some laptops to successfully detect 867 * touchpad, e.g., some Gigabyte laptop models with Elantech 868 * touchpads). 869 */ 870 if (i8042_kbdreset) { 871 pr_warn("Attempting to reset device connected to KBD port\n"); 872 i8042_kbd_write(NULL, (unsigned char) 0xff); 873 } 874 875 /* 876 * Test AUX IRQ delivery to make sure BIOS did not grab the IRQ and 877 * used it for a PCI card or somethig else. 878 */ 879 880 if (i8042_noloop || i8042_bypass_aux_irq_test || aux_loop_broken) { 881 /* 882 * Without LOOP command we can't test AUX IRQ delivery. Assume the port 883 * is working and hope we are right. 884 */ 885 retval = 0; 886 goto out; 887 } 888 889 if (request_irq(I8042_AUX_IRQ, i8042_aux_test_irq, IRQF_SHARED, 890 "i8042", i8042_platform_device)) 891 goto out; 892 893 irq_registered = true; 894 895 if (i8042_enable_aux_port()) 896 goto out; 897 898 spin_lock_irqsave(&i8042_lock, flags); 899 900 init_completion(&i8042_aux_irq_delivered); 901 i8042_irq_being_tested = true; 902 903 param = 0xa5; 904 retval = __i8042_command(¶m, I8042_CMD_AUX_LOOP & 0xf0ff); 905 906 spin_unlock_irqrestore(&i8042_lock, flags); 907 908 if (retval) 909 goto out; 910 911 if (wait_for_completion_timeout(&i8042_aux_irq_delivered, 912 msecs_to_jiffies(250)) == 0) { 913 /* 914 * AUX IRQ was never delivered so we need to flush the controller to 915 * get rid of the byte we put there; otherwise keyboard may not work. 916 */ 917 dbg(" -- i8042 (aux irq test timeout)\n"); 918 i8042_flush(); 919 retval = -1; 920 } 921 922 out: 923 924 /* 925 * Disable the interface. 926 */ 927 928 i8042_ctr |= I8042_CTR_AUXDIS; 929 i8042_ctr &= ~I8042_CTR_AUXINT; 930 931 if (i8042_command(&i8042_ctr, I8042_CMD_CTL_WCTR)) 932 retval = -1; 933 934 if (irq_registered) 935 free_irq(I8042_AUX_IRQ, i8042_platform_device); 936 937 return retval; 938 } 939 940 static int i8042_controller_check(void) 941 { 942 if (i8042_flush()) { 943 pr_info("No controller found\n"); 944 return -ENODEV; 945 } 946 947 return 0; 948 } 949 950 static int i8042_controller_selftest(void) 951 { 952 unsigned char param; 953 int i = 0; 954 955 /* 956 * We try this 5 times; on some really fragile systems this does not 957 * take the first time... 958 */ 959 do { 960 961 if (i8042_command(¶m, I8042_CMD_CTL_TEST)) { 962 pr_err("i8042 controller selftest timeout\n"); 963 return -ENODEV; 964 } 965 966 if (param == I8042_RET_CTL_TEST) 967 return 0; 968 969 dbg("i8042 controller selftest: %#x != %#x\n", 970 param, I8042_RET_CTL_TEST); 971 msleep(50); 972 } while (i++ < 5); 973 974 #ifdef CONFIG_X86 975 /* 976 * On x86, we don't fail entire i8042 initialization if controller 977 * reset fails in hopes that keyboard port will still be functional 978 * and user will still get a working keyboard. This is especially 979 * important on netbooks. On other arches we trust hardware more. 980 */ 981 pr_info("giving up on controller selftest, continuing anyway...\n"); 982 return 0; 983 #else 984 pr_err("i8042 controller selftest failed\n"); 985 return -EIO; 986 #endif 987 } 988 989 /* 990 * i8042_controller_init initializes the i8042 controller, and, 991 * most importantly, sets it into non-xlated mode if that's 992 * desired. 993 */ 994 995 static int i8042_controller_init(void) 996 { 997 unsigned long flags; 998 int n = 0; 999 unsigned char ctr[2]; 1000 1001 /* 1002 * Save the CTR for restore on unload / reboot. 1003 */ 1004 1005 do { 1006 if (n >= 10) { 1007 pr_err("Unable to get stable CTR read\n"); 1008 return -EIO; 1009 } 1010 1011 if (n != 0) 1012 udelay(50); 1013 1014 if (i8042_command(&ctr[n++ % 2], I8042_CMD_CTL_RCTR)) { 1015 pr_err("Can't read CTR while initializing i8042\n"); 1016 return i8042_probe_defer ? -EPROBE_DEFER : -EIO; 1017 } 1018 1019 } while (n < 2 || ctr[0] != ctr[1]); 1020 1021 i8042_initial_ctr = i8042_ctr = ctr[0]; 1022 1023 /* 1024 * Disable the keyboard interface and interrupt. 1025 */ 1026 1027 i8042_ctr |= I8042_CTR_KBDDIS; 1028 i8042_ctr &= ~I8042_CTR_KBDINT; 1029 1030 /* 1031 * Handle keylock. 1032 */ 1033 1034 spin_lock_irqsave(&i8042_lock, flags); 1035 if (~i8042_read_status() & I8042_STR_KEYLOCK) { 1036 if (i8042_unlock) 1037 i8042_ctr |= I8042_CTR_IGNKEYLOCK; 1038 else 1039 pr_warn("Warning: Keylock active\n"); 1040 } 1041 spin_unlock_irqrestore(&i8042_lock, flags); 1042 1043 /* 1044 * If the chip is configured into nontranslated mode by the BIOS, don't 1045 * bother enabling translating and be happy. 1046 */ 1047 1048 if (~i8042_ctr & I8042_CTR_XLATE) 1049 i8042_direct = true; 1050 1051 /* 1052 * Set nontranslated mode for the kbd interface if requested by an option. 1053 * After this the kbd interface becomes a simple serial in/out, like the aux 1054 * interface is. We don't do this by default, since it can confuse notebook 1055 * BIOSes. 1056 */ 1057 1058 if (i8042_direct) 1059 i8042_ctr &= ~I8042_CTR_XLATE; 1060 1061 /* 1062 * Write CTR back. 1063 */ 1064 1065 if (i8042_command(&i8042_ctr, I8042_CMD_CTL_WCTR)) { 1066 pr_err("Can't write CTR while initializing i8042\n"); 1067 return -EIO; 1068 } 1069 1070 /* 1071 * Flush whatever accumulated while we were disabling keyboard port. 1072 */ 1073 1074 i8042_flush(); 1075 1076 return 0; 1077 } 1078 1079 1080 /* 1081 * Reset the controller and reset CRT to the original value set by BIOS. 1082 */ 1083 1084 static void i8042_controller_reset(bool s2r_wants_reset) 1085 { 1086 i8042_flush(); 1087 1088 /* 1089 * Disable both KBD and AUX interfaces so they don't get in the way 1090 */ 1091 1092 i8042_ctr |= I8042_CTR_KBDDIS | I8042_CTR_AUXDIS; 1093 i8042_ctr &= ~(I8042_CTR_KBDINT | I8042_CTR_AUXINT); 1094 1095 if (i8042_command(&i8042_ctr, I8042_CMD_CTL_WCTR)) 1096 pr_warn("Can't write CTR while resetting\n"); 1097 1098 /* 1099 * Disable MUX mode if present. 1100 */ 1101 1102 if (i8042_mux_present) 1103 i8042_set_mux_mode(false, NULL); 1104 1105 /* 1106 * Reset the controller if requested. 1107 */ 1108 1109 if (i8042_reset == I8042_RESET_ALWAYS || 1110 (i8042_reset == I8042_RESET_ON_S2RAM && s2r_wants_reset)) { 1111 i8042_controller_selftest(); 1112 } 1113 1114 /* 1115 * Restore the original control register setting. 1116 */ 1117 1118 if (i8042_command(&i8042_initial_ctr, I8042_CMD_CTL_WCTR)) 1119 pr_warn("Can't restore CTR\n"); 1120 } 1121 1122 1123 /* 1124 * i8042_panic_blink() will turn the keyboard LEDs on or off and is called 1125 * when kernel panics. Flashing LEDs is useful for users running X who may 1126 * not see the console and will help distinguishing panics from "real" 1127 * lockups. 1128 * 1129 * Note that DELAY has a limit of 10ms so we will not get stuck here 1130 * waiting for KBC to free up even if KBD interrupt is off 1131 */ 1132 1133 #define DELAY do { mdelay(1); if (++delay > 10) return delay; } while(0) 1134 1135 static long i8042_panic_blink(int state) 1136 { 1137 long delay = 0; 1138 char led; 1139 1140 led = (state) ? 0x01 | 0x04 : 0; 1141 while (i8042_read_status() & I8042_STR_IBF) 1142 DELAY; 1143 dbg("%02x -> i8042 (panic blink)\n", 0xed); 1144 i8042_suppress_kbd_ack = 2; 1145 i8042_write_data(0xed); /* set leds */ 1146 DELAY; 1147 while (i8042_read_status() & I8042_STR_IBF) 1148 DELAY; 1149 DELAY; 1150 dbg("%02x -> i8042 (panic blink)\n", led); 1151 i8042_write_data(led); 1152 DELAY; 1153 return delay; 1154 } 1155 1156 #undef DELAY 1157 1158 #ifdef CONFIG_X86 1159 static void i8042_dritek_enable(void) 1160 { 1161 unsigned char param = 0x90; 1162 int error; 1163 1164 error = i8042_command(¶m, 0x1059); 1165 if (error) 1166 pr_warn("Failed to enable DRITEK extension: %d\n", error); 1167 } 1168 #endif 1169 1170 #ifdef CONFIG_PM 1171 1172 /* 1173 * Here we try to reset everything back to a state we had 1174 * before suspending. 1175 */ 1176 1177 static int i8042_controller_resume(bool s2r_wants_reset) 1178 { 1179 int error; 1180 1181 error = i8042_controller_check(); 1182 if (error) 1183 return error; 1184 1185 if (i8042_reset == I8042_RESET_ALWAYS || 1186 (i8042_reset == I8042_RESET_ON_S2RAM && s2r_wants_reset)) { 1187 error = i8042_controller_selftest(); 1188 if (error) 1189 return error; 1190 } 1191 1192 /* 1193 * Restore original CTR value and disable all ports 1194 */ 1195 1196 i8042_ctr = i8042_initial_ctr; 1197 if (i8042_direct) 1198 i8042_ctr &= ~I8042_CTR_XLATE; 1199 i8042_ctr |= I8042_CTR_AUXDIS | I8042_CTR_KBDDIS; 1200 i8042_ctr &= ~(I8042_CTR_AUXINT | I8042_CTR_KBDINT); 1201 if (i8042_command(&i8042_ctr, I8042_CMD_CTL_WCTR)) { 1202 pr_warn("Can't write CTR to resume, retrying...\n"); 1203 msleep(50); 1204 if (i8042_command(&i8042_ctr, I8042_CMD_CTL_WCTR)) { 1205 pr_err("CTR write retry failed\n"); 1206 return -EIO; 1207 } 1208 } 1209 1210 1211 #ifdef CONFIG_X86 1212 if (i8042_dritek) 1213 i8042_dritek_enable(); 1214 #endif 1215 1216 if (i8042_mux_present) { 1217 if (i8042_set_mux_mode(true, NULL) || i8042_enable_mux_ports()) 1218 pr_warn("failed to resume active multiplexor, mouse won't work\n"); 1219 } else if (i8042_ports[I8042_AUX_PORT_NO].serio) 1220 i8042_enable_aux_port(); 1221 1222 if (i8042_ports[I8042_KBD_PORT_NO].serio) 1223 i8042_enable_kbd_port(); 1224 1225 i8042_interrupt(0, NULL); 1226 1227 return 0; 1228 } 1229 1230 /* 1231 * Here we try to restore the original BIOS settings to avoid 1232 * upsetting it. 1233 */ 1234 1235 static int i8042_pm_suspend(struct device *dev) 1236 { 1237 int i; 1238 1239 if (!i8042_forcenorestore && pm_suspend_via_firmware()) 1240 i8042_controller_reset(true); 1241 1242 /* Set up serio interrupts for system wakeup. */ 1243 for (i = 0; i < I8042_NUM_PORTS; i++) { 1244 struct serio *serio = i8042_ports[i].serio; 1245 1246 if (serio && device_may_wakeup(&serio->dev)) 1247 enable_irq_wake(i8042_ports[i].irq); 1248 } 1249 1250 return 0; 1251 } 1252 1253 static int i8042_pm_resume_noirq(struct device *dev) 1254 { 1255 if (i8042_forcenorestore || !pm_resume_via_firmware()) 1256 i8042_interrupt(0, NULL); 1257 1258 return 0; 1259 } 1260 1261 static int i8042_pm_resume(struct device *dev) 1262 { 1263 bool want_reset; 1264 int i; 1265 1266 for (i = 0; i < I8042_NUM_PORTS; i++) { 1267 struct serio *serio = i8042_ports[i].serio; 1268 1269 if (serio && device_may_wakeup(&serio->dev)) 1270 disable_irq_wake(i8042_ports[i].irq); 1271 } 1272 1273 /* 1274 * If platform firmware was not going to be involved in suspend, we did 1275 * not restore the controller state to whatever it had been at boot 1276 * time, so we do not need to do anything. 1277 */ 1278 if (i8042_forcenorestore || !pm_suspend_via_firmware()) 1279 return 0; 1280 1281 /* 1282 * We only need to reset the controller if we are resuming after handing 1283 * off control to the platform firmware, otherwise we can simply restore 1284 * the mode. 1285 */ 1286 want_reset = pm_resume_via_firmware(); 1287 1288 return i8042_controller_resume(want_reset); 1289 } 1290 1291 static int i8042_pm_thaw(struct device *dev) 1292 { 1293 i8042_interrupt(0, NULL); 1294 1295 return 0; 1296 } 1297 1298 static int i8042_pm_reset(struct device *dev) 1299 { 1300 i8042_controller_reset(false); 1301 1302 return 0; 1303 } 1304 1305 static int i8042_pm_restore(struct device *dev) 1306 { 1307 return i8042_controller_resume(false); 1308 } 1309 1310 static const struct dev_pm_ops i8042_pm_ops = { 1311 .suspend = i8042_pm_suspend, 1312 .resume_noirq = i8042_pm_resume_noirq, 1313 .resume = i8042_pm_resume, 1314 .thaw = i8042_pm_thaw, 1315 .poweroff = i8042_pm_reset, 1316 .restore = i8042_pm_restore, 1317 }; 1318 1319 #endif /* CONFIG_PM */ 1320 1321 /* 1322 * We need to reset the 8042 back to original mode on system shutdown, 1323 * because otherwise BIOSes will be confused. 1324 */ 1325 1326 static void i8042_shutdown(struct platform_device *dev) 1327 { 1328 i8042_controller_reset(false); 1329 } 1330 1331 static int i8042_create_kbd_port(void) 1332 { 1333 struct serio *serio; 1334 struct i8042_port *port = &i8042_ports[I8042_KBD_PORT_NO]; 1335 1336 serio = kzalloc(sizeof(*serio), GFP_KERNEL); 1337 if (!serio) 1338 return -ENOMEM; 1339 1340 serio->id.type = i8042_direct ? SERIO_8042 : SERIO_8042_XL; 1341 serio->write = i8042_dumbkbd ? NULL : i8042_kbd_write; 1342 serio->start = i8042_start; 1343 serio->stop = i8042_stop; 1344 serio->close = i8042_port_close; 1345 serio->ps2_cmd_mutex = &i8042_mutex; 1346 serio->port_data = port; 1347 serio->dev.parent = &i8042_platform_device->dev; 1348 strscpy(serio->name, "i8042 KBD port", sizeof(serio->name)); 1349 strscpy(serio->phys, I8042_KBD_PHYS_DESC, sizeof(serio->phys)); 1350 strscpy(serio->firmware_id, i8042_kbd_firmware_id, 1351 sizeof(serio->firmware_id)); 1352 set_primary_fwnode(&serio->dev, i8042_kbd_fwnode); 1353 1354 port->serio = serio; 1355 port->irq = I8042_KBD_IRQ; 1356 1357 return 0; 1358 } 1359 1360 static int i8042_create_aux_port(int idx) 1361 { 1362 struct serio *serio; 1363 int port_no = idx < 0 ? I8042_AUX_PORT_NO : I8042_MUX_PORT_NO + idx; 1364 struct i8042_port *port = &i8042_ports[port_no]; 1365 1366 serio = kzalloc(sizeof(*serio), GFP_KERNEL); 1367 if (!serio) 1368 return -ENOMEM; 1369 1370 serio->id.type = SERIO_8042; 1371 serio->write = i8042_aux_write; 1372 serio->start = i8042_start; 1373 serio->stop = i8042_stop; 1374 serio->ps2_cmd_mutex = &i8042_mutex; 1375 serio->port_data = port; 1376 serio->dev.parent = &i8042_platform_device->dev; 1377 if (idx < 0) { 1378 strscpy(serio->name, "i8042 AUX port", sizeof(serio->name)); 1379 strscpy(serio->phys, I8042_AUX_PHYS_DESC, sizeof(serio->phys)); 1380 strscpy(serio->firmware_id, i8042_aux_firmware_id, 1381 sizeof(serio->firmware_id)); 1382 serio->close = i8042_port_close; 1383 } else { 1384 snprintf(serio->name, sizeof(serio->name), "i8042 AUX%d port", idx); 1385 snprintf(serio->phys, sizeof(serio->phys), I8042_MUX_PHYS_DESC, idx + 1); 1386 strscpy(serio->firmware_id, i8042_aux_firmware_id, 1387 sizeof(serio->firmware_id)); 1388 } 1389 1390 port->serio = serio; 1391 port->mux = idx; 1392 port->irq = I8042_AUX_IRQ; 1393 1394 return 0; 1395 } 1396 1397 static void i8042_free_kbd_port(void) 1398 { 1399 kfree(i8042_ports[I8042_KBD_PORT_NO].serio); 1400 i8042_ports[I8042_KBD_PORT_NO].serio = NULL; 1401 } 1402 1403 static void i8042_free_aux_ports(void) 1404 { 1405 int i; 1406 1407 for (i = I8042_AUX_PORT_NO; i < I8042_NUM_PORTS; i++) { 1408 kfree(i8042_ports[i].serio); 1409 i8042_ports[i].serio = NULL; 1410 } 1411 } 1412 1413 static void i8042_register_ports(void) 1414 { 1415 int i; 1416 1417 for (i = 0; i < I8042_NUM_PORTS; i++) { 1418 struct serio *serio = i8042_ports[i].serio; 1419 1420 if (!serio) 1421 continue; 1422 1423 printk(KERN_INFO "serio: %s at %#lx,%#lx irq %d\n", 1424 serio->name, 1425 (unsigned long) I8042_DATA_REG, 1426 (unsigned long) I8042_COMMAND_REG, 1427 i8042_ports[i].irq); 1428 serio_register_port(serio); 1429 } 1430 } 1431 1432 static void i8042_unregister_ports(void) 1433 { 1434 int i; 1435 1436 for (i = 0; i < I8042_NUM_PORTS; i++) { 1437 if (i8042_ports[i].serio) { 1438 serio_unregister_port(i8042_ports[i].serio); 1439 i8042_ports[i].serio = NULL; 1440 } 1441 } 1442 } 1443 1444 static void i8042_free_irqs(void) 1445 { 1446 if (i8042_aux_irq_registered) 1447 free_irq(I8042_AUX_IRQ, i8042_platform_device); 1448 if (i8042_kbd_irq_registered) 1449 free_irq(I8042_KBD_IRQ, i8042_platform_device); 1450 1451 i8042_aux_irq_registered = i8042_kbd_irq_registered = false; 1452 } 1453 1454 static int i8042_setup_aux(void) 1455 { 1456 int (*aux_enable)(void); 1457 int error; 1458 int i; 1459 1460 if (i8042_check_aux()) 1461 return -ENODEV; 1462 1463 if (i8042_nomux || i8042_check_mux()) { 1464 error = i8042_create_aux_port(-1); 1465 if (error) 1466 goto err_free_ports; 1467 aux_enable = i8042_enable_aux_port; 1468 } else { 1469 for (i = 0; i < I8042_NUM_MUX_PORTS; i++) { 1470 error = i8042_create_aux_port(i); 1471 if (error) 1472 goto err_free_ports; 1473 } 1474 aux_enable = i8042_enable_mux_ports; 1475 } 1476 1477 error = request_irq(I8042_AUX_IRQ, i8042_interrupt, IRQF_SHARED, 1478 "i8042", i8042_platform_device); 1479 if (error) 1480 goto err_free_ports; 1481 1482 error = aux_enable(); 1483 if (error) 1484 goto err_free_irq; 1485 1486 i8042_aux_irq_registered = true; 1487 return 0; 1488 1489 err_free_irq: 1490 free_irq(I8042_AUX_IRQ, i8042_platform_device); 1491 err_free_ports: 1492 i8042_free_aux_ports(); 1493 return error; 1494 } 1495 1496 static int i8042_setup_kbd(void) 1497 { 1498 int error; 1499 1500 error = i8042_create_kbd_port(); 1501 if (error) 1502 return error; 1503 1504 error = request_irq(I8042_KBD_IRQ, i8042_interrupt, IRQF_SHARED, 1505 "i8042", i8042_platform_device); 1506 if (error) 1507 goto err_free_port; 1508 1509 error = i8042_enable_kbd_port(); 1510 if (error) 1511 goto err_free_irq; 1512 1513 i8042_kbd_irq_registered = true; 1514 return 0; 1515 1516 err_free_irq: 1517 free_irq(I8042_KBD_IRQ, i8042_platform_device); 1518 err_free_port: 1519 i8042_free_kbd_port(); 1520 return error; 1521 } 1522 1523 static int i8042_kbd_bind_notifier(struct notifier_block *nb, 1524 unsigned long action, void *data) 1525 { 1526 struct device *dev = data; 1527 struct serio *serio = to_serio_port(dev); 1528 struct i8042_port *port = serio->port_data; 1529 1530 if (serio != i8042_ports[I8042_KBD_PORT_NO].serio) 1531 return 0; 1532 1533 switch (action) { 1534 case BUS_NOTIFY_BOUND_DRIVER: 1535 port->driver_bound = true; 1536 break; 1537 1538 case BUS_NOTIFY_UNBIND_DRIVER: 1539 port->driver_bound = false; 1540 break; 1541 } 1542 1543 return 0; 1544 } 1545 1546 static int i8042_probe(struct platform_device *dev) 1547 { 1548 int error; 1549 1550 if (i8042_reset == I8042_RESET_ALWAYS) { 1551 error = i8042_controller_selftest(); 1552 if (error) 1553 return error; 1554 } 1555 1556 error = i8042_controller_init(); 1557 if (error) 1558 return error; 1559 1560 #ifdef CONFIG_X86 1561 if (i8042_dritek) 1562 i8042_dritek_enable(); 1563 #endif 1564 1565 if (!i8042_noaux) { 1566 error = i8042_setup_aux(); 1567 if (error && error != -ENODEV && error != -EBUSY) 1568 goto out_fail; 1569 } 1570 1571 if (!i8042_nokbd) { 1572 error = i8042_setup_kbd(); 1573 if (error) 1574 goto out_fail; 1575 } 1576 /* 1577 * Ok, everything is ready, let's register all serio ports 1578 */ 1579 i8042_register_ports(); 1580 1581 return 0; 1582 1583 out_fail: 1584 i8042_free_aux_ports(); /* in case KBD failed but AUX not */ 1585 i8042_free_irqs(); 1586 i8042_controller_reset(false); 1587 1588 return error; 1589 } 1590 1591 static void i8042_remove(struct platform_device *dev) 1592 { 1593 i8042_unregister_ports(); 1594 i8042_free_irqs(); 1595 i8042_controller_reset(false); 1596 } 1597 1598 static struct platform_driver i8042_driver = { 1599 .driver = { 1600 .name = "i8042", 1601 #ifdef CONFIG_PM 1602 .pm = &i8042_pm_ops, 1603 #endif 1604 }, 1605 .probe = i8042_probe, 1606 .remove_new = i8042_remove, 1607 .shutdown = i8042_shutdown, 1608 }; 1609 1610 static struct notifier_block i8042_kbd_bind_notifier_block = { 1611 .notifier_call = i8042_kbd_bind_notifier, 1612 }; 1613 1614 static int __init i8042_init(void) 1615 { 1616 int err; 1617 1618 dbg_init(); 1619 1620 err = i8042_platform_init(); 1621 if (err) 1622 return (err == -ENODEV) ? 0 : err; 1623 1624 err = i8042_controller_check(); 1625 if (err) 1626 goto err_platform_exit; 1627 1628 /* Set this before creating the dev to allow i8042_command to work right away */ 1629 i8042_present = true; 1630 1631 err = platform_driver_register(&i8042_driver); 1632 if (err) 1633 goto err_platform_exit; 1634 1635 i8042_platform_device = platform_device_alloc("i8042", -1); 1636 if (!i8042_platform_device) { 1637 err = -ENOMEM; 1638 goto err_unregister_driver; 1639 } 1640 1641 err = platform_device_add(i8042_platform_device); 1642 if (err) 1643 goto err_free_device; 1644 1645 bus_register_notifier(&serio_bus, &i8042_kbd_bind_notifier_block); 1646 panic_blink = i8042_panic_blink; 1647 1648 return 0; 1649 1650 err_free_device: 1651 platform_device_put(i8042_platform_device); 1652 err_unregister_driver: 1653 platform_driver_unregister(&i8042_driver); 1654 err_platform_exit: 1655 i8042_platform_exit(); 1656 return err; 1657 } 1658 1659 static void __exit i8042_exit(void) 1660 { 1661 if (!i8042_present) 1662 return; 1663 1664 platform_device_unregister(i8042_platform_device); 1665 platform_driver_unregister(&i8042_driver); 1666 i8042_platform_exit(); 1667 1668 bus_unregister_notifier(&serio_bus, &i8042_kbd_bind_notifier_block); 1669 panic_blink = NULL; 1670 } 1671 1672 module_init(i8042_init); 1673 module_exit(i8042_exit); 1674