1 /* 2 * i8042 keyboard and mouse controller driver for Linux 3 * 4 * Copyright (c) 1999-2004 Vojtech Pavlik 5 */ 6 7 /* 8 * This program is free software; you can redistribute it and/or modify it 9 * under the terms of the GNU General Public License version 2 as published by 10 * the Free Software Foundation. 11 */ 12 13 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt 14 15 #include <linux/types.h> 16 #include <linux/delay.h> 17 #include <linux/module.h> 18 #include <linux/interrupt.h> 19 #include <linux/ioport.h> 20 #include <linux/init.h> 21 #include <linux/serio.h> 22 #include <linux/err.h> 23 #include <linux/rcupdate.h> 24 #include <linux/platform_device.h> 25 #include <linux/i8042.h> 26 #include <linux/slab.h> 27 #include <linux/suspend.h> 28 29 #include <asm/io.h> 30 31 MODULE_AUTHOR("Vojtech Pavlik <vojtech@suse.cz>"); 32 MODULE_DESCRIPTION("i8042 keyboard and mouse controller driver"); 33 MODULE_LICENSE("GPL"); 34 35 static bool i8042_nokbd; 36 module_param_named(nokbd, i8042_nokbd, bool, 0); 37 MODULE_PARM_DESC(nokbd, "Do not probe or use KBD port."); 38 39 static bool i8042_noaux; 40 module_param_named(noaux, i8042_noaux, bool, 0); 41 MODULE_PARM_DESC(noaux, "Do not probe or use AUX (mouse) port."); 42 43 static bool i8042_nomux; 44 module_param_named(nomux, i8042_nomux, bool, 0); 45 MODULE_PARM_DESC(nomux, "Do not check whether an active multiplexing controller is present."); 46 47 static bool i8042_unlock; 48 module_param_named(unlock, i8042_unlock, bool, 0); 49 MODULE_PARM_DESC(unlock, "Ignore keyboard lock."); 50 51 enum i8042_controller_reset_mode { 52 I8042_RESET_NEVER, 53 I8042_RESET_ALWAYS, 54 I8042_RESET_ON_S2RAM, 55 #define I8042_RESET_DEFAULT I8042_RESET_ON_S2RAM 56 }; 57 static enum i8042_controller_reset_mode i8042_reset = I8042_RESET_DEFAULT; 58 static int i8042_set_reset(const char *val, const struct kernel_param *kp) 59 { 60 enum i8042_controller_reset_mode *arg = kp->arg; 61 int error; 62 bool reset; 63 64 if (val) { 65 error = kstrtobool(val, &reset); 66 if (error) 67 return error; 68 } else { 69 reset = true; 70 } 71 72 *arg = reset ? I8042_RESET_ALWAYS : I8042_RESET_NEVER; 73 return 0; 74 } 75 76 static const struct kernel_param_ops param_ops_reset_param = { 77 .flags = KERNEL_PARAM_OPS_FL_NOARG, 78 .set = i8042_set_reset, 79 }; 80 #define param_check_reset_param(name, p) \ 81 __param_check(name, p, enum i8042_controller_reset_mode) 82 module_param_named(reset, i8042_reset, reset_param, 0); 83 MODULE_PARM_DESC(reset, "Reset controller on resume, cleanup or both"); 84 85 static bool i8042_direct; 86 module_param_named(direct, i8042_direct, bool, 0); 87 MODULE_PARM_DESC(direct, "Put keyboard port into non-translated mode."); 88 89 static bool i8042_dumbkbd; 90 module_param_named(dumbkbd, i8042_dumbkbd, bool, 0); 91 MODULE_PARM_DESC(dumbkbd, "Pretend that controller can only read data from keyboard"); 92 93 static bool i8042_noloop; 94 module_param_named(noloop, i8042_noloop, bool, 0); 95 MODULE_PARM_DESC(noloop, "Disable the AUX Loopback command while probing for the AUX port"); 96 97 static bool i8042_notimeout; 98 module_param_named(notimeout, i8042_notimeout, bool, 0); 99 MODULE_PARM_DESC(notimeout, "Ignore timeouts signalled by i8042"); 100 101 static bool i8042_kbdreset; 102 module_param_named(kbdreset, i8042_kbdreset, bool, 0); 103 MODULE_PARM_DESC(kbdreset, "Reset device connected to KBD port"); 104 105 #ifdef CONFIG_X86 106 static bool i8042_dritek; 107 module_param_named(dritek, i8042_dritek, bool, 0); 108 MODULE_PARM_DESC(dritek, "Force enable the Dritek keyboard extension"); 109 #endif 110 111 #ifdef CONFIG_PNP 112 static bool i8042_nopnp; 113 module_param_named(nopnp, i8042_nopnp, bool, 0); 114 MODULE_PARM_DESC(nopnp, "Do not use PNP to detect controller settings"); 115 #endif 116 117 #define DEBUG 118 #ifdef DEBUG 119 static bool i8042_debug; 120 module_param_named(debug, i8042_debug, bool, 0600); 121 MODULE_PARM_DESC(debug, "Turn i8042 debugging mode on and off"); 122 123 static bool i8042_unmask_kbd_data; 124 module_param_named(unmask_kbd_data, i8042_unmask_kbd_data, bool, 0600); 125 MODULE_PARM_DESC(unmask_kbd_data, "Unconditional enable (may reveal sensitive data) of normally sanitize-filtered kbd data traffic debug log [pre-condition: i8042.debug=1 enabled]"); 126 #endif 127 128 static bool i8042_bypass_aux_irq_test; 129 static char i8042_kbd_firmware_id[128]; 130 static char i8042_aux_firmware_id[128]; 131 132 #include "i8042.h" 133 134 /* 135 * i8042_lock protects serialization between i8042_command and 136 * the interrupt handler. 137 */ 138 static DEFINE_SPINLOCK(i8042_lock); 139 140 /* 141 * Writers to AUX and KBD ports as well as users issuing i8042_command 142 * directly should acquire i8042_mutex (by means of calling 143 * i8042_lock_chip() and i8042_unlock_ship() helpers) to ensure that 144 * they do not disturb each other (unfortunately in many i8042 145 * implementations write to one of the ports will immediately abort 146 * command that is being processed by another port). 147 */ 148 static DEFINE_MUTEX(i8042_mutex); 149 150 struct i8042_port { 151 struct serio *serio; 152 int irq; 153 bool exists; 154 bool driver_bound; 155 signed char mux; 156 }; 157 158 #define I8042_KBD_PORT_NO 0 159 #define I8042_AUX_PORT_NO 1 160 #define I8042_MUX_PORT_NO 2 161 #define I8042_NUM_PORTS (I8042_NUM_MUX_PORTS + 2) 162 163 static struct i8042_port i8042_ports[I8042_NUM_PORTS]; 164 165 static unsigned char i8042_initial_ctr; 166 static unsigned char i8042_ctr; 167 static bool i8042_mux_present; 168 static bool i8042_kbd_irq_registered; 169 static bool i8042_aux_irq_registered; 170 static unsigned char i8042_suppress_kbd_ack; 171 static struct platform_device *i8042_platform_device; 172 static struct notifier_block i8042_kbd_bind_notifier_block; 173 174 static irqreturn_t i8042_interrupt(int irq, void *dev_id); 175 static bool (*i8042_platform_filter)(unsigned char data, unsigned char str, 176 struct serio *serio); 177 178 void i8042_lock_chip(void) 179 { 180 mutex_lock(&i8042_mutex); 181 } 182 EXPORT_SYMBOL(i8042_lock_chip); 183 184 void i8042_unlock_chip(void) 185 { 186 mutex_unlock(&i8042_mutex); 187 } 188 EXPORT_SYMBOL(i8042_unlock_chip); 189 190 int i8042_install_filter(bool (*filter)(unsigned char data, unsigned char str, 191 struct serio *serio)) 192 { 193 unsigned long flags; 194 int ret = 0; 195 196 spin_lock_irqsave(&i8042_lock, flags); 197 198 if (i8042_platform_filter) { 199 ret = -EBUSY; 200 goto out; 201 } 202 203 i8042_platform_filter = filter; 204 205 out: 206 spin_unlock_irqrestore(&i8042_lock, flags); 207 return ret; 208 } 209 EXPORT_SYMBOL(i8042_install_filter); 210 211 int i8042_remove_filter(bool (*filter)(unsigned char data, unsigned char str, 212 struct serio *port)) 213 { 214 unsigned long flags; 215 int ret = 0; 216 217 spin_lock_irqsave(&i8042_lock, flags); 218 219 if (i8042_platform_filter != filter) { 220 ret = -EINVAL; 221 goto out; 222 } 223 224 i8042_platform_filter = NULL; 225 226 out: 227 spin_unlock_irqrestore(&i8042_lock, flags); 228 return ret; 229 } 230 EXPORT_SYMBOL(i8042_remove_filter); 231 232 /* 233 * The i8042_wait_read() and i8042_wait_write functions wait for the i8042 to 234 * be ready for reading values from it / writing values to it. 235 * Called always with i8042_lock held. 236 */ 237 238 static int i8042_wait_read(void) 239 { 240 int i = 0; 241 242 while ((~i8042_read_status() & I8042_STR_OBF) && (i < I8042_CTL_TIMEOUT)) { 243 udelay(50); 244 i++; 245 } 246 return -(i == I8042_CTL_TIMEOUT); 247 } 248 249 static int i8042_wait_write(void) 250 { 251 int i = 0; 252 253 while ((i8042_read_status() & I8042_STR_IBF) && (i < I8042_CTL_TIMEOUT)) { 254 udelay(50); 255 i++; 256 } 257 return -(i == I8042_CTL_TIMEOUT); 258 } 259 260 /* 261 * i8042_flush() flushes all data that may be in the keyboard and mouse buffers 262 * of the i8042 down the toilet. 263 */ 264 265 static int i8042_flush(void) 266 { 267 unsigned long flags; 268 unsigned char data, str; 269 int count = 0; 270 int retval = 0; 271 272 spin_lock_irqsave(&i8042_lock, flags); 273 274 while ((str = i8042_read_status()) & I8042_STR_OBF) { 275 if (count++ < I8042_BUFFER_SIZE) { 276 udelay(50); 277 data = i8042_read_data(); 278 dbg("%02x <- i8042 (flush, %s)\n", 279 data, str & I8042_STR_AUXDATA ? "aux" : "kbd"); 280 } else { 281 retval = -EIO; 282 break; 283 } 284 } 285 286 spin_unlock_irqrestore(&i8042_lock, flags); 287 288 return retval; 289 } 290 291 /* 292 * i8042_command() executes a command on the i8042. It also sends the input 293 * parameter(s) of the commands to it, and receives the output value(s). The 294 * parameters are to be stored in the param array, and the output is placed 295 * into the same array. The number of the parameters and output values is 296 * encoded in bits 8-11 of the command number. 297 */ 298 299 static int __i8042_command(unsigned char *param, int command) 300 { 301 int i, error; 302 303 if (i8042_noloop && command == I8042_CMD_AUX_LOOP) 304 return -1; 305 306 error = i8042_wait_write(); 307 if (error) 308 return error; 309 310 dbg("%02x -> i8042 (command)\n", command & 0xff); 311 i8042_write_command(command & 0xff); 312 313 for (i = 0; i < ((command >> 12) & 0xf); i++) { 314 error = i8042_wait_write(); 315 if (error) { 316 dbg(" -- i8042 (wait write timeout)\n"); 317 return error; 318 } 319 dbg("%02x -> i8042 (parameter)\n", param[i]); 320 i8042_write_data(param[i]); 321 } 322 323 for (i = 0; i < ((command >> 8) & 0xf); i++) { 324 error = i8042_wait_read(); 325 if (error) { 326 dbg(" -- i8042 (wait read timeout)\n"); 327 return error; 328 } 329 330 if (command == I8042_CMD_AUX_LOOP && 331 !(i8042_read_status() & I8042_STR_AUXDATA)) { 332 dbg(" -- i8042 (auxerr)\n"); 333 return -1; 334 } 335 336 param[i] = i8042_read_data(); 337 dbg("%02x <- i8042 (return)\n", param[i]); 338 } 339 340 return 0; 341 } 342 343 int i8042_command(unsigned char *param, int command) 344 { 345 unsigned long flags; 346 int retval; 347 348 spin_lock_irqsave(&i8042_lock, flags); 349 retval = __i8042_command(param, command); 350 spin_unlock_irqrestore(&i8042_lock, flags); 351 352 return retval; 353 } 354 EXPORT_SYMBOL(i8042_command); 355 356 /* 357 * i8042_kbd_write() sends a byte out through the keyboard interface. 358 */ 359 360 static int i8042_kbd_write(struct serio *port, unsigned char c) 361 { 362 unsigned long flags; 363 int retval = 0; 364 365 spin_lock_irqsave(&i8042_lock, flags); 366 367 if (!(retval = i8042_wait_write())) { 368 dbg("%02x -> i8042 (kbd-data)\n", c); 369 i8042_write_data(c); 370 } 371 372 spin_unlock_irqrestore(&i8042_lock, flags); 373 374 return retval; 375 } 376 377 /* 378 * i8042_aux_write() sends a byte out through the aux interface. 379 */ 380 381 static int i8042_aux_write(struct serio *serio, unsigned char c) 382 { 383 struct i8042_port *port = serio->port_data; 384 385 return i8042_command(&c, port->mux == -1 ? 386 I8042_CMD_AUX_SEND : 387 I8042_CMD_MUX_SEND + port->mux); 388 } 389 390 391 /* 392 * i8042_port_close attempts to clear AUX or KBD port state by disabling 393 * and then re-enabling it. 394 */ 395 396 static void i8042_port_close(struct serio *serio) 397 { 398 int irq_bit; 399 int disable_bit; 400 const char *port_name; 401 402 if (serio == i8042_ports[I8042_AUX_PORT_NO].serio) { 403 irq_bit = I8042_CTR_AUXINT; 404 disable_bit = I8042_CTR_AUXDIS; 405 port_name = "AUX"; 406 } else { 407 irq_bit = I8042_CTR_KBDINT; 408 disable_bit = I8042_CTR_KBDDIS; 409 port_name = "KBD"; 410 } 411 412 i8042_ctr &= ~irq_bit; 413 if (i8042_command(&i8042_ctr, I8042_CMD_CTL_WCTR)) 414 pr_warn("Can't write CTR while closing %s port\n", port_name); 415 416 udelay(50); 417 418 i8042_ctr &= ~disable_bit; 419 i8042_ctr |= irq_bit; 420 if (i8042_command(&i8042_ctr, I8042_CMD_CTL_WCTR)) 421 pr_err("Can't reactivate %s port\n", port_name); 422 423 /* 424 * See if there is any data appeared while we were messing with 425 * port state. 426 */ 427 i8042_interrupt(0, NULL); 428 } 429 430 /* 431 * i8042_start() is called by serio core when port is about to finish 432 * registering. It will mark port as existing so i8042_interrupt can 433 * start sending data through it. 434 */ 435 static int i8042_start(struct serio *serio) 436 { 437 struct i8042_port *port = serio->port_data; 438 439 spin_lock_irq(&i8042_lock); 440 port->exists = true; 441 spin_unlock_irq(&i8042_lock); 442 443 return 0; 444 } 445 446 /* 447 * i8042_stop() marks serio port as non-existing so i8042_interrupt 448 * will not try to send data to the port that is about to go away. 449 * The function is called by serio core as part of unregister procedure. 450 */ 451 static void i8042_stop(struct serio *serio) 452 { 453 struct i8042_port *port = serio->port_data; 454 455 spin_lock_irq(&i8042_lock); 456 port->exists = false; 457 port->serio = NULL; 458 spin_unlock_irq(&i8042_lock); 459 460 /* 461 * We need to make sure that interrupt handler finishes using 462 * our serio port before we return from this function. 463 * We synchronize with both AUX and KBD IRQs because there is 464 * a (very unlikely) chance that AUX IRQ is raised for KBD port 465 * and vice versa. 466 */ 467 synchronize_irq(I8042_AUX_IRQ); 468 synchronize_irq(I8042_KBD_IRQ); 469 } 470 471 /* 472 * i8042_filter() filters out unwanted bytes from the input data stream. 473 * It is called from i8042_interrupt and thus is running with interrupts 474 * off and i8042_lock held. 475 */ 476 static bool i8042_filter(unsigned char data, unsigned char str, 477 struct serio *serio) 478 { 479 if (unlikely(i8042_suppress_kbd_ack)) { 480 if ((~str & I8042_STR_AUXDATA) && 481 (data == 0xfa || data == 0xfe)) { 482 i8042_suppress_kbd_ack--; 483 dbg("Extra keyboard ACK - filtered out\n"); 484 return true; 485 } 486 } 487 488 if (i8042_platform_filter && i8042_platform_filter(data, str, serio)) { 489 dbg("Filtered out by platform filter\n"); 490 return true; 491 } 492 493 return false; 494 } 495 496 /* 497 * i8042_interrupt() is the most important function in this driver - 498 * it handles the interrupts from the i8042, and sends incoming bytes 499 * to the upper layers. 500 */ 501 502 static irqreturn_t i8042_interrupt(int irq, void *dev_id) 503 { 504 struct i8042_port *port; 505 struct serio *serio; 506 unsigned long flags; 507 unsigned char str, data; 508 unsigned int dfl; 509 unsigned int port_no; 510 bool filtered; 511 int ret = 1; 512 513 spin_lock_irqsave(&i8042_lock, flags); 514 515 str = i8042_read_status(); 516 if (unlikely(~str & I8042_STR_OBF)) { 517 spin_unlock_irqrestore(&i8042_lock, flags); 518 if (irq) 519 dbg("Interrupt %d, without any data\n", irq); 520 ret = 0; 521 goto out; 522 } 523 524 data = i8042_read_data(); 525 526 if (i8042_mux_present && (str & I8042_STR_AUXDATA)) { 527 static unsigned long last_transmit; 528 static unsigned char last_str; 529 530 dfl = 0; 531 if (str & I8042_STR_MUXERR) { 532 dbg("MUX error, status is %02x, data is %02x\n", 533 str, data); 534 /* 535 * When MUXERR condition is signalled the data register can only contain 536 * 0xfd, 0xfe or 0xff if implementation follows the spec. Unfortunately 537 * it is not always the case. Some KBCs also report 0xfc when there is 538 * nothing connected to the port while others sometimes get confused which 539 * port the data came from and signal error leaving the data intact. They 540 * _do not_ revert to legacy mode (actually I've never seen KBC reverting 541 * to legacy mode yet, when we see one we'll add proper handling). 542 * Anyway, we process 0xfc, 0xfd, 0xfe and 0xff as timeouts, and for the 543 * rest assume that the data came from the same serio last byte 544 * was transmitted (if transmission happened not too long ago). 545 */ 546 547 switch (data) { 548 default: 549 if (time_before(jiffies, last_transmit + HZ/10)) { 550 str = last_str; 551 break; 552 } 553 /* fall through - report timeout */ 554 case 0xfc: 555 case 0xfd: 556 case 0xfe: dfl = SERIO_TIMEOUT; data = 0xfe; break; 557 case 0xff: dfl = SERIO_PARITY; data = 0xfe; break; 558 } 559 } 560 561 port_no = I8042_MUX_PORT_NO + ((str >> 6) & 3); 562 last_str = str; 563 last_transmit = jiffies; 564 } else { 565 566 dfl = ((str & I8042_STR_PARITY) ? SERIO_PARITY : 0) | 567 ((str & I8042_STR_TIMEOUT && !i8042_notimeout) ? SERIO_TIMEOUT : 0); 568 569 port_no = (str & I8042_STR_AUXDATA) ? 570 I8042_AUX_PORT_NO : I8042_KBD_PORT_NO; 571 } 572 573 port = &i8042_ports[port_no]; 574 serio = port->exists ? port->serio : NULL; 575 576 filter_dbg(port->driver_bound, data, "<- i8042 (interrupt, %d, %d%s%s)\n", 577 port_no, irq, 578 dfl & SERIO_PARITY ? ", bad parity" : "", 579 dfl & SERIO_TIMEOUT ? ", timeout" : ""); 580 581 filtered = i8042_filter(data, str, serio); 582 583 spin_unlock_irqrestore(&i8042_lock, flags); 584 585 if (likely(serio && !filtered)) 586 serio_interrupt(serio, data, dfl); 587 588 out: 589 return IRQ_RETVAL(ret); 590 } 591 592 /* 593 * i8042_enable_kbd_port enables keyboard port on chip 594 */ 595 596 static int i8042_enable_kbd_port(void) 597 { 598 i8042_ctr &= ~I8042_CTR_KBDDIS; 599 i8042_ctr |= I8042_CTR_KBDINT; 600 601 if (i8042_command(&i8042_ctr, I8042_CMD_CTL_WCTR)) { 602 i8042_ctr &= ~I8042_CTR_KBDINT; 603 i8042_ctr |= I8042_CTR_KBDDIS; 604 pr_err("Failed to enable KBD port\n"); 605 return -EIO; 606 } 607 608 return 0; 609 } 610 611 /* 612 * i8042_enable_aux_port enables AUX (mouse) port on chip 613 */ 614 615 static int i8042_enable_aux_port(void) 616 { 617 i8042_ctr &= ~I8042_CTR_AUXDIS; 618 i8042_ctr |= I8042_CTR_AUXINT; 619 620 if (i8042_command(&i8042_ctr, I8042_CMD_CTL_WCTR)) { 621 i8042_ctr &= ~I8042_CTR_AUXINT; 622 i8042_ctr |= I8042_CTR_AUXDIS; 623 pr_err("Failed to enable AUX port\n"); 624 return -EIO; 625 } 626 627 return 0; 628 } 629 630 /* 631 * i8042_enable_mux_ports enables 4 individual AUX ports after 632 * the controller has been switched into Multiplexed mode 633 */ 634 635 static int i8042_enable_mux_ports(void) 636 { 637 unsigned char param; 638 int i; 639 640 for (i = 0; i < I8042_NUM_MUX_PORTS; i++) { 641 i8042_command(¶m, I8042_CMD_MUX_PFX + i); 642 i8042_command(¶m, I8042_CMD_AUX_ENABLE); 643 } 644 645 return i8042_enable_aux_port(); 646 } 647 648 /* 649 * i8042_set_mux_mode checks whether the controller has an 650 * active multiplexor and puts the chip into Multiplexed (true) 651 * or Legacy (false) mode. 652 */ 653 654 static int i8042_set_mux_mode(bool multiplex, unsigned char *mux_version) 655 { 656 657 unsigned char param, val; 658 /* 659 * Get rid of bytes in the queue. 660 */ 661 662 i8042_flush(); 663 664 /* 665 * Internal loopback test - send three bytes, they should come back from the 666 * mouse interface, the last should be version. 667 */ 668 669 param = val = 0xf0; 670 if (i8042_command(¶m, I8042_CMD_AUX_LOOP) || param != val) 671 return -1; 672 param = val = multiplex ? 0x56 : 0xf6; 673 if (i8042_command(¶m, I8042_CMD_AUX_LOOP) || param != val) 674 return -1; 675 param = val = multiplex ? 0xa4 : 0xa5; 676 if (i8042_command(¶m, I8042_CMD_AUX_LOOP) || param == val) 677 return -1; 678 679 /* 680 * Workaround for interference with USB Legacy emulation 681 * that causes a v10.12 MUX to be found. 682 */ 683 if (param == 0xac) 684 return -1; 685 686 if (mux_version) 687 *mux_version = param; 688 689 return 0; 690 } 691 692 /* 693 * i8042_check_mux() checks whether the controller supports the PS/2 Active 694 * Multiplexing specification by Synaptics, Phoenix, Insyde and 695 * LCS/Telegraphics. 696 */ 697 698 static int __init i8042_check_mux(void) 699 { 700 unsigned char mux_version; 701 702 if (i8042_set_mux_mode(true, &mux_version)) 703 return -1; 704 705 pr_info("Detected active multiplexing controller, rev %d.%d\n", 706 (mux_version >> 4) & 0xf, mux_version & 0xf); 707 708 /* 709 * Disable all muxed ports by disabling AUX. 710 */ 711 i8042_ctr |= I8042_CTR_AUXDIS; 712 i8042_ctr &= ~I8042_CTR_AUXINT; 713 714 if (i8042_command(&i8042_ctr, I8042_CMD_CTL_WCTR)) { 715 pr_err("Failed to disable AUX port, can't use MUX\n"); 716 return -EIO; 717 } 718 719 i8042_mux_present = true; 720 721 return 0; 722 } 723 724 /* 725 * The following is used to test AUX IRQ delivery. 726 */ 727 static struct completion i8042_aux_irq_delivered __initdata; 728 static bool i8042_irq_being_tested __initdata; 729 730 static irqreturn_t __init i8042_aux_test_irq(int irq, void *dev_id) 731 { 732 unsigned long flags; 733 unsigned char str, data; 734 int ret = 0; 735 736 spin_lock_irqsave(&i8042_lock, flags); 737 str = i8042_read_status(); 738 if (str & I8042_STR_OBF) { 739 data = i8042_read_data(); 740 dbg("%02x <- i8042 (aux_test_irq, %s)\n", 741 data, str & I8042_STR_AUXDATA ? "aux" : "kbd"); 742 if (i8042_irq_being_tested && 743 data == 0xa5 && (str & I8042_STR_AUXDATA)) 744 complete(&i8042_aux_irq_delivered); 745 ret = 1; 746 } 747 spin_unlock_irqrestore(&i8042_lock, flags); 748 749 return IRQ_RETVAL(ret); 750 } 751 752 /* 753 * i8042_toggle_aux - enables or disables AUX port on i8042 via command and 754 * verifies success by readinng CTR. Used when testing for presence of AUX 755 * port. 756 */ 757 static int __init i8042_toggle_aux(bool on) 758 { 759 unsigned char param; 760 int i; 761 762 if (i8042_command(¶m, 763 on ? I8042_CMD_AUX_ENABLE : I8042_CMD_AUX_DISABLE)) 764 return -1; 765 766 /* some chips need some time to set the I8042_CTR_AUXDIS bit */ 767 for (i = 0; i < 100; i++) { 768 udelay(50); 769 770 if (i8042_command(¶m, I8042_CMD_CTL_RCTR)) 771 return -1; 772 773 if (!(param & I8042_CTR_AUXDIS) == on) 774 return 0; 775 } 776 777 return -1; 778 } 779 780 /* 781 * i8042_check_aux() applies as much paranoia as it can at detecting 782 * the presence of an AUX interface. 783 */ 784 785 static int __init i8042_check_aux(void) 786 { 787 int retval = -1; 788 bool irq_registered = false; 789 bool aux_loop_broken = false; 790 unsigned long flags; 791 unsigned char param; 792 793 /* 794 * Get rid of bytes in the queue. 795 */ 796 797 i8042_flush(); 798 799 /* 800 * Internal loopback test - filters out AT-type i8042's. Unfortunately 801 * SiS screwed up and their 5597 doesn't support the LOOP command even 802 * though it has an AUX port. 803 */ 804 805 param = 0x5a; 806 retval = i8042_command(¶m, I8042_CMD_AUX_LOOP); 807 if (retval || param != 0x5a) { 808 809 /* 810 * External connection test - filters out AT-soldered PS/2 i8042's 811 * 0x00 - no error, 0x01-0x03 - clock/data stuck, 0xff - general error 812 * 0xfa - no error on some notebooks which ignore the spec 813 * Because it's common for chipsets to return error on perfectly functioning 814 * AUX ports, we test for this only when the LOOP command failed. 815 */ 816 817 if (i8042_command(¶m, I8042_CMD_AUX_TEST) || 818 (param && param != 0xfa && param != 0xff)) 819 return -1; 820 821 /* 822 * If AUX_LOOP completed without error but returned unexpected data 823 * mark it as broken 824 */ 825 if (!retval) 826 aux_loop_broken = true; 827 } 828 829 /* 830 * Bit assignment test - filters out PS/2 i8042's in AT mode 831 */ 832 833 if (i8042_toggle_aux(false)) { 834 pr_warn("Failed to disable AUX port, but continuing anyway... Is this a SiS?\n"); 835 pr_warn("If AUX port is really absent please use the 'i8042.noaux' option\n"); 836 } 837 838 if (i8042_toggle_aux(true)) 839 return -1; 840 841 /* 842 * Reset keyboard (needed on some laptops to successfully detect 843 * touchpad, e.g., some Gigabyte laptop models with Elantech 844 * touchpads). 845 */ 846 if (i8042_kbdreset) { 847 pr_warn("Attempting to reset device connected to KBD port\n"); 848 i8042_kbd_write(NULL, (unsigned char) 0xff); 849 } 850 851 /* 852 * Test AUX IRQ delivery to make sure BIOS did not grab the IRQ and 853 * used it for a PCI card or somethig else. 854 */ 855 856 if (i8042_noloop || i8042_bypass_aux_irq_test || aux_loop_broken) { 857 /* 858 * Without LOOP command we can't test AUX IRQ delivery. Assume the port 859 * is working and hope we are right. 860 */ 861 retval = 0; 862 goto out; 863 } 864 865 if (request_irq(I8042_AUX_IRQ, i8042_aux_test_irq, IRQF_SHARED, 866 "i8042", i8042_platform_device)) 867 goto out; 868 869 irq_registered = true; 870 871 if (i8042_enable_aux_port()) 872 goto out; 873 874 spin_lock_irqsave(&i8042_lock, flags); 875 876 init_completion(&i8042_aux_irq_delivered); 877 i8042_irq_being_tested = true; 878 879 param = 0xa5; 880 retval = __i8042_command(¶m, I8042_CMD_AUX_LOOP & 0xf0ff); 881 882 spin_unlock_irqrestore(&i8042_lock, flags); 883 884 if (retval) 885 goto out; 886 887 if (wait_for_completion_timeout(&i8042_aux_irq_delivered, 888 msecs_to_jiffies(250)) == 0) { 889 /* 890 * AUX IRQ was never delivered so we need to flush the controller to 891 * get rid of the byte we put there; otherwise keyboard may not work. 892 */ 893 dbg(" -- i8042 (aux irq test timeout)\n"); 894 i8042_flush(); 895 retval = -1; 896 } 897 898 out: 899 900 /* 901 * Disable the interface. 902 */ 903 904 i8042_ctr |= I8042_CTR_AUXDIS; 905 i8042_ctr &= ~I8042_CTR_AUXINT; 906 907 if (i8042_command(&i8042_ctr, I8042_CMD_CTL_WCTR)) 908 retval = -1; 909 910 if (irq_registered) 911 free_irq(I8042_AUX_IRQ, i8042_platform_device); 912 913 return retval; 914 } 915 916 static int i8042_controller_check(void) 917 { 918 if (i8042_flush()) { 919 pr_info("No controller found\n"); 920 return -ENODEV; 921 } 922 923 return 0; 924 } 925 926 static int i8042_controller_selftest(void) 927 { 928 unsigned char param; 929 int i = 0; 930 931 /* 932 * We try this 5 times; on some really fragile systems this does not 933 * take the first time... 934 */ 935 do { 936 937 if (i8042_command(¶m, I8042_CMD_CTL_TEST)) { 938 pr_err("i8042 controller selftest timeout\n"); 939 return -ENODEV; 940 } 941 942 if (param == I8042_RET_CTL_TEST) 943 return 0; 944 945 dbg("i8042 controller selftest: %#x != %#x\n", 946 param, I8042_RET_CTL_TEST); 947 msleep(50); 948 } while (i++ < 5); 949 950 #ifdef CONFIG_X86 951 /* 952 * On x86, we don't fail entire i8042 initialization if controller 953 * reset fails in hopes that keyboard port will still be functional 954 * and user will still get a working keyboard. This is especially 955 * important on netbooks. On other arches we trust hardware more. 956 */ 957 pr_info("giving up on controller selftest, continuing anyway...\n"); 958 return 0; 959 #else 960 pr_err("i8042 controller selftest failed\n"); 961 return -EIO; 962 #endif 963 } 964 965 /* 966 * i8042_controller init initializes the i8042 controller, and, 967 * most importantly, sets it into non-xlated mode if that's 968 * desired. 969 */ 970 971 static int i8042_controller_init(void) 972 { 973 unsigned long flags; 974 int n = 0; 975 unsigned char ctr[2]; 976 977 /* 978 * Save the CTR for restore on unload / reboot. 979 */ 980 981 do { 982 if (n >= 10) { 983 pr_err("Unable to get stable CTR read\n"); 984 return -EIO; 985 } 986 987 if (n != 0) 988 udelay(50); 989 990 if (i8042_command(&ctr[n++ % 2], I8042_CMD_CTL_RCTR)) { 991 pr_err("Can't read CTR while initializing i8042\n"); 992 return -EIO; 993 } 994 995 } while (n < 2 || ctr[0] != ctr[1]); 996 997 i8042_initial_ctr = i8042_ctr = ctr[0]; 998 999 /* 1000 * Disable the keyboard interface and interrupt. 1001 */ 1002 1003 i8042_ctr |= I8042_CTR_KBDDIS; 1004 i8042_ctr &= ~I8042_CTR_KBDINT; 1005 1006 /* 1007 * Handle keylock. 1008 */ 1009 1010 spin_lock_irqsave(&i8042_lock, flags); 1011 if (~i8042_read_status() & I8042_STR_KEYLOCK) { 1012 if (i8042_unlock) 1013 i8042_ctr |= I8042_CTR_IGNKEYLOCK; 1014 else 1015 pr_warn("Warning: Keylock active\n"); 1016 } 1017 spin_unlock_irqrestore(&i8042_lock, flags); 1018 1019 /* 1020 * If the chip is configured into nontranslated mode by the BIOS, don't 1021 * bother enabling translating and be happy. 1022 */ 1023 1024 if (~i8042_ctr & I8042_CTR_XLATE) 1025 i8042_direct = true; 1026 1027 /* 1028 * Set nontranslated mode for the kbd interface if requested by an option. 1029 * After this the kbd interface becomes a simple serial in/out, like the aux 1030 * interface is. We don't do this by default, since it can confuse notebook 1031 * BIOSes. 1032 */ 1033 1034 if (i8042_direct) 1035 i8042_ctr &= ~I8042_CTR_XLATE; 1036 1037 /* 1038 * Write CTR back. 1039 */ 1040 1041 if (i8042_command(&i8042_ctr, I8042_CMD_CTL_WCTR)) { 1042 pr_err("Can't write CTR while initializing i8042\n"); 1043 return -EIO; 1044 } 1045 1046 /* 1047 * Flush whatever accumulated while we were disabling keyboard port. 1048 */ 1049 1050 i8042_flush(); 1051 1052 return 0; 1053 } 1054 1055 1056 /* 1057 * Reset the controller and reset CRT to the original value set by BIOS. 1058 */ 1059 1060 static void i8042_controller_reset(bool s2r_wants_reset) 1061 { 1062 i8042_flush(); 1063 1064 /* 1065 * Disable both KBD and AUX interfaces so they don't get in the way 1066 */ 1067 1068 i8042_ctr |= I8042_CTR_KBDDIS | I8042_CTR_AUXDIS; 1069 i8042_ctr &= ~(I8042_CTR_KBDINT | I8042_CTR_AUXINT); 1070 1071 if (i8042_command(&i8042_ctr, I8042_CMD_CTL_WCTR)) 1072 pr_warn("Can't write CTR while resetting\n"); 1073 1074 /* 1075 * Disable MUX mode if present. 1076 */ 1077 1078 if (i8042_mux_present) 1079 i8042_set_mux_mode(false, NULL); 1080 1081 /* 1082 * Reset the controller if requested. 1083 */ 1084 1085 if (i8042_reset == I8042_RESET_ALWAYS || 1086 (i8042_reset == I8042_RESET_ON_S2RAM && s2r_wants_reset)) { 1087 i8042_controller_selftest(); 1088 } 1089 1090 /* 1091 * Restore the original control register setting. 1092 */ 1093 1094 if (i8042_command(&i8042_initial_ctr, I8042_CMD_CTL_WCTR)) 1095 pr_warn("Can't restore CTR\n"); 1096 } 1097 1098 1099 /* 1100 * i8042_panic_blink() will turn the keyboard LEDs on or off and is called 1101 * when kernel panics. Flashing LEDs is useful for users running X who may 1102 * not see the console and will help distinguishing panics from "real" 1103 * lockups. 1104 * 1105 * Note that DELAY has a limit of 10ms so we will not get stuck here 1106 * waiting for KBC to free up even if KBD interrupt is off 1107 */ 1108 1109 #define DELAY do { mdelay(1); if (++delay > 10) return delay; } while(0) 1110 1111 static long i8042_panic_blink(int state) 1112 { 1113 long delay = 0; 1114 char led; 1115 1116 led = (state) ? 0x01 | 0x04 : 0; 1117 while (i8042_read_status() & I8042_STR_IBF) 1118 DELAY; 1119 dbg("%02x -> i8042 (panic blink)\n", 0xed); 1120 i8042_suppress_kbd_ack = 2; 1121 i8042_write_data(0xed); /* set leds */ 1122 DELAY; 1123 while (i8042_read_status() & I8042_STR_IBF) 1124 DELAY; 1125 DELAY; 1126 dbg("%02x -> i8042 (panic blink)\n", led); 1127 i8042_write_data(led); 1128 DELAY; 1129 return delay; 1130 } 1131 1132 #undef DELAY 1133 1134 #ifdef CONFIG_X86 1135 static void i8042_dritek_enable(void) 1136 { 1137 unsigned char param = 0x90; 1138 int error; 1139 1140 error = i8042_command(¶m, 0x1059); 1141 if (error) 1142 pr_warn("Failed to enable DRITEK extension: %d\n", error); 1143 } 1144 #endif 1145 1146 #ifdef CONFIG_PM 1147 1148 /* 1149 * Here we try to reset everything back to a state we had 1150 * before suspending. 1151 */ 1152 1153 static int i8042_controller_resume(bool s2r_wants_reset) 1154 { 1155 int error; 1156 1157 error = i8042_controller_check(); 1158 if (error) 1159 return error; 1160 1161 if (i8042_reset == I8042_RESET_ALWAYS || 1162 (i8042_reset == I8042_RESET_ON_S2RAM && s2r_wants_reset)) { 1163 error = i8042_controller_selftest(); 1164 if (error) 1165 return error; 1166 } 1167 1168 /* 1169 * Restore original CTR value and disable all ports 1170 */ 1171 1172 i8042_ctr = i8042_initial_ctr; 1173 if (i8042_direct) 1174 i8042_ctr &= ~I8042_CTR_XLATE; 1175 i8042_ctr |= I8042_CTR_AUXDIS | I8042_CTR_KBDDIS; 1176 i8042_ctr &= ~(I8042_CTR_AUXINT | I8042_CTR_KBDINT); 1177 if (i8042_command(&i8042_ctr, I8042_CMD_CTL_WCTR)) { 1178 pr_warn("Can't write CTR to resume, retrying...\n"); 1179 msleep(50); 1180 if (i8042_command(&i8042_ctr, I8042_CMD_CTL_WCTR)) { 1181 pr_err("CTR write retry failed\n"); 1182 return -EIO; 1183 } 1184 } 1185 1186 1187 #ifdef CONFIG_X86 1188 if (i8042_dritek) 1189 i8042_dritek_enable(); 1190 #endif 1191 1192 if (i8042_mux_present) { 1193 if (i8042_set_mux_mode(true, NULL) || i8042_enable_mux_ports()) 1194 pr_warn("failed to resume active multiplexor, mouse won't work\n"); 1195 } else if (i8042_ports[I8042_AUX_PORT_NO].serio) 1196 i8042_enable_aux_port(); 1197 1198 if (i8042_ports[I8042_KBD_PORT_NO].serio) 1199 i8042_enable_kbd_port(); 1200 1201 i8042_interrupt(0, NULL); 1202 1203 return 0; 1204 } 1205 1206 /* 1207 * Here we try to restore the original BIOS settings to avoid 1208 * upsetting it. 1209 */ 1210 1211 static int i8042_pm_suspend(struct device *dev) 1212 { 1213 int i; 1214 1215 if (pm_suspend_via_firmware()) 1216 i8042_controller_reset(true); 1217 1218 /* Set up serio interrupts for system wakeup. */ 1219 for (i = 0; i < I8042_NUM_PORTS; i++) { 1220 struct serio *serio = i8042_ports[i].serio; 1221 1222 if (serio && device_may_wakeup(&serio->dev)) 1223 enable_irq_wake(i8042_ports[i].irq); 1224 } 1225 1226 return 0; 1227 } 1228 1229 static int i8042_pm_resume_noirq(struct device *dev) 1230 { 1231 if (!pm_resume_via_firmware()) 1232 i8042_interrupt(0, NULL); 1233 1234 return 0; 1235 } 1236 1237 static int i8042_pm_resume(struct device *dev) 1238 { 1239 bool want_reset; 1240 int i; 1241 1242 for (i = 0; i < I8042_NUM_PORTS; i++) { 1243 struct serio *serio = i8042_ports[i].serio; 1244 1245 if (serio && device_may_wakeup(&serio->dev)) 1246 disable_irq_wake(i8042_ports[i].irq); 1247 } 1248 1249 /* 1250 * If platform firmware was not going to be involved in suspend, we did 1251 * not restore the controller state to whatever it had been at boot 1252 * time, so we do not need to do anything. 1253 */ 1254 if (!pm_suspend_via_firmware()) 1255 return 0; 1256 1257 /* 1258 * We only need to reset the controller if we are resuming after handing 1259 * off control to the platform firmware, otherwise we can simply restore 1260 * the mode. 1261 */ 1262 want_reset = pm_resume_via_firmware(); 1263 1264 return i8042_controller_resume(want_reset); 1265 } 1266 1267 static int i8042_pm_thaw(struct device *dev) 1268 { 1269 i8042_interrupt(0, NULL); 1270 1271 return 0; 1272 } 1273 1274 static int i8042_pm_reset(struct device *dev) 1275 { 1276 i8042_controller_reset(false); 1277 1278 return 0; 1279 } 1280 1281 static int i8042_pm_restore(struct device *dev) 1282 { 1283 return i8042_controller_resume(false); 1284 } 1285 1286 static const struct dev_pm_ops i8042_pm_ops = { 1287 .suspend = i8042_pm_suspend, 1288 .resume_noirq = i8042_pm_resume_noirq, 1289 .resume = i8042_pm_resume, 1290 .thaw = i8042_pm_thaw, 1291 .poweroff = i8042_pm_reset, 1292 .restore = i8042_pm_restore, 1293 }; 1294 1295 #endif /* CONFIG_PM */ 1296 1297 /* 1298 * We need to reset the 8042 back to original mode on system shutdown, 1299 * because otherwise BIOSes will be confused. 1300 */ 1301 1302 static void i8042_shutdown(struct platform_device *dev) 1303 { 1304 i8042_controller_reset(false); 1305 } 1306 1307 static int __init i8042_create_kbd_port(void) 1308 { 1309 struct serio *serio; 1310 struct i8042_port *port = &i8042_ports[I8042_KBD_PORT_NO]; 1311 1312 serio = kzalloc(sizeof(struct serio), GFP_KERNEL); 1313 if (!serio) 1314 return -ENOMEM; 1315 1316 serio->id.type = i8042_direct ? SERIO_8042 : SERIO_8042_XL; 1317 serio->write = i8042_dumbkbd ? NULL : i8042_kbd_write; 1318 serio->start = i8042_start; 1319 serio->stop = i8042_stop; 1320 serio->close = i8042_port_close; 1321 serio->ps2_cmd_mutex = &i8042_mutex; 1322 serio->port_data = port; 1323 serio->dev.parent = &i8042_platform_device->dev; 1324 strlcpy(serio->name, "i8042 KBD port", sizeof(serio->name)); 1325 strlcpy(serio->phys, I8042_KBD_PHYS_DESC, sizeof(serio->phys)); 1326 strlcpy(serio->firmware_id, i8042_kbd_firmware_id, 1327 sizeof(serio->firmware_id)); 1328 1329 port->serio = serio; 1330 port->irq = I8042_KBD_IRQ; 1331 1332 return 0; 1333 } 1334 1335 static int __init i8042_create_aux_port(int idx) 1336 { 1337 struct serio *serio; 1338 int port_no = idx < 0 ? I8042_AUX_PORT_NO : I8042_MUX_PORT_NO + idx; 1339 struct i8042_port *port = &i8042_ports[port_no]; 1340 1341 serio = kzalloc(sizeof(struct serio), GFP_KERNEL); 1342 if (!serio) 1343 return -ENOMEM; 1344 1345 serio->id.type = SERIO_8042; 1346 serio->write = i8042_aux_write; 1347 serio->start = i8042_start; 1348 serio->stop = i8042_stop; 1349 serio->ps2_cmd_mutex = &i8042_mutex; 1350 serio->port_data = port; 1351 serio->dev.parent = &i8042_platform_device->dev; 1352 if (idx < 0) { 1353 strlcpy(serio->name, "i8042 AUX port", sizeof(serio->name)); 1354 strlcpy(serio->phys, I8042_AUX_PHYS_DESC, sizeof(serio->phys)); 1355 strlcpy(serio->firmware_id, i8042_aux_firmware_id, 1356 sizeof(serio->firmware_id)); 1357 serio->close = i8042_port_close; 1358 } else { 1359 snprintf(serio->name, sizeof(serio->name), "i8042 AUX%d port", idx); 1360 snprintf(serio->phys, sizeof(serio->phys), I8042_MUX_PHYS_DESC, idx + 1); 1361 strlcpy(serio->firmware_id, i8042_aux_firmware_id, 1362 sizeof(serio->firmware_id)); 1363 } 1364 1365 port->serio = serio; 1366 port->mux = idx; 1367 port->irq = I8042_AUX_IRQ; 1368 1369 return 0; 1370 } 1371 1372 static void __init i8042_free_kbd_port(void) 1373 { 1374 kfree(i8042_ports[I8042_KBD_PORT_NO].serio); 1375 i8042_ports[I8042_KBD_PORT_NO].serio = NULL; 1376 } 1377 1378 static void __init i8042_free_aux_ports(void) 1379 { 1380 int i; 1381 1382 for (i = I8042_AUX_PORT_NO; i < I8042_NUM_PORTS; i++) { 1383 kfree(i8042_ports[i].serio); 1384 i8042_ports[i].serio = NULL; 1385 } 1386 } 1387 1388 static void __init i8042_register_ports(void) 1389 { 1390 int i; 1391 1392 for (i = 0; i < I8042_NUM_PORTS; i++) { 1393 struct serio *serio = i8042_ports[i].serio; 1394 1395 if (!serio) 1396 continue; 1397 1398 printk(KERN_INFO "serio: %s at %#lx,%#lx irq %d\n", 1399 serio->name, 1400 (unsigned long) I8042_DATA_REG, 1401 (unsigned long) I8042_COMMAND_REG, 1402 i8042_ports[i].irq); 1403 serio_register_port(serio); 1404 device_set_wakeup_capable(&serio->dev, true); 1405 1406 /* 1407 * On platforms using suspend-to-idle, allow the keyboard to 1408 * wake up the system from sleep by enabling keyboard wakeups 1409 * by default. This is consistent with keyboard wakeup 1410 * behavior on many platforms using suspend-to-RAM (ACPI S3) 1411 * by default. 1412 */ 1413 if (pm_suspend_via_s2idle() && i == I8042_KBD_PORT_NO) 1414 device_set_wakeup_enable(&serio->dev, true); 1415 } 1416 } 1417 1418 static void i8042_unregister_ports(void) 1419 { 1420 int i; 1421 1422 for (i = 0; i < I8042_NUM_PORTS; i++) { 1423 if (i8042_ports[i].serio) { 1424 serio_unregister_port(i8042_ports[i].serio); 1425 i8042_ports[i].serio = NULL; 1426 } 1427 } 1428 } 1429 1430 static void i8042_free_irqs(void) 1431 { 1432 if (i8042_aux_irq_registered) 1433 free_irq(I8042_AUX_IRQ, i8042_platform_device); 1434 if (i8042_kbd_irq_registered) 1435 free_irq(I8042_KBD_IRQ, i8042_platform_device); 1436 1437 i8042_aux_irq_registered = i8042_kbd_irq_registered = false; 1438 } 1439 1440 static int __init i8042_setup_aux(void) 1441 { 1442 int (*aux_enable)(void); 1443 int error; 1444 int i; 1445 1446 if (i8042_check_aux()) 1447 return -ENODEV; 1448 1449 if (i8042_nomux || i8042_check_mux()) { 1450 error = i8042_create_aux_port(-1); 1451 if (error) 1452 goto err_free_ports; 1453 aux_enable = i8042_enable_aux_port; 1454 } else { 1455 for (i = 0; i < I8042_NUM_MUX_PORTS; i++) { 1456 error = i8042_create_aux_port(i); 1457 if (error) 1458 goto err_free_ports; 1459 } 1460 aux_enable = i8042_enable_mux_ports; 1461 } 1462 1463 error = request_irq(I8042_AUX_IRQ, i8042_interrupt, IRQF_SHARED, 1464 "i8042", i8042_platform_device); 1465 if (error) 1466 goto err_free_ports; 1467 1468 if (aux_enable()) 1469 goto err_free_irq; 1470 1471 i8042_aux_irq_registered = true; 1472 return 0; 1473 1474 err_free_irq: 1475 free_irq(I8042_AUX_IRQ, i8042_platform_device); 1476 err_free_ports: 1477 i8042_free_aux_ports(); 1478 return error; 1479 } 1480 1481 static int __init i8042_setup_kbd(void) 1482 { 1483 int error; 1484 1485 error = i8042_create_kbd_port(); 1486 if (error) 1487 return error; 1488 1489 error = request_irq(I8042_KBD_IRQ, i8042_interrupt, IRQF_SHARED, 1490 "i8042", i8042_platform_device); 1491 if (error) 1492 goto err_free_port; 1493 1494 error = i8042_enable_kbd_port(); 1495 if (error) 1496 goto err_free_irq; 1497 1498 i8042_kbd_irq_registered = true; 1499 return 0; 1500 1501 err_free_irq: 1502 free_irq(I8042_KBD_IRQ, i8042_platform_device); 1503 err_free_port: 1504 i8042_free_kbd_port(); 1505 return error; 1506 } 1507 1508 static int i8042_kbd_bind_notifier(struct notifier_block *nb, 1509 unsigned long action, void *data) 1510 { 1511 struct device *dev = data; 1512 struct serio *serio = to_serio_port(dev); 1513 struct i8042_port *port = serio->port_data; 1514 1515 if (serio != i8042_ports[I8042_KBD_PORT_NO].serio) 1516 return 0; 1517 1518 switch (action) { 1519 case BUS_NOTIFY_BOUND_DRIVER: 1520 port->driver_bound = true; 1521 break; 1522 1523 case BUS_NOTIFY_UNBIND_DRIVER: 1524 port->driver_bound = false; 1525 break; 1526 } 1527 1528 return 0; 1529 } 1530 1531 static int __init i8042_probe(struct platform_device *dev) 1532 { 1533 int error; 1534 1535 i8042_platform_device = dev; 1536 1537 if (i8042_reset == I8042_RESET_ALWAYS) { 1538 error = i8042_controller_selftest(); 1539 if (error) 1540 return error; 1541 } 1542 1543 error = i8042_controller_init(); 1544 if (error) 1545 return error; 1546 1547 #ifdef CONFIG_X86 1548 if (i8042_dritek) 1549 i8042_dritek_enable(); 1550 #endif 1551 1552 if (!i8042_noaux) { 1553 error = i8042_setup_aux(); 1554 if (error && error != -ENODEV && error != -EBUSY) 1555 goto out_fail; 1556 } 1557 1558 if (!i8042_nokbd) { 1559 error = i8042_setup_kbd(); 1560 if (error) 1561 goto out_fail; 1562 } 1563 /* 1564 * Ok, everything is ready, let's register all serio ports 1565 */ 1566 i8042_register_ports(); 1567 1568 return 0; 1569 1570 out_fail: 1571 i8042_free_aux_ports(); /* in case KBD failed but AUX not */ 1572 i8042_free_irqs(); 1573 i8042_controller_reset(false); 1574 i8042_platform_device = NULL; 1575 1576 return error; 1577 } 1578 1579 static int i8042_remove(struct platform_device *dev) 1580 { 1581 i8042_unregister_ports(); 1582 i8042_free_irqs(); 1583 i8042_controller_reset(false); 1584 i8042_platform_device = NULL; 1585 1586 return 0; 1587 } 1588 1589 static struct platform_driver i8042_driver = { 1590 .driver = { 1591 .name = "i8042", 1592 #ifdef CONFIG_PM 1593 .pm = &i8042_pm_ops, 1594 #endif 1595 }, 1596 .remove = i8042_remove, 1597 .shutdown = i8042_shutdown, 1598 }; 1599 1600 static struct notifier_block i8042_kbd_bind_notifier_block = { 1601 .notifier_call = i8042_kbd_bind_notifier, 1602 }; 1603 1604 static int __init i8042_init(void) 1605 { 1606 struct platform_device *pdev; 1607 int err; 1608 1609 dbg_init(); 1610 1611 err = i8042_platform_init(); 1612 if (err) 1613 return err; 1614 1615 err = i8042_controller_check(); 1616 if (err) 1617 goto err_platform_exit; 1618 1619 pdev = platform_create_bundle(&i8042_driver, i8042_probe, NULL, 0, NULL, 0); 1620 if (IS_ERR(pdev)) { 1621 err = PTR_ERR(pdev); 1622 goto err_platform_exit; 1623 } 1624 1625 bus_register_notifier(&serio_bus, &i8042_kbd_bind_notifier_block); 1626 panic_blink = i8042_panic_blink; 1627 1628 return 0; 1629 1630 err_platform_exit: 1631 i8042_platform_exit(); 1632 return err; 1633 } 1634 1635 static void __exit i8042_exit(void) 1636 { 1637 platform_device_unregister(i8042_platform_device); 1638 platform_driver_unregister(&i8042_driver); 1639 i8042_platform_exit(); 1640 1641 bus_unregister_notifier(&serio_bus, &i8042_kbd_bind_notifier_block); 1642 panic_blink = NULL; 1643 } 1644 1645 module_init(i8042_init); 1646 module_exit(i8042_exit); 1647