1 // SPDX-License-Identifier: GPL-2.0+ 2 /* 3 * Azoteq IQS626A Capacitive Touch Controller 4 * 5 * Copyright (C) 2020 Jeff LaBundy <jeff@labundy.com> 6 * 7 * This driver registers up to 2 input devices: one representing capacitive or 8 * inductive keys as well as Hall-effect switches, and one for a trackpad that 9 * can express various gestures. 10 */ 11 12 #include <linux/bits.h> 13 #include <linux/completion.h> 14 #include <linux/delay.h> 15 #include <linux/device.h> 16 #include <linux/err.h> 17 #include <linux/i2c.h> 18 #include <linux/input.h> 19 #include <linux/input/touchscreen.h> 20 #include <linux/interrupt.h> 21 #include <linux/kernel.h> 22 #include <linux/module.h> 23 #include <linux/property.h> 24 #include <linux/regmap.h> 25 #include <linux/slab.h> 26 27 #define IQS626_VER_INFO 0x00 28 #define IQS626_VER_INFO_PROD_NUM 0x51 29 30 #define IQS626_SYS_FLAGS 0x02 31 #define IQS626_SYS_FLAGS_SHOW_RESET BIT(15) 32 #define IQS626_SYS_FLAGS_IN_ATI BIT(12) 33 #define IQS626_SYS_FLAGS_PWR_MODE_MASK GENMASK(9, 8) 34 #define IQS626_SYS_FLAGS_PWR_MODE_SHIFT 8 35 36 #define IQS626_HALL_OUTPUT 0x23 37 38 #define IQS626_SYS_SETTINGS 0x80 39 #define IQS626_SYS_SETTINGS_CLK_DIV BIT(15) 40 #define IQS626_SYS_SETTINGS_ULP_AUTO BIT(14) 41 #define IQS626_SYS_SETTINGS_DIS_AUTO BIT(13) 42 #define IQS626_SYS_SETTINGS_PWR_MODE_MASK GENMASK(12, 11) 43 #define IQS626_SYS_SETTINGS_PWR_MODE_SHIFT 11 44 #define IQS626_SYS_SETTINGS_PWR_MODE_MAX 3 45 #define IQS626_SYS_SETTINGS_ULP_UPDATE_MASK GENMASK(10, 8) 46 #define IQS626_SYS_SETTINGS_ULP_UPDATE_SHIFT 8 47 #define IQS626_SYS_SETTINGS_ULP_UPDATE_MAX 7 48 #define IQS626_SYS_SETTINGS_EVENT_MODE BIT(5) 49 #define IQS626_SYS_SETTINGS_EVENT_MODE_LP BIT(4) 50 #define IQS626_SYS_SETTINGS_REDO_ATI BIT(2) 51 #define IQS626_SYS_SETTINGS_ACK_RESET BIT(0) 52 53 #define IQS626_MISC_A_ATI_BAND_DISABLE BIT(7) 54 #define IQS626_MISC_A_TPx_LTA_UPDATE_MASK GENMASK(6, 4) 55 #define IQS626_MISC_A_TPx_LTA_UPDATE_SHIFT 4 56 #define IQS626_MISC_A_TPx_LTA_UPDATE_MAX 7 57 #define IQS626_MISC_A_ATI_LP_ONLY BIT(3) 58 #define IQS626_MISC_A_GPIO3_SELECT_MASK GENMASK(2, 0) 59 #define IQS626_MISC_A_GPIO3_SELECT_MAX 7 60 61 #define IQS626_EVENT_MASK_SYS BIT(6) 62 #define IQS626_EVENT_MASK_GESTURE BIT(3) 63 #define IQS626_EVENT_MASK_DEEP BIT(2) 64 #define IQS626_EVENT_MASK_TOUCH BIT(1) 65 #define IQS626_EVENT_MASK_PROX BIT(0) 66 67 #define IQS626_RATE_NP_MS_MAX 255 68 #define IQS626_RATE_LP_MS_MAX 255 69 #define IQS626_RATE_ULP_MS_MAX 4080 70 #define IQS626_TIMEOUT_PWR_MS_MAX 130560 71 #define IQS626_TIMEOUT_LTA_MS_MAX 130560 72 73 #define IQS626_MISC_B_RESEED_UI_SEL_MASK GENMASK(7, 6) 74 #define IQS626_MISC_B_RESEED_UI_SEL_SHIFT 6 75 #define IQS626_MISC_B_RESEED_UI_SEL_MAX 3 76 #define IQS626_MISC_B_THRESH_EXTEND BIT(5) 77 #define IQS626_MISC_B_TRACKING_UI_ENABLE BIT(4) 78 #define IQS626_MISC_B_TPx_SWIPE BIT(3) 79 #define IQS626_MISC_B_RESEED_OFFSET BIT(2) 80 #define IQS626_MISC_B_FILT_STR_TPx GENMASK(1, 0) 81 82 #define IQS626_THRESH_SWIPE_MAX 255 83 #define IQS626_TIMEOUT_TAP_MS_MAX 4080 84 #define IQS626_TIMEOUT_SWIPE_MS_MAX 4080 85 86 #define IQS626_CHx_ENG_0_MEAS_CAP_SIZE BIT(7) 87 #define IQS626_CHx_ENG_0_RX_TERM_VSS BIT(5) 88 #define IQS626_CHx_ENG_0_LINEARIZE BIT(4) 89 #define IQS626_CHx_ENG_0_DUAL_DIR BIT(3) 90 #define IQS626_CHx_ENG_0_FILT_DISABLE BIT(2) 91 #define IQS626_CHx_ENG_0_ATI_MODE_MASK GENMASK(1, 0) 92 #define IQS626_CHx_ENG_0_ATI_MODE_MAX 3 93 94 #define IQS626_CHx_ENG_1_CCT_HIGH_1 BIT(7) 95 #define IQS626_CHx_ENG_1_CCT_HIGH_0 BIT(6) 96 #define IQS626_CHx_ENG_1_PROJ_BIAS_MASK GENMASK(5, 4) 97 #define IQS626_CHx_ENG_1_PROJ_BIAS_SHIFT 4 98 #define IQS626_CHx_ENG_1_PROJ_BIAS_MAX 3 99 #define IQS626_CHx_ENG_1_CCT_ENABLE BIT(3) 100 #define IQS626_CHx_ENG_1_SENSE_FREQ_MASK GENMASK(2, 1) 101 #define IQS626_CHx_ENG_1_SENSE_FREQ_SHIFT 1 102 #define IQS626_CHx_ENG_1_SENSE_FREQ_MAX 3 103 #define IQS626_CHx_ENG_1_ATI_BAND_TIGHTEN BIT(0) 104 105 #define IQS626_CHx_ENG_2_LOCAL_CAP_MASK GENMASK(7, 6) 106 #define IQS626_CHx_ENG_2_LOCAL_CAP_SHIFT 6 107 #define IQS626_CHx_ENG_2_LOCAL_CAP_MAX 3 108 #define IQS626_CHx_ENG_2_LOCAL_CAP_ENABLE BIT(5) 109 #define IQS626_CHx_ENG_2_SENSE_MODE_MASK GENMASK(3, 0) 110 #define IQS626_CHx_ENG_2_SENSE_MODE_MAX 15 111 112 #define IQS626_CHx_ENG_3_TX_FREQ_MASK GENMASK(5, 4) 113 #define IQS626_CHx_ENG_3_TX_FREQ_SHIFT 4 114 #define IQS626_CHx_ENG_3_TX_FREQ_MAX 3 115 #define IQS626_CHx_ENG_3_INV_LOGIC BIT(0) 116 117 #define IQS626_CHx_ENG_4_RX_TERM_VREG BIT(6) 118 #define IQS626_CHx_ENG_4_CCT_LOW_1 BIT(5) 119 #define IQS626_CHx_ENG_4_CCT_LOW_0 BIT(4) 120 #define IQS626_CHx_ENG_4_COMP_DISABLE BIT(1) 121 #define IQS626_CHx_ENG_4_STATIC_ENABLE BIT(0) 122 123 #define IQS626_TPx_ATI_BASE_MIN 45 124 #define IQS626_TPx_ATI_BASE_MAX 300 125 #define IQS626_CHx_ATI_BASE_MASK GENMASK(7, 6) 126 #define IQS626_CHx_ATI_BASE_75 0x00 127 #define IQS626_CHx_ATI_BASE_100 0x40 128 #define IQS626_CHx_ATI_BASE_150 0x80 129 #define IQS626_CHx_ATI_BASE_200 0xC0 130 #define IQS626_CHx_ATI_TARGET_MASK GENMASK(5, 0) 131 #define IQS626_CHx_ATI_TARGET_MAX 2016 132 133 #define IQS626_CHx_THRESH_MAX 255 134 #define IQS626_CHx_HYST_DEEP_MASK GENMASK(7, 4) 135 #define IQS626_CHx_HYST_DEEP_SHIFT 4 136 #define IQS626_CHx_HYST_TOUCH_MASK GENMASK(3, 0) 137 #define IQS626_CHx_HYST_MAX 15 138 139 #define IQS626_FILT_STR_NP_TPx_MASK GENMASK(7, 6) 140 #define IQS626_FILT_STR_NP_TPx_SHIFT 6 141 #define IQS626_FILT_STR_LP_TPx_MASK GENMASK(5, 4) 142 #define IQS626_FILT_STR_LP_TPx_SHIFT 4 143 144 #define IQS626_FILT_STR_NP_CNT_MASK GENMASK(7, 6) 145 #define IQS626_FILT_STR_NP_CNT_SHIFT 6 146 #define IQS626_FILT_STR_LP_CNT_MASK GENMASK(5, 4) 147 #define IQS626_FILT_STR_LP_CNT_SHIFT 4 148 #define IQS626_FILT_STR_NP_LTA_MASK GENMASK(3, 2) 149 #define IQS626_FILT_STR_NP_LTA_SHIFT 2 150 #define IQS626_FILT_STR_LP_LTA_MASK GENMASK(1, 0) 151 #define IQS626_FILT_STR_MAX 3 152 153 #define IQS626_ULP_PROJ_ENABLE BIT(4) 154 #define IQS626_GEN_WEIGHT_MAX 255 155 156 #define IQS626_MAX_REG 0xFF 157 158 #define IQS626_NUM_CH_TP_3 9 159 #define IQS626_NUM_CH_TP_2 6 160 #define IQS626_NUM_CH_GEN 3 161 #define IQS626_NUM_CRx_TX 8 162 163 #define IQS626_PWR_MODE_POLL_SLEEP_US 50000 164 #define IQS626_PWR_MODE_POLL_TIMEOUT_US 500000 165 166 #define iqs626_irq_wait() usleep_range(350, 400) 167 168 enum iqs626_ch_id { 169 IQS626_CH_ULP_0, 170 IQS626_CH_TP_2, 171 IQS626_CH_TP_3, 172 IQS626_CH_GEN_0, 173 IQS626_CH_GEN_1, 174 IQS626_CH_GEN_2, 175 IQS626_CH_HALL, 176 }; 177 178 enum iqs626_rx_inactive { 179 IQS626_RX_INACTIVE_VSS, 180 IQS626_RX_INACTIVE_FLOAT, 181 IQS626_RX_INACTIVE_VREG, 182 }; 183 184 enum iqs626_st_offs { 185 IQS626_ST_OFFS_PROX, 186 IQS626_ST_OFFS_DIR, 187 IQS626_ST_OFFS_TOUCH, 188 IQS626_ST_OFFS_DEEP, 189 }; 190 191 enum iqs626_th_offs { 192 IQS626_TH_OFFS_PROX, 193 IQS626_TH_OFFS_TOUCH, 194 IQS626_TH_OFFS_DEEP, 195 }; 196 197 enum iqs626_event_id { 198 IQS626_EVENT_PROX_DN, 199 IQS626_EVENT_PROX_UP, 200 IQS626_EVENT_TOUCH_DN, 201 IQS626_EVENT_TOUCH_UP, 202 IQS626_EVENT_DEEP_DN, 203 IQS626_EVENT_DEEP_UP, 204 }; 205 206 enum iqs626_gesture_id { 207 IQS626_GESTURE_FLICK_X_POS, 208 IQS626_GESTURE_FLICK_X_NEG, 209 IQS626_GESTURE_FLICK_Y_POS, 210 IQS626_GESTURE_FLICK_Y_NEG, 211 IQS626_GESTURE_TAP, 212 IQS626_GESTURE_HOLD, 213 IQS626_NUM_GESTURES, 214 }; 215 216 struct iqs626_event_desc { 217 const char *name; 218 enum iqs626_st_offs st_offs; 219 enum iqs626_th_offs th_offs; 220 bool dir_up; 221 u8 mask; 222 }; 223 224 static const struct iqs626_event_desc iqs626_events[] = { 225 [IQS626_EVENT_PROX_DN] = { 226 .name = "event-prox", 227 .st_offs = IQS626_ST_OFFS_PROX, 228 .th_offs = IQS626_TH_OFFS_PROX, 229 .mask = IQS626_EVENT_MASK_PROX, 230 }, 231 [IQS626_EVENT_PROX_UP] = { 232 .name = "event-prox-alt", 233 .st_offs = IQS626_ST_OFFS_PROX, 234 .th_offs = IQS626_TH_OFFS_PROX, 235 .dir_up = true, 236 .mask = IQS626_EVENT_MASK_PROX, 237 }, 238 [IQS626_EVENT_TOUCH_DN] = { 239 .name = "event-touch", 240 .st_offs = IQS626_ST_OFFS_TOUCH, 241 .th_offs = IQS626_TH_OFFS_TOUCH, 242 .mask = IQS626_EVENT_MASK_TOUCH, 243 }, 244 [IQS626_EVENT_TOUCH_UP] = { 245 .name = "event-touch-alt", 246 .st_offs = IQS626_ST_OFFS_TOUCH, 247 .th_offs = IQS626_TH_OFFS_TOUCH, 248 .dir_up = true, 249 .mask = IQS626_EVENT_MASK_TOUCH, 250 }, 251 [IQS626_EVENT_DEEP_DN] = { 252 .name = "event-deep", 253 .st_offs = IQS626_ST_OFFS_DEEP, 254 .th_offs = IQS626_TH_OFFS_DEEP, 255 .mask = IQS626_EVENT_MASK_DEEP, 256 }, 257 [IQS626_EVENT_DEEP_UP] = { 258 .name = "event-deep-alt", 259 .st_offs = IQS626_ST_OFFS_DEEP, 260 .th_offs = IQS626_TH_OFFS_DEEP, 261 .dir_up = true, 262 .mask = IQS626_EVENT_MASK_DEEP, 263 }, 264 }; 265 266 struct iqs626_ver_info { 267 u8 prod_num; 268 u8 sw_num; 269 u8 hw_num; 270 u8 padding; 271 } __packed; 272 273 struct iqs626_flags { 274 __be16 system; 275 u8 gesture; 276 u8 padding_a; 277 u8 states[4]; 278 u8 ref_active; 279 u8 padding_b; 280 u8 comp_min; 281 u8 comp_max; 282 u8 trackpad_x; 283 u8 trackpad_y; 284 } __packed; 285 286 struct iqs626_ch_reg_ulp { 287 u8 thresh[2]; 288 u8 hyst; 289 u8 filter; 290 u8 engine[2]; 291 u8 ati_target; 292 u8 padding; 293 __be16 ati_comp; 294 u8 rx_enable; 295 u8 tx_enable; 296 } __packed; 297 298 struct iqs626_ch_reg_tp { 299 u8 thresh; 300 u8 ati_base; 301 __be16 ati_comp; 302 } __packed; 303 304 struct iqs626_tp_grp_reg { 305 u8 hyst; 306 u8 ati_target; 307 u8 engine[2]; 308 struct iqs626_ch_reg_tp ch_reg_tp[IQS626_NUM_CH_TP_3]; 309 } __packed; 310 311 struct iqs626_ch_reg_gen { 312 u8 thresh[3]; 313 u8 padding; 314 u8 hyst; 315 u8 ati_target; 316 __be16 ati_comp; 317 u8 engine[5]; 318 u8 filter; 319 u8 rx_enable; 320 u8 tx_enable; 321 u8 assoc_select; 322 u8 assoc_weight; 323 } __packed; 324 325 struct iqs626_ch_reg_hall { 326 u8 engine; 327 u8 thresh; 328 u8 hyst; 329 u8 ati_target; 330 __be16 ati_comp; 331 } __packed; 332 333 struct iqs626_sys_reg { 334 __be16 general; 335 u8 misc_a; 336 u8 event_mask; 337 u8 active; 338 u8 reseed; 339 u8 rate_np; 340 u8 rate_lp; 341 u8 rate_ulp; 342 u8 timeout_pwr; 343 u8 timeout_rdy; 344 u8 timeout_lta; 345 u8 misc_b; 346 u8 thresh_swipe; 347 u8 timeout_tap; 348 u8 timeout_swipe; 349 u8 redo_ati; 350 u8 padding; 351 struct iqs626_ch_reg_ulp ch_reg_ulp; 352 struct iqs626_tp_grp_reg tp_grp_reg; 353 struct iqs626_ch_reg_gen ch_reg_gen[IQS626_NUM_CH_GEN]; 354 struct iqs626_ch_reg_hall ch_reg_hall; 355 } __packed; 356 357 struct iqs626_channel_desc { 358 const char *name; 359 int num_ch; 360 u8 active; 361 bool events[ARRAY_SIZE(iqs626_events)]; 362 }; 363 364 static const struct iqs626_channel_desc iqs626_channels[] = { 365 [IQS626_CH_ULP_0] = { 366 .name = "ulp-0", 367 .num_ch = 1, 368 .active = BIT(0), 369 .events = { 370 [IQS626_EVENT_PROX_DN] = true, 371 [IQS626_EVENT_PROX_UP] = true, 372 [IQS626_EVENT_TOUCH_DN] = true, 373 [IQS626_EVENT_TOUCH_UP] = true, 374 }, 375 }, 376 [IQS626_CH_TP_2] = { 377 .name = "trackpad-3x2", 378 .num_ch = IQS626_NUM_CH_TP_2, 379 .active = BIT(1), 380 .events = { 381 [IQS626_EVENT_TOUCH_DN] = true, 382 }, 383 }, 384 [IQS626_CH_TP_3] = { 385 .name = "trackpad-3x3", 386 .num_ch = IQS626_NUM_CH_TP_3, 387 .active = BIT(2) | BIT(1), 388 .events = { 389 [IQS626_EVENT_TOUCH_DN] = true, 390 }, 391 }, 392 [IQS626_CH_GEN_0] = { 393 .name = "generic-0", 394 .num_ch = 1, 395 .active = BIT(4), 396 .events = { 397 [IQS626_EVENT_PROX_DN] = true, 398 [IQS626_EVENT_PROX_UP] = true, 399 [IQS626_EVENT_TOUCH_DN] = true, 400 [IQS626_EVENT_TOUCH_UP] = true, 401 [IQS626_EVENT_DEEP_DN] = true, 402 [IQS626_EVENT_DEEP_UP] = true, 403 }, 404 }, 405 [IQS626_CH_GEN_1] = { 406 .name = "generic-1", 407 .num_ch = 1, 408 .active = BIT(5), 409 .events = { 410 [IQS626_EVENT_PROX_DN] = true, 411 [IQS626_EVENT_PROX_UP] = true, 412 [IQS626_EVENT_TOUCH_DN] = true, 413 [IQS626_EVENT_TOUCH_UP] = true, 414 [IQS626_EVENT_DEEP_DN] = true, 415 [IQS626_EVENT_DEEP_UP] = true, 416 }, 417 }, 418 [IQS626_CH_GEN_2] = { 419 .name = "generic-2", 420 .num_ch = 1, 421 .active = BIT(6), 422 .events = { 423 [IQS626_EVENT_PROX_DN] = true, 424 [IQS626_EVENT_PROX_UP] = true, 425 [IQS626_EVENT_TOUCH_DN] = true, 426 [IQS626_EVENT_TOUCH_UP] = true, 427 [IQS626_EVENT_DEEP_DN] = true, 428 [IQS626_EVENT_DEEP_UP] = true, 429 }, 430 }, 431 [IQS626_CH_HALL] = { 432 .name = "hall", 433 .num_ch = 1, 434 .active = BIT(7), 435 .events = { 436 [IQS626_EVENT_TOUCH_DN] = true, 437 [IQS626_EVENT_TOUCH_UP] = true, 438 }, 439 }, 440 }; 441 442 struct iqs626_private { 443 struct i2c_client *client; 444 struct regmap *regmap; 445 struct iqs626_sys_reg sys_reg; 446 struct completion ati_done; 447 struct input_dev *keypad; 448 struct input_dev *trackpad; 449 struct touchscreen_properties prop; 450 unsigned int kp_type[ARRAY_SIZE(iqs626_channels)] 451 [ARRAY_SIZE(iqs626_events)]; 452 unsigned int kp_code[ARRAY_SIZE(iqs626_channels)] 453 [ARRAY_SIZE(iqs626_events)]; 454 unsigned int tp_code[IQS626_NUM_GESTURES]; 455 unsigned int suspend_mode; 456 }; 457 458 static noinline_for_stack int 459 iqs626_parse_events(struct iqs626_private *iqs626, 460 struct fwnode_handle *ch_node, enum iqs626_ch_id ch_id) 461 { 462 struct iqs626_sys_reg *sys_reg = &iqs626->sys_reg; 463 struct i2c_client *client = iqs626->client; 464 const char *ev_name; 465 u8 *thresh, *hyst; 466 unsigned int val; 467 int i; 468 469 switch (ch_id) { 470 case IQS626_CH_ULP_0: 471 thresh = sys_reg->ch_reg_ulp.thresh; 472 hyst = &sys_reg->ch_reg_ulp.hyst; 473 break; 474 475 case IQS626_CH_TP_2: 476 case IQS626_CH_TP_3: 477 thresh = &sys_reg->tp_grp_reg.ch_reg_tp[0].thresh; 478 hyst = &sys_reg->tp_grp_reg.hyst; 479 break; 480 481 case IQS626_CH_GEN_0: 482 case IQS626_CH_GEN_1: 483 case IQS626_CH_GEN_2: 484 i = ch_id - IQS626_CH_GEN_0; 485 thresh = sys_reg->ch_reg_gen[i].thresh; 486 hyst = &sys_reg->ch_reg_gen[i].hyst; 487 break; 488 489 case IQS626_CH_HALL: 490 thresh = &sys_reg->ch_reg_hall.thresh; 491 hyst = &sys_reg->ch_reg_hall.hyst; 492 break; 493 494 default: 495 return -EINVAL; 496 } 497 498 for (i = 0; i < ARRAY_SIZE(iqs626_events); i++) { 499 if (!iqs626_channels[ch_id].events[i]) 500 continue; 501 502 struct fwnode_handle *ev_node __free(fwnode_handle) = NULL; 503 if (ch_id == IQS626_CH_TP_2 || ch_id == IQS626_CH_TP_3) { 504 /* 505 * Trackpad touch events are simply described under the 506 * trackpad child node. 507 */ 508 ev_node = fwnode_handle_get(ch_node); 509 } else { 510 ev_name = iqs626_events[i].name; 511 ev_node = fwnode_get_named_child_node(ch_node, ev_name); 512 if (!ev_node) 513 continue; 514 515 if (!fwnode_property_read_u32(ev_node, "linux,code", 516 &val)) { 517 iqs626->kp_code[ch_id][i] = val; 518 519 if (fwnode_property_read_u32(ev_node, 520 "linux,input-type", 521 &val)) { 522 if (ch_id == IQS626_CH_HALL) 523 val = EV_SW; 524 else 525 val = EV_KEY; 526 } 527 528 if (val != EV_KEY && val != EV_SW) { 529 dev_err(&client->dev, 530 "Invalid input type: %u\n", 531 val); 532 return -EINVAL; 533 } 534 535 iqs626->kp_type[ch_id][i] = val; 536 537 sys_reg->event_mask &= ~iqs626_events[i].mask; 538 } 539 } 540 541 if (!fwnode_property_read_u32(ev_node, "azoteq,hyst", &val)) { 542 if (val > IQS626_CHx_HYST_MAX) { 543 dev_err(&client->dev, 544 "Invalid %s channel hysteresis: %u\n", 545 fwnode_get_name(ch_node), val); 546 return -EINVAL; 547 } 548 549 if (i == IQS626_EVENT_DEEP_DN || 550 i == IQS626_EVENT_DEEP_UP) { 551 *hyst &= ~IQS626_CHx_HYST_DEEP_MASK; 552 *hyst |= (val << IQS626_CHx_HYST_DEEP_SHIFT); 553 } else if (i == IQS626_EVENT_TOUCH_DN || 554 i == IQS626_EVENT_TOUCH_UP) { 555 *hyst &= ~IQS626_CHx_HYST_TOUCH_MASK; 556 *hyst |= val; 557 } 558 } 559 560 if (ch_id != IQS626_CH_TP_2 && ch_id != IQS626_CH_TP_3 && 561 !fwnode_property_read_u32(ev_node, "azoteq,thresh", &val)) { 562 if (val > IQS626_CHx_THRESH_MAX) { 563 dev_err(&client->dev, 564 "Invalid %s channel threshold: %u\n", 565 fwnode_get_name(ch_node), val); 566 return -EINVAL; 567 } 568 569 if (ch_id == IQS626_CH_HALL) 570 *thresh = val; 571 else 572 *(thresh + iqs626_events[i].th_offs) = val; 573 } 574 } 575 576 return 0; 577 } 578 579 static noinline_for_stack int 580 iqs626_parse_ati_target(struct iqs626_private *iqs626, 581 struct fwnode_handle *ch_node, enum iqs626_ch_id ch_id) 582 { 583 struct iqs626_sys_reg *sys_reg = &iqs626->sys_reg; 584 struct i2c_client *client = iqs626->client; 585 unsigned int val; 586 u8 *ati_target; 587 int i; 588 589 switch (ch_id) { 590 case IQS626_CH_ULP_0: 591 ati_target = &sys_reg->ch_reg_ulp.ati_target; 592 break; 593 594 case IQS626_CH_TP_2: 595 case IQS626_CH_TP_3: 596 ati_target = &sys_reg->tp_grp_reg.ati_target; 597 break; 598 599 case IQS626_CH_GEN_0: 600 case IQS626_CH_GEN_1: 601 case IQS626_CH_GEN_2: 602 i = ch_id - IQS626_CH_GEN_0; 603 ati_target = &sys_reg->ch_reg_gen[i].ati_target; 604 break; 605 606 case IQS626_CH_HALL: 607 ati_target = &sys_reg->ch_reg_hall.ati_target; 608 break; 609 610 default: 611 return -EINVAL; 612 } 613 614 if (!fwnode_property_read_u32(ch_node, "azoteq,ati-target", &val)) { 615 if (val > IQS626_CHx_ATI_TARGET_MAX) { 616 dev_err(&client->dev, 617 "Invalid %s channel ATI target: %u\n", 618 fwnode_get_name(ch_node), val); 619 return -EINVAL; 620 } 621 622 *ati_target &= ~IQS626_CHx_ATI_TARGET_MASK; 623 *ati_target |= (val / 32); 624 } 625 626 if (ch_id != IQS626_CH_TP_2 && ch_id != IQS626_CH_TP_3 && 627 !fwnode_property_read_u32(ch_node, "azoteq,ati-base", &val)) { 628 switch (val) { 629 case 75: 630 val = IQS626_CHx_ATI_BASE_75; 631 break; 632 633 case 100: 634 val = IQS626_CHx_ATI_BASE_100; 635 break; 636 637 case 150: 638 val = IQS626_CHx_ATI_BASE_150; 639 break; 640 641 case 200: 642 val = IQS626_CHx_ATI_BASE_200; 643 break; 644 645 default: 646 dev_err(&client->dev, 647 "Invalid %s channel ATI base: %u\n", 648 fwnode_get_name(ch_node), val); 649 return -EINVAL; 650 } 651 652 *ati_target &= ~IQS626_CHx_ATI_BASE_MASK; 653 *ati_target |= val; 654 } 655 656 return 0; 657 } 658 659 static int iqs626_parse_pins(struct iqs626_private *iqs626, 660 struct fwnode_handle *ch_node, 661 const char *propname, u8 *enable) 662 { 663 struct i2c_client *client = iqs626->client; 664 unsigned int val[IQS626_NUM_CRx_TX]; 665 int error, count, i; 666 667 if (!fwnode_property_present(ch_node, propname)) 668 return 0; 669 670 count = fwnode_property_count_u32(ch_node, propname); 671 if (count > IQS626_NUM_CRx_TX) { 672 dev_err(&client->dev, 673 "Too many %s channel CRX/TX pins present\n", 674 fwnode_get_name(ch_node)); 675 return -EINVAL; 676 } else if (count < 0) { 677 dev_err(&client->dev, 678 "Failed to count %s channel CRX/TX pins: %d\n", 679 fwnode_get_name(ch_node), count); 680 return count; 681 } 682 683 error = fwnode_property_read_u32_array(ch_node, propname, val, count); 684 if (error) { 685 dev_err(&client->dev, 686 "Failed to read %s channel CRX/TX pins: %d\n", 687 fwnode_get_name(ch_node), error); 688 return error; 689 } 690 691 *enable = 0; 692 693 for (i = 0; i < count; i++) { 694 if (val[i] >= IQS626_NUM_CRx_TX) { 695 dev_err(&client->dev, 696 "Invalid %s channel CRX/TX pin: %u\n", 697 fwnode_get_name(ch_node), val[i]); 698 return -EINVAL; 699 } 700 701 *enable |= BIT(val[i]); 702 } 703 704 return 0; 705 } 706 707 static int iqs626_parse_trackpad(struct iqs626_private *iqs626, 708 struct fwnode_handle *ch_node, 709 enum iqs626_ch_id ch_id) 710 { 711 struct iqs626_sys_reg *sys_reg = &iqs626->sys_reg; 712 struct i2c_client *client = iqs626->client; 713 u8 *hyst = &sys_reg->tp_grp_reg.hyst; 714 int error, count, i; 715 unsigned int val; 716 717 if (!fwnode_property_read_u32(ch_node, "azoteq,lta-update", &val)) { 718 if (val > IQS626_MISC_A_TPx_LTA_UPDATE_MAX) { 719 dev_err(&client->dev, 720 "Invalid %s channel update rate: %u\n", 721 fwnode_get_name(ch_node), val); 722 return -EINVAL; 723 } 724 725 sys_reg->misc_a &= ~IQS626_MISC_A_TPx_LTA_UPDATE_MASK; 726 sys_reg->misc_a |= (val << IQS626_MISC_A_TPx_LTA_UPDATE_SHIFT); 727 } 728 729 if (!fwnode_property_read_u32(ch_node, "azoteq,filt-str-trackpad", 730 &val)) { 731 if (val > IQS626_FILT_STR_MAX) { 732 dev_err(&client->dev, 733 "Invalid %s channel filter strength: %u\n", 734 fwnode_get_name(ch_node), val); 735 return -EINVAL; 736 } 737 738 sys_reg->misc_b &= ~IQS626_MISC_B_FILT_STR_TPx; 739 sys_reg->misc_b |= val; 740 } 741 742 if (!fwnode_property_read_u32(ch_node, "azoteq,filt-str-np-cnt", 743 &val)) { 744 if (val > IQS626_FILT_STR_MAX) { 745 dev_err(&client->dev, 746 "Invalid %s channel filter strength: %u\n", 747 fwnode_get_name(ch_node), val); 748 return -EINVAL; 749 } 750 751 *hyst &= ~IQS626_FILT_STR_NP_TPx_MASK; 752 *hyst |= (val << IQS626_FILT_STR_NP_TPx_SHIFT); 753 } 754 755 if (!fwnode_property_read_u32(ch_node, "azoteq,filt-str-lp-cnt", 756 &val)) { 757 if (val > IQS626_FILT_STR_MAX) { 758 dev_err(&client->dev, 759 "Invalid %s channel filter strength: %u\n", 760 fwnode_get_name(ch_node), val); 761 return -EINVAL; 762 } 763 764 *hyst &= ~IQS626_FILT_STR_LP_TPx_MASK; 765 *hyst |= (val << IQS626_FILT_STR_LP_TPx_SHIFT); 766 } 767 768 for (i = 0; i < iqs626_channels[ch_id].num_ch; i++) { 769 u8 *ati_base = &sys_reg->tp_grp_reg.ch_reg_tp[i].ati_base; 770 u8 *thresh = &sys_reg->tp_grp_reg.ch_reg_tp[i].thresh; 771 char tc_name[10]; 772 773 scnprintf(tc_name, sizeof(tc_name), "channel-%d", i); 774 775 struct fwnode_handle *tc_node __free(fwnode_handle) = 776 fwnode_get_named_child_node(ch_node, tc_name); 777 if (!tc_node) 778 continue; 779 780 if (!fwnode_property_read_u32(tc_node, "azoteq,ati-base", 781 &val)) { 782 if (val < IQS626_TPx_ATI_BASE_MIN || 783 val > IQS626_TPx_ATI_BASE_MAX) { 784 dev_err(&client->dev, 785 "Invalid %s %s ATI base: %u\n", 786 fwnode_get_name(ch_node), tc_name, val); 787 return -EINVAL; 788 } 789 790 *ati_base = val - IQS626_TPx_ATI_BASE_MIN; 791 } 792 793 if (!fwnode_property_read_u32(tc_node, "azoteq,thresh", 794 &val)) { 795 if (val > IQS626_CHx_THRESH_MAX) { 796 dev_err(&client->dev, 797 "Invalid %s %s threshold: %u\n", 798 fwnode_get_name(ch_node), tc_name, val); 799 return -EINVAL; 800 } 801 802 *thresh = val; 803 } 804 } 805 806 if (!fwnode_property_present(ch_node, "linux,keycodes")) 807 return 0; 808 809 count = fwnode_property_count_u32(ch_node, "linux,keycodes"); 810 if (count > IQS626_NUM_GESTURES) { 811 dev_err(&client->dev, "Too many keycodes present\n"); 812 return -EINVAL; 813 } else if (count < 0) { 814 dev_err(&client->dev, "Failed to count keycodes: %d\n", count); 815 return count; 816 } 817 818 error = fwnode_property_read_u32_array(ch_node, "linux,keycodes", 819 iqs626->tp_code, count); 820 if (error) { 821 dev_err(&client->dev, "Failed to read keycodes: %d\n", error); 822 return error; 823 } 824 825 sys_reg->misc_b &= ~IQS626_MISC_B_TPx_SWIPE; 826 if (fwnode_property_present(ch_node, "azoteq,gesture-swipe")) 827 sys_reg->misc_b |= IQS626_MISC_B_TPx_SWIPE; 828 829 if (!fwnode_property_read_u32(ch_node, "azoteq,timeout-tap-ms", 830 &val)) { 831 if (val > IQS626_TIMEOUT_TAP_MS_MAX) { 832 dev_err(&client->dev, 833 "Invalid %s channel timeout: %u\n", 834 fwnode_get_name(ch_node), val); 835 return -EINVAL; 836 } 837 838 sys_reg->timeout_tap = val / 16; 839 } 840 841 if (!fwnode_property_read_u32(ch_node, "azoteq,timeout-swipe-ms", 842 &val)) { 843 if (val > IQS626_TIMEOUT_SWIPE_MS_MAX) { 844 dev_err(&client->dev, 845 "Invalid %s channel timeout: %u\n", 846 fwnode_get_name(ch_node), val); 847 return -EINVAL; 848 } 849 850 sys_reg->timeout_swipe = val / 16; 851 } 852 853 if (!fwnode_property_read_u32(ch_node, "azoteq,thresh-swipe", 854 &val)) { 855 if (val > IQS626_THRESH_SWIPE_MAX) { 856 dev_err(&client->dev, 857 "Invalid %s channel threshold: %u\n", 858 fwnode_get_name(ch_node), val); 859 return -EINVAL; 860 } 861 862 sys_reg->thresh_swipe = val; 863 } 864 865 sys_reg->event_mask &= ~IQS626_EVENT_MASK_GESTURE; 866 867 return 0; 868 } 869 870 static noinline_for_stack int 871 iqs626_parse_channel(struct iqs626_private *iqs626, 872 struct fwnode_handle *ch_node, enum iqs626_ch_id ch_id) 873 { 874 struct iqs626_sys_reg *sys_reg = &iqs626->sys_reg; 875 struct i2c_client *client = iqs626->client; 876 u8 *engine, *filter, *rx_enable, *tx_enable; 877 u8 *assoc_select, *assoc_weight; 878 unsigned int val; 879 int error, i; 880 881 switch (ch_id) { 882 case IQS626_CH_ULP_0: 883 engine = sys_reg->ch_reg_ulp.engine; 884 break; 885 886 case IQS626_CH_TP_2: 887 case IQS626_CH_TP_3: 888 engine = sys_reg->tp_grp_reg.engine; 889 break; 890 891 case IQS626_CH_GEN_0: 892 case IQS626_CH_GEN_1: 893 case IQS626_CH_GEN_2: 894 i = ch_id - IQS626_CH_GEN_0; 895 engine = sys_reg->ch_reg_gen[i].engine; 896 break; 897 898 case IQS626_CH_HALL: 899 engine = &sys_reg->ch_reg_hall.engine; 900 break; 901 902 default: 903 return -EINVAL; 904 } 905 906 error = iqs626_parse_ati_target(iqs626, ch_node, ch_id); 907 if (error) 908 return error; 909 910 error = iqs626_parse_events(iqs626, ch_node, ch_id); 911 if (error) 912 return error; 913 914 if (!fwnode_property_present(ch_node, "azoteq,ati-exclude")) 915 sys_reg->redo_ati |= iqs626_channels[ch_id].active; 916 917 if (!fwnode_property_present(ch_node, "azoteq,reseed-disable")) 918 sys_reg->reseed |= iqs626_channels[ch_id].active; 919 920 *engine |= IQS626_CHx_ENG_0_MEAS_CAP_SIZE; 921 if (fwnode_property_present(ch_node, "azoteq,meas-cap-decrease")) 922 *engine &= ~IQS626_CHx_ENG_0_MEAS_CAP_SIZE; 923 924 *engine |= IQS626_CHx_ENG_0_RX_TERM_VSS; 925 if (!fwnode_property_read_u32(ch_node, "azoteq,rx-inactive", &val)) { 926 switch (val) { 927 case IQS626_RX_INACTIVE_VSS: 928 break; 929 930 case IQS626_RX_INACTIVE_FLOAT: 931 *engine &= ~IQS626_CHx_ENG_0_RX_TERM_VSS; 932 if (ch_id == IQS626_CH_GEN_0 || 933 ch_id == IQS626_CH_GEN_1 || 934 ch_id == IQS626_CH_GEN_2) 935 *(engine + 4) &= ~IQS626_CHx_ENG_4_RX_TERM_VREG; 936 break; 937 938 case IQS626_RX_INACTIVE_VREG: 939 if (ch_id == IQS626_CH_GEN_0 || 940 ch_id == IQS626_CH_GEN_1 || 941 ch_id == IQS626_CH_GEN_2) { 942 *engine &= ~IQS626_CHx_ENG_0_RX_TERM_VSS; 943 *(engine + 4) |= IQS626_CHx_ENG_4_RX_TERM_VREG; 944 break; 945 } 946 fallthrough; 947 948 default: 949 dev_err(&client->dev, 950 "Invalid %s channel CRX pin termination: %u\n", 951 fwnode_get_name(ch_node), val); 952 return -EINVAL; 953 } 954 } 955 956 *engine &= ~IQS626_CHx_ENG_0_LINEARIZE; 957 if (fwnode_property_present(ch_node, "azoteq,linearize")) 958 *engine |= IQS626_CHx_ENG_0_LINEARIZE; 959 960 *engine &= ~IQS626_CHx_ENG_0_DUAL_DIR; 961 if (fwnode_property_present(ch_node, "azoteq,dual-direction")) 962 *engine |= IQS626_CHx_ENG_0_DUAL_DIR; 963 964 *engine &= ~IQS626_CHx_ENG_0_FILT_DISABLE; 965 if (fwnode_property_present(ch_node, "azoteq,filt-disable")) 966 *engine |= IQS626_CHx_ENG_0_FILT_DISABLE; 967 968 if (!fwnode_property_read_u32(ch_node, "azoteq,ati-mode", &val)) { 969 if (val > IQS626_CHx_ENG_0_ATI_MODE_MAX) { 970 dev_err(&client->dev, 971 "Invalid %s channel ATI mode: %u\n", 972 fwnode_get_name(ch_node), val); 973 return -EINVAL; 974 } 975 976 *engine &= ~IQS626_CHx_ENG_0_ATI_MODE_MASK; 977 *engine |= val; 978 } 979 980 if (ch_id == IQS626_CH_HALL) 981 return 0; 982 983 *(engine + 1) &= ~IQS626_CHx_ENG_1_CCT_ENABLE; 984 if (!fwnode_property_read_u32(ch_node, "azoteq,cct-increase", 985 &val) && val) { 986 unsigned int orig_val = val--; 987 988 /* 989 * In the case of the generic channels, the charge cycle time 990 * field doubles in size and straddles two separate registers. 991 */ 992 if (ch_id == IQS626_CH_GEN_0 || 993 ch_id == IQS626_CH_GEN_1 || 994 ch_id == IQS626_CH_GEN_2) { 995 *(engine + 4) &= ~IQS626_CHx_ENG_4_CCT_LOW_1; 996 if (val & BIT(1)) 997 *(engine + 4) |= IQS626_CHx_ENG_4_CCT_LOW_1; 998 999 *(engine + 4) &= ~IQS626_CHx_ENG_4_CCT_LOW_0; 1000 if (val & BIT(0)) 1001 *(engine + 4) |= IQS626_CHx_ENG_4_CCT_LOW_0; 1002 1003 val >>= 2; 1004 } 1005 1006 if (val & ~GENMASK(1, 0)) { 1007 dev_err(&client->dev, 1008 "Invalid %s channel charge cycle time: %u\n", 1009 fwnode_get_name(ch_node), orig_val); 1010 return -EINVAL; 1011 } 1012 1013 *(engine + 1) &= ~IQS626_CHx_ENG_1_CCT_HIGH_1; 1014 if (val & BIT(1)) 1015 *(engine + 1) |= IQS626_CHx_ENG_1_CCT_HIGH_1; 1016 1017 *(engine + 1) &= ~IQS626_CHx_ENG_1_CCT_HIGH_0; 1018 if (val & BIT(0)) 1019 *(engine + 1) |= IQS626_CHx_ENG_1_CCT_HIGH_0; 1020 1021 *(engine + 1) |= IQS626_CHx_ENG_1_CCT_ENABLE; 1022 } 1023 1024 if (!fwnode_property_read_u32(ch_node, "azoteq,proj-bias", &val)) { 1025 if (val > IQS626_CHx_ENG_1_PROJ_BIAS_MAX) { 1026 dev_err(&client->dev, 1027 "Invalid %s channel bias current: %u\n", 1028 fwnode_get_name(ch_node), val); 1029 return -EINVAL; 1030 } 1031 1032 *(engine + 1) &= ~IQS626_CHx_ENG_1_PROJ_BIAS_MASK; 1033 *(engine + 1) |= (val << IQS626_CHx_ENG_1_PROJ_BIAS_SHIFT); 1034 } 1035 1036 if (!fwnode_property_read_u32(ch_node, "azoteq,sense-freq", &val)) { 1037 if (val > IQS626_CHx_ENG_1_SENSE_FREQ_MAX) { 1038 dev_err(&client->dev, 1039 "Invalid %s channel sensing frequency: %u\n", 1040 fwnode_get_name(ch_node), val); 1041 return -EINVAL; 1042 } 1043 1044 *(engine + 1) &= ~IQS626_CHx_ENG_1_SENSE_FREQ_MASK; 1045 *(engine + 1) |= (val << IQS626_CHx_ENG_1_SENSE_FREQ_SHIFT); 1046 } 1047 1048 *(engine + 1) &= ~IQS626_CHx_ENG_1_ATI_BAND_TIGHTEN; 1049 if (fwnode_property_present(ch_node, "azoteq,ati-band-tighten")) 1050 *(engine + 1) |= IQS626_CHx_ENG_1_ATI_BAND_TIGHTEN; 1051 1052 if (ch_id == IQS626_CH_TP_2 || ch_id == IQS626_CH_TP_3) 1053 return iqs626_parse_trackpad(iqs626, ch_node, ch_id); 1054 1055 if (ch_id == IQS626_CH_ULP_0) { 1056 sys_reg->ch_reg_ulp.hyst &= ~IQS626_ULP_PROJ_ENABLE; 1057 if (fwnode_property_present(ch_node, "azoteq,proj-enable")) 1058 sys_reg->ch_reg_ulp.hyst |= IQS626_ULP_PROJ_ENABLE; 1059 1060 filter = &sys_reg->ch_reg_ulp.filter; 1061 1062 rx_enable = &sys_reg->ch_reg_ulp.rx_enable; 1063 tx_enable = &sys_reg->ch_reg_ulp.tx_enable; 1064 } else { 1065 i = ch_id - IQS626_CH_GEN_0; 1066 filter = &sys_reg->ch_reg_gen[i].filter; 1067 1068 rx_enable = &sys_reg->ch_reg_gen[i].rx_enable; 1069 tx_enable = &sys_reg->ch_reg_gen[i].tx_enable; 1070 } 1071 1072 if (!fwnode_property_read_u32(ch_node, "azoteq,filt-str-np-cnt", 1073 &val)) { 1074 if (val > IQS626_FILT_STR_MAX) { 1075 dev_err(&client->dev, 1076 "Invalid %s channel filter strength: %u\n", 1077 fwnode_get_name(ch_node), val); 1078 return -EINVAL; 1079 } 1080 1081 *filter &= ~IQS626_FILT_STR_NP_CNT_MASK; 1082 *filter |= (val << IQS626_FILT_STR_NP_CNT_SHIFT); 1083 } 1084 1085 if (!fwnode_property_read_u32(ch_node, "azoteq,filt-str-lp-cnt", 1086 &val)) { 1087 if (val > IQS626_FILT_STR_MAX) { 1088 dev_err(&client->dev, 1089 "Invalid %s channel filter strength: %u\n", 1090 fwnode_get_name(ch_node), val); 1091 return -EINVAL; 1092 } 1093 1094 *filter &= ~IQS626_FILT_STR_LP_CNT_MASK; 1095 *filter |= (val << IQS626_FILT_STR_LP_CNT_SHIFT); 1096 } 1097 1098 if (!fwnode_property_read_u32(ch_node, "azoteq,filt-str-np-lta", 1099 &val)) { 1100 if (val > IQS626_FILT_STR_MAX) { 1101 dev_err(&client->dev, 1102 "Invalid %s channel filter strength: %u\n", 1103 fwnode_get_name(ch_node), val); 1104 return -EINVAL; 1105 } 1106 1107 *filter &= ~IQS626_FILT_STR_NP_LTA_MASK; 1108 *filter |= (val << IQS626_FILT_STR_NP_LTA_SHIFT); 1109 } 1110 1111 if (!fwnode_property_read_u32(ch_node, "azoteq,filt-str-lp-lta", 1112 &val)) { 1113 if (val > IQS626_FILT_STR_MAX) { 1114 dev_err(&client->dev, 1115 "Invalid %s channel filter strength: %u\n", 1116 fwnode_get_name(ch_node), val); 1117 return -EINVAL; 1118 } 1119 1120 *filter &= ~IQS626_FILT_STR_LP_LTA_MASK; 1121 *filter |= val; 1122 } 1123 1124 error = iqs626_parse_pins(iqs626, ch_node, "azoteq,rx-enable", 1125 rx_enable); 1126 if (error) 1127 return error; 1128 1129 error = iqs626_parse_pins(iqs626, ch_node, "azoteq,tx-enable", 1130 tx_enable); 1131 if (error) 1132 return error; 1133 1134 if (ch_id == IQS626_CH_ULP_0) 1135 return 0; 1136 1137 *(engine + 2) &= ~IQS626_CHx_ENG_2_LOCAL_CAP_ENABLE; 1138 if (!fwnode_property_read_u32(ch_node, "azoteq,local-cap-size", 1139 &val) && val) { 1140 unsigned int orig_val = val--; 1141 1142 if (val > IQS626_CHx_ENG_2_LOCAL_CAP_MAX) { 1143 dev_err(&client->dev, 1144 "Invalid %s channel local cap. size: %u\n", 1145 fwnode_get_name(ch_node), orig_val); 1146 return -EINVAL; 1147 } 1148 1149 *(engine + 2) &= ~IQS626_CHx_ENG_2_LOCAL_CAP_MASK; 1150 *(engine + 2) |= (val << IQS626_CHx_ENG_2_LOCAL_CAP_SHIFT); 1151 1152 *(engine + 2) |= IQS626_CHx_ENG_2_LOCAL_CAP_ENABLE; 1153 } 1154 1155 if (!fwnode_property_read_u32(ch_node, "azoteq,sense-mode", &val)) { 1156 if (val > IQS626_CHx_ENG_2_SENSE_MODE_MAX) { 1157 dev_err(&client->dev, 1158 "Invalid %s channel sensing mode: %u\n", 1159 fwnode_get_name(ch_node), val); 1160 return -EINVAL; 1161 } 1162 1163 *(engine + 2) &= ~IQS626_CHx_ENG_2_SENSE_MODE_MASK; 1164 *(engine + 2) |= val; 1165 } 1166 1167 if (!fwnode_property_read_u32(ch_node, "azoteq,tx-freq", &val)) { 1168 if (val > IQS626_CHx_ENG_3_TX_FREQ_MAX) { 1169 dev_err(&client->dev, 1170 "Invalid %s channel excitation frequency: %u\n", 1171 fwnode_get_name(ch_node), val); 1172 return -EINVAL; 1173 } 1174 1175 *(engine + 3) &= ~IQS626_CHx_ENG_3_TX_FREQ_MASK; 1176 *(engine + 3) |= (val << IQS626_CHx_ENG_3_TX_FREQ_SHIFT); 1177 } 1178 1179 *(engine + 3) &= ~IQS626_CHx_ENG_3_INV_LOGIC; 1180 if (fwnode_property_present(ch_node, "azoteq,invert-enable")) 1181 *(engine + 3) |= IQS626_CHx_ENG_3_INV_LOGIC; 1182 1183 *(engine + 4) &= ~IQS626_CHx_ENG_4_COMP_DISABLE; 1184 if (fwnode_property_present(ch_node, "azoteq,comp-disable")) 1185 *(engine + 4) |= IQS626_CHx_ENG_4_COMP_DISABLE; 1186 1187 *(engine + 4) &= ~IQS626_CHx_ENG_4_STATIC_ENABLE; 1188 if (fwnode_property_present(ch_node, "azoteq,static-enable")) 1189 *(engine + 4) |= IQS626_CHx_ENG_4_STATIC_ENABLE; 1190 1191 i = ch_id - IQS626_CH_GEN_0; 1192 assoc_select = &sys_reg->ch_reg_gen[i].assoc_select; 1193 assoc_weight = &sys_reg->ch_reg_gen[i].assoc_weight; 1194 1195 *assoc_select = 0; 1196 if (!fwnode_property_present(ch_node, "azoteq,assoc-select")) 1197 return 0; 1198 1199 for (i = 0; i < ARRAY_SIZE(iqs626_channels); i++) { 1200 if (fwnode_property_match_string(ch_node, "azoteq,assoc-select", 1201 iqs626_channels[i].name) < 0) 1202 continue; 1203 1204 *assoc_select |= iqs626_channels[i].active; 1205 } 1206 1207 if (fwnode_property_read_u32(ch_node, "azoteq,assoc-weight", &val)) 1208 return 0; 1209 1210 if (val > IQS626_GEN_WEIGHT_MAX) { 1211 dev_err(&client->dev, 1212 "Invalid %s channel associated weight: %u\n", 1213 fwnode_get_name(ch_node), val); 1214 return -EINVAL; 1215 } 1216 1217 *assoc_weight = val; 1218 1219 return 0; 1220 } 1221 1222 static int iqs626_parse_prop(struct iqs626_private *iqs626) 1223 { 1224 struct iqs626_sys_reg *sys_reg = &iqs626->sys_reg; 1225 struct i2c_client *client = iqs626->client; 1226 unsigned int val; 1227 int error, i; 1228 u16 general; 1229 1230 if (!device_property_read_u32(&client->dev, "azoteq,suspend-mode", 1231 &val)) { 1232 if (val > IQS626_SYS_SETTINGS_PWR_MODE_MAX) { 1233 dev_err(&client->dev, "Invalid suspend mode: %u\n", 1234 val); 1235 return -EINVAL; 1236 } 1237 1238 iqs626->suspend_mode = val; 1239 } 1240 1241 error = regmap_raw_read(iqs626->regmap, IQS626_SYS_SETTINGS, sys_reg, 1242 sizeof(*sys_reg)); 1243 if (error) 1244 return error; 1245 1246 general = be16_to_cpu(sys_reg->general); 1247 general &= IQS626_SYS_SETTINGS_ULP_UPDATE_MASK; 1248 1249 if (device_property_present(&client->dev, "azoteq,clk-div")) 1250 general |= IQS626_SYS_SETTINGS_CLK_DIV; 1251 1252 if (device_property_present(&client->dev, "azoteq,ulp-enable")) 1253 general |= IQS626_SYS_SETTINGS_ULP_AUTO; 1254 1255 if (!device_property_read_u32(&client->dev, "azoteq,ulp-update", 1256 &val)) { 1257 if (val > IQS626_SYS_SETTINGS_ULP_UPDATE_MAX) { 1258 dev_err(&client->dev, "Invalid update rate: %u\n", val); 1259 return -EINVAL; 1260 } 1261 1262 general &= ~IQS626_SYS_SETTINGS_ULP_UPDATE_MASK; 1263 general |= (val << IQS626_SYS_SETTINGS_ULP_UPDATE_SHIFT); 1264 } 1265 1266 sys_reg->misc_a &= ~IQS626_MISC_A_ATI_BAND_DISABLE; 1267 if (device_property_present(&client->dev, "azoteq,ati-band-disable")) 1268 sys_reg->misc_a |= IQS626_MISC_A_ATI_BAND_DISABLE; 1269 1270 sys_reg->misc_a &= ~IQS626_MISC_A_ATI_LP_ONLY; 1271 if (device_property_present(&client->dev, "azoteq,ati-lp-only")) 1272 sys_reg->misc_a |= IQS626_MISC_A_ATI_LP_ONLY; 1273 1274 if (!device_property_read_u32(&client->dev, "azoteq,gpio3-select", 1275 &val)) { 1276 if (val > IQS626_MISC_A_GPIO3_SELECT_MAX) { 1277 dev_err(&client->dev, "Invalid GPIO3 selection: %u\n", 1278 val); 1279 return -EINVAL; 1280 } 1281 1282 sys_reg->misc_a &= ~IQS626_MISC_A_GPIO3_SELECT_MASK; 1283 sys_reg->misc_a |= val; 1284 } 1285 1286 if (!device_property_read_u32(&client->dev, "azoteq,reseed-select", 1287 &val)) { 1288 if (val > IQS626_MISC_B_RESEED_UI_SEL_MAX) { 1289 dev_err(&client->dev, "Invalid reseed selection: %u\n", 1290 val); 1291 return -EINVAL; 1292 } 1293 1294 sys_reg->misc_b &= ~IQS626_MISC_B_RESEED_UI_SEL_MASK; 1295 sys_reg->misc_b |= (val << IQS626_MISC_B_RESEED_UI_SEL_SHIFT); 1296 } 1297 1298 sys_reg->misc_b &= ~IQS626_MISC_B_THRESH_EXTEND; 1299 if (device_property_present(&client->dev, "azoteq,thresh-extend")) 1300 sys_reg->misc_b |= IQS626_MISC_B_THRESH_EXTEND; 1301 1302 sys_reg->misc_b &= ~IQS626_MISC_B_TRACKING_UI_ENABLE; 1303 if (device_property_present(&client->dev, "azoteq,tracking-enable")) 1304 sys_reg->misc_b |= IQS626_MISC_B_TRACKING_UI_ENABLE; 1305 1306 sys_reg->misc_b &= ~IQS626_MISC_B_RESEED_OFFSET; 1307 if (device_property_present(&client->dev, "azoteq,reseed-offset")) 1308 sys_reg->misc_b |= IQS626_MISC_B_RESEED_OFFSET; 1309 1310 if (!device_property_read_u32(&client->dev, "azoteq,rate-np-ms", 1311 &val)) { 1312 if (val > IQS626_RATE_NP_MS_MAX) { 1313 dev_err(&client->dev, "Invalid report rate: %u\n", val); 1314 return -EINVAL; 1315 } 1316 1317 sys_reg->rate_np = val; 1318 } 1319 1320 if (!device_property_read_u32(&client->dev, "azoteq,rate-lp-ms", 1321 &val)) { 1322 if (val > IQS626_RATE_LP_MS_MAX) { 1323 dev_err(&client->dev, "Invalid report rate: %u\n", val); 1324 return -EINVAL; 1325 } 1326 1327 sys_reg->rate_lp = val; 1328 } 1329 1330 if (!device_property_read_u32(&client->dev, "azoteq,rate-ulp-ms", 1331 &val)) { 1332 if (val > IQS626_RATE_ULP_MS_MAX) { 1333 dev_err(&client->dev, "Invalid report rate: %u\n", val); 1334 return -EINVAL; 1335 } 1336 1337 sys_reg->rate_ulp = val / 16; 1338 } 1339 1340 if (!device_property_read_u32(&client->dev, "azoteq,timeout-pwr-ms", 1341 &val)) { 1342 if (val > IQS626_TIMEOUT_PWR_MS_MAX) { 1343 dev_err(&client->dev, "Invalid timeout: %u\n", val); 1344 return -EINVAL; 1345 } 1346 1347 sys_reg->timeout_pwr = val / 512; 1348 } 1349 1350 if (!device_property_read_u32(&client->dev, "azoteq,timeout-lta-ms", 1351 &val)) { 1352 if (val > IQS626_TIMEOUT_LTA_MS_MAX) { 1353 dev_err(&client->dev, "Invalid timeout: %u\n", val); 1354 return -EINVAL; 1355 } 1356 1357 sys_reg->timeout_lta = val / 512; 1358 } 1359 1360 sys_reg->event_mask = ~((u8)IQS626_EVENT_MASK_SYS); 1361 sys_reg->redo_ati = 0; 1362 1363 sys_reg->reseed = 0; 1364 sys_reg->active = 0; 1365 1366 for (i = 0; i < ARRAY_SIZE(iqs626_channels); i++) { 1367 struct fwnode_handle *ch_node __free(fwnode_handle) = 1368 device_get_named_child_node(&client->dev, 1369 iqs626_channels[i].name); 1370 if (!ch_node) 1371 continue; 1372 1373 error = iqs626_parse_channel(iqs626, ch_node, i); 1374 if (error) 1375 return error; 1376 1377 sys_reg->active |= iqs626_channels[i].active; 1378 } 1379 1380 general |= IQS626_SYS_SETTINGS_EVENT_MODE; 1381 1382 /* 1383 * Enable streaming during normal-power mode if the trackpad is used to 1384 * report raw coordinates instead of gestures. In that case, the device 1385 * returns to event mode during low-power mode. 1386 */ 1387 if (sys_reg->active & iqs626_channels[IQS626_CH_TP_2].active && 1388 sys_reg->event_mask & IQS626_EVENT_MASK_GESTURE) 1389 general |= IQS626_SYS_SETTINGS_EVENT_MODE_LP; 1390 1391 general |= IQS626_SYS_SETTINGS_REDO_ATI; 1392 general |= IQS626_SYS_SETTINGS_ACK_RESET; 1393 1394 sys_reg->general = cpu_to_be16(general); 1395 1396 error = regmap_raw_write(iqs626->regmap, IQS626_SYS_SETTINGS, 1397 &iqs626->sys_reg, sizeof(iqs626->sys_reg)); 1398 if (error) 1399 return error; 1400 1401 iqs626_irq_wait(); 1402 1403 return 0; 1404 } 1405 1406 static int iqs626_input_init(struct iqs626_private *iqs626) 1407 { 1408 struct iqs626_sys_reg *sys_reg = &iqs626->sys_reg; 1409 struct i2c_client *client = iqs626->client; 1410 int error, i, j; 1411 1412 iqs626->keypad = devm_input_allocate_device(&client->dev); 1413 if (!iqs626->keypad) 1414 return -ENOMEM; 1415 1416 iqs626->keypad->keycodemax = ARRAY_SIZE(iqs626->kp_code); 1417 iqs626->keypad->keycode = iqs626->kp_code; 1418 iqs626->keypad->keycodesize = sizeof(**iqs626->kp_code); 1419 1420 iqs626->keypad->name = "iqs626a_keypad"; 1421 iqs626->keypad->id.bustype = BUS_I2C; 1422 1423 for (i = 0; i < ARRAY_SIZE(iqs626_channels); i++) { 1424 if (!(sys_reg->active & iqs626_channels[i].active)) 1425 continue; 1426 1427 for (j = 0; j < ARRAY_SIZE(iqs626_events); j++) { 1428 if (!iqs626->kp_type[i][j]) 1429 continue; 1430 1431 input_set_capability(iqs626->keypad, 1432 iqs626->kp_type[i][j], 1433 iqs626->kp_code[i][j]); 1434 } 1435 } 1436 1437 if (!(sys_reg->active & iqs626_channels[IQS626_CH_TP_2].active)) 1438 return 0; 1439 1440 iqs626->trackpad = devm_input_allocate_device(&client->dev); 1441 if (!iqs626->trackpad) 1442 return -ENOMEM; 1443 1444 iqs626->trackpad->keycodemax = ARRAY_SIZE(iqs626->tp_code); 1445 iqs626->trackpad->keycode = iqs626->tp_code; 1446 iqs626->trackpad->keycodesize = sizeof(*iqs626->tp_code); 1447 1448 iqs626->trackpad->name = "iqs626a_trackpad"; 1449 iqs626->trackpad->id.bustype = BUS_I2C; 1450 1451 /* 1452 * Present the trackpad as a traditional pointing device if no gestures 1453 * have been mapped to a keycode. 1454 */ 1455 if (sys_reg->event_mask & IQS626_EVENT_MASK_GESTURE) { 1456 u8 tp_mask = iqs626_channels[IQS626_CH_TP_3].active; 1457 1458 input_set_capability(iqs626->trackpad, EV_KEY, BTN_TOUCH); 1459 input_set_abs_params(iqs626->trackpad, ABS_Y, 0, 255, 0, 0); 1460 1461 if ((sys_reg->active & tp_mask) == tp_mask) 1462 input_set_abs_params(iqs626->trackpad, 1463 ABS_X, 0, 255, 0, 0); 1464 else 1465 input_set_abs_params(iqs626->trackpad, 1466 ABS_X, 0, 128, 0, 0); 1467 1468 touchscreen_parse_properties(iqs626->trackpad, false, 1469 &iqs626->prop); 1470 } else { 1471 for (i = 0; i < IQS626_NUM_GESTURES; i++) 1472 if (iqs626->tp_code[i] != KEY_RESERVED) 1473 input_set_capability(iqs626->trackpad, EV_KEY, 1474 iqs626->tp_code[i]); 1475 } 1476 1477 error = input_register_device(iqs626->trackpad); 1478 if (error) 1479 dev_err(&client->dev, "Failed to register trackpad: %d\n", 1480 error); 1481 1482 return error; 1483 } 1484 1485 static int iqs626_report(struct iqs626_private *iqs626) 1486 { 1487 struct iqs626_sys_reg *sys_reg = &iqs626->sys_reg; 1488 struct i2c_client *client = iqs626->client; 1489 struct iqs626_flags flags; 1490 __le16 hall_output; 1491 int error, i, j; 1492 u8 state; 1493 u8 *dir_mask = &flags.states[IQS626_ST_OFFS_DIR]; 1494 1495 error = regmap_raw_read(iqs626->regmap, IQS626_SYS_FLAGS, &flags, 1496 sizeof(flags)); 1497 if (error) { 1498 dev_err(&client->dev, "Failed to read device status: %d\n", 1499 error); 1500 return error; 1501 } 1502 1503 /* 1504 * The device resets itself if its own watchdog bites, which can happen 1505 * in the event of an I2C communication error. In this case, the device 1506 * asserts a SHOW_RESET interrupt and all registers must be restored. 1507 */ 1508 if (be16_to_cpu(flags.system) & IQS626_SYS_FLAGS_SHOW_RESET) { 1509 dev_err(&client->dev, "Unexpected device reset\n"); 1510 1511 error = regmap_raw_write(iqs626->regmap, IQS626_SYS_SETTINGS, 1512 sys_reg, sizeof(*sys_reg)); 1513 if (error) 1514 dev_err(&client->dev, 1515 "Failed to re-initialize device: %d\n", error); 1516 1517 return error; 1518 } 1519 1520 if (be16_to_cpu(flags.system) & IQS626_SYS_FLAGS_IN_ATI) 1521 return 0; 1522 1523 /* 1524 * Unlike the ULP or generic channels, the Hall channel does not have a 1525 * direction flag. Instead, the direction (i.e. magnet polarity) can be 1526 * derived based on the sign of the 2's complement differential output. 1527 */ 1528 if (sys_reg->active & iqs626_channels[IQS626_CH_HALL].active) { 1529 error = regmap_raw_read(iqs626->regmap, IQS626_HALL_OUTPUT, 1530 &hall_output, sizeof(hall_output)); 1531 if (error) { 1532 dev_err(&client->dev, 1533 "Failed to read Hall output: %d\n", error); 1534 return error; 1535 } 1536 1537 *dir_mask &= ~iqs626_channels[IQS626_CH_HALL].active; 1538 if (le16_to_cpu(hall_output) < 0x8000) 1539 *dir_mask |= iqs626_channels[IQS626_CH_HALL].active; 1540 } 1541 1542 for (i = 0; i < ARRAY_SIZE(iqs626_channels); i++) { 1543 if (!(sys_reg->active & iqs626_channels[i].active)) 1544 continue; 1545 1546 for (j = 0; j < ARRAY_SIZE(iqs626_events); j++) { 1547 if (!iqs626->kp_type[i][j]) 1548 continue; 1549 1550 state = flags.states[iqs626_events[j].st_offs]; 1551 state &= iqs626_events[j].dir_up ? *dir_mask 1552 : ~(*dir_mask); 1553 state &= iqs626_channels[i].active; 1554 1555 input_event(iqs626->keypad, iqs626->kp_type[i][j], 1556 iqs626->kp_code[i][j], !!state); 1557 } 1558 } 1559 1560 input_sync(iqs626->keypad); 1561 1562 /* 1563 * The following completion signals that ATI has finished, any initial 1564 * switch states have been reported and the keypad can be registered. 1565 */ 1566 complete_all(&iqs626->ati_done); 1567 1568 if (!(sys_reg->active & iqs626_channels[IQS626_CH_TP_2].active)) 1569 return 0; 1570 1571 if (sys_reg->event_mask & IQS626_EVENT_MASK_GESTURE) { 1572 state = flags.states[IQS626_ST_OFFS_TOUCH]; 1573 state &= iqs626_channels[IQS626_CH_TP_2].active; 1574 1575 input_report_key(iqs626->trackpad, BTN_TOUCH, state); 1576 1577 if (state) 1578 touchscreen_report_pos(iqs626->trackpad, &iqs626->prop, 1579 flags.trackpad_x, 1580 flags.trackpad_y, false); 1581 } else { 1582 for (i = 0; i < IQS626_NUM_GESTURES; i++) 1583 input_report_key(iqs626->trackpad, iqs626->tp_code[i], 1584 flags.gesture & BIT(i)); 1585 1586 if (flags.gesture & GENMASK(IQS626_GESTURE_TAP, 0)) { 1587 input_sync(iqs626->trackpad); 1588 1589 /* 1590 * Momentary gestures are followed by a complementary 1591 * release cycle so as to emulate a full keystroke. 1592 */ 1593 for (i = 0; i < IQS626_GESTURE_HOLD; i++) 1594 input_report_key(iqs626->trackpad, 1595 iqs626->tp_code[i], 0); 1596 } 1597 } 1598 1599 input_sync(iqs626->trackpad); 1600 1601 return 0; 1602 } 1603 1604 static irqreturn_t iqs626_irq(int irq, void *context) 1605 { 1606 struct iqs626_private *iqs626 = context; 1607 1608 if (iqs626_report(iqs626)) 1609 return IRQ_NONE; 1610 1611 /* 1612 * The device does not deassert its interrupt (RDY) pin until shortly 1613 * after receiving an I2C stop condition; the following delay ensures 1614 * the interrupt handler does not return before this time. 1615 */ 1616 iqs626_irq_wait(); 1617 1618 return IRQ_HANDLED; 1619 } 1620 1621 static const struct regmap_config iqs626_regmap_config = { 1622 .reg_bits = 8, 1623 .val_bits = 16, 1624 .max_register = IQS626_MAX_REG, 1625 }; 1626 1627 static int iqs626_probe(struct i2c_client *client) 1628 { 1629 struct iqs626_ver_info ver_info; 1630 struct iqs626_private *iqs626; 1631 int error; 1632 1633 iqs626 = devm_kzalloc(&client->dev, sizeof(*iqs626), GFP_KERNEL); 1634 if (!iqs626) 1635 return -ENOMEM; 1636 1637 i2c_set_clientdata(client, iqs626); 1638 iqs626->client = client; 1639 1640 iqs626->regmap = devm_regmap_init_i2c(client, &iqs626_regmap_config); 1641 if (IS_ERR(iqs626->regmap)) { 1642 error = PTR_ERR(iqs626->regmap); 1643 dev_err(&client->dev, "Failed to initialize register map: %d\n", 1644 error); 1645 return error; 1646 } 1647 1648 init_completion(&iqs626->ati_done); 1649 1650 error = regmap_raw_read(iqs626->regmap, IQS626_VER_INFO, &ver_info, 1651 sizeof(ver_info)); 1652 if (error) 1653 return error; 1654 1655 if (ver_info.prod_num != IQS626_VER_INFO_PROD_NUM) { 1656 dev_err(&client->dev, "Unrecognized product number: 0x%02X\n", 1657 ver_info.prod_num); 1658 return -EINVAL; 1659 } 1660 1661 error = iqs626_parse_prop(iqs626); 1662 if (error) 1663 return error; 1664 1665 error = iqs626_input_init(iqs626); 1666 if (error) 1667 return error; 1668 1669 error = devm_request_threaded_irq(&client->dev, client->irq, 1670 NULL, iqs626_irq, IRQF_ONESHOT, 1671 client->name, iqs626); 1672 if (error) { 1673 dev_err(&client->dev, "Failed to request IRQ: %d\n", error); 1674 return error; 1675 } 1676 1677 if (!wait_for_completion_timeout(&iqs626->ati_done, 1678 msecs_to_jiffies(2000))) { 1679 dev_err(&client->dev, "Failed to complete ATI\n"); 1680 return -ETIMEDOUT; 1681 } 1682 1683 /* 1684 * The keypad may include one or more switches and is not registered 1685 * until ATI is complete and the initial switch states are read. 1686 */ 1687 error = input_register_device(iqs626->keypad); 1688 if (error) 1689 dev_err(&client->dev, "Failed to register keypad: %d\n", error); 1690 1691 return error; 1692 } 1693 1694 static int iqs626_suspend(struct device *dev) 1695 { 1696 struct iqs626_private *iqs626 = dev_get_drvdata(dev); 1697 struct i2c_client *client = iqs626->client; 1698 unsigned int val; 1699 int error; 1700 1701 if (!iqs626->suspend_mode) 1702 return 0; 1703 1704 disable_irq(client->irq); 1705 1706 /* 1707 * Automatic power mode switching must be disabled before the device is 1708 * forced into any particular power mode. In this case, the device will 1709 * transition into normal-power mode. 1710 */ 1711 error = regmap_update_bits(iqs626->regmap, IQS626_SYS_SETTINGS, 1712 IQS626_SYS_SETTINGS_DIS_AUTO, ~0); 1713 if (error) 1714 goto err_irq; 1715 1716 /* 1717 * The following check ensures the device has completed its transition 1718 * into normal-power mode before a manual mode switch is performed. 1719 */ 1720 error = regmap_read_poll_timeout(iqs626->regmap, IQS626_SYS_FLAGS, val, 1721 !(val & IQS626_SYS_FLAGS_PWR_MODE_MASK), 1722 IQS626_PWR_MODE_POLL_SLEEP_US, 1723 IQS626_PWR_MODE_POLL_TIMEOUT_US); 1724 if (error) 1725 goto err_irq; 1726 1727 error = regmap_update_bits(iqs626->regmap, IQS626_SYS_SETTINGS, 1728 IQS626_SYS_SETTINGS_PWR_MODE_MASK, 1729 iqs626->suspend_mode << 1730 IQS626_SYS_SETTINGS_PWR_MODE_SHIFT); 1731 if (error) 1732 goto err_irq; 1733 1734 /* 1735 * This last check ensures the device has completed its transition into 1736 * the desired power mode to prevent any spurious interrupts from being 1737 * triggered after iqs626_suspend has already returned. 1738 */ 1739 error = regmap_read_poll_timeout(iqs626->regmap, IQS626_SYS_FLAGS, val, 1740 (val & IQS626_SYS_FLAGS_PWR_MODE_MASK) 1741 == (iqs626->suspend_mode << 1742 IQS626_SYS_FLAGS_PWR_MODE_SHIFT), 1743 IQS626_PWR_MODE_POLL_SLEEP_US, 1744 IQS626_PWR_MODE_POLL_TIMEOUT_US); 1745 1746 err_irq: 1747 iqs626_irq_wait(); 1748 enable_irq(client->irq); 1749 1750 return error; 1751 } 1752 1753 static int iqs626_resume(struct device *dev) 1754 { 1755 struct iqs626_private *iqs626 = dev_get_drvdata(dev); 1756 struct i2c_client *client = iqs626->client; 1757 unsigned int val; 1758 int error; 1759 1760 if (!iqs626->suspend_mode) 1761 return 0; 1762 1763 disable_irq(client->irq); 1764 1765 error = regmap_update_bits(iqs626->regmap, IQS626_SYS_SETTINGS, 1766 IQS626_SYS_SETTINGS_PWR_MODE_MASK, 0); 1767 if (error) 1768 goto err_irq; 1769 1770 /* 1771 * This check ensures the device has returned to normal-power mode 1772 * before automatic power mode switching is re-enabled. 1773 */ 1774 error = regmap_read_poll_timeout(iqs626->regmap, IQS626_SYS_FLAGS, val, 1775 !(val & IQS626_SYS_FLAGS_PWR_MODE_MASK), 1776 IQS626_PWR_MODE_POLL_SLEEP_US, 1777 IQS626_PWR_MODE_POLL_TIMEOUT_US); 1778 if (error) 1779 goto err_irq; 1780 1781 error = regmap_update_bits(iqs626->regmap, IQS626_SYS_SETTINGS, 1782 IQS626_SYS_SETTINGS_DIS_AUTO, 0); 1783 if (error) 1784 goto err_irq; 1785 1786 /* 1787 * This step reports any events that may have been "swallowed" as a 1788 * result of polling PWR_MODE (which automatically acknowledges any 1789 * pending interrupts). 1790 */ 1791 error = iqs626_report(iqs626); 1792 1793 err_irq: 1794 iqs626_irq_wait(); 1795 enable_irq(client->irq); 1796 1797 return error; 1798 } 1799 1800 static DEFINE_SIMPLE_DEV_PM_OPS(iqs626_pm, iqs626_suspend, iqs626_resume); 1801 1802 static const struct of_device_id iqs626_of_match[] = { 1803 { .compatible = "azoteq,iqs626a" }, 1804 { } 1805 }; 1806 MODULE_DEVICE_TABLE(of, iqs626_of_match); 1807 1808 static struct i2c_driver iqs626_i2c_driver = { 1809 .driver = { 1810 .name = "iqs626a", 1811 .of_match_table = iqs626_of_match, 1812 .pm = pm_sleep_ptr(&iqs626_pm), 1813 }, 1814 .probe = iqs626_probe, 1815 }; 1816 module_i2c_driver(iqs626_i2c_driver); 1817 1818 MODULE_AUTHOR("Jeff LaBundy <jeff@labundy.com>"); 1819 MODULE_DESCRIPTION("Azoteq IQS626A Capacitive Touch Controller"); 1820 MODULE_LICENSE("GPL"); 1821