1 /* 2 * HP i8042 SDC + MSM-58321 BBRTC driver. 3 * 4 * Copyright (c) 2001 Brian S. Julin 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions, and the following disclaimer, 12 * without modification. 13 * 2. The name of the author may not be used to endorse or promote products 14 * derived from this software without specific prior written permission. 15 * 16 * Alternatively, this software may be distributed under the terms of the 17 * GNU General Public License ("GPL"). 18 * 19 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 20 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 21 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 22 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR 23 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 24 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 25 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 26 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 27 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 28 * 29 * References: 30 * System Device Controller Microprocessor Firmware Theory of Operation 31 * for Part Number 1820-4784 Revision B. Dwg No. A-1820-4784-2 32 * efirtc.c by Stephane Eranian/Hewlett Packard 33 * 34 */ 35 36 #include <linux/hp_sdc.h> 37 #include <linux/errno.h> 38 #include <linux/smp_lock.h> 39 #include <linux/types.h> 40 #include <linux/init.h> 41 #include <linux/module.h> 42 #include <linux/time.h> 43 #include <linux/miscdevice.h> 44 #include <linux/proc_fs.h> 45 #include <linux/poll.h> 46 #include <linux/rtc.h> 47 48 MODULE_AUTHOR("Brian S. Julin <bri@calyx.com>"); 49 MODULE_DESCRIPTION("HP i8042 SDC + MSM-58321 RTC Driver"); 50 MODULE_LICENSE("Dual BSD/GPL"); 51 52 #define RTC_VERSION "1.10d" 53 54 static unsigned long epoch = 2000; 55 56 static struct semaphore i8042tregs; 57 58 static hp_sdc_irqhook hp_sdc_rtc_isr; 59 60 static struct fasync_struct *hp_sdc_rtc_async_queue; 61 62 static DECLARE_WAIT_QUEUE_HEAD(hp_sdc_rtc_wait); 63 64 static ssize_t hp_sdc_rtc_read(struct file *file, char __user *buf, 65 size_t count, loff_t *ppos); 66 67 static int hp_sdc_rtc_ioctl(struct inode *inode, struct file *file, 68 unsigned int cmd, unsigned long arg); 69 70 static unsigned int hp_sdc_rtc_poll(struct file *file, poll_table *wait); 71 72 static int hp_sdc_rtc_open(struct inode *inode, struct file *file); 73 static int hp_sdc_rtc_release(struct inode *inode, struct file *file); 74 static int hp_sdc_rtc_fasync (int fd, struct file *filp, int on); 75 76 static int hp_sdc_rtc_read_proc(char *page, char **start, off_t off, 77 int count, int *eof, void *data); 78 79 static void hp_sdc_rtc_isr (int irq, void *dev_id, 80 uint8_t status, uint8_t data) 81 { 82 return; 83 } 84 85 static int hp_sdc_rtc_do_read_bbrtc (struct rtc_time *rtctm) 86 { 87 struct semaphore tsem; 88 hp_sdc_transaction t; 89 uint8_t tseq[91]; 90 int i; 91 92 i = 0; 93 while (i < 91) { 94 tseq[i++] = HP_SDC_ACT_DATAREG | 95 HP_SDC_ACT_POSTCMD | HP_SDC_ACT_DATAIN; 96 tseq[i++] = 0x01; /* write i8042[0x70] */ 97 tseq[i] = i / 7; /* BBRTC reg address */ 98 i++; 99 tseq[i++] = HP_SDC_CMD_DO_RTCR; /* Trigger command */ 100 tseq[i++] = 2; /* expect 1 stat/dat pair back. */ 101 i++; i++; /* buffer for stat/dat pair */ 102 } 103 tseq[84] |= HP_SDC_ACT_SEMAPHORE; 104 t.endidx = 91; 105 t.seq = tseq; 106 t.act.semaphore = &tsem; 107 init_MUTEX_LOCKED(&tsem); 108 109 if (hp_sdc_enqueue_transaction(&t)) return -1; 110 111 down_interruptible(&tsem); /* Put ourselves to sleep for results. */ 112 113 /* Check for nonpresence of BBRTC */ 114 if (!((tseq[83] | tseq[90] | tseq[69] | tseq[76] | 115 tseq[55] | tseq[62] | tseq[34] | tseq[41] | 116 tseq[20] | tseq[27] | tseq[6] | tseq[13]) & 0x0f)) 117 return -1; 118 119 memset(rtctm, 0, sizeof(struct rtc_time)); 120 rtctm->tm_year = (tseq[83] & 0x0f) + (tseq[90] & 0x0f) * 10; 121 rtctm->tm_mon = (tseq[69] & 0x0f) + (tseq[76] & 0x0f) * 10; 122 rtctm->tm_mday = (tseq[55] & 0x0f) + (tseq[62] & 0x0f) * 10; 123 rtctm->tm_wday = (tseq[48] & 0x0f); 124 rtctm->tm_hour = (tseq[34] & 0x0f) + (tseq[41] & 0x0f) * 10; 125 rtctm->tm_min = (tseq[20] & 0x0f) + (tseq[27] & 0x0f) * 10; 126 rtctm->tm_sec = (tseq[6] & 0x0f) + (tseq[13] & 0x0f) * 10; 127 128 return 0; 129 } 130 131 static int hp_sdc_rtc_read_bbrtc (struct rtc_time *rtctm) 132 { 133 struct rtc_time tm, tm_last; 134 int i = 0; 135 136 /* MSM-58321 has no read latch, so must read twice and compare. */ 137 138 if (hp_sdc_rtc_do_read_bbrtc(&tm_last)) return -1; 139 if (hp_sdc_rtc_do_read_bbrtc(&tm)) return -1; 140 141 while (memcmp(&tm, &tm_last, sizeof(struct rtc_time))) { 142 if (i++ > 4) return -1; 143 memcpy(&tm_last, &tm, sizeof(struct rtc_time)); 144 if (hp_sdc_rtc_do_read_bbrtc(&tm)) return -1; 145 } 146 147 memcpy(rtctm, &tm, sizeof(struct rtc_time)); 148 149 return 0; 150 } 151 152 153 static int64_t hp_sdc_rtc_read_i8042timer (uint8_t loadcmd, int numreg) 154 { 155 hp_sdc_transaction t; 156 uint8_t tseq[26] = { 157 HP_SDC_ACT_PRECMD | HP_SDC_ACT_POSTCMD | HP_SDC_ACT_DATAIN, 158 0, 159 HP_SDC_CMD_READ_T1, 2, 0, 0, 160 HP_SDC_ACT_POSTCMD | HP_SDC_ACT_DATAIN, 161 HP_SDC_CMD_READ_T2, 2, 0, 0, 162 HP_SDC_ACT_POSTCMD | HP_SDC_ACT_DATAIN, 163 HP_SDC_CMD_READ_T3, 2, 0, 0, 164 HP_SDC_ACT_POSTCMD | HP_SDC_ACT_DATAIN, 165 HP_SDC_CMD_READ_T4, 2, 0, 0, 166 HP_SDC_ACT_POSTCMD | HP_SDC_ACT_DATAIN, 167 HP_SDC_CMD_READ_T5, 2, 0, 0 168 }; 169 170 t.endidx = numreg * 5; 171 172 tseq[1] = loadcmd; 173 tseq[t.endidx - 4] |= HP_SDC_ACT_SEMAPHORE; /* numreg assumed > 1 */ 174 175 t.seq = tseq; 176 t.act.semaphore = &i8042tregs; 177 178 down_interruptible(&i8042tregs); /* Sleep if output regs in use. */ 179 180 if (hp_sdc_enqueue_transaction(&t)) return -1; 181 182 down_interruptible(&i8042tregs); /* Sleep until results come back. */ 183 up(&i8042tregs); 184 185 return (tseq[5] | 186 ((uint64_t)(tseq[10]) << 8) | ((uint64_t)(tseq[15]) << 16) | 187 ((uint64_t)(tseq[20]) << 24) | ((uint64_t)(tseq[25]) << 32)); 188 } 189 190 191 /* Read the i8042 real-time clock */ 192 static inline int hp_sdc_rtc_read_rt(struct timeval *res) { 193 int64_t raw; 194 uint32_t tenms; 195 unsigned int days; 196 197 raw = hp_sdc_rtc_read_i8042timer(HP_SDC_CMD_LOAD_RT, 5); 198 if (raw < 0) return -1; 199 200 tenms = (uint32_t)raw & 0xffffff; 201 days = (unsigned int)(raw >> 24) & 0xffff; 202 203 res->tv_usec = (suseconds_t)(tenms % 100) * 10000; 204 res->tv_sec = (time_t)(tenms / 100) + days * 86400; 205 206 return 0; 207 } 208 209 210 /* Read the i8042 fast handshake timer */ 211 static inline int hp_sdc_rtc_read_fhs(struct timeval *res) { 212 uint64_t raw; 213 unsigned int tenms; 214 215 raw = hp_sdc_rtc_read_i8042timer(HP_SDC_CMD_LOAD_FHS, 2); 216 if (raw < 0) return -1; 217 218 tenms = (unsigned int)raw & 0xffff; 219 220 res->tv_usec = (suseconds_t)(tenms % 100) * 10000; 221 res->tv_sec = (time_t)(tenms / 100); 222 223 return 0; 224 } 225 226 227 /* Read the i8042 match timer (a.k.a. alarm) */ 228 static inline int hp_sdc_rtc_read_mt(struct timeval *res) { 229 int64_t raw; 230 uint32_t tenms; 231 232 raw = hp_sdc_rtc_read_i8042timer(HP_SDC_CMD_LOAD_MT, 3); 233 if (raw < 0) return -1; 234 235 tenms = (uint32_t)raw & 0xffffff; 236 237 res->tv_usec = (suseconds_t)(tenms % 100) * 10000; 238 res->tv_sec = (time_t)(tenms / 100); 239 240 return 0; 241 } 242 243 244 /* Read the i8042 delay timer */ 245 static inline int hp_sdc_rtc_read_dt(struct timeval *res) { 246 int64_t raw; 247 uint32_t tenms; 248 249 raw = hp_sdc_rtc_read_i8042timer(HP_SDC_CMD_LOAD_DT, 3); 250 if (raw < 0) return -1; 251 252 tenms = (uint32_t)raw & 0xffffff; 253 254 res->tv_usec = (suseconds_t)(tenms % 100) * 10000; 255 res->tv_sec = (time_t)(tenms / 100); 256 257 return 0; 258 } 259 260 261 /* Read the i8042 cycle timer (a.k.a. periodic) */ 262 static inline int hp_sdc_rtc_read_ct(struct timeval *res) { 263 int64_t raw; 264 uint32_t tenms; 265 266 raw = hp_sdc_rtc_read_i8042timer(HP_SDC_CMD_LOAD_CT, 3); 267 if (raw < 0) return -1; 268 269 tenms = (uint32_t)raw & 0xffffff; 270 271 res->tv_usec = (suseconds_t)(tenms % 100) * 10000; 272 res->tv_sec = (time_t)(tenms / 100); 273 274 return 0; 275 } 276 277 278 /* Set the i8042 real-time clock */ 279 static int hp_sdc_rtc_set_rt (struct timeval *setto) 280 { 281 uint32_t tenms; 282 unsigned int days; 283 hp_sdc_transaction t; 284 uint8_t tseq[11] = { 285 HP_SDC_ACT_PRECMD | HP_SDC_ACT_DATAOUT, 286 HP_SDC_CMD_SET_RTMS, 3, 0, 0, 0, 287 HP_SDC_ACT_PRECMD | HP_SDC_ACT_DATAOUT, 288 HP_SDC_CMD_SET_RTD, 2, 0, 0 289 }; 290 291 t.endidx = 10; 292 293 if (0xffff < setto->tv_sec / 86400) return -1; 294 days = setto->tv_sec / 86400; 295 if (0xffff < setto->tv_usec / 1000000 / 86400) return -1; 296 days += ((setto->tv_sec % 86400) + setto->tv_usec / 1000000) / 86400; 297 if (days > 0xffff) return -1; 298 299 if (0xffffff < setto->tv_sec) return -1; 300 tenms = setto->tv_sec * 100; 301 if (0xffffff < setto->tv_usec / 10000) return -1; 302 tenms += setto->tv_usec / 10000; 303 if (tenms > 0xffffff) return -1; 304 305 tseq[3] = (uint8_t)(tenms & 0xff); 306 tseq[4] = (uint8_t)((tenms >> 8) & 0xff); 307 tseq[5] = (uint8_t)((tenms >> 16) & 0xff); 308 309 tseq[9] = (uint8_t)(days & 0xff); 310 tseq[10] = (uint8_t)((days >> 8) & 0xff); 311 312 t.seq = tseq; 313 314 if (hp_sdc_enqueue_transaction(&t)) return -1; 315 return 0; 316 } 317 318 /* Set the i8042 fast handshake timer */ 319 static int hp_sdc_rtc_set_fhs (struct timeval *setto) 320 { 321 uint32_t tenms; 322 hp_sdc_transaction t; 323 uint8_t tseq[5] = { 324 HP_SDC_ACT_PRECMD | HP_SDC_ACT_DATAOUT, 325 HP_SDC_CMD_SET_FHS, 2, 0, 0 326 }; 327 328 t.endidx = 4; 329 330 if (0xffff < setto->tv_sec) return -1; 331 tenms = setto->tv_sec * 100; 332 if (0xffff < setto->tv_usec / 10000) return -1; 333 tenms += setto->tv_usec / 10000; 334 if (tenms > 0xffff) return -1; 335 336 tseq[3] = (uint8_t)(tenms & 0xff); 337 tseq[4] = (uint8_t)((tenms >> 8) & 0xff); 338 339 t.seq = tseq; 340 341 if (hp_sdc_enqueue_transaction(&t)) return -1; 342 return 0; 343 } 344 345 346 /* Set the i8042 match timer (a.k.a. alarm) */ 347 #define hp_sdc_rtc_set_mt (setto) \ 348 hp_sdc_rtc_set_i8042timer(setto, HP_SDC_CMD_SET_MT) 349 350 /* Set the i8042 delay timer */ 351 #define hp_sdc_rtc_set_dt (setto) \ 352 hp_sdc_rtc_set_i8042timer(setto, HP_SDC_CMD_SET_DT) 353 354 /* Set the i8042 cycle timer (a.k.a. periodic) */ 355 #define hp_sdc_rtc_set_ct (setto) \ 356 hp_sdc_rtc_set_i8042timer(setto, HP_SDC_CMD_SET_CT) 357 358 /* Set one of the i8042 3-byte wide timers */ 359 static int hp_sdc_rtc_set_i8042timer (struct timeval *setto, uint8_t setcmd) 360 { 361 uint32_t tenms; 362 hp_sdc_transaction t; 363 uint8_t tseq[6] = { 364 HP_SDC_ACT_PRECMD | HP_SDC_ACT_DATAOUT, 365 0, 3, 0, 0, 0 366 }; 367 368 t.endidx = 6; 369 370 if (0xffffff < setto->tv_sec) return -1; 371 tenms = setto->tv_sec * 100; 372 if (0xffffff < setto->tv_usec / 10000) return -1; 373 tenms += setto->tv_usec / 10000; 374 if (tenms > 0xffffff) return -1; 375 376 tseq[1] = setcmd; 377 tseq[3] = (uint8_t)(tenms & 0xff); 378 tseq[4] = (uint8_t)((tenms >> 8) & 0xff); 379 tseq[5] = (uint8_t)((tenms >> 16) & 0xff); 380 381 t.seq = tseq; 382 383 if (hp_sdc_enqueue_transaction(&t)) { 384 return -1; 385 } 386 return 0; 387 } 388 389 static ssize_t hp_sdc_rtc_read(struct file *file, char __user *buf, 390 size_t count, loff_t *ppos) { 391 ssize_t retval; 392 393 if (count < sizeof(unsigned long)) 394 return -EINVAL; 395 396 retval = put_user(68, (unsigned long __user *)buf); 397 return retval; 398 } 399 400 static unsigned int hp_sdc_rtc_poll(struct file *file, poll_table *wait) 401 { 402 unsigned long l; 403 404 l = 0; 405 if (l != 0) 406 return POLLIN | POLLRDNORM; 407 return 0; 408 } 409 410 static int hp_sdc_rtc_open(struct inode *inode, struct file *file) 411 { 412 cycle_kernel_lock(); 413 return 0; 414 } 415 416 static int hp_sdc_rtc_release(struct inode *inode, struct file *file) 417 { 418 /* Turn off interrupts? */ 419 420 if (file->f_flags & FASYNC) { 421 hp_sdc_rtc_fasync (-1, file, 0); 422 } 423 424 return 0; 425 } 426 427 static int hp_sdc_rtc_fasync (int fd, struct file *filp, int on) 428 { 429 return fasync_helper (fd, filp, on, &hp_sdc_rtc_async_queue); 430 } 431 432 static int hp_sdc_rtc_proc_output (char *buf) 433 { 434 #define YN(bit) ("no") 435 #define NY(bit) ("yes") 436 char *p; 437 struct rtc_time tm; 438 struct timeval tv; 439 440 memset(&tm, 0, sizeof(struct rtc_time)); 441 442 p = buf; 443 444 if (hp_sdc_rtc_read_bbrtc(&tm)) { 445 p += sprintf(p, "BBRTC\t\t: READ FAILED!\n"); 446 } else { 447 p += sprintf(p, 448 "rtc_time\t: %02d:%02d:%02d\n" 449 "rtc_date\t: %04d-%02d-%02d\n" 450 "rtc_epoch\t: %04lu\n", 451 tm.tm_hour, tm.tm_min, tm.tm_sec, 452 tm.tm_year + 1900, tm.tm_mon + 1, 453 tm.tm_mday, epoch); 454 } 455 456 if (hp_sdc_rtc_read_rt(&tv)) { 457 p += sprintf(p, "i8042 rtc\t: READ FAILED!\n"); 458 } else { 459 p += sprintf(p, "i8042 rtc\t: %ld.%02d seconds\n", 460 tv.tv_sec, tv.tv_usec/1000); 461 } 462 463 if (hp_sdc_rtc_read_fhs(&tv)) { 464 p += sprintf(p, "handshake\t: READ FAILED!\n"); 465 } else { 466 p += sprintf(p, "handshake\t: %ld.%02d seconds\n", 467 tv.tv_sec, tv.tv_usec/1000); 468 } 469 470 if (hp_sdc_rtc_read_mt(&tv)) { 471 p += sprintf(p, "alarm\t\t: READ FAILED!\n"); 472 } else { 473 p += sprintf(p, "alarm\t\t: %ld.%02d seconds\n", 474 tv.tv_sec, tv.tv_usec/1000); 475 } 476 477 if (hp_sdc_rtc_read_dt(&tv)) { 478 p += sprintf(p, "delay\t\t: READ FAILED!\n"); 479 } else { 480 p += sprintf(p, "delay\t\t: %ld.%02d seconds\n", 481 tv.tv_sec, tv.tv_usec/1000); 482 } 483 484 if (hp_sdc_rtc_read_ct(&tv)) { 485 p += sprintf(p, "periodic\t: READ FAILED!\n"); 486 } else { 487 p += sprintf(p, "periodic\t: %ld.%02d seconds\n", 488 tv.tv_sec, tv.tv_usec/1000); 489 } 490 491 p += sprintf(p, 492 "DST_enable\t: %s\n" 493 "BCD\t\t: %s\n" 494 "24hr\t\t: %s\n" 495 "square_wave\t: %s\n" 496 "alarm_IRQ\t: %s\n" 497 "update_IRQ\t: %s\n" 498 "periodic_IRQ\t: %s\n" 499 "periodic_freq\t: %ld\n" 500 "batt_status\t: %s\n", 501 YN(RTC_DST_EN), 502 NY(RTC_DM_BINARY), 503 YN(RTC_24H), 504 YN(RTC_SQWE), 505 YN(RTC_AIE), 506 YN(RTC_UIE), 507 YN(RTC_PIE), 508 1UL, 509 1 ? "okay" : "dead"); 510 511 return p - buf; 512 #undef YN 513 #undef NY 514 } 515 516 static int hp_sdc_rtc_read_proc(char *page, char **start, off_t off, 517 int count, int *eof, void *data) 518 { 519 int len = hp_sdc_rtc_proc_output (page); 520 if (len <= off+count) *eof = 1; 521 *start = page + off; 522 len -= off; 523 if (len>count) len = count; 524 if (len<0) len = 0; 525 return len; 526 } 527 528 static int hp_sdc_rtc_ioctl(struct inode *inode, struct file *file, 529 unsigned int cmd, unsigned long arg) 530 { 531 #if 1 532 return -EINVAL; 533 #else 534 535 struct rtc_time wtime; 536 struct timeval ttime; 537 int use_wtime = 0; 538 539 /* This needs major work. */ 540 541 switch (cmd) { 542 543 case RTC_AIE_OFF: /* Mask alarm int. enab. bit */ 544 case RTC_AIE_ON: /* Allow alarm interrupts. */ 545 case RTC_PIE_OFF: /* Mask periodic int. enab. bit */ 546 case RTC_PIE_ON: /* Allow periodic ints */ 547 case RTC_UIE_ON: /* Allow ints for RTC updates. */ 548 case RTC_UIE_OFF: /* Allow ints for RTC updates. */ 549 { 550 /* We cannot mask individual user timers and we 551 cannot tell them apart when they occur, so it 552 would be disingenuous to succeed these IOCTLs */ 553 return -EINVAL; 554 } 555 case RTC_ALM_READ: /* Read the present alarm time */ 556 { 557 if (hp_sdc_rtc_read_mt(&ttime)) return -EFAULT; 558 if (hp_sdc_rtc_read_bbrtc(&wtime)) return -EFAULT; 559 560 wtime.tm_hour = ttime.tv_sec / 3600; ttime.tv_sec %= 3600; 561 wtime.tm_min = ttime.tv_sec / 60; ttime.tv_sec %= 60; 562 wtime.tm_sec = ttime.tv_sec; 563 564 break; 565 } 566 case RTC_IRQP_READ: /* Read the periodic IRQ rate. */ 567 { 568 return put_user(hp_sdc_rtc_freq, (unsigned long *)arg); 569 } 570 case RTC_IRQP_SET: /* Set periodic IRQ rate. */ 571 { 572 /* 573 * The max we can do is 100Hz. 574 */ 575 576 if ((arg < 1) || (arg > 100)) return -EINVAL; 577 ttime.tv_sec = 0; 578 ttime.tv_usec = 1000000 / arg; 579 if (hp_sdc_rtc_set_ct(&ttime)) return -EFAULT; 580 hp_sdc_rtc_freq = arg; 581 return 0; 582 } 583 case RTC_ALM_SET: /* Store a time into the alarm */ 584 { 585 /* 586 * This expects a struct hp_sdc_rtc_time. Writing 0xff means 587 * "don't care" or "match all" for PC timers. The HP SDC 588 * does not support that perk, but it could be emulated fairly 589 * easily. Only the tm_hour, tm_min and tm_sec are used. 590 * We could do it with 10ms accuracy with the HP SDC, if the 591 * rtc interface left us a way to do that. 592 */ 593 struct hp_sdc_rtc_time alm_tm; 594 595 if (copy_from_user(&alm_tm, (struct hp_sdc_rtc_time*)arg, 596 sizeof(struct hp_sdc_rtc_time))) 597 return -EFAULT; 598 599 if (alm_tm.tm_hour > 23) return -EINVAL; 600 if (alm_tm.tm_min > 59) return -EINVAL; 601 if (alm_tm.tm_sec > 59) return -EINVAL; 602 603 ttime.sec = alm_tm.tm_hour * 3600 + 604 alm_tm.tm_min * 60 + alm_tm.tm_sec; 605 ttime.usec = 0; 606 if (hp_sdc_rtc_set_mt(&ttime)) return -EFAULT; 607 return 0; 608 } 609 case RTC_RD_TIME: /* Read the time/date from RTC */ 610 { 611 if (hp_sdc_rtc_read_bbrtc(&wtime)) return -EFAULT; 612 break; 613 } 614 case RTC_SET_TIME: /* Set the RTC */ 615 { 616 struct rtc_time hp_sdc_rtc_tm; 617 unsigned char mon, day, hrs, min, sec, leap_yr; 618 unsigned int yrs; 619 620 if (!capable(CAP_SYS_TIME)) 621 return -EACCES; 622 if (copy_from_user(&hp_sdc_rtc_tm, (struct rtc_time *)arg, 623 sizeof(struct rtc_time))) 624 return -EFAULT; 625 626 yrs = hp_sdc_rtc_tm.tm_year + 1900; 627 mon = hp_sdc_rtc_tm.tm_mon + 1; /* tm_mon starts at zero */ 628 day = hp_sdc_rtc_tm.tm_mday; 629 hrs = hp_sdc_rtc_tm.tm_hour; 630 min = hp_sdc_rtc_tm.tm_min; 631 sec = hp_sdc_rtc_tm.tm_sec; 632 633 if (yrs < 1970) 634 return -EINVAL; 635 636 leap_yr = ((!(yrs % 4) && (yrs % 100)) || !(yrs % 400)); 637 638 if ((mon > 12) || (day == 0)) 639 return -EINVAL; 640 if (day > (days_in_mo[mon] + ((mon == 2) && leap_yr))) 641 return -EINVAL; 642 if ((hrs >= 24) || (min >= 60) || (sec >= 60)) 643 return -EINVAL; 644 645 if ((yrs -= eH) > 255) /* They are unsigned */ 646 return -EINVAL; 647 648 649 return 0; 650 } 651 case RTC_EPOCH_READ: /* Read the epoch. */ 652 { 653 return put_user (epoch, (unsigned long *)arg); 654 } 655 case RTC_EPOCH_SET: /* Set the epoch. */ 656 { 657 /* 658 * There were no RTC clocks before 1900. 659 */ 660 if (arg < 1900) 661 return -EINVAL; 662 if (!capable(CAP_SYS_TIME)) 663 return -EACCES; 664 665 epoch = arg; 666 return 0; 667 } 668 default: 669 return -EINVAL; 670 } 671 return copy_to_user((void *)arg, &wtime, sizeof wtime) ? -EFAULT : 0; 672 #endif 673 } 674 675 static const struct file_operations hp_sdc_rtc_fops = { 676 .owner = THIS_MODULE, 677 .llseek = no_llseek, 678 .read = hp_sdc_rtc_read, 679 .poll = hp_sdc_rtc_poll, 680 .ioctl = hp_sdc_rtc_ioctl, 681 .open = hp_sdc_rtc_open, 682 .release = hp_sdc_rtc_release, 683 .fasync = hp_sdc_rtc_fasync, 684 }; 685 686 static struct miscdevice hp_sdc_rtc_dev = { 687 .minor = RTC_MINOR, 688 .name = "rtc_HIL", 689 .fops = &hp_sdc_rtc_fops 690 }; 691 692 static int __init hp_sdc_rtc_init(void) 693 { 694 int ret; 695 696 #ifdef __mc68000__ 697 if (!MACH_IS_HP300) 698 return -ENODEV; 699 #endif 700 701 init_MUTEX(&i8042tregs); 702 703 if ((ret = hp_sdc_request_timer_irq(&hp_sdc_rtc_isr))) 704 return ret; 705 if (misc_register(&hp_sdc_rtc_dev) != 0) 706 printk(KERN_INFO "Could not register misc. dev for i8042 rtc\n"); 707 708 create_proc_read_entry ("driver/rtc", 0, NULL, 709 hp_sdc_rtc_read_proc, NULL); 710 711 printk(KERN_INFO "HP i8042 SDC + MSM-58321 RTC support loaded " 712 "(RTC v " RTC_VERSION ")\n"); 713 714 return 0; 715 } 716 717 static void __exit hp_sdc_rtc_exit(void) 718 { 719 remove_proc_entry ("driver/rtc", NULL); 720 misc_deregister(&hp_sdc_rtc_dev); 721 hp_sdc_release_timer_irq(hp_sdc_rtc_isr); 722 printk(KERN_INFO "HP i8042 SDC + MSM-58321 RTC support unloaded\n"); 723 } 724 725 module_init(hp_sdc_rtc_init); 726 module_exit(hp_sdc_rtc_exit); 727