1 /* 2 * Keyboard class input driver for the NVIDIA Tegra SoC internal matrix 3 * keyboard controller 4 * 5 * Copyright (c) 2009-2011, NVIDIA Corporation. 6 * 7 * This program is free software; you can redistribute it and/or modify 8 * it under the terms of the GNU General Public License as published by 9 * the Free Software Foundation; either version 2 of the License, or 10 * (at your option) any later version. 11 * 12 * This program is distributed in the hope that it will be useful, but WITHOUT 13 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 14 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for 15 * more details. 16 * 17 * You should have received a copy of the GNU General Public License along 18 * with this program; if not, write to the Free Software Foundation, Inc., 19 * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA. 20 */ 21 22 #include <linux/kernel.h> 23 #include <linux/module.h> 24 #include <linux/input.h> 25 #include <linux/platform_device.h> 26 #include <linux/delay.h> 27 #include <linux/io.h> 28 #include <linux/interrupt.h> 29 #include <linux/of.h> 30 #include <linux/clk.h> 31 #include <linux/slab.h> 32 #include <mach/clk.h> 33 #include <mach/kbc.h> 34 35 #define KBC_MAX_DEBOUNCE_CNT 0x3ffu 36 37 /* KBC row scan time and delay for beginning the row scan. */ 38 #define KBC_ROW_SCAN_TIME 16 39 #define KBC_ROW_SCAN_DLY 5 40 41 /* KBC uses a 32KHz clock so a cycle = 1/32Khz */ 42 #define KBC_CYCLE_MS 32 43 44 /* KBC Registers */ 45 46 /* KBC Control Register */ 47 #define KBC_CONTROL_0 0x0 48 #define KBC_FIFO_TH_CNT_SHIFT(cnt) (cnt << 14) 49 #define KBC_DEBOUNCE_CNT_SHIFT(cnt) (cnt << 4) 50 #define KBC_CONTROL_FIFO_CNT_INT_EN (1 << 3) 51 #define KBC_CONTROL_KBC_EN (1 << 0) 52 53 /* KBC Interrupt Register */ 54 #define KBC_INT_0 0x4 55 #define KBC_INT_FIFO_CNT_INT_STATUS (1 << 2) 56 #define KBC_INT_KEYPRESS_INT_STATUS (1 << 0) 57 58 #define KBC_ROW_CFG0_0 0x8 59 #define KBC_COL_CFG0_0 0x18 60 #define KBC_TO_CNT_0 0x24 61 #define KBC_INIT_DLY_0 0x28 62 #define KBC_RPT_DLY_0 0x2c 63 #define KBC_KP_ENT0_0 0x30 64 #define KBC_KP_ENT1_0 0x34 65 #define KBC_ROW0_MASK_0 0x38 66 67 #define KBC_ROW_SHIFT 3 68 69 struct tegra_kbc { 70 void __iomem *mmio; 71 struct input_dev *idev; 72 unsigned int irq; 73 spinlock_t lock; 74 unsigned int repoll_dly; 75 unsigned long cp_dly_jiffies; 76 unsigned int cp_to_wkup_dly; 77 bool use_fn_map; 78 bool use_ghost_filter; 79 bool keypress_caused_wake; 80 const struct tegra_kbc_platform_data *pdata; 81 unsigned short keycode[KBC_MAX_KEY * 2]; 82 unsigned short current_keys[KBC_MAX_KPENT]; 83 unsigned int num_pressed_keys; 84 u32 wakeup_key; 85 struct timer_list timer; 86 struct clk *clk; 87 }; 88 89 static const u32 tegra_kbc_default_keymap[] __devinitdata = { 90 KEY(0, 2, KEY_W), 91 KEY(0, 3, KEY_S), 92 KEY(0, 4, KEY_A), 93 KEY(0, 5, KEY_Z), 94 KEY(0, 7, KEY_FN), 95 96 KEY(1, 7, KEY_LEFTMETA), 97 98 KEY(2, 6, KEY_RIGHTALT), 99 KEY(2, 7, KEY_LEFTALT), 100 101 KEY(3, 0, KEY_5), 102 KEY(3, 1, KEY_4), 103 KEY(3, 2, KEY_R), 104 KEY(3, 3, KEY_E), 105 KEY(3, 4, KEY_F), 106 KEY(3, 5, KEY_D), 107 KEY(3, 6, KEY_X), 108 109 KEY(4, 0, KEY_7), 110 KEY(4, 1, KEY_6), 111 KEY(4, 2, KEY_T), 112 KEY(4, 3, KEY_H), 113 KEY(4, 4, KEY_G), 114 KEY(4, 5, KEY_V), 115 KEY(4, 6, KEY_C), 116 KEY(4, 7, KEY_SPACE), 117 118 KEY(5, 0, KEY_9), 119 KEY(5, 1, KEY_8), 120 KEY(5, 2, KEY_U), 121 KEY(5, 3, KEY_Y), 122 KEY(5, 4, KEY_J), 123 KEY(5, 5, KEY_N), 124 KEY(5, 6, KEY_B), 125 KEY(5, 7, KEY_BACKSLASH), 126 127 KEY(6, 0, KEY_MINUS), 128 KEY(6, 1, KEY_0), 129 KEY(6, 2, KEY_O), 130 KEY(6, 3, KEY_I), 131 KEY(6, 4, KEY_L), 132 KEY(6, 5, KEY_K), 133 KEY(6, 6, KEY_COMMA), 134 KEY(6, 7, KEY_M), 135 136 KEY(7, 1, KEY_EQUAL), 137 KEY(7, 2, KEY_RIGHTBRACE), 138 KEY(7, 3, KEY_ENTER), 139 KEY(7, 7, KEY_MENU), 140 141 KEY(8, 4, KEY_RIGHTSHIFT), 142 KEY(8, 5, KEY_LEFTSHIFT), 143 144 KEY(9, 5, KEY_RIGHTCTRL), 145 KEY(9, 7, KEY_LEFTCTRL), 146 147 KEY(11, 0, KEY_LEFTBRACE), 148 KEY(11, 1, KEY_P), 149 KEY(11, 2, KEY_APOSTROPHE), 150 KEY(11, 3, KEY_SEMICOLON), 151 KEY(11, 4, KEY_SLASH), 152 KEY(11, 5, KEY_DOT), 153 154 KEY(12, 0, KEY_F10), 155 KEY(12, 1, KEY_F9), 156 KEY(12, 2, KEY_BACKSPACE), 157 KEY(12, 3, KEY_3), 158 KEY(12, 4, KEY_2), 159 KEY(12, 5, KEY_UP), 160 KEY(12, 6, KEY_PRINT), 161 KEY(12, 7, KEY_PAUSE), 162 163 KEY(13, 0, KEY_INSERT), 164 KEY(13, 1, KEY_DELETE), 165 KEY(13, 3, KEY_PAGEUP), 166 KEY(13, 4, KEY_PAGEDOWN), 167 KEY(13, 5, KEY_RIGHT), 168 KEY(13, 6, KEY_DOWN), 169 KEY(13, 7, KEY_LEFT), 170 171 KEY(14, 0, KEY_F11), 172 KEY(14, 1, KEY_F12), 173 KEY(14, 2, KEY_F8), 174 KEY(14, 3, KEY_Q), 175 KEY(14, 4, KEY_F4), 176 KEY(14, 5, KEY_F3), 177 KEY(14, 6, KEY_1), 178 KEY(14, 7, KEY_F7), 179 180 KEY(15, 0, KEY_ESC), 181 KEY(15, 1, KEY_GRAVE), 182 KEY(15, 2, KEY_F5), 183 KEY(15, 3, KEY_TAB), 184 KEY(15, 4, KEY_F1), 185 KEY(15, 5, KEY_F2), 186 KEY(15, 6, KEY_CAPSLOCK), 187 KEY(15, 7, KEY_F6), 188 189 /* Software Handled Function Keys */ 190 KEY(20, 0, KEY_KP7), 191 192 KEY(21, 0, KEY_KP9), 193 KEY(21, 1, KEY_KP8), 194 KEY(21, 2, KEY_KP4), 195 KEY(21, 4, KEY_KP1), 196 197 KEY(22, 1, KEY_KPSLASH), 198 KEY(22, 2, KEY_KP6), 199 KEY(22, 3, KEY_KP5), 200 KEY(22, 4, KEY_KP3), 201 KEY(22, 5, KEY_KP2), 202 KEY(22, 7, KEY_KP0), 203 204 KEY(27, 1, KEY_KPASTERISK), 205 KEY(27, 3, KEY_KPMINUS), 206 KEY(27, 4, KEY_KPPLUS), 207 KEY(27, 5, KEY_KPDOT), 208 209 KEY(28, 5, KEY_VOLUMEUP), 210 211 KEY(29, 3, KEY_HOME), 212 KEY(29, 4, KEY_END), 213 KEY(29, 5, KEY_BRIGHTNESSDOWN), 214 KEY(29, 6, KEY_VOLUMEDOWN), 215 KEY(29, 7, KEY_BRIGHTNESSUP), 216 217 KEY(30, 0, KEY_NUMLOCK), 218 KEY(30, 1, KEY_SCROLLLOCK), 219 KEY(30, 2, KEY_MUTE), 220 221 KEY(31, 4, KEY_HELP), 222 }; 223 224 static const 225 struct matrix_keymap_data tegra_kbc_default_keymap_data __devinitdata = { 226 .keymap = tegra_kbc_default_keymap, 227 .keymap_size = ARRAY_SIZE(tegra_kbc_default_keymap), 228 }; 229 230 static void tegra_kbc_report_released_keys(struct input_dev *input, 231 unsigned short old_keycodes[], 232 unsigned int old_num_keys, 233 unsigned short new_keycodes[], 234 unsigned int new_num_keys) 235 { 236 unsigned int i, j; 237 238 for (i = 0; i < old_num_keys; i++) { 239 for (j = 0; j < new_num_keys; j++) 240 if (old_keycodes[i] == new_keycodes[j]) 241 break; 242 243 if (j == new_num_keys) 244 input_report_key(input, old_keycodes[i], 0); 245 } 246 } 247 248 static void tegra_kbc_report_pressed_keys(struct input_dev *input, 249 unsigned char scancodes[], 250 unsigned short keycodes[], 251 unsigned int num_pressed_keys) 252 { 253 unsigned int i; 254 255 for (i = 0; i < num_pressed_keys; i++) { 256 input_event(input, EV_MSC, MSC_SCAN, scancodes[i]); 257 input_report_key(input, keycodes[i], 1); 258 } 259 } 260 261 static void tegra_kbc_report_keys(struct tegra_kbc *kbc) 262 { 263 unsigned char scancodes[KBC_MAX_KPENT]; 264 unsigned short keycodes[KBC_MAX_KPENT]; 265 u32 val = 0; 266 unsigned int i; 267 unsigned int num_down = 0; 268 bool fn_keypress = false; 269 bool key_in_same_row = false; 270 bool key_in_same_col = false; 271 272 for (i = 0; i < KBC_MAX_KPENT; i++) { 273 if ((i % 4) == 0) 274 val = readl(kbc->mmio + KBC_KP_ENT0_0 + i); 275 276 if (val & 0x80) { 277 unsigned int col = val & 0x07; 278 unsigned int row = (val >> 3) & 0x0f; 279 unsigned char scancode = 280 MATRIX_SCAN_CODE(row, col, KBC_ROW_SHIFT); 281 282 scancodes[num_down] = scancode; 283 keycodes[num_down] = kbc->keycode[scancode]; 284 /* If driver uses Fn map, do not report the Fn key. */ 285 if ((keycodes[num_down] == KEY_FN) && kbc->use_fn_map) 286 fn_keypress = true; 287 else 288 num_down++; 289 } 290 291 val >>= 8; 292 } 293 294 /* 295 * Matrix keyboard designs are prone to keyboard ghosting. 296 * Ghosting occurs if there are 3 keys such that - 297 * any 2 of the 3 keys share a row, and any 2 of them share a column. 298 * If so ignore the key presses for this iteration. 299 */ 300 if (kbc->use_ghost_filter && num_down >= 3) { 301 for (i = 0; i < num_down; i++) { 302 unsigned int j; 303 u8 curr_col = scancodes[i] & 0x07; 304 u8 curr_row = scancodes[i] >> KBC_ROW_SHIFT; 305 306 /* 307 * Find 2 keys such that one key is in the same row 308 * and the other is in the same column as the i-th key. 309 */ 310 for (j = i + 1; j < num_down; j++) { 311 u8 col = scancodes[j] & 0x07; 312 u8 row = scancodes[j] >> KBC_ROW_SHIFT; 313 314 if (col == curr_col) 315 key_in_same_col = true; 316 if (row == curr_row) 317 key_in_same_row = true; 318 } 319 } 320 } 321 322 /* 323 * If the platform uses Fn keymaps, translate keys on a Fn keypress. 324 * Function keycodes are KBC_MAX_KEY apart from the plain keycodes. 325 */ 326 if (fn_keypress) { 327 for (i = 0; i < num_down; i++) { 328 scancodes[i] += KBC_MAX_KEY; 329 keycodes[i] = kbc->keycode[scancodes[i]]; 330 } 331 } 332 333 /* Ignore the key presses for this iteration? */ 334 if (key_in_same_col && key_in_same_row) 335 return; 336 337 tegra_kbc_report_released_keys(kbc->idev, 338 kbc->current_keys, kbc->num_pressed_keys, 339 keycodes, num_down); 340 tegra_kbc_report_pressed_keys(kbc->idev, scancodes, keycodes, num_down); 341 input_sync(kbc->idev); 342 343 memcpy(kbc->current_keys, keycodes, sizeof(kbc->current_keys)); 344 kbc->num_pressed_keys = num_down; 345 } 346 347 static void tegra_kbc_set_fifo_interrupt(struct tegra_kbc *kbc, bool enable) 348 { 349 u32 val; 350 351 val = readl(kbc->mmio + KBC_CONTROL_0); 352 if (enable) 353 val |= KBC_CONTROL_FIFO_CNT_INT_EN; 354 else 355 val &= ~KBC_CONTROL_FIFO_CNT_INT_EN; 356 writel(val, kbc->mmio + KBC_CONTROL_0); 357 } 358 359 static void tegra_kbc_keypress_timer(unsigned long data) 360 { 361 struct tegra_kbc *kbc = (struct tegra_kbc *)data; 362 unsigned long flags; 363 u32 val; 364 unsigned int i; 365 366 spin_lock_irqsave(&kbc->lock, flags); 367 368 val = (readl(kbc->mmio + KBC_INT_0) >> 4) & 0xf; 369 if (val) { 370 unsigned long dly; 371 372 tegra_kbc_report_keys(kbc); 373 374 /* 375 * If more than one keys are pressed we need not wait 376 * for the repoll delay. 377 */ 378 dly = (val == 1) ? kbc->repoll_dly : 1; 379 mod_timer(&kbc->timer, jiffies + msecs_to_jiffies(dly)); 380 } else { 381 /* Release any pressed keys and exit the polling loop */ 382 for (i = 0; i < kbc->num_pressed_keys; i++) 383 input_report_key(kbc->idev, kbc->current_keys[i], 0); 384 input_sync(kbc->idev); 385 386 kbc->num_pressed_keys = 0; 387 388 /* All keys are released so enable the keypress interrupt */ 389 tegra_kbc_set_fifo_interrupt(kbc, true); 390 } 391 392 spin_unlock_irqrestore(&kbc->lock, flags); 393 } 394 395 static irqreturn_t tegra_kbc_isr(int irq, void *args) 396 { 397 struct tegra_kbc *kbc = args; 398 unsigned long flags; 399 u32 val; 400 401 spin_lock_irqsave(&kbc->lock, flags); 402 403 /* 404 * Quickly bail out & reenable interrupts if the fifo threshold 405 * count interrupt wasn't the interrupt source 406 */ 407 val = readl(kbc->mmio + KBC_INT_0); 408 writel(val, kbc->mmio + KBC_INT_0); 409 410 if (val & KBC_INT_FIFO_CNT_INT_STATUS) { 411 /* 412 * Until all keys are released, defer further processing to 413 * the polling loop in tegra_kbc_keypress_timer. 414 */ 415 tegra_kbc_set_fifo_interrupt(kbc, false); 416 mod_timer(&kbc->timer, jiffies + kbc->cp_dly_jiffies); 417 } else if (val & KBC_INT_KEYPRESS_INT_STATUS) { 418 /* We can be here only through system resume path */ 419 kbc->keypress_caused_wake = true; 420 } 421 422 spin_unlock_irqrestore(&kbc->lock, flags); 423 424 return IRQ_HANDLED; 425 } 426 427 static void tegra_kbc_setup_wakekeys(struct tegra_kbc *kbc, bool filter) 428 { 429 const struct tegra_kbc_platform_data *pdata = kbc->pdata; 430 int i; 431 unsigned int rst_val; 432 433 /* Either mask all keys or none. */ 434 rst_val = (filter && !pdata->wakeup) ? ~0 : 0; 435 436 for (i = 0; i < KBC_MAX_ROW; i++) 437 writel(rst_val, kbc->mmio + KBC_ROW0_MASK_0 + i * 4); 438 } 439 440 static void tegra_kbc_config_pins(struct tegra_kbc *kbc) 441 { 442 const struct tegra_kbc_platform_data *pdata = kbc->pdata; 443 int i; 444 445 for (i = 0; i < KBC_MAX_GPIO; i++) { 446 u32 r_shft = 5 * (i % 6); 447 u32 c_shft = 4 * (i % 8); 448 u32 r_mask = 0x1f << r_shft; 449 u32 c_mask = 0x0f << c_shft; 450 u32 r_offs = (i / 6) * 4 + KBC_ROW_CFG0_0; 451 u32 c_offs = (i / 8) * 4 + KBC_COL_CFG0_0; 452 u32 row_cfg = readl(kbc->mmio + r_offs); 453 u32 col_cfg = readl(kbc->mmio + c_offs); 454 455 row_cfg &= ~r_mask; 456 col_cfg &= ~c_mask; 457 458 if (pdata->pin_cfg[i].is_row) 459 row_cfg |= ((pdata->pin_cfg[i].num << 1) | 1) << r_shft; 460 else 461 col_cfg |= ((pdata->pin_cfg[i].num << 1) | 1) << c_shft; 462 463 writel(row_cfg, kbc->mmio + r_offs); 464 writel(col_cfg, kbc->mmio + c_offs); 465 } 466 } 467 468 static int tegra_kbc_start(struct tegra_kbc *kbc) 469 { 470 const struct tegra_kbc_platform_data *pdata = kbc->pdata; 471 unsigned int debounce_cnt; 472 u32 val = 0; 473 474 clk_enable(kbc->clk); 475 476 /* Reset the KBC controller to clear all previous status.*/ 477 tegra_periph_reset_assert(kbc->clk); 478 udelay(100); 479 tegra_periph_reset_deassert(kbc->clk); 480 udelay(100); 481 482 tegra_kbc_config_pins(kbc); 483 tegra_kbc_setup_wakekeys(kbc, false); 484 485 writel(pdata->repeat_cnt, kbc->mmio + KBC_RPT_DLY_0); 486 487 /* Keyboard debounce count is maximum of 12 bits. */ 488 debounce_cnt = min(pdata->debounce_cnt, KBC_MAX_DEBOUNCE_CNT); 489 val = KBC_DEBOUNCE_CNT_SHIFT(debounce_cnt); 490 val |= KBC_FIFO_TH_CNT_SHIFT(1); /* set fifo interrupt threshold to 1 */ 491 val |= KBC_CONTROL_FIFO_CNT_INT_EN; /* interrupt on FIFO threshold */ 492 val |= KBC_CONTROL_KBC_EN; /* enable */ 493 writel(val, kbc->mmio + KBC_CONTROL_0); 494 495 /* 496 * Compute the delay(ns) from interrupt mode to continuous polling 497 * mode so the timer routine is scheduled appropriately. 498 */ 499 val = readl(kbc->mmio + KBC_INIT_DLY_0); 500 kbc->cp_dly_jiffies = usecs_to_jiffies((val & 0xfffff) * 32); 501 502 kbc->num_pressed_keys = 0; 503 504 /* 505 * Atomically clear out any remaining entries in the key FIFO 506 * and enable keyboard interrupts. 507 */ 508 while (1) { 509 val = readl(kbc->mmio + KBC_INT_0); 510 val >>= 4; 511 if (!val) 512 break; 513 514 val = readl(kbc->mmio + KBC_KP_ENT0_0); 515 val = readl(kbc->mmio + KBC_KP_ENT1_0); 516 } 517 writel(0x7, kbc->mmio + KBC_INT_0); 518 519 enable_irq(kbc->irq); 520 521 return 0; 522 } 523 524 static void tegra_kbc_stop(struct tegra_kbc *kbc) 525 { 526 unsigned long flags; 527 u32 val; 528 529 spin_lock_irqsave(&kbc->lock, flags); 530 val = readl(kbc->mmio + KBC_CONTROL_0); 531 val &= ~1; 532 writel(val, kbc->mmio + KBC_CONTROL_0); 533 spin_unlock_irqrestore(&kbc->lock, flags); 534 535 disable_irq(kbc->irq); 536 del_timer_sync(&kbc->timer); 537 538 clk_disable(kbc->clk); 539 } 540 541 static int tegra_kbc_open(struct input_dev *dev) 542 { 543 struct tegra_kbc *kbc = input_get_drvdata(dev); 544 545 return tegra_kbc_start(kbc); 546 } 547 548 static void tegra_kbc_close(struct input_dev *dev) 549 { 550 struct tegra_kbc *kbc = input_get_drvdata(dev); 551 552 return tegra_kbc_stop(kbc); 553 } 554 555 static bool __devinit 556 tegra_kbc_check_pin_cfg(const struct tegra_kbc_platform_data *pdata, 557 struct device *dev, unsigned int *num_rows) 558 { 559 int i; 560 561 *num_rows = 0; 562 563 for (i = 0; i < KBC_MAX_GPIO; i++) { 564 const struct tegra_kbc_pin_cfg *pin_cfg = &pdata->pin_cfg[i]; 565 566 if (pin_cfg->is_row) { 567 if (pin_cfg->num >= KBC_MAX_ROW) { 568 dev_err(dev, 569 "pin_cfg[%d]: invalid row number %d\n", 570 i, pin_cfg->num); 571 return false; 572 } 573 (*num_rows)++; 574 } else { 575 if (pin_cfg->num >= KBC_MAX_COL) { 576 dev_err(dev, 577 "pin_cfg[%d]: invalid column number %d\n", 578 i, pin_cfg->num); 579 return false; 580 } 581 } 582 } 583 584 return true; 585 } 586 587 #ifdef CONFIG_OF 588 static struct tegra_kbc_platform_data * __devinit 589 tegra_kbc_dt_parse_pdata(struct platform_device *pdev) 590 { 591 struct tegra_kbc_platform_data *pdata; 592 struct device_node *np = pdev->dev.of_node; 593 594 if (!np) 595 return NULL; 596 597 pdata = kzalloc(sizeof(*pdata), GFP_KERNEL); 598 if (!pdata) 599 return NULL; 600 601 if (!of_property_read_u32(np, "debounce-delay", &prop)) 602 pdata->debounce_cnt = prop; 603 604 if (!of_property_read_u32(np, "repeat-delay", &prop)) 605 pdata->repeat_cnt = prop; 606 607 if (of_find_property(np, "needs-ghost-filter", NULL)) 608 pdata->use_ghost_filter = true; 609 610 if (of_find_property(np, "wakeup-source", NULL)) 611 pdata->wakeup = true; 612 613 /* 614 * All currently known keymaps with device tree support use the same 615 * pin_cfg, so set it up here. 616 */ 617 for (i = 0; i < KBC_MAX_ROW; i++) { 618 pdata->pin_cfg[i].num = i; 619 pdata->pin_cfg[i].is_row = true; 620 } 621 622 for (i = 0; i < KBC_MAX_COL; i++) { 623 pdata->pin_cfg[KBC_MAX_ROW + i].num = i; 624 pdata->pin_cfg[KBC_MAX_ROW + i].is_row = false; 625 } 626 627 return pdata; 628 } 629 #else 630 static inline struct tegra_kbc_platform_data *tegra_kbc_dt_parse_pdata( 631 struct platform_device *pdev) 632 { 633 return NULL; 634 } 635 #endif 636 637 static int __devinit tegra_kbc_probe(struct platform_device *pdev) 638 { 639 const struct tegra_kbc_platform_data *pdata = pdev->dev.platform_data; 640 const struct matrix_keymap_data *keymap_data; 641 struct tegra_kbc *kbc; 642 struct input_dev *input_dev; 643 struct resource *res; 644 int irq; 645 int err; 646 int num_rows = 0; 647 unsigned int debounce_cnt; 648 unsigned int scan_time_rows; 649 650 if (!pdata) 651 pdata = tegra_kbc_dt_parse_pdata(pdev); 652 653 if (!pdata) 654 return -EINVAL; 655 656 if (!tegra_kbc_check_pin_cfg(pdata, &pdev->dev, &num_rows)) { 657 err = -EINVAL; 658 goto err_free_pdata; 659 } 660 661 res = platform_get_resource(pdev, IORESOURCE_MEM, 0); 662 if (!res) { 663 dev_err(&pdev->dev, "failed to get I/O memory\n"); 664 err = -ENXIO; 665 goto err_free_pdata; 666 } 667 668 irq = platform_get_irq(pdev, 0); 669 if (irq < 0) { 670 dev_err(&pdev->dev, "failed to get keyboard IRQ\n"); 671 err = -ENXIO; 672 goto err_free_pdata; 673 } 674 675 kbc = kzalloc(sizeof(*kbc), GFP_KERNEL); 676 input_dev = input_allocate_device(); 677 if (!kbc || !input_dev) { 678 err = -ENOMEM; 679 goto err_free_mem; 680 } 681 682 kbc->pdata = pdata; 683 kbc->idev = input_dev; 684 kbc->irq = irq; 685 spin_lock_init(&kbc->lock); 686 setup_timer(&kbc->timer, tegra_kbc_keypress_timer, (unsigned long)kbc); 687 688 res = request_mem_region(res->start, resource_size(res), pdev->name); 689 if (!res) { 690 dev_err(&pdev->dev, "failed to request I/O memory\n"); 691 err = -EBUSY; 692 goto err_free_mem; 693 } 694 695 kbc->mmio = ioremap(res->start, resource_size(res)); 696 if (!kbc->mmio) { 697 dev_err(&pdev->dev, "failed to remap I/O memory\n"); 698 err = -ENXIO; 699 goto err_free_mem_region; 700 } 701 702 kbc->clk = clk_get(&pdev->dev, NULL); 703 if (IS_ERR(kbc->clk)) { 704 dev_err(&pdev->dev, "failed to get keyboard clock\n"); 705 err = PTR_ERR(kbc->clk); 706 goto err_iounmap; 707 } 708 709 /* 710 * The time delay between two consecutive reads of the FIFO is 711 * the sum of the repeat time and the time taken for scanning 712 * the rows. There is an additional delay before the row scanning 713 * starts. The repoll delay is computed in milliseconds. 714 */ 715 debounce_cnt = min(pdata->debounce_cnt, KBC_MAX_DEBOUNCE_CNT); 716 scan_time_rows = (KBC_ROW_SCAN_TIME + debounce_cnt) * num_rows; 717 kbc->repoll_dly = KBC_ROW_SCAN_DLY + scan_time_rows + pdata->repeat_cnt; 718 kbc->repoll_dly = DIV_ROUND_UP(kbc->repoll_dly, KBC_CYCLE_MS); 719 720 input_dev->name = pdev->name; 721 input_dev->id.bustype = BUS_HOST; 722 input_dev->dev.parent = &pdev->dev; 723 input_dev->open = tegra_kbc_open; 724 input_dev->close = tegra_kbc_close; 725 726 input_set_drvdata(input_dev, kbc); 727 728 input_dev->evbit[0] = BIT_MASK(EV_KEY) | BIT_MASK(EV_REP); 729 input_set_capability(input_dev, EV_MSC, MSC_SCAN); 730 731 input_dev->keycode = kbc->keycode; 732 input_dev->keycodesize = sizeof(kbc->keycode[0]); 733 input_dev->keycodemax = KBC_MAX_KEY; 734 if (pdata->use_fn_map) 735 input_dev->keycodemax *= 2; 736 737 kbc->use_fn_map = pdata->use_fn_map; 738 kbc->use_ghost_filter = pdata->use_ghost_filter; 739 keymap_data = pdata->keymap_data ?: &tegra_kbc_default_keymap_data; 740 matrix_keypad_build_keymap(keymap_data, KBC_ROW_SHIFT, 741 input_dev->keycode, input_dev->keybit); 742 kbc->wakeup_key = pdata->wakeup_key; 743 744 err = request_irq(kbc->irq, tegra_kbc_isr, 745 IRQF_NO_SUSPEND | IRQF_TRIGGER_HIGH, pdev->name, kbc); 746 if (err) { 747 dev_err(&pdev->dev, "failed to request keyboard IRQ\n"); 748 goto err_put_clk; 749 } 750 751 disable_irq(kbc->irq); 752 753 err = input_register_device(kbc->idev); 754 if (err) { 755 dev_err(&pdev->dev, "failed to register input device\n"); 756 goto err_free_irq; 757 } 758 759 platform_set_drvdata(pdev, kbc); 760 device_init_wakeup(&pdev->dev, pdata->wakeup); 761 762 return 0; 763 764 err_free_irq: 765 free_irq(kbc->irq, pdev); 766 err_put_clk: 767 clk_put(kbc->clk); 768 err_iounmap: 769 iounmap(kbc->mmio); 770 err_free_mem_region: 771 release_mem_region(res->start, resource_size(res)); 772 err_free_mem: 773 input_free_device(input_dev); 774 kfree(kbc); 775 err_free_pdata: 776 if (!pdev->dev.platform_data) 777 kfree(pdata); 778 779 return err; 780 } 781 782 static int __devexit tegra_kbc_remove(struct platform_device *pdev) 783 { 784 struct tegra_kbc *kbc = platform_get_drvdata(pdev); 785 struct resource *res; 786 787 platform_set_drvdata(pdev, NULL); 788 789 free_irq(kbc->irq, pdev); 790 clk_put(kbc->clk); 791 792 input_unregister_device(kbc->idev); 793 iounmap(kbc->mmio); 794 res = platform_get_resource(pdev, IORESOURCE_MEM, 0); 795 release_mem_region(res->start, resource_size(res)); 796 797 /* 798 * If we do not have platform data attached to the device we 799 * allocated it ourselves and thus need to free it. 800 */ 801 if (!pdev->dev.platform_data) 802 kfree(kbc->pdata); 803 804 kfree(kbc); 805 806 return 0; 807 } 808 809 #ifdef CONFIG_PM_SLEEP 810 static int tegra_kbc_suspend(struct device *dev) 811 { 812 struct platform_device *pdev = to_platform_device(dev); 813 struct tegra_kbc *kbc = platform_get_drvdata(pdev); 814 815 mutex_lock(&kbc->idev->mutex); 816 if (device_may_wakeup(&pdev->dev)) { 817 disable_irq(kbc->irq); 818 del_timer_sync(&kbc->timer); 819 tegra_kbc_set_fifo_interrupt(kbc, false); 820 821 /* Forcefully clear the interrupt status */ 822 writel(0x7, kbc->mmio + KBC_INT_0); 823 /* 824 * Store the previous resident time of continuous polling mode. 825 * Force the keyboard into interrupt mode. 826 */ 827 kbc->cp_to_wkup_dly = readl(kbc->mmio + KBC_TO_CNT_0); 828 writel(0, kbc->mmio + KBC_TO_CNT_0); 829 830 tegra_kbc_setup_wakekeys(kbc, true); 831 msleep(30); 832 833 kbc->keypress_caused_wake = false; 834 enable_irq(kbc->irq); 835 enable_irq_wake(kbc->irq); 836 } else { 837 if (kbc->idev->users) 838 tegra_kbc_stop(kbc); 839 } 840 mutex_unlock(&kbc->idev->mutex); 841 842 return 0; 843 } 844 845 static int tegra_kbc_resume(struct device *dev) 846 { 847 struct platform_device *pdev = to_platform_device(dev); 848 struct tegra_kbc *kbc = platform_get_drvdata(pdev); 849 int err = 0; 850 851 mutex_lock(&kbc->idev->mutex); 852 if (device_may_wakeup(&pdev->dev)) { 853 disable_irq_wake(kbc->irq); 854 tegra_kbc_setup_wakekeys(kbc, false); 855 856 /* Restore the resident time of continuous polling mode. */ 857 writel(kbc->cp_to_wkup_dly, kbc->mmio + KBC_TO_CNT_0); 858 859 tegra_kbc_set_fifo_interrupt(kbc, true); 860 861 if (kbc->keypress_caused_wake && kbc->wakeup_key) { 862 /* 863 * We can't report events directly from the ISR 864 * because timekeeping is stopped when processing 865 * wakeup request and we get a nasty warning when 866 * we try to call do_gettimeofday() in evdev 867 * handler. 868 */ 869 input_report_key(kbc->idev, kbc->wakeup_key, 1); 870 input_sync(kbc->idev); 871 input_report_key(kbc->idev, kbc->wakeup_key, 0); 872 input_sync(kbc->idev); 873 } 874 } else { 875 if (kbc->idev->users) 876 err = tegra_kbc_start(kbc); 877 } 878 mutex_unlock(&kbc->idev->mutex); 879 880 return err; 881 } 882 #endif 883 884 static SIMPLE_DEV_PM_OPS(tegra_kbc_pm_ops, tegra_kbc_suspend, tegra_kbc_resume); 885 886 static const struct of_device_id tegra_kbc_of_match[] = { 887 { .compatible = "nvidia,tegra20-kbc", }, 888 { }, 889 }; 890 MODULE_DEVICE_TABLE(of, tegra_kbc_of_match); 891 892 static struct platform_driver tegra_kbc_driver = { 893 .probe = tegra_kbc_probe, 894 .remove = __devexit_p(tegra_kbc_remove), 895 .driver = { 896 .name = "tegra-kbc", 897 .owner = THIS_MODULE, 898 .pm = &tegra_kbc_pm_ops, 899 .of_match_table = tegra_kbc_of_match, 900 }, 901 }; 902 module_platform_driver(tegra_kbc_driver); 903 904 MODULE_LICENSE("GPL"); 905 MODULE_AUTHOR("Rakesh Iyer <riyer@nvidia.com>"); 906 MODULE_DESCRIPTION("Tegra matrix keyboard controller driver"); 907 MODULE_ALIAS("platform:tegra-kbc"); 908