1 // SPDX-License-Identifier: GPL-2.0-only 2 /* 3 * Copyright (C) 2017 MediaTek, Inc. 4 * 5 * Author: Chen Zhong <chen.zhong@mediatek.com> 6 */ 7 8 #include <linux/input.h> 9 #include <linux/interrupt.h> 10 #include <linux/kernel.h> 11 #include <linux/mfd/mt6323/registers.h> 12 #include <linux/mfd/mt6331/registers.h> 13 #include <linux/mfd/mt6357/registers.h> 14 #include <linux/mfd/mt6358/registers.h> 15 #include <linux/mfd/mt6359/registers.h> 16 #include <linux/mfd/mt6397/core.h> 17 #include <linux/mfd/mt6397/registers.h> 18 #include <linux/module.h> 19 #include <linux/of_device.h> 20 #include <linux/of.h> 21 #include <linux/platform_device.h> 22 #include <linux/regmap.h> 23 24 #define MTK_PMIC_RST_DU_MASK GENMASK(9, 8) 25 #define MTK_PMIC_PWRKEY_RST BIT(6) 26 #define MTK_PMIC_HOMEKEY_RST BIT(5) 27 28 #define MTK_PMIC_MT6331_RST_DU_MASK GENMASK(13, 12) 29 #define MTK_PMIC_MT6331_PWRKEY_RST BIT(9) 30 #define MTK_PMIC_MT6331_HOMEKEY_RST BIT(8) 31 32 #define MTK_PMIC_PWRKEY_INDEX 0 33 #define MTK_PMIC_HOMEKEY_INDEX 1 34 #define MTK_PMIC_MAX_KEY_COUNT 2 35 36 struct mtk_pmic_keys_regs { 37 u32 deb_reg; 38 u32 deb_mask; 39 u32 intsel_reg; 40 u32 intsel_mask; 41 u32 rst_en_mask; 42 }; 43 44 #define MTK_PMIC_KEYS_REGS(_deb_reg, _deb_mask, \ 45 _intsel_reg, _intsel_mask, _rst_mask) \ 46 { \ 47 .deb_reg = _deb_reg, \ 48 .deb_mask = _deb_mask, \ 49 .intsel_reg = _intsel_reg, \ 50 .intsel_mask = _intsel_mask, \ 51 .rst_en_mask = _rst_mask, \ 52 } 53 54 struct mtk_pmic_regs { 55 const struct mtk_pmic_keys_regs keys_regs[MTK_PMIC_MAX_KEY_COUNT]; 56 u32 pmic_rst_reg; 57 u32 rst_lprst_mask; /* Long-press reset timeout bitmask */ 58 }; 59 60 static const struct mtk_pmic_regs mt6397_regs = { 61 .keys_regs[MTK_PMIC_PWRKEY_INDEX] = 62 MTK_PMIC_KEYS_REGS(MT6397_CHRSTATUS, 63 0x8, MT6397_INT_RSV, 0x10, MTK_PMIC_PWRKEY_RST), 64 .keys_regs[MTK_PMIC_HOMEKEY_INDEX] = 65 MTK_PMIC_KEYS_REGS(MT6397_OCSTATUS2, 66 0x10, MT6397_INT_RSV, 0x8, MTK_PMIC_HOMEKEY_RST), 67 .pmic_rst_reg = MT6397_TOP_RST_MISC, 68 .rst_lprst_mask = MTK_PMIC_RST_DU_MASK, 69 }; 70 71 static const struct mtk_pmic_regs mt6323_regs = { 72 .keys_regs[MTK_PMIC_PWRKEY_INDEX] = 73 MTK_PMIC_KEYS_REGS(MT6323_CHRSTATUS, 74 0x2, MT6323_INT_MISC_CON, 0x10, MTK_PMIC_PWRKEY_RST), 75 .keys_regs[MTK_PMIC_HOMEKEY_INDEX] = 76 MTK_PMIC_KEYS_REGS(MT6323_CHRSTATUS, 77 0x4, MT6323_INT_MISC_CON, 0x8, MTK_PMIC_HOMEKEY_RST), 78 .pmic_rst_reg = MT6323_TOP_RST_MISC, 79 .rst_lprst_mask = MTK_PMIC_RST_DU_MASK, 80 }; 81 82 static const struct mtk_pmic_regs mt6331_regs = { 83 .keys_regs[MTK_PMIC_PWRKEY_INDEX] = 84 MTK_PMIC_KEYS_REGS(MT6331_TOPSTATUS, 0x2, 85 MT6331_INT_MISC_CON, 0x4, 86 MTK_PMIC_MT6331_PWRKEY_RST), 87 .keys_regs[MTK_PMIC_HOMEKEY_INDEX] = 88 MTK_PMIC_KEYS_REGS(MT6331_TOPSTATUS, 0x4, 89 MT6331_INT_MISC_CON, 0x2, 90 MTK_PMIC_MT6331_HOMEKEY_RST), 91 .pmic_rst_reg = MT6331_TOP_RST_MISC, 92 .rst_lprst_mask = MTK_PMIC_MT6331_RST_DU_MASK, 93 }; 94 95 static const struct mtk_pmic_regs mt6357_regs = { 96 .keys_regs[MTK_PMIC_PWRKEY_INDEX] = 97 MTK_PMIC_KEYS_REGS(MT6357_TOPSTATUS, 98 0x2, MT6357_PSC_TOP_INT_CON0, 0x5, 99 MTK_PMIC_PWRKEY_RST), 100 .keys_regs[MTK_PMIC_HOMEKEY_INDEX] = 101 MTK_PMIC_KEYS_REGS(MT6357_TOPSTATUS, 102 0x8, MT6357_PSC_TOP_INT_CON0, 0xa, 103 MTK_PMIC_HOMEKEY_INDEX), 104 .pmic_rst_reg = MT6357_TOP_RST_MISC, 105 .rst_lprst_mask = MTK_PMIC_RST_DU_MASK, 106 }; 107 108 static const struct mtk_pmic_regs mt6358_regs = { 109 .keys_regs[MTK_PMIC_PWRKEY_INDEX] = 110 MTK_PMIC_KEYS_REGS(MT6358_TOPSTATUS, 111 0x2, MT6358_PSC_TOP_INT_CON0, 0x5, 112 MTK_PMIC_PWRKEY_RST), 113 .keys_regs[MTK_PMIC_HOMEKEY_INDEX] = 114 MTK_PMIC_KEYS_REGS(MT6358_TOPSTATUS, 115 0x8, MT6358_PSC_TOP_INT_CON0, 0xa, 116 MTK_PMIC_HOMEKEY_RST), 117 .pmic_rst_reg = MT6358_TOP_RST_MISC, 118 .rst_lprst_mask = MTK_PMIC_RST_DU_MASK, 119 }; 120 121 static const struct mtk_pmic_regs mt6359_regs = { 122 .keys_regs[MTK_PMIC_PWRKEY_INDEX] = 123 MTK_PMIC_KEYS_REGS(MT6359_TOPSTATUS, 124 0x2, MT6359_PSC_TOP_INT_CON0, 0x5, 125 MTK_PMIC_PWRKEY_RST), 126 .keys_regs[MTK_PMIC_HOMEKEY_INDEX] = 127 MTK_PMIC_KEYS_REGS(MT6359_TOPSTATUS, 128 0x8, MT6359_PSC_TOP_INT_CON0, 0xa, 129 MTK_PMIC_HOMEKEY_RST), 130 .pmic_rst_reg = MT6359_TOP_RST_MISC, 131 .rst_lprst_mask = MTK_PMIC_RST_DU_MASK, 132 }; 133 134 struct mtk_pmic_keys_info { 135 struct mtk_pmic_keys *keys; 136 const struct mtk_pmic_keys_regs *regs; 137 unsigned int keycode; 138 int irq; 139 int irq_r; /* optional: release irq if different */ 140 bool wakeup:1; 141 }; 142 143 struct mtk_pmic_keys { 144 struct input_dev *input_dev; 145 struct device *dev; 146 struct regmap *regmap; 147 struct mtk_pmic_keys_info keys[MTK_PMIC_MAX_KEY_COUNT]; 148 }; 149 150 enum mtk_pmic_keys_lp_mode { 151 LP_DISABLE, 152 LP_ONEKEY, 153 LP_TWOKEY, 154 }; 155 156 static void mtk_pmic_keys_lp_reset_setup(struct mtk_pmic_keys *keys, 157 const struct mtk_pmic_regs *regs) 158 { 159 const struct mtk_pmic_keys_regs *kregs_home, *kregs_pwr; 160 u32 long_press_mode, long_press_debounce; 161 u32 value, mask; 162 int error; 163 164 kregs_home = ®s->keys_regs[MTK_PMIC_HOMEKEY_INDEX]; 165 kregs_pwr = ®s->keys_regs[MTK_PMIC_PWRKEY_INDEX]; 166 167 error = of_property_read_u32(keys->dev->of_node, "power-off-time-sec", 168 &long_press_debounce); 169 if (error) 170 long_press_debounce = 0; 171 172 mask = regs->rst_lprst_mask; 173 value = long_press_debounce << (ffs(regs->rst_lprst_mask) - 1); 174 175 error = of_property_read_u32(keys->dev->of_node, 176 "mediatek,long-press-mode", 177 &long_press_mode); 178 if (error) 179 long_press_mode = LP_DISABLE; 180 181 switch (long_press_mode) { 182 case LP_TWOKEY: 183 value |= kregs_home->rst_en_mask; 184 fallthrough; 185 186 case LP_ONEKEY: 187 value |= kregs_pwr->rst_en_mask; 188 fallthrough; 189 190 case LP_DISABLE: 191 mask |= kregs_home->rst_en_mask; 192 mask |= kregs_pwr->rst_en_mask; 193 break; 194 195 default: 196 break; 197 } 198 199 regmap_update_bits(keys->regmap, regs->pmic_rst_reg, mask, value); 200 } 201 202 static irqreturn_t mtk_pmic_keys_irq_handler_thread(int irq, void *data) 203 { 204 struct mtk_pmic_keys_info *info = data; 205 u32 key_deb, pressed; 206 207 regmap_read(info->keys->regmap, info->regs->deb_reg, &key_deb); 208 209 key_deb &= info->regs->deb_mask; 210 211 pressed = !key_deb; 212 213 input_report_key(info->keys->input_dev, info->keycode, pressed); 214 input_sync(info->keys->input_dev); 215 216 dev_dbg(info->keys->dev, "(%s) key =%d using PMIC\n", 217 pressed ? "pressed" : "released", info->keycode); 218 219 return IRQ_HANDLED; 220 } 221 222 static int mtk_pmic_key_setup(struct mtk_pmic_keys *keys, 223 struct mtk_pmic_keys_info *info) 224 { 225 int ret; 226 227 info->keys = keys; 228 229 ret = regmap_update_bits(keys->regmap, info->regs->intsel_reg, 230 info->regs->intsel_mask, 231 info->regs->intsel_mask); 232 if (ret < 0) 233 return ret; 234 235 ret = devm_request_threaded_irq(keys->dev, info->irq, NULL, 236 mtk_pmic_keys_irq_handler_thread, 237 IRQF_ONESHOT | IRQF_TRIGGER_HIGH, 238 "mtk-pmic-keys", info); 239 if (ret) { 240 dev_err(keys->dev, "Failed to request IRQ: %d: %d\n", 241 info->irq, ret); 242 return ret; 243 } 244 245 if (info->irq_r > 0) { 246 ret = devm_request_threaded_irq(keys->dev, info->irq_r, NULL, 247 mtk_pmic_keys_irq_handler_thread, 248 IRQF_ONESHOT | IRQF_TRIGGER_HIGH, 249 "mtk-pmic-keys", info); 250 if (ret) { 251 dev_err(keys->dev, "Failed to request IRQ_r: %d: %d\n", 252 info->irq, ret); 253 return ret; 254 } 255 } 256 257 input_set_capability(keys->input_dev, EV_KEY, info->keycode); 258 259 return 0; 260 } 261 262 static int mtk_pmic_keys_suspend(struct device *dev) 263 { 264 struct mtk_pmic_keys *keys = dev_get_drvdata(dev); 265 int index; 266 267 for (index = 0; index < MTK_PMIC_MAX_KEY_COUNT; index++) { 268 if (keys->keys[index].wakeup) { 269 enable_irq_wake(keys->keys[index].irq); 270 if (keys->keys[index].irq_r > 0) 271 enable_irq_wake(keys->keys[index].irq_r); 272 } 273 } 274 275 return 0; 276 } 277 278 static int mtk_pmic_keys_resume(struct device *dev) 279 { 280 struct mtk_pmic_keys *keys = dev_get_drvdata(dev); 281 int index; 282 283 for (index = 0; index < MTK_PMIC_MAX_KEY_COUNT; index++) { 284 if (keys->keys[index].wakeup) { 285 disable_irq_wake(keys->keys[index].irq); 286 if (keys->keys[index].irq_r > 0) 287 disable_irq_wake(keys->keys[index].irq_r); 288 } 289 } 290 291 return 0; 292 } 293 294 static DEFINE_SIMPLE_DEV_PM_OPS(mtk_pmic_keys_pm_ops, mtk_pmic_keys_suspend, 295 mtk_pmic_keys_resume); 296 297 static const struct of_device_id of_mtk_pmic_keys_match_tbl[] = { 298 { 299 .compatible = "mediatek,mt6397-keys", 300 .data = &mt6397_regs, 301 }, { 302 .compatible = "mediatek,mt6323-keys", 303 .data = &mt6323_regs, 304 }, { 305 .compatible = "mediatek,mt6331-keys", 306 .data = &mt6331_regs, 307 }, { 308 .compatible = "mediatek,mt6357-keys", 309 .data = &mt6357_regs, 310 }, { 311 .compatible = "mediatek,mt6358-keys", 312 .data = &mt6358_regs, 313 }, { 314 .compatible = "mediatek,mt6359-keys", 315 .data = &mt6359_regs, 316 }, { 317 /* sentinel */ 318 } 319 }; 320 MODULE_DEVICE_TABLE(of, of_mtk_pmic_keys_match_tbl); 321 322 static int mtk_pmic_keys_probe(struct platform_device *pdev) 323 { 324 int error, index = 0; 325 unsigned int keycount; 326 struct mt6397_chip *pmic_chip = dev_get_drvdata(pdev->dev.parent); 327 struct device_node *node = pdev->dev.of_node; 328 static const char *const irqnames[] = { "powerkey", "homekey" }; 329 static const char *const irqnames_r[] = { "powerkey_r", "homekey_r" }; 330 struct mtk_pmic_keys *keys; 331 const struct mtk_pmic_regs *mtk_pmic_regs; 332 struct input_dev *input_dev; 333 const struct of_device_id *of_id = 334 of_match_device(of_mtk_pmic_keys_match_tbl, &pdev->dev); 335 336 keys = devm_kzalloc(&pdev->dev, sizeof(*keys), GFP_KERNEL); 337 if (!keys) 338 return -ENOMEM; 339 340 keys->dev = &pdev->dev; 341 keys->regmap = pmic_chip->regmap; 342 mtk_pmic_regs = of_id->data; 343 344 keys->input_dev = input_dev = devm_input_allocate_device(keys->dev); 345 if (!input_dev) { 346 dev_err(keys->dev, "input allocate device fail.\n"); 347 return -ENOMEM; 348 } 349 350 input_dev->name = "mtk-pmic-keys"; 351 input_dev->id.bustype = BUS_HOST; 352 input_dev->id.vendor = 0x0001; 353 input_dev->id.product = 0x0001; 354 input_dev->id.version = 0x0001; 355 356 keycount = of_get_available_child_count(node); 357 if (keycount > MTK_PMIC_MAX_KEY_COUNT || 358 keycount > ARRAY_SIZE(irqnames)) { 359 dev_err(keys->dev, "too many keys defined (%d)\n", keycount); 360 return -EINVAL; 361 } 362 363 for_each_child_of_node_scoped(node, child) { 364 keys->keys[index].regs = &mtk_pmic_regs->keys_regs[index]; 365 366 keys->keys[index].irq = 367 platform_get_irq_byname(pdev, irqnames[index]); 368 if (keys->keys[index].irq < 0) 369 return keys->keys[index].irq; 370 371 if (of_device_is_compatible(node, "mediatek,mt6358-keys")) { 372 keys->keys[index].irq_r = platform_get_irq_byname(pdev, 373 irqnames_r[index]); 374 375 if (keys->keys[index].irq_r < 0) 376 return keys->keys[index].irq_r; 377 } 378 379 error = of_property_read_u32(child, 380 "linux,keycodes", &keys->keys[index].keycode); 381 if (error) { 382 dev_err(keys->dev, 383 "failed to read key:%d linux,keycode property: %d\n", 384 index, error); 385 return error; 386 } 387 388 if (of_property_read_bool(child, "wakeup-source")) 389 keys->keys[index].wakeup = true; 390 391 error = mtk_pmic_key_setup(keys, &keys->keys[index]); 392 if (error) 393 return error; 394 395 index++; 396 } 397 398 error = input_register_device(input_dev); 399 if (error) { 400 dev_err(&pdev->dev, 401 "register input device failed (%d)\n", error); 402 return error; 403 } 404 405 mtk_pmic_keys_lp_reset_setup(keys, mtk_pmic_regs); 406 407 platform_set_drvdata(pdev, keys); 408 409 return 0; 410 } 411 412 static struct platform_driver pmic_keys_pdrv = { 413 .probe = mtk_pmic_keys_probe, 414 .driver = { 415 .name = "mtk-pmic-keys", 416 .of_match_table = of_mtk_pmic_keys_match_tbl, 417 .pm = pm_sleep_ptr(&mtk_pmic_keys_pm_ops), 418 }, 419 }; 420 421 module_platform_driver(pmic_keys_pdrv); 422 423 MODULE_LICENSE("GPL v2"); 424 MODULE_AUTHOR("Chen Zhong <chen.zhong@mediatek.com>"); 425 MODULE_DESCRIPTION("MTK pmic-keys driver v0.1"); 426