1 // SPDX-License-Identifier: GPL-2.0-only 2 /* 3 * Copyright (C) 2017 MediaTek, Inc. 4 * 5 * Author: Chen Zhong <chen.zhong@mediatek.com> 6 */ 7 8 #include <linux/input.h> 9 #include <linux/interrupt.h> 10 #include <linux/kernel.h> 11 #include <linux/mfd/mt6323/registers.h> 12 #include <linux/mfd/mt6397/core.h> 13 #include <linux/mfd/mt6397/registers.h> 14 #include <linux/module.h> 15 #include <linux/of_device.h> 16 #include <linux/of.h> 17 #include <linux/platform_device.h> 18 #include <linux/regmap.h> 19 20 #define MTK_PMIC_PWRKEY_RST_EN_MASK 0x1 21 #define MTK_PMIC_PWRKEY_RST_EN_SHIFT 6 22 #define MTK_PMIC_HOMEKEY_RST_EN_MASK 0x1 23 #define MTK_PMIC_HOMEKEY_RST_EN_SHIFT 5 24 #define MTK_PMIC_RST_DU_MASK 0x3 25 #define MTK_PMIC_RST_DU_SHIFT 8 26 27 #define MTK_PMIC_PWRKEY_RST \ 28 (MTK_PMIC_PWRKEY_RST_EN_MASK << MTK_PMIC_PWRKEY_RST_EN_SHIFT) 29 #define MTK_PMIC_HOMEKEY_RST \ 30 (MTK_PMIC_HOMEKEY_RST_EN_MASK << MTK_PMIC_HOMEKEY_RST_EN_SHIFT) 31 32 #define MTK_PMIC_PWRKEY_INDEX 0 33 #define MTK_PMIC_HOMEKEY_INDEX 1 34 #define MTK_PMIC_MAX_KEY_COUNT 2 35 36 struct mtk_pmic_keys_regs { 37 u32 deb_reg; 38 u32 deb_mask; 39 u32 intsel_reg; 40 u32 intsel_mask; 41 }; 42 43 #define MTK_PMIC_KEYS_REGS(_deb_reg, _deb_mask, \ 44 _intsel_reg, _intsel_mask) \ 45 { \ 46 .deb_reg = _deb_reg, \ 47 .deb_mask = _deb_mask, \ 48 .intsel_reg = _intsel_reg, \ 49 .intsel_mask = _intsel_mask, \ 50 } 51 52 struct mtk_pmic_regs { 53 const struct mtk_pmic_keys_regs keys_regs[MTK_PMIC_MAX_KEY_COUNT]; 54 u32 pmic_rst_reg; 55 }; 56 57 static const struct mtk_pmic_regs mt6397_regs = { 58 .keys_regs[MTK_PMIC_PWRKEY_INDEX] = 59 MTK_PMIC_KEYS_REGS(MT6397_CHRSTATUS, 60 0x8, MT6397_INT_RSV, 0x10), 61 .keys_regs[MTK_PMIC_HOMEKEY_INDEX] = 62 MTK_PMIC_KEYS_REGS(MT6397_OCSTATUS2, 63 0x10, MT6397_INT_RSV, 0x8), 64 .pmic_rst_reg = MT6397_TOP_RST_MISC, 65 }; 66 67 static const struct mtk_pmic_regs mt6323_regs = { 68 .keys_regs[MTK_PMIC_PWRKEY_INDEX] = 69 MTK_PMIC_KEYS_REGS(MT6323_CHRSTATUS, 70 0x2, MT6323_INT_MISC_CON, 0x10), 71 .keys_regs[MTK_PMIC_HOMEKEY_INDEX] = 72 MTK_PMIC_KEYS_REGS(MT6323_CHRSTATUS, 73 0x4, MT6323_INT_MISC_CON, 0x8), 74 .pmic_rst_reg = MT6323_TOP_RST_MISC, 75 }; 76 77 struct mtk_pmic_keys_info { 78 struct mtk_pmic_keys *keys; 79 const struct mtk_pmic_keys_regs *regs; 80 unsigned int keycode; 81 int irq; 82 bool wakeup:1; 83 }; 84 85 struct mtk_pmic_keys { 86 struct input_dev *input_dev; 87 struct device *dev; 88 struct regmap *regmap; 89 struct mtk_pmic_keys_info keys[MTK_PMIC_MAX_KEY_COUNT]; 90 }; 91 92 enum mtk_pmic_keys_lp_mode { 93 LP_DISABLE, 94 LP_ONEKEY, 95 LP_TWOKEY, 96 }; 97 98 static void mtk_pmic_keys_lp_reset_setup(struct mtk_pmic_keys *keys, 99 u32 pmic_rst_reg) 100 { 101 int ret; 102 u32 long_press_mode, long_press_debounce; 103 104 ret = of_property_read_u32(keys->dev->of_node, 105 "power-off-time-sec", &long_press_debounce); 106 if (ret) 107 long_press_debounce = 0; 108 109 regmap_update_bits(keys->regmap, pmic_rst_reg, 110 MTK_PMIC_RST_DU_MASK << MTK_PMIC_RST_DU_SHIFT, 111 long_press_debounce << MTK_PMIC_RST_DU_SHIFT); 112 113 ret = of_property_read_u32(keys->dev->of_node, 114 "mediatek,long-press-mode", &long_press_mode); 115 if (ret) 116 long_press_mode = LP_DISABLE; 117 118 switch (long_press_mode) { 119 case LP_ONEKEY: 120 regmap_update_bits(keys->regmap, pmic_rst_reg, 121 MTK_PMIC_PWRKEY_RST, 122 MTK_PMIC_PWRKEY_RST); 123 regmap_update_bits(keys->regmap, pmic_rst_reg, 124 MTK_PMIC_HOMEKEY_RST, 125 0); 126 break; 127 case LP_TWOKEY: 128 regmap_update_bits(keys->regmap, pmic_rst_reg, 129 MTK_PMIC_PWRKEY_RST, 130 MTK_PMIC_PWRKEY_RST); 131 regmap_update_bits(keys->regmap, pmic_rst_reg, 132 MTK_PMIC_HOMEKEY_RST, 133 MTK_PMIC_HOMEKEY_RST); 134 break; 135 case LP_DISABLE: 136 regmap_update_bits(keys->regmap, pmic_rst_reg, 137 MTK_PMIC_PWRKEY_RST, 138 0); 139 regmap_update_bits(keys->regmap, pmic_rst_reg, 140 MTK_PMIC_HOMEKEY_RST, 141 0); 142 break; 143 default: 144 break; 145 } 146 } 147 148 static irqreturn_t mtk_pmic_keys_irq_handler_thread(int irq, void *data) 149 { 150 struct mtk_pmic_keys_info *info = data; 151 u32 key_deb, pressed; 152 153 regmap_read(info->keys->regmap, info->regs->deb_reg, &key_deb); 154 155 key_deb &= info->regs->deb_mask; 156 157 pressed = !key_deb; 158 159 input_report_key(info->keys->input_dev, info->keycode, pressed); 160 input_sync(info->keys->input_dev); 161 162 dev_dbg(info->keys->dev, "(%s) key =%d using PMIC\n", 163 pressed ? "pressed" : "released", info->keycode); 164 165 return IRQ_HANDLED; 166 } 167 168 static int mtk_pmic_key_setup(struct mtk_pmic_keys *keys, 169 struct mtk_pmic_keys_info *info) 170 { 171 int ret; 172 173 info->keys = keys; 174 175 ret = regmap_update_bits(keys->regmap, info->regs->intsel_reg, 176 info->regs->intsel_mask, 177 info->regs->intsel_mask); 178 if (ret < 0) 179 return ret; 180 181 ret = devm_request_threaded_irq(keys->dev, info->irq, NULL, 182 mtk_pmic_keys_irq_handler_thread, 183 IRQF_ONESHOT | IRQF_TRIGGER_HIGH, 184 "mtk-pmic-keys", info); 185 if (ret) { 186 dev_err(keys->dev, "Failed to request IRQ: %d: %d\n", 187 info->irq, ret); 188 return ret; 189 } 190 191 input_set_capability(keys->input_dev, EV_KEY, info->keycode); 192 193 return 0; 194 } 195 196 static int __maybe_unused mtk_pmic_keys_suspend(struct device *dev) 197 { 198 struct mtk_pmic_keys *keys = dev_get_drvdata(dev); 199 int index; 200 201 for (index = 0; index < MTK_PMIC_MAX_KEY_COUNT; index++) { 202 if (keys->keys[index].wakeup) 203 enable_irq_wake(keys->keys[index].irq); 204 } 205 206 return 0; 207 } 208 209 static int __maybe_unused mtk_pmic_keys_resume(struct device *dev) 210 { 211 struct mtk_pmic_keys *keys = dev_get_drvdata(dev); 212 int index; 213 214 for (index = 0; index < MTK_PMIC_MAX_KEY_COUNT; index++) { 215 if (keys->keys[index].wakeup) 216 disable_irq_wake(keys->keys[index].irq); 217 } 218 219 return 0; 220 } 221 222 static SIMPLE_DEV_PM_OPS(mtk_pmic_keys_pm_ops, mtk_pmic_keys_suspend, 223 mtk_pmic_keys_resume); 224 225 static const struct of_device_id of_mtk_pmic_keys_match_tbl[] = { 226 { 227 .compatible = "mediatek,mt6397-keys", 228 .data = &mt6397_regs, 229 }, { 230 .compatible = "mediatek,mt6323-keys", 231 .data = &mt6323_regs, 232 }, { 233 /* sentinel */ 234 } 235 }; 236 MODULE_DEVICE_TABLE(of, of_mtk_pmic_keys_match_tbl); 237 238 static int mtk_pmic_keys_probe(struct platform_device *pdev) 239 { 240 int error, index = 0; 241 unsigned int keycount; 242 struct mt6397_chip *pmic_chip = dev_get_drvdata(pdev->dev.parent); 243 struct device_node *node = pdev->dev.of_node, *child; 244 struct mtk_pmic_keys *keys; 245 const struct mtk_pmic_regs *mtk_pmic_regs; 246 struct input_dev *input_dev; 247 const struct of_device_id *of_id = 248 of_match_device(of_mtk_pmic_keys_match_tbl, &pdev->dev); 249 250 keys = devm_kzalloc(&pdev->dev, sizeof(*keys), GFP_KERNEL); 251 if (!keys) 252 return -ENOMEM; 253 254 keys->dev = &pdev->dev; 255 keys->regmap = pmic_chip->regmap; 256 mtk_pmic_regs = of_id->data; 257 258 keys->input_dev = input_dev = devm_input_allocate_device(keys->dev); 259 if (!input_dev) { 260 dev_err(keys->dev, "input allocate device fail.\n"); 261 return -ENOMEM; 262 } 263 264 input_dev->name = "mtk-pmic-keys"; 265 input_dev->id.bustype = BUS_HOST; 266 input_dev->id.vendor = 0x0001; 267 input_dev->id.product = 0x0001; 268 input_dev->id.version = 0x0001; 269 270 keycount = of_get_available_child_count(node); 271 if (keycount > MTK_PMIC_MAX_KEY_COUNT) { 272 dev_err(keys->dev, "too many keys defined (%d)\n", keycount); 273 return -EINVAL; 274 } 275 276 for_each_child_of_node(node, child) { 277 keys->keys[index].regs = &mtk_pmic_regs->keys_regs[index]; 278 279 keys->keys[index].irq = platform_get_irq(pdev, index); 280 if (keys->keys[index].irq < 0) { 281 of_node_put(child); 282 return keys->keys[index].irq; 283 } 284 285 error = of_property_read_u32(child, 286 "linux,keycodes", &keys->keys[index].keycode); 287 if (error) { 288 dev_err(keys->dev, 289 "failed to read key:%d linux,keycode property: %d\n", 290 index, error); 291 of_node_put(child); 292 return error; 293 } 294 295 if (of_property_read_bool(child, "wakeup-source")) 296 keys->keys[index].wakeup = true; 297 298 error = mtk_pmic_key_setup(keys, &keys->keys[index]); 299 if (error) { 300 of_node_put(child); 301 return error; 302 } 303 304 index++; 305 } 306 307 error = input_register_device(input_dev); 308 if (error) { 309 dev_err(&pdev->dev, 310 "register input device failed (%d)\n", error); 311 return error; 312 } 313 314 mtk_pmic_keys_lp_reset_setup(keys, mtk_pmic_regs->pmic_rst_reg); 315 316 platform_set_drvdata(pdev, keys); 317 318 return 0; 319 } 320 321 static struct platform_driver pmic_keys_pdrv = { 322 .probe = mtk_pmic_keys_probe, 323 .driver = { 324 .name = "mtk-pmic-keys", 325 .of_match_table = of_mtk_pmic_keys_match_tbl, 326 .pm = &mtk_pmic_keys_pm_ops, 327 }, 328 }; 329 330 module_platform_driver(pmic_keys_pdrv); 331 332 MODULE_LICENSE("GPL v2"); 333 MODULE_AUTHOR("Chen Zhong <chen.zhong@mediatek.com>"); 334 MODULE_DESCRIPTION("MTK pmic-keys driver v0.1"); 335