1 /* 2 * Copyright (c) 2021 Cornelis Networks. All rights reserved. 3 * Copyright (c) 2013 Intel Corporation. All rights reserved. 4 * Copyright (c) 2006, 2007, 2008, 2009 QLogic Corporation. All rights reserved. 5 * Copyright (c) 2003, 2004, 2005, 2006 PathScale, Inc. All rights reserved. 6 * 7 * This software is available to you under a choice of one of two 8 * licenses. You may choose to be licensed under the terms of the GNU 9 * General Public License (GPL) Version 2, available from the file 10 * COPYING in the main directory of this source tree, or the 11 * OpenIB.org BSD license below: 12 * 13 * Redistribution and use in source and binary forms, with or 14 * without modification, are permitted provided that the following 15 * conditions are met: 16 * 17 * - Redistributions of source code must retain the above 18 * copyright notice, this list of conditions and the following 19 * disclaimer. 20 * 21 * - Redistributions in binary form must reproduce the above 22 * copyright notice, this list of conditions and the following 23 * disclaimer in the documentation and/or other materials 24 * provided with the distribution. 25 * 26 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, 27 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF 28 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND 29 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS 30 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN 31 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN 32 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE 33 * SOFTWARE. 34 */ 35 36 #include <linux/spinlock.h> 37 #include <linux/pci.h> 38 #include <linux/io.h> 39 #include <linux/delay.h> 40 #include <linux/netdevice.h> 41 #include <linux/vmalloc.h> 42 #include <linux/module.h> 43 #include <linux/prefetch.h> 44 45 #include "qib.h" 46 47 DEFINE_MUTEX(qib_mutex); /* general driver use */ 48 49 unsigned qib_ibmtu; 50 module_param_named(ibmtu, qib_ibmtu, uint, S_IRUGO); 51 MODULE_PARM_DESC(ibmtu, "Set max IB MTU (0=2KB, 1=256, 2=512, ... 5=4096"); 52 53 unsigned qib_compat_ddr_negotiate = 1; 54 module_param_named(compat_ddr_negotiate, qib_compat_ddr_negotiate, uint, 55 S_IWUSR | S_IRUGO); 56 MODULE_PARM_DESC(compat_ddr_negotiate, 57 "Attempt pre-IBTA 1.2 DDR speed negotiation"); 58 59 MODULE_LICENSE("Dual BSD/GPL"); 60 MODULE_AUTHOR("Cornelis <support@cornelisnetworks.com>"); 61 MODULE_DESCRIPTION("Cornelis IB driver"); 62 63 /* 64 * QIB_PIO_MAXIBHDR is the max IB header size allowed for in our 65 * PIO send buffers. This is well beyond anything currently 66 * defined in the InfiniBand spec. 67 */ 68 #define QIB_PIO_MAXIBHDR 128 69 70 /* 71 * QIB_MAX_PKT_RCV is the max # if packets processed per receive interrupt. 72 */ 73 #define QIB_MAX_PKT_RECV 64 74 75 struct qlogic_ib_stats qib_stats; 76 77 struct pci_dev *qib_get_pci_dev(struct rvt_dev_info *rdi) 78 { 79 struct qib_ibdev *ibdev = container_of(rdi, struct qib_ibdev, rdi); 80 struct qib_devdata *dd = container_of(ibdev, 81 struct qib_devdata, verbs_dev); 82 return dd->pcidev; 83 } 84 85 /* 86 * Return count of units with at least one port ACTIVE. 87 */ 88 int qib_count_active_units(void) 89 { 90 struct qib_devdata *dd; 91 struct qib_pportdata *ppd; 92 unsigned long index, flags; 93 int pidx, nunits_active = 0; 94 95 xa_lock_irqsave(&qib_dev_table, flags); 96 xa_for_each(&qib_dev_table, index, dd) { 97 if (!(dd->flags & QIB_PRESENT) || !dd->kregbase) 98 continue; 99 for (pidx = 0; pidx < dd->num_pports; ++pidx) { 100 ppd = dd->pport + pidx; 101 if (ppd->lid && (ppd->lflags & (QIBL_LINKINIT | 102 QIBL_LINKARMED | QIBL_LINKACTIVE))) { 103 nunits_active++; 104 break; 105 } 106 } 107 } 108 xa_unlock_irqrestore(&qib_dev_table, flags); 109 return nunits_active; 110 } 111 112 /* 113 * Return count of all units, optionally return in arguments 114 * the number of usable (present) units, and the number of 115 * ports that are up. 116 */ 117 int qib_count_units(int *npresentp, int *nupp) 118 { 119 int nunits = 0, npresent = 0, nup = 0; 120 struct qib_devdata *dd; 121 unsigned long index, flags; 122 int pidx; 123 struct qib_pportdata *ppd; 124 125 xa_lock_irqsave(&qib_dev_table, flags); 126 xa_for_each(&qib_dev_table, index, dd) { 127 nunits++; 128 if ((dd->flags & QIB_PRESENT) && dd->kregbase) 129 npresent++; 130 for (pidx = 0; pidx < dd->num_pports; ++pidx) { 131 ppd = dd->pport + pidx; 132 if (ppd->lid && (ppd->lflags & (QIBL_LINKINIT | 133 QIBL_LINKARMED | QIBL_LINKACTIVE))) 134 nup++; 135 } 136 } 137 xa_unlock_irqrestore(&qib_dev_table, flags); 138 139 if (npresentp) 140 *npresentp = npresent; 141 if (nupp) 142 *nupp = nup; 143 144 return nunits; 145 } 146 147 /** 148 * qib_wait_linkstate - wait for an IB link state change to occur 149 * @ppd: the qlogic_ib device 150 * @state: the state to wait for 151 * @msecs: the number of milliseconds to wait 152 * 153 * wait up to msecs milliseconds for IB link state change to occur for 154 * now, take the easy polling route. Currently used only by 155 * qib_set_linkstate. Returns 0 if state reached, otherwise 156 * -ETIMEDOUT state can have multiple states set, for any of several 157 * transitions. 158 */ 159 int qib_wait_linkstate(struct qib_pportdata *ppd, u32 state, int msecs) 160 { 161 int ret; 162 unsigned long flags; 163 164 spin_lock_irqsave(&ppd->lflags_lock, flags); 165 if (ppd->state_wanted) { 166 spin_unlock_irqrestore(&ppd->lflags_lock, flags); 167 ret = -EBUSY; 168 goto bail; 169 } 170 ppd->state_wanted = state; 171 spin_unlock_irqrestore(&ppd->lflags_lock, flags); 172 wait_event_interruptible_timeout(ppd->state_wait, 173 (ppd->lflags & state), 174 msecs_to_jiffies(msecs)); 175 spin_lock_irqsave(&ppd->lflags_lock, flags); 176 ppd->state_wanted = 0; 177 spin_unlock_irqrestore(&ppd->lflags_lock, flags); 178 179 if (!(ppd->lflags & state)) 180 ret = -ETIMEDOUT; 181 else 182 ret = 0; 183 bail: 184 return ret; 185 } 186 187 int qib_set_linkstate(struct qib_pportdata *ppd, u8 newstate) 188 { 189 u32 lstate; 190 int ret; 191 struct qib_devdata *dd = ppd->dd; 192 unsigned long flags; 193 194 switch (newstate) { 195 case QIB_IB_LINKDOWN_ONLY: 196 dd->f_set_ib_cfg(ppd, QIB_IB_CFG_LSTATE, 197 IB_LINKCMD_DOWN | IB_LINKINITCMD_NOP); 198 /* don't wait */ 199 ret = 0; 200 goto bail; 201 202 case QIB_IB_LINKDOWN: 203 dd->f_set_ib_cfg(ppd, QIB_IB_CFG_LSTATE, 204 IB_LINKCMD_DOWN | IB_LINKINITCMD_POLL); 205 /* don't wait */ 206 ret = 0; 207 goto bail; 208 209 case QIB_IB_LINKDOWN_SLEEP: 210 dd->f_set_ib_cfg(ppd, QIB_IB_CFG_LSTATE, 211 IB_LINKCMD_DOWN | IB_LINKINITCMD_SLEEP); 212 /* don't wait */ 213 ret = 0; 214 goto bail; 215 216 case QIB_IB_LINKDOWN_DISABLE: 217 dd->f_set_ib_cfg(ppd, QIB_IB_CFG_LSTATE, 218 IB_LINKCMD_DOWN | IB_LINKINITCMD_DISABLE); 219 /* don't wait */ 220 ret = 0; 221 goto bail; 222 223 case QIB_IB_LINKARM: 224 if (ppd->lflags & QIBL_LINKARMED) { 225 ret = 0; 226 goto bail; 227 } 228 if (!(ppd->lflags & (QIBL_LINKINIT | QIBL_LINKACTIVE))) { 229 ret = -EINVAL; 230 goto bail; 231 } 232 /* 233 * Since the port can be ACTIVE when we ask for ARMED, 234 * clear QIBL_LINKV so we can wait for a transition. 235 * If the link isn't ARMED, then something else happened 236 * and there is no point waiting for ARMED. 237 */ 238 spin_lock_irqsave(&ppd->lflags_lock, flags); 239 ppd->lflags &= ~QIBL_LINKV; 240 spin_unlock_irqrestore(&ppd->lflags_lock, flags); 241 dd->f_set_ib_cfg(ppd, QIB_IB_CFG_LSTATE, 242 IB_LINKCMD_ARMED | IB_LINKINITCMD_NOP); 243 lstate = QIBL_LINKV; 244 break; 245 246 case QIB_IB_LINKACTIVE: 247 if (ppd->lflags & QIBL_LINKACTIVE) { 248 ret = 0; 249 goto bail; 250 } 251 if (!(ppd->lflags & QIBL_LINKARMED)) { 252 ret = -EINVAL; 253 goto bail; 254 } 255 dd->f_set_ib_cfg(ppd, QIB_IB_CFG_LSTATE, 256 IB_LINKCMD_ACTIVE | IB_LINKINITCMD_NOP); 257 lstate = QIBL_LINKACTIVE; 258 break; 259 260 default: 261 ret = -EINVAL; 262 goto bail; 263 } 264 ret = qib_wait_linkstate(ppd, lstate, 10); 265 266 bail: 267 return ret; 268 } 269 270 /* 271 * Get address of eager buffer from it's index (allocated in chunks, not 272 * contiguous). 273 */ 274 static inline void *qib_get_egrbuf(const struct qib_ctxtdata *rcd, u32 etail) 275 { 276 const u32 chunk = etail >> rcd->rcvegrbufs_perchunk_shift; 277 const u32 idx = etail & ((u32)rcd->rcvegrbufs_perchunk - 1); 278 279 return rcd->rcvegrbuf[chunk] + (idx << rcd->dd->rcvegrbufsize_shift); 280 } 281 282 /* 283 * Returns 1 if error was a CRC, else 0. 284 * Needed for some chip's synthesized error counters. 285 */ 286 static u32 qib_rcv_hdrerr(struct qib_ctxtdata *rcd, struct qib_pportdata *ppd, 287 u32 ctxt, u32 eflags, u32 l, u32 etail, 288 __le32 *rhf_addr, struct qib_message_header *rhdr) 289 { 290 u32 ret = 0; 291 292 if (eflags & (QLOGIC_IB_RHF_H_ICRCERR | QLOGIC_IB_RHF_H_VCRCERR)) 293 ret = 1; 294 else if (eflags == QLOGIC_IB_RHF_H_TIDERR) { 295 /* For TIDERR and RC QPs premptively schedule a NAK */ 296 struct ib_header *hdr = (struct ib_header *)rhdr; 297 struct ib_other_headers *ohdr = NULL; 298 struct qib_ibport *ibp = &ppd->ibport_data; 299 struct qib_devdata *dd = ppd->dd; 300 struct rvt_dev_info *rdi = &dd->verbs_dev.rdi; 301 struct rvt_qp *qp = NULL; 302 u32 tlen = qib_hdrget_length_in_bytes(rhf_addr); 303 u16 lid = be16_to_cpu(hdr->lrh[1]); 304 int lnh = be16_to_cpu(hdr->lrh[0]) & 3; 305 u32 qp_num; 306 u32 opcode; 307 u32 psn; 308 int diff; 309 310 /* Sanity check packet */ 311 if (tlen < 24) 312 goto drop; 313 314 if (lid < be16_to_cpu(IB_MULTICAST_LID_BASE)) { 315 lid &= ~((1 << ppd->lmc) - 1); 316 if (unlikely(lid != ppd->lid)) 317 goto drop; 318 } 319 320 /* Check for GRH */ 321 if (lnh == QIB_LRH_BTH) 322 ohdr = &hdr->u.oth; 323 else if (lnh == QIB_LRH_GRH) { 324 u32 vtf; 325 326 ohdr = &hdr->u.l.oth; 327 if (hdr->u.l.grh.next_hdr != IB_GRH_NEXT_HDR) 328 goto drop; 329 vtf = be32_to_cpu(hdr->u.l.grh.version_tclass_flow); 330 if ((vtf >> IB_GRH_VERSION_SHIFT) != IB_GRH_VERSION) 331 goto drop; 332 } else 333 goto drop; 334 335 /* Get opcode and PSN from packet */ 336 opcode = be32_to_cpu(ohdr->bth[0]); 337 opcode >>= 24; 338 psn = be32_to_cpu(ohdr->bth[2]); 339 340 /* Get the destination QP number. */ 341 qp_num = be32_to_cpu(ohdr->bth[1]) & RVT_QPN_MASK; 342 if (qp_num != QIB_MULTICAST_QPN) { 343 int ruc_res; 344 345 rcu_read_lock(); 346 qp = rvt_lookup_qpn(rdi, &ibp->rvp, qp_num); 347 if (!qp) { 348 rcu_read_unlock(); 349 goto drop; 350 } 351 352 /* 353 * Handle only RC QPs - for other QP types drop error 354 * packet. 355 */ 356 spin_lock(&qp->r_lock); 357 358 /* Check for valid receive state. */ 359 if (!(ib_rvt_state_ops[qp->state] & 360 RVT_PROCESS_RECV_OK)) { 361 ibp->rvp.n_pkt_drops++; 362 goto unlock; 363 } 364 365 switch (qp->ibqp.qp_type) { 366 case IB_QPT_RC: 367 ruc_res = 368 qib_ruc_check_hdr( 369 ibp, hdr, 370 lnh == QIB_LRH_GRH, 371 qp, 372 be32_to_cpu(ohdr->bth[0])); 373 if (ruc_res) 374 goto unlock; 375 376 /* Only deal with RDMA Writes for now */ 377 if (opcode < 378 IB_OPCODE_RC_RDMA_READ_RESPONSE_FIRST) { 379 diff = qib_cmp24(psn, qp->r_psn); 380 if (!qp->r_nak_state && diff >= 0) { 381 ibp->rvp.n_rc_seqnak++; 382 qp->r_nak_state = 383 IB_NAK_PSN_ERROR; 384 /* Use the expected PSN. */ 385 qp->r_ack_psn = qp->r_psn; 386 /* 387 * Wait to send the sequence 388 * NAK until all packets 389 * in the receive queue have 390 * been processed. 391 * Otherwise, we end up 392 * propagating congestion. 393 */ 394 if (list_empty(&qp->rspwait)) { 395 qp->r_flags |= 396 RVT_R_RSP_NAK; 397 rvt_get_qp(qp); 398 list_add_tail( 399 &qp->rspwait, 400 &rcd->qp_wait_list); 401 } 402 } /* Out of sequence NAK */ 403 } /* QP Request NAKs */ 404 break; 405 case IB_QPT_SMI: 406 case IB_QPT_GSI: 407 case IB_QPT_UD: 408 case IB_QPT_UC: 409 default: 410 /* For now don't handle any other QP types */ 411 break; 412 } 413 414 unlock: 415 spin_unlock(&qp->r_lock); 416 rcu_read_unlock(); 417 } /* Unicast QP */ 418 } /* Valid packet with TIDErr */ 419 420 drop: 421 return ret; 422 } 423 424 /* 425 * qib_kreceive - receive a packet 426 * @rcd: the qlogic_ib context 427 * @llic: gets count of good packets needed to clear lli, 428 * (used with chips that need need to track crcs for lli) 429 * 430 * called from interrupt handler for errors or receive interrupt 431 * Returns number of CRC error packets, needed by some chips for 432 * local link integrity tracking. crcs are adjusted down by following 433 * good packets, if any, and count of good packets is also tracked. 434 */ 435 u32 qib_kreceive(struct qib_ctxtdata *rcd, u32 *llic, u32 *npkts) 436 { 437 struct qib_devdata *dd = rcd->dd; 438 struct qib_pportdata *ppd = rcd->ppd; 439 __le32 *rhf_addr; 440 void *ebuf; 441 const u32 rsize = dd->rcvhdrentsize; /* words */ 442 const u32 maxcnt = dd->rcvhdrcnt * rsize; /* words */ 443 u32 etail = -1, l, hdrqtail; 444 struct qib_message_header *hdr; 445 u32 eflags, etype, tlen, i = 0, updegr = 0, crcs = 0; 446 int last; 447 u64 lval; 448 struct rvt_qp *qp, *nqp; 449 450 l = rcd->head; 451 rhf_addr = (__le32 *) rcd->rcvhdrq + l + dd->rhf_offset; 452 if (dd->flags & QIB_NODMA_RTAIL) { 453 u32 seq = qib_hdrget_seq(rhf_addr); 454 455 if (seq != rcd->seq_cnt) 456 goto bail; 457 hdrqtail = 0; 458 } else { 459 hdrqtail = qib_get_rcvhdrtail(rcd); 460 if (l == hdrqtail) 461 goto bail; 462 smp_rmb(); /* prevent speculative reads of dma'ed hdrq */ 463 } 464 465 for (last = 0, i = 1; !last; i += !last) { 466 hdr = dd->f_get_msgheader(dd, rhf_addr); 467 eflags = qib_hdrget_err_flags(rhf_addr); 468 etype = qib_hdrget_rcv_type(rhf_addr); 469 /* total length */ 470 tlen = qib_hdrget_length_in_bytes(rhf_addr); 471 ebuf = NULL; 472 if ((dd->flags & QIB_NODMA_RTAIL) ? 473 qib_hdrget_use_egr_buf(rhf_addr) : 474 (etype != RCVHQ_RCV_TYPE_EXPECTED)) { 475 etail = qib_hdrget_index(rhf_addr); 476 updegr = 1; 477 if (tlen > sizeof(*hdr) || 478 etype >= RCVHQ_RCV_TYPE_NON_KD) { 479 ebuf = qib_get_egrbuf(rcd, etail); 480 prefetch_range(ebuf, tlen - sizeof(*hdr)); 481 } 482 } 483 if (!eflags) { 484 u16 lrh_len = be16_to_cpu(hdr->lrh[2]) << 2; 485 486 if (lrh_len != tlen) { 487 qib_stats.sps_lenerrs++; 488 goto move_along; 489 } 490 } 491 if (etype == RCVHQ_RCV_TYPE_NON_KD && !eflags && 492 ebuf == NULL && 493 tlen > (dd->rcvhdrentsize - 2 + 1 - 494 qib_hdrget_offset(rhf_addr)) << 2) { 495 goto move_along; 496 } 497 498 /* 499 * Both tiderr and qibhdrerr are set for all plain IB 500 * packets; only qibhdrerr should be set. 501 */ 502 if (unlikely(eflags)) 503 crcs += qib_rcv_hdrerr(rcd, ppd, rcd->ctxt, eflags, l, 504 etail, rhf_addr, hdr); 505 else if (etype == RCVHQ_RCV_TYPE_NON_KD) { 506 qib_ib_rcv(rcd, hdr, ebuf, tlen); 507 if (crcs) 508 crcs--; 509 else if (llic && *llic) 510 --*llic; 511 } 512 move_along: 513 l += rsize; 514 if (l >= maxcnt) 515 l = 0; 516 if (i == QIB_MAX_PKT_RECV) 517 last = 1; 518 519 rhf_addr = (__le32 *) rcd->rcvhdrq + l + dd->rhf_offset; 520 if (dd->flags & QIB_NODMA_RTAIL) { 521 u32 seq = qib_hdrget_seq(rhf_addr); 522 523 if (++rcd->seq_cnt > 13) 524 rcd->seq_cnt = 1; 525 if (seq != rcd->seq_cnt) 526 last = 1; 527 } else if (l == hdrqtail) 528 last = 1; 529 /* 530 * Update head regs etc., every 16 packets, if not last pkt, 531 * to help prevent rcvhdrq overflows, when many packets 532 * are processed and queue is nearly full. 533 * Don't request an interrupt for intermediate updates. 534 */ 535 lval = l; 536 if (!last && !(i & 0xf)) { 537 dd->f_update_usrhead(rcd, lval, updegr, etail, i); 538 updegr = 0; 539 } 540 } 541 542 rcd->head = l; 543 544 /* 545 * Iterate over all QPs waiting to respond. 546 * The list won't change since the IRQ is only run on one CPU. 547 */ 548 list_for_each_entry_safe(qp, nqp, &rcd->qp_wait_list, rspwait) { 549 list_del_init(&qp->rspwait); 550 if (qp->r_flags & RVT_R_RSP_NAK) { 551 qp->r_flags &= ~RVT_R_RSP_NAK; 552 qib_send_rc_ack(qp); 553 } 554 if (qp->r_flags & RVT_R_RSP_SEND) { 555 unsigned long flags; 556 557 qp->r_flags &= ~RVT_R_RSP_SEND; 558 spin_lock_irqsave(&qp->s_lock, flags); 559 if (ib_rvt_state_ops[qp->state] & 560 RVT_PROCESS_OR_FLUSH_SEND) 561 qib_schedule_send(qp); 562 spin_unlock_irqrestore(&qp->s_lock, flags); 563 } 564 rvt_put_qp(qp); 565 } 566 567 bail: 568 /* Report number of packets consumed */ 569 if (npkts) 570 *npkts = i; 571 572 /* 573 * Always write head at end, and setup rcv interrupt, even 574 * if no packets were processed. 575 */ 576 lval = (u64)rcd->head | dd->rhdrhead_intr_off; 577 dd->f_update_usrhead(rcd, lval, updegr, etail, i); 578 return crcs; 579 } 580 581 /** 582 * qib_set_mtu - set the MTU 583 * @ppd: the perport data 584 * @arg: the new MTU 585 * 586 * We can handle "any" incoming size, the issue here is whether we 587 * need to restrict our outgoing size. For now, we don't do any 588 * sanity checking on this, and we don't deal with what happens to 589 * programs that are already running when the size changes. 590 * NOTE: changing the MTU will usually cause the IBC to go back to 591 * link INIT state... 592 */ 593 int qib_set_mtu(struct qib_pportdata *ppd, u16 arg) 594 { 595 u32 piosize; 596 int ret, chk; 597 598 if (arg != 256 && arg != 512 && arg != 1024 && arg != 2048 && 599 arg != 4096) { 600 ret = -EINVAL; 601 goto bail; 602 } 603 chk = ib_mtu_enum_to_int(qib_ibmtu); 604 if (chk > 0 && arg > chk) { 605 ret = -EINVAL; 606 goto bail; 607 } 608 609 piosize = ppd->ibmaxlen; 610 ppd->ibmtu = arg; 611 612 if (arg >= (piosize - QIB_PIO_MAXIBHDR)) { 613 /* Only if it's not the initial value (or reset to it) */ 614 if (piosize != ppd->init_ibmaxlen) { 615 if (arg > piosize && arg <= ppd->init_ibmaxlen) 616 piosize = ppd->init_ibmaxlen - 2 * sizeof(u32); 617 ppd->ibmaxlen = piosize; 618 } 619 } else if ((arg + QIB_PIO_MAXIBHDR) != ppd->ibmaxlen) { 620 piosize = arg + QIB_PIO_MAXIBHDR - 2 * sizeof(u32); 621 ppd->ibmaxlen = piosize; 622 } 623 624 ppd->dd->f_set_ib_cfg(ppd, QIB_IB_CFG_MTU, 0); 625 626 ret = 0; 627 628 bail: 629 return ret; 630 } 631 632 int qib_set_lid(struct qib_pportdata *ppd, u32 lid, u8 lmc) 633 { 634 struct qib_devdata *dd = ppd->dd; 635 636 ppd->lid = lid; 637 ppd->lmc = lmc; 638 639 dd->f_set_ib_cfg(ppd, QIB_IB_CFG_LIDLMC, 640 lid | (~((1U << lmc) - 1)) << 16); 641 642 qib_devinfo(dd->pcidev, "IB%u:%u got a lid: 0x%x\n", 643 dd->unit, ppd->port, lid); 644 645 return 0; 646 } 647 648 /* 649 * Following deal with the "obviously simple" task of overriding the state 650 * of the LEDS, which normally indicate link physical and logical status. 651 * The complications arise in dealing with different hardware mappings 652 * and the board-dependent routine being called from interrupts. 653 * and then there's the requirement to _flash_ them. 654 */ 655 #define LED_OVER_FREQ_SHIFT 8 656 #define LED_OVER_FREQ_MASK (0xFF<<LED_OVER_FREQ_SHIFT) 657 /* Below is "non-zero" to force override, but both actual LEDs are off */ 658 #define LED_OVER_BOTH_OFF (8) 659 660 static void qib_run_led_override(struct timer_list *t) 661 { 662 struct qib_pportdata *ppd = from_timer(ppd, t, 663 led_override_timer); 664 struct qib_devdata *dd = ppd->dd; 665 int timeoff; 666 int ph_idx; 667 668 if (!(dd->flags & QIB_INITTED)) 669 return; 670 671 ph_idx = ppd->led_override_phase++ & 1; 672 ppd->led_override = ppd->led_override_vals[ph_idx]; 673 timeoff = ppd->led_override_timeoff; 674 675 dd->f_setextled(ppd, 1); 676 /* 677 * don't re-fire the timer if user asked for it to be off; we let 678 * it fire one more time after they turn it off to simplify 679 */ 680 if (ppd->led_override_vals[0] || ppd->led_override_vals[1]) 681 mod_timer(&ppd->led_override_timer, jiffies + timeoff); 682 } 683 684 void qib_set_led_override(struct qib_pportdata *ppd, unsigned int val) 685 { 686 struct qib_devdata *dd = ppd->dd; 687 int timeoff, freq; 688 689 if (!(dd->flags & QIB_INITTED)) 690 return; 691 692 /* First check if we are blinking. If not, use 1HZ polling */ 693 timeoff = HZ; 694 freq = (val & LED_OVER_FREQ_MASK) >> LED_OVER_FREQ_SHIFT; 695 696 if (freq) { 697 /* For blink, set each phase from one nybble of val */ 698 ppd->led_override_vals[0] = val & 0xF; 699 ppd->led_override_vals[1] = (val >> 4) & 0xF; 700 timeoff = (HZ << 4)/freq; 701 } else { 702 /* Non-blink set both phases the same. */ 703 ppd->led_override_vals[0] = val & 0xF; 704 ppd->led_override_vals[1] = val & 0xF; 705 } 706 ppd->led_override_timeoff = timeoff; 707 708 /* 709 * If the timer has not already been started, do so. Use a "quick" 710 * timeout so the function will be called soon, to look at our request. 711 */ 712 if (atomic_inc_return(&ppd->led_override_timer_active) == 1) { 713 /* Need to start timer */ 714 timer_setup(&ppd->led_override_timer, qib_run_led_override, 0); 715 ppd->led_override_timer.expires = jiffies + 1; 716 add_timer(&ppd->led_override_timer); 717 } else { 718 if (ppd->led_override_vals[0] || ppd->led_override_vals[1]) 719 mod_timer(&ppd->led_override_timer, jiffies + 1); 720 atomic_dec(&ppd->led_override_timer_active); 721 } 722 } 723 724 /** 725 * qib_reset_device - reset the chip if possible 726 * @unit: the device to reset 727 * 728 * Whether or not reset is successful, we attempt to re-initialize the chip 729 * (that is, much like a driver unload/reload). We clear the INITTED flag 730 * so that the various entry points will fail until we reinitialize. For 731 * now, we only allow this if no user contexts are open that use chip resources 732 */ 733 int qib_reset_device(int unit) 734 { 735 int ret, i; 736 struct qib_devdata *dd = qib_lookup(unit); 737 struct qib_pportdata *ppd; 738 unsigned long flags; 739 int pidx; 740 741 if (!dd) { 742 ret = -ENODEV; 743 goto bail; 744 } 745 746 qib_devinfo(dd->pcidev, "Reset on unit %u requested\n", unit); 747 748 if (!dd->kregbase || !(dd->flags & QIB_PRESENT)) { 749 qib_devinfo(dd->pcidev, 750 "Invalid unit number %u or not initialized or not present\n", 751 unit); 752 ret = -ENXIO; 753 goto bail; 754 } 755 756 spin_lock_irqsave(&dd->uctxt_lock, flags); 757 if (dd->rcd) 758 for (i = dd->first_user_ctxt; i < dd->cfgctxts; i++) { 759 if (!dd->rcd[i] || !dd->rcd[i]->cnt) 760 continue; 761 spin_unlock_irqrestore(&dd->uctxt_lock, flags); 762 ret = -EBUSY; 763 goto bail; 764 } 765 spin_unlock_irqrestore(&dd->uctxt_lock, flags); 766 767 for (pidx = 0; pidx < dd->num_pports; ++pidx) { 768 ppd = dd->pport + pidx; 769 if (atomic_read(&ppd->led_override_timer_active)) { 770 /* Need to stop LED timer, _then_ shut off LEDs */ 771 del_timer_sync(&ppd->led_override_timer); 772 atomic_set(&ppd->led_override_timer_active, 0); 773 } 774 775 /* Shut off LEDs after we are sure timer is not running */ 776 ppd->led_override = LED_OVER_BOTH_OFF; 777 dd->f_setextled(ppd, 0); 778 if (dd->flags & QIB_HAS_SEND_DMA) 779 qib_teardown_sdma(ppd); 780 } 781 782 ret = dd->f_reset(dd); 783 if (ret == 1) 784 ret = qib_init(dd, 1); 785 else 786 ret = -EAGAIN; 787 if (ret) 788 qib_dev_err(dd, 789 "Reinitialize unit %u after reset failed with %d\n", 790 unit, ret); 791 else 792 qib_devinfo(dd->pcidev, 793 "Reinitialized unit %u after resetting\n", 794 unit); 795 796 bail: 797 return ret; 798 } 799