1 /* 2 * Copyright (c) 2004, 2005 Topspin Communications. All rights reserved. 3 * Copyright (c) 2005 Sun Microsystems, Inc. All rights reserved. 4 * Copyright (c) 2005 Cisco Systems. All rights reserved. 5 * Copyright (c) 2005 Mellanox Technologies. All rights reserved. 6 * Copyright (c) 2004 Voltaire, Inc. All rights reserved. 7 * 8 * This software is available to you under a choice of one of two 9 * licenses. You may choose to be licensed under the terms of the GNU 10 * General Public License (GPL) Version 2, available from the file 11 * COPYING in the main directory of this source tree, or the 12 * OpenIB.org BSD license below: 13 * 14 * Redistribution and use in source and binary forms, with or 15 * without modification, are permitted provided that the following 16 * conditions are met: 17 * 18 * - Redistributions of source code must retain the above 19 * copyright notice, this list of conditions and the following 20 * disclaimer. 21 * 22 * - Redistributions in binary form must reproduce the above 23 * copyright notice, this list of conditions and the following 24 * disclaimer in the documentation and/or other materials 25 * provided with the distribution. 26 * 27 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, 28 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF 29 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND 30 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS 31 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN 32 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN 33 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE 34 * SOFTWARE. 35 * 36 * $Id: mthca_provider.c 1397 2004-12-28 05:09:00Z roland $ 37 */ 38 39 #include <rdma/ib_smi.h> 40 #include <rdma/ib_user_verbs.h> 41 #include <linux/mm.h> 42 43 #include "mthca_dev.h" 44 #include "mthca_cmd.h" 45 #include "mthca_user.h" 46 #include "mthca_memfree.h" 47 48 static int mthca_query_device(struct ib_device *ibdev, 49 struct ib_device_attr *props) 50 { 51 struct ib_smp *in_mad = NULL; 52 struct ib_smp *out_mad = NULL; 53 int err = -ENOMEM; 54 struct mthca_dev* mdev = to_mdev(ibdev); 55 56 u8 status; 57 58 in_mad = kmalloc(sizeof *in_mad, GFP_KERNEL); 59 out_mad = kmalloc(sizeof *out_mad, GFP_KERNEL); 60 if (!in_mad || !out_mad) 61 goto out; 62 63 memset(props, 0, sizeof *props); 64 65 props->fw_ver = mdev->fw_ver; 66 67 memset(in_mad, 0, sizeof *in_mad); 68 in_mad->base_version = 1; 69 in_mad->mgmt_class = IB_MGMT_CLASS_SUBN_LID_ROUTED; 70 in_mad->class_version = 1; 71 in_mad->method = IB_MGMT_METHOD_GET; 72 in_mad->attr_id = IB_SMP_ATTR_NODE_INFO; 73 74 err = mthca_MAD_IFC(mdev, 1, 1, 75 1, NULL, NULL, in_mad, out_mad, 76 &status); 77 if (err) 78 goto out; 79 if (status) { 80 err = -EINVAL; 81 goto out; 82 } 83 84 props->device_cap_flags = mdev->device_cap_flags; 85 props->vendor_id = be32_to_cpup((__be32 *) (out_mad->data + 36)) & 86 0xffffff; 87 props->vendor_part_id = be16_to_cpup((__be16 *) (out_mad->data + 30)); 88 props->hw_ver = be32_to_cpup((__be32 *) (out_mad->data + 32)); 89 memcpy(&props->sys_image_guid, out_mad->data + 4, 8); 90 memcpy(&props->node_guid, out_mad->data + 12, 8); 91 92 props->max_mr_size = ~0ull; 93 props->max_qp = mdev->limits.num_qps - mdev->limits.reserved_qps; 94 props->max_qp_wr = mdev->limits.max_wqes; 95 props->max_sge = mdev->limits.max_sg; 96 props->max_cq = mdev->limits.num_cqs - mdev->limits.reserved_cqs; 97 props->max_cqe = mdev->limits.max_cqes; 98 props->max_mr = mdev->limits.num_mpts - mdev->limits.reserved_mrws; 99 props->max_pd = mdev->limits.num_pds - mdev->limits.reserved_pds; 100 props->max_qp_rd_atom = 1 << mdev->qp_table.rdb_shift; 101 props->max_qp_init_rd_atom = mdev->limits.max_qp_init_rdma; 102 props->max_res_rd_atom = props->max_qp_rd_atom * props->max_qp; 103 props->max_srq = mdev->limits.num_srqs - mdev->limits.reserved_srqs; 104 props->max_srq_wr = mdev->limits.max_srq_wqes; 105 props->max_srq_sge = mdev->limits.max_sg; 106 props->local_ca_ack_delay = mdev->limits.local_ca_ack_delay; 107 props->atomic_cap = mdev->limits.flags & DEV_LIM_FLAG_ATOMIC ? 108 IB_ATOMIC_HCA : IB_ATOMIC_NONE; 109 props->max_pkeys = mdev->limits.pkey_table_len; 110 props->max_mcast_grp = mdev->limits.num_mgms + mdev->limits.num_amgms; 111 props->max_mcast_qp_attach = MTHCA_QP_PER_MGM; 112 props->max_total_mcast_qp_attach = props->max_mcast_qp_attach * 113 props->max_mcast_grp; 114 115 err = 0; 116 out: 117 kfree(in_mad); 118 kfree(out_mad); 119 return err; 120 } 121 122 static int mthca_query_port(struct ib_device *ibdev, 123 u8 port, struct ib_port_attr *props) 124 { 125 struct ib_smp *in_mad = NULL; 126 struct ib_smp *out_mad = NULL; 127 int err = -ENOMEM; 128 u8 status; 129 130 in_mad = kmalloc(sizeof *in_mad, GFP_KERNEL); 131 out_mad = kmalloc(sizeof *out_mad, GFP_KERNEL); 132 if (!in_mad || !out_mad) 133 goto out; 134 135 memset(props, 0, sizeof *props); 136 137 memset(in_mad, 0, sizeof *in_mad); 138 in_mad->base_version = 1; 139 in_mad->mgmt_class = IB_MGMT_CLASS_SUBN_LID_ROUTED; 140 in_mad->class_version = 1; 141 in_mad->method = IB_MGMT_METHOD_GET; 142 in_mad->attr_id = IB_SMP_ATTR_PORT_INFO; 143 in_mad->attr_mod = cpu_to_be32(port); 144 145 err = mthca_MAD_IFC(to_mdev(ibdev), 1, 1, 146 port, NULL, NULL, in_mad, out_mad, 147 &status); 148 if (err) 149 goto out; 150 if (status) { 151 err = -EINVAL; 152 goto out; 153 } 154 155 props->lid = be16_to_cpup((__be16 *) (out_mad->data + 16)); 156 props->lmc = out_mad->data[34] & 0x7; 157 props->sm_lid = be16_to_cpup((__be16 *) (out_mad->data + 18)); 158 props->sm_sl = out_mad->data[36] & 0xf; 159 props->state = out_mad->data[32] & 0xf; 160 props->phys_state = out_mad->data[33] >> 4; 161 props->port_cap_flags = be32_to_cpup((__be32 *) (out_mad->data + 20)); 162 props->gid_tbl_len = to_mdev(ibdev)->limits.gid_table_len; 163 props->max_msg_sz = 0x80000000; 164 props->pkey_tbl_len = to_mdev(ibdev)->limits.pkey_table_len; 165 props->bad_pkey_cntr = be16_to_cpup((__be16 *) (out_mad->data + 46)); 166 props->qkey_viol_cntr = be16_to_cpup((__be16 *) (out_mad->data + 48)); 167 props->active_width = out_mad->data[31] & 0xf; 168 props->active_speed = out_mad->data[35] >> 4; 169 props->max_mtu = out_mad->data[41] & 0xf; 170 props->active_mtu = out_mad->data[36] >> 4; 171 props->subnet_timeout = out_mad->data[51] & 0x1f; 172 173 out: 174 kfree(in_mad); 175 kfree(out_mad); 176 return err; 177 } 178 179 static int mthca_modify_port(struct ib_device *ibdev, 180 u8 port, int port_modify_mask, 181 struct ib_port_modify *props) 182 { 183 struct mthca_set_ib_param set_ib; 184 struct ib_port_attr attr; 185 int err; 186 u8 status; 187 188 if (down_interruptible(&to_mdev(ibdev)->cap_mask_mutex)) 189 return -ERESTARTSYS; 190 191 err = mthca_query_port(ibdev, port, &attr); 192 if (err) 193 goto out; 194 195 set_ib.set_si_guid = 0; 196 set_ib.reset_qkey_viol = !!(port_modify_mask & IB_PORT_RESET_QKEY_CNTR); 197 198 set_ib.cap_mask = (attr.port_cap_flags | props->set_port_cap_mask) & 199 ~props->clr_port_cap_mask; 200 201 err = mthca_SET_IB(to_mdev(ibdev), &set_ib, port, &status); 202 if (err) 203 goto out; 204 if (status) { 205 err = -EINVAL; 206 goto out; 207 } 208 209 out: 210 up(&to_mdev(ibdev)->cap_mask_mutex); 211 return err; 212 } 213 214 static int mthca_query_pkey(struct ib_device *ibdev, 215 u8 port, u16 index, u16 *pkey) 216 { 217 struct ib_smp *in_mad = NULL; 218 struct ib_smp *out_mad = NULL; 219 int err = -ENOMEM; 220 u8 status; 221 222 in_mad = kmalloc(sizeof *in_mad, GFP_KERNEL); 223 out_mad = kmalloc(sizeof *out_mad, GFP_KERNEL); 224 if (!in_mad || !out_mad) 225 goto out; 226 227 memset(in_mad, 0, sizeof *in_mad); 228 in_mad->base_version = 1; 229 in_mad->mgmt_class = IB_MGMT_CLASS_SUBN_LID_ROUTED; 230 in_mad->class_version = 1; 231 in_mad->method = IB_MGMT_METHOD_GET; 232 in_mad->attr_id = IB_SMP_ATTR_PKEY_TABLE; 233 in_mad->attr_mod = cpu_to_be32(index / 32); 234 235 err = mthca_MAD_IFC(to_mdev(ibdev), 1, 1, 236 port, NULL, NULL, in_mad, out_mad, 237 &status); 238 if (err) 239 goto out; 240 if (status) { 241 err = -EINVAL; 242 goto out; 243 } 244 245 *pkey = be16_to_cpu(((__be16 *) out_mad->data)[index % 32]); 246 247 out: 248 kfree(in_mad); 249 kfree(out_mad); 250 return err; 251 } 252 253 static int mthca_query_gid(struct ib_device *ibdev, u8 port, 254 int index, union ib_gid *gid) 255 { 256 struct ib_smp *in_mad = NULL; 257 struct ib_smp *out_mad = NULL; 258 int err = -ENOMEM; 259 u8 status; 260 261 in_mad = kmalloc(sizeof *in_mad, GFP_KERNEL); 262 out_mad = kmalloc(sizeof *out_mad, GFP_KERNEL); 263 if (!in_mad || !out_mad) 264 goto out; 265 266 memset(in_mad, 0, sizeof *in_mad); 267 in_mad->base_version = 1; 268 in_mad->mgmt_class = IB_MGMT_CLASS_SUBN_LID_ROUTED; 269 in_mad->class_version = 1; 270 in_mad->method = IB_MGMT_METHOD_GET; 271 in_mad->attr_id = IB_SMP_ATTR_PORT_INFO; 272 in_mad->attr_mod = cpu_to_be32(port); 273 274 err = mthca_MAD_IFC(to_mdev(ibdev), 1, 1, 275 port, NULL, NULL, in_mad, out_mad, 276 &status); 277 if (err) 278 goto out; 279 if (status) { 280 err = -EINVAL; 281 goto out; 282 } 283 284 memcpy(gid->raw, out_mad->data + 8, 8); 285 286 memset(in_mad, 0, sizeof *in_mad); 287 in_mad->base_version = 1; 288 in_mad->mgmt_class = IB_MGMT_CLASS_SUBN_LID_ROUTED; 289 in_mad->class_version = 1; 290 in_mad->method = IB_MGMT_METHOD_GET; 291 in_mad->attr_id = IB_SMP_ATTR_GUID_INFO; 292 in_mad->attr_mod = cpu_to_be32(index / 8); 293 294 err = mthca_MAD_IFC(to_mdev(ibdev), 1, 1, 295 port, NULL, NULL, in_mad, out_mad, 296 &status); 297 if (err) 298 goto out; 299 if (status) { 300 err = -EINVAL; 301 goto out; 302 } 303 304 memcpy(gid->raw + 8, out_mad->data + (index % 8) * 16, 8); 305 306 out: 307 kfree(in_mad); 308 kfree(out_mad); 309 return err; 310 } 311 312 static struct ib_ucontext *mthca_alloc_ucontext(struct ib_device *ibdev, 313 struct ib_udata *udata) 314 { 315 struct mthca_alloc_ucontext_resp uresp; 316 struct mthca_ucontext *context; 317 int err; 318 319 memset(&uresp, 0, sizeof uresp); 320 321 uresp.qp_tab_size = to_mdev(ibdev)->limits.num_qps; 322 if (mthca_is_memfree(to_mdev(ibdev))) 323 uresp.uarc_size = to_mdev(ibdev)->uar_table.uarc_size; 324 else 325 uresp.uarc_size = 0; 326 327 context = kmalloc(sizeof *context, GFP_KERNEL); 328 if (!context) 329 return ERR_PTR(-ENOMEM); 330 331 err = mthca_uar_alloc(to_mdev(ibdev), &context->uar); 332 if (err) { 333 kfree(context); 334 return ERR_PTR(err); 335 } 336 337 context->db_tab = mthca_init_user_db_tab(to_mdev(ibdev)); 338 if (IS_ERR(context->db_tab)) { 339 err = PTR_ERR(context->db_tab); 340 mthca_uar_free(to_mdev(ibdev), &context->uar); 341 kfree(context); 342 return ERR_PTR(err); 343 } 344 345 if (ib_copy_to_udata(udata, &uresp, sizeof uresp)) { 346 mthca_cleanup_user_db_tab(to_mdev(ibdev), &context->uar, context->db_tab); 347 mthca_uar_free(to_mdev(ibdev), &context->uar); 348 kfree(context); 349 return ERR_PTR(-EFAULT); 350 } 351 352 return &context->ibucontext; 353 } 354 355 static int mthca_dealloc_ucontext(struct ib_ucontext *context) 356 { 357 mthca_cleanup_user_db_tab(to_mdev(context->device), &to_mucontext(context)->uar, 358 to_mucontext(context)->db_tab); 359 mthca_uar_free(to_mdev(context->device), &to_mucontext(context)->uar); 360 kfree(to_mucontext(context)); 361 362 return 0; 363 } 364 365 static int mthca_mmap_uar(struct ib_ucontext *context, 366 struct vm_area_struct *vma) 367 { 368 if (vma->vm_end - vma->vm_start != PAGE_SIZE) 369 return -EINVAL; 370 371 vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot); 372 373 if (io_remap_pfn_range(vma, vma->vm_start, 374 to_mucontext(context)->uar.pfn, 375 PAGE_SIZE, vma->vm_page_prot)) 376 return -EAGAIN; 377 378 return 0; 379 } 380 381 static struct ib_pd *mthca_alloc_pd(struct ib_device *ibdev, 382 struct ib_ucontext *context, 383 struct ib_udata *udata) 384 { 385 struct mthca_pd *pd; 386 int err; 387 388 pd = kmalloc(sizeof *pd, GFP_KERNEL); 389 if (!pd) 390 return ERR_PTR(-ENOMEM); 391 392 err = mthca_pd_alloc(to_mdev(ibdev), !context, pd); 393 if (err) { 394 kfree(pd); 395 return ERR_PTR(err); 396 } 397 398 if (context) { 399 if (ib_copy_to_udata(udata, &pd->pd_num, sizeof (__u32))) { 400 mthca_pd_free(to_mdev(ibdev), pd); 401 kfree(pd); 402 return ERR_PTR(-EFAULT); 403 } 404 } 405 406 return &pd->ibpd; 407 } 408 409 static int mthca_dealloc_pd(struct ib_pd *pd) 410 { 411 mthca_pd_free(to_mdev(pd->device), to_mpd(pd)); 412 kfree(pd); 413 414 return 0; 415 } 416 417 static struct ib_ah *mthca_ah_create(struct ib_pd *pd, 418 struct ib_ah_attr *ah_attr) 419 { 420 int err; 421 struct mthca_ah *ah; 422 423 ah = kmalloc(sizeof *ah, GFP_ATOMIC); 424 if (!ah) 425 return ERR_PTR(-ENOMEM); 426 427 err = mthca_create_ah(to_mdev(pd->device), to_mpd(pd), ah_attr, ah); 428 if (err) { 429 kfree(ah); 430 return ERR_PTR(err); 431 } 432 433 return &ah->ibah; 434 } 435 436 static int mthca_ah_destroy(struct ib_ah *ah) 437 { 438 mthca_destroy_ah(to_mdev(ah->device), to_mah(ah)); 439 kfree(ah); 440 441 return 0; 442 } 443 444 static struct ib_srq *mthca_create_srq(struct ib_pd *pd, 445 struct ib_srq_init_attr *init_attr, 446 struct ib_udata *udata) 447 { 448 struct mthca_create_srq ucmd; 449 struct mthca_ucontext *context = NULL; 450 struct mthca_srq *srq; 451 int err; 452 453 srq = kmalloc(sizeof *srq, GFP_KERNEL); 454 if (!srq) 455 return ERR_PTR(-ENOMEM); 456 457 if (pd->uobject) { 458 context = to_mucontext(pd->uobject->context); 459 460 if (ib_copy_from_udata(&ucmd, udata, sizeof ucmd)) 461 return ERR_PTR(-EFAULT); 462 463 err = mthca_map_user_db(to_mdev(pd->device), &context->uar, 464 context->db_tab, ucmd.db_index, 465 ucmd.db_page); 466 467 if (err) 468 goto err_free; 469 470 srq->mr.ibmr.lkey = ucmd.lkey; 471 srq->db_index = ucmd.db_index; 472 } 473 474 err = mthca_alloc_srq(to_mdev(pd->device), to_mpd(pd), 475 &init_attr->attr, srq); 476 477 if (err && pd->uobject) 478 mthca_unmap_user_db(to_mdev(pd->device), &context->uar, 479 context->db_tab, ucmd.db_index); 480 481 if (err) 482 goto err_free; 483 484 if (context && ib_copy_to_udata(udata, &srq->srqn, sizeof (__u32))) { 485 mthca_free_srq(to_mdev(pd->device), srq); 486 err = -EFAULT; 487 goto err_free; 488 } 489 490 return &srq->ibsrq; 491 492 err_free: 493 kfree(srq); 494 495 return ERR_PTR(err); 496 } 497 498 static int mthca_destroy_srq(struct ib_srq *srq) 499 { 500 struct mthca_ucontext *context; 501 502 if (srq->uobject) { 503 context = to_mucontext(srq->uobject->context); 504 505 mthca_unmap_user_db(to_mdev(srq->device), &context->uar, 506 context->db_tab, to_msrq(srq)->db_index); 507 } 508 509 mthca_free_srq(to_mdev(srq->device), to_msrq(srq)); 510 kfree(srq); 511 512 return 0; 513 } 514 515 static struct ib_qp *mthca_create_qp(struct ib_pd *pd, 516 struct ib_qp_init_attr *init_attr, 517 struct ib_udata *udata) 518 { 519 struct mthca_create_qp ucmd; 520 struct mthca_qp *qp; 521 int err; 522 523 switch (init_attr->qp_type) { 524 case IB_QPT_RC: 525 case IB_QPT_UC: 526 case IB_QPT_UD: 527 { 528 struct mthca_ucontext *context; 529 530 qp = kmalloc(sizeof *qp, GFP_KERNEL); 531 if (!qp) 532 return ERR_PTR(-ENOMEM); 533 534 if (pd->uobject) { 535 context = to_mucontext(pd->uobject->context); 536 537 if (ib_copy_from_udata(&ucmd, udata, sizeof ucmd)) 538 return ERR_PTR(-EFAULT); 539 540 err = mthca_map_user_db(to_mdev(pd->device), &context->uar, 541 context->db_tab, 542 ucmd.sq_db_index, ucmd.sq_db_page); 543 if (err) { 544 kfree(qp); 545 return ERR_PTR(err); 546 } 547 548 err = mthca_map_user_db(to_mdev(pd->device), &context->uar, 549 context->db_tab, 550 ucmd.rq_db_index, ucmd.rq_db_page); 551 if (err) { 552 mthca_unmap_user_db(to_mdev(pd->device), 553 &context->uar, 554 context->db_tab, 555 ucmd.sq_db_index); 556 kfree(qp); 557 return ERR_PTR(err); 558 } 559 560 qp->mr.ibmr.lkey = ucmd.lkey; 561 qp->sq.db_index = ucmd.sq_db_index; 562 qp->rq.db_index = ucmd.rq_db_index; 563 } 564 565 err = mthca_alloc_qp(to_mdev(pd->device), to_mpd(pd), 566 to_mcq(init_attr->send_cq), 567 to_mcq(init_attr->recv_cq), 568 init_attr->qp_type, init_attr->sq_sig_type, 569 &init_attr->cap, qp); 570 571 if (err && pd->uobject) { 572 context = to_mucontext(pd->uobject->context); 573 574 mthca_unmap_user_db(to_mdev(pd->device), 575 &context->uar, 576 context->db_tab, 577 ucmd.sq_db_index); 578 mthca_unmap_user_db(to_mdev(pd->device), 579 &context->uar, 580 context->db_tab, 581 ucmd.rq_db_index); 582 } 583 584 qp->ibqp.qp_num = qp->qpn; 585 break; 586 } 587 case IB_QPT_SMI: 588 case IB_QPT_GSI: 589 { 590 /* Don't allow userspace to create special QPs */ 591 if (pd->uobject) 592 return ERR_PTR(-EINVAL); 593 594 qp = kmalloc(sizeof (struct mthca_sqp), GFP_KERNEL); 595 if (!qp) 596 return ERR_PTR(-ENOMEM); 597 598 qp->ibqp.qp_num = init_attr->qp_type == IB_QPT_SMI ? 0 : 1; 599 600 err = mthca_alloc_sqp(to_mdev(pd->device), to_mpd(pd), 601 to_mcq(init_attr->send_cq), 602 to_mcq(init_attr->recv_cq), 603 init_attr->sq_sig_type, &init_attr->cap, 604 qp->ibqp.qp_num, init_attr->port_num, 605 to_msqp(qp)); 606 break; 607 } 608 default: 609 /* Don't support raw QPs */ 610 return ERR_PTR(-ENOSYS); 611 } 612 613 if (err) { 614 kfree(qp); 615 return ERR_PTR(err); 616 } 617 618 init_attr->cap.max_inline_data = 0; 619 init_attr->cap.max_send_wr = qp->sq.max; 620 init_attr->cap.max_recv_wr = qp->rq.max; 621 init_attr->cap.max_send_sge = qp->sq.max_gs; 622 init_attr->cap.max_recv_sge = qp->rq.max_gs; 623 624 return &qp->ibqp; 625 } 626 627 static int mthca_destroy_qp(struct ib_qp *qp) 628 { 629 if (qp->uobject) { 630 mthca_unmap_user_db(to_mdev(qp->device), 631 &to_mucontext(qp->uobject->context)->uar, 632 to_mucontext(qp->uobject->context)->db_tab, 633 to_mqp(qp)->sq.db_index); 634 mthca_unmap_user_db(to_mdev(qp->device), 635 &to_mucontext(qp->uobject->context)->uar, 636 to_mucontext(qp->uobject->context)->db_tab, 637 to_mqp(qp)->rq.db_index); 638 } 639 mthca_free_qp(to_mdev(qp->device), to_mqp(qp)); 640 kfree(qp); 641 return 0; 642 } 643 644 static struct ib_cq *mthca_create_cq(struct ib_device *ibdev, int entries, 645 struct ib_ucontext *context, 646 struct ib_udata *udata) 647 { 648 struct mthca_create_cq ucmd; 649 struct mthca_cq *cq; 650 int nent; 651 int err; 652 653 if (entries < 1 || entries > to_mdev(ibdev)->limits.max_cqes) 654 return ERR_PTR(-EINVAL); 655 656 if (context) { 657 if (ib_copy_from_udata(&ucmd, udata, sizeof ucmd)) 658 return ERR_PTR(-EFAULT); 659 660 err = mthca_map_user_db(to_mdev(ibdev), &to_mucontext(context)->uar, 661 to_mucontext(context)->db_tab, 662 ucmd.set_db_index, ucmd.set_db_page); 663 if (err) 664 return ERR_PTR(err); 665 666 err = mthca_map_user_db(to_mdev(ibdev), &to_mucontext(context)->uar, 667 to_mucontext(context)->db_tab, 668 ucmd.arm_db_index, ucmd.arm_db_page); 669 if (err) 670 goto err_unmap_set; 671 } 672 673 cq = kmalloc(sizeof *cq, GFP_KERNEL); 674 if (!cq) { 675 err = -ENOMEM; 676 goto err_unmap_arm; 677 } 678 679 if (context) { 680 cq->mr.ibmr.lkey = ucmd.lkey; 681 cq->set_ci_db_index = ucmd.set_db_index; 682 cq->arm_db_index = ucmd.arm_db_index; 683 } 684 685 for (nent = 1; nent <= entries; nent <<= 1) 686 ; /* nothing */ 687 688 err = mthca_init_cq(to_mdev(ibdev), nent, 689 context ? to_mucontext(context) : NULL, 690 context ? ucmd.pdn : to_mdev(ibdev)->driver_pd.pd_num, 691 cq); 692 if (err) 693 goto err_free; 694 695 if (context && ib_copy_to_udata(udata, &cq->cqn, sizeof (__u32))) { 696 mthca_free_cq(to_mdev(ibdev), cq); 697 goto err_free; 698 } 699 700 return &cq->ibcq; 701 702 err_free: 703 kfree(cq); 704 705 err_unmap_arm: 706 if (context) 707 mthca_unmap_user_db(to_mdev(ibdev), &to_mucontext(context)->uar, 708 to_mucontext(context)->db_tab, ucmd.arm_db_index); 709 710 err_unmap_set: 711 if (context) 712 mthca_unmap_user_db(to_mdev(ibdev), &to_mucontext(context)->uar, 713 to_mucontext(context)->db_tab, ucmd.set_db_index); 714 715 return ERR_PTR(err); 716 } 717 718 static int mthca_destroy_cq(struct ib_cq *cq) 719 { 720 if (cq->uobject) { 721 mthca_unmap_user_db(to_mdev(cq->device), 722 &to_mucontext(cq->uobject->context)->uar, 723 to_mucontext(cq->uobject->context)->db_tab, 724 to_mcq(cq)->arm_db_index); 725 mthca_unmap_user_db(to_mdev(cq->device), 726 &to_mucontext(cq->uobject->context)->uar, 727 to_mucontext(cq->uobject->context)->db_tab, 728 to_mcq(cq)->set_ci_db_index); 729 } 730 mthca_free_cq(to_mdev(cq->device), to_mcq(cq)); 731 kfree(cq); 732 733 return 0; 734 } 735 736 static inline u32 convert_access(int acc) 737 { 738 return (acc & IB_ACCESS_REMOTE_ATOMIC ? MTHCA_MPT_FLAG_ATOMIC : 0) | 739 (acc & IB_ACCESS_REMOTE_WRITE ? MTHCA_MPT_FLAG_REMOTE_WRITE : 0) | 740 (acc & IB_ACCESS_REMOTE_READ ? MTHCA_MPT_FLAG_REMOTE_READ : 0) | 741 (acc & IB_ACCESS_LOCAL_WRITE ? MTHCA_MPT_FLAG_LOCAL_WRITE : 0) | 742 MTHCA_MPT_FLAG_LOCAL_READ; 743 } 744 745 static struct ib_mr *mthca_get_dma_mr(struct ib_pd *pd, int acc) 746 { 747 struct mthca_mr *mr; 748 int err; 749 750 mr = kmalloc(sizeof *mr, GFP_KERNEL); 751 if (!mr) 752 return ERR_PTR(-ENOMEM); 753 754 err = mthca_mr_alloc_notrans(to_mdev(pd->device), 755 to_mpd(pd)->pd_num, 756 convert_access(acc), mr); 757 758 if (err) { 759 kfree(mr); 760 return ERR_PTR(err); 761 } 762 763 return &mr->ibmr; 764 } 765 766 static struct ib_mr *mthca_reg_phys_mr(struct ib_pd *pd, 767 struct ib_phys_buf *buffer_list, 768 int num_phys_buf, 769 int acc, 770 u64 *iova_start) 771 { 772 struct mthca_mr *mr; 773 u64 *page_list; 774 u64 total_size; 775 u64 mask; 776 int shift; 777 int npages; 778 int err; 779 int i, j, n; 780 781 /* First check that we have enough alignment */ 782 if ((*iova_start & ~PAGE_MASK) != (buffer_list[0].addr & ~PAGE_MASK)) 783 return ERR_PTR(-EINVAL); 784 785 if (num_phys_buf > 1 && 786 ((buffer_list[0].addr + buffer_list[0].size) & ~PAGE_MASK)) 787 return ERR_PTR(-EINVAL); 788 789 mask = 0; 790 total_size = 0; 791 for (i = 0; i < num_phys_buf; ++i) { 792 if (i != 0 && buffer_list[i].addr & ~PAGE_MASK) 793 return ERR_PTR(-EINVAL); 794 if (i != 0 && i != num_phys_buf - 1 && 795 (buffer_list[i].size & ~PAGE_MASK)) 796 return ERR_PTR(-EINVAL); 797 798 total_size += buffer_list[i].size; 799 if (i > 0) 800 mask |= buffer_list[i].addr; 801 } 802 803 /* Find largest page shift we can use to cover buffers */ 804 for (shift = PAGE_SHIFT; shift < 31; ++shift) 805 if (num_phys_buf > 1) { 806 if ((1ULL << shift) & mask) 807 break; 808 } else { 809 if (1ULL << shift >= 810 buffer_list[0].size + 811 (buffer_list[0].addr & ((1ULL << shift) - 1))) 812 break; 813 } 814 815 buffer_list[0].size += buffer_list[0].addr & ((1ULL << shift) - 1); 816 buffer_list[0].addr &= ~0ull << shift; 817 818 mr = kmalloc(sizeof *mr, GFP_KERNEL); 819 if (!mr) 820 return ERR_PTR(-ENOMEM); 821 822 npages = 0; 823 for (i = 0; i < num_phys_buf; ++i) 824 npages += (buffer_list[i].size + (1ULL << shift) - 1) >> shift; 825 826 if (!npages) 827 return &mr->ibmr; 828 829 page_list = kmalloc(npages * sizeof *page_list, GFP_KERNEL); 830 if (!page_list) { 831 kfree(mr); 832 return ERR_PTR(-ENOMEM); 833 } 834 835 n = 0; 836 for (i = 0; i < num_phys_buf; ++i) 837 for (j = 0; 838 j < (buffer_list[i].size + (1ULL << shift) - 1) >> shift; 839 ++j) 840 page_list[n++] = buffer_list[i].addr + ((u64) j << shift); 841 842 mthca_dbg(to_mdev(pd->device), "Registering memory at %llx (iova %llx) " 843 "in PD %x; shift %d, npages %d.\n", 844 (unsigned long long) buffer_list[0].addr, 845 (unsigned long long) *iova_start, 846 to_mpd(pd)->pd_num, 847 shift, npages); 848 849 err = mthca_mr_alloc_phys(to_mdev(pd->device), 850 to_mpd(pd)->pd_num, 851 page_list, shift, npages, 852 *iova_start, total_size, 853 convert_access(acc), mr); 854 855 if (err) { 856 kfree(page_list); 857 kfree(mr); 858 return ERR_PTR(err); 859 } 860 861 kfree(page_list); 862 return &mr->ibmr; 863 } 864 865 static struct ib_mr *mthca_reg_user_mr(struct ib_pd *pd, struct ib_umem *region, 866 int acc, struct ib_udata *udata) 867 { 868 struct mthca_dev *dev = to_mdev(pd->device); 869 struct ib_umem_chunk *chunk; 870 struct mthca_mr *mr; 871 u64 *pages; 872 int shift, n, len; 873 int i, j, k; 874 int err = 0; 875 876 shift = ffs(region->page_size) - 1; 877 878 mr = kmalloc(sizeof *mr, GFP_KERNEL); 879 if (!mr) 880 return ERR_PTR(-ENOMEM); 881 882 n = 0; 883 list_for_each_entry(chunk, ®ion->chunk_list, list) 884 n += chunk->nents; 885 886 mr->mtt = mthca_alloc_mtt(dev, n); 887 if (IS_ERR(mr->mtt)) { 888 err = PTR_ERR(mr->mtt); 889 goto err; 890 } 891 892 pages = (u64 *) __get_free_page(GFP_KERNEL); 893 if (!pages) { 894 err = -ENOMEM; 895 goto err_mtt; 896 } 897 898 i = n = 0; 899 900 list_for_each_entry(chunk, ®ion->chunk_list, list) 901 for (j = 0; j < chunk->nmap; ++j) { 902 len = sg_dma_len(&chunk->page_list[j]) >> shift; 903 for (k = 0; k < len; ++k) { 904 pages[i++] = sg_dma_address(&chunk->page_list[j]) + 905 region->page_size * k; 906 /* 907 * Be friendly to WRITE_MTT command 908 * and leave two empty slots for the 909 * index and reserved fields of the 910 * mailbox. 911 */ 912 if (i == PAGE_SIZE / sizeof (u64) - 2) { 913 err = mthca_write_mtt(dev, mr->mtt, 914 n, pages, i); 915 if (err) 916 goto mtt_done; 917 n += i; 918 i = 0; 919 } 920 } 921 } 922 923 if (i) 924 err = mthca_write_mtt(dev, mr->mtt, n, pages, i); 925 mtt_done: 926 free_page((unsigned long) pages); 927 if (err) 928 goto err_mtt; 929 930 err = mthca_mr_alloc(dev, to_mpd(pd)->pd_num, shift, region->virt_base, 931 region->length, convert_access(acc), mr); 932 933 if (err) 934 goto err_mtt; 935 936 return &mr->ibmr; 937 938 err_mtt: 939 mthca_free_mtt(dev, mr->mtt); 940 941 err: 942 kfree(mr); 943 return ERR_PTR(err); 944 } 945 946 static int mthca_dereg_mr(struct ib_mr *mr) 947 { 948 struct mthca_mr *mmr = to_mmr(mr); 949 mthca_free_mr(to_mdev(mr->device), mmr); 950 kfree(mmr); 951 return 0; 952 } 953 954 static struct ib_fmr *mthca_alloc_fmr(struct ib_pd *pd, int mr_access_flags, 955 struct ib_fmr_attr *fmr_attr) 956 { 957 struct mthca_fmr *fmr; 958 int err; 959 960 fmr = kmalloc(sizeof *fmr, GFP_KERNEL); 961 if (!fmr) 962 return ERR_PTR(-ENOMEM); 963 964 memcpy(&fmr->attr, fmr_attr, sizeof *fmr_attr); 965 err = mthca_fmr_alloc(to_mdev(pd->device), to_mpd(pd)->pd_num, 966 convert_access(mr_access_flags), fmr); 967 968 if (err) { 969 kfree(fmr); 970 return ERR_PTR(err); 971 } 972 973 return &fmr->ibmr; 974 } 975 976 static int mthca_dealloc_fmr(struct ib_fmr *fmr) 977 { 978 struct mthca_fmr *mfmr = to_mfmr(fmr); 979 int err; 980 981 err = mthca_free_fmr(to_mdev(fmr->device), mfmr); 982 if (err) 983 return err; 984 985 kfree(mfmr); 986 return 0; 987 } 988 989 static int mthca_unmap_fmr(struct list_head *fmr_list) 990 { 991 struct ib_fmr *fmr; 992 int err; 993 u8 status; 994 struct mthca_dev *mdev = NULL; 995 996 list_for_each_entry(fmr, fmr_list, list) { 997 if (mdev && to_mdev(fmr->device) != mdev) 998 return -EINVAL; 999 mdev = to_mdev(fmr->device); 1000 } 1001 1002 if (!mdev) 1003 return 0; 1004 1005 if (mthca_is_memfree(mdev)) { 1006 list_for_each_entry(fmr, fmr_list, list) 1007 mthca_arbel_fmr_unmap(mdev, to_mfmr(fmr)); 1008 1009 wmb(); 1010 } else 1011 list_for_each_entry(fmr, fmr_list, list) 1012 mthca_tavor_fmr_unmap(mdev, to_mfmr(fmr)); 1013 1014 err = mthca_SYNC_TPT(mdev, &status); 1015 if (err) 1016 return err; 1017 if (status) 1018 return -EINVAL; 1019 return 0; 1020 } 1021 1022 static ssize_t show_rev(struct class_device *cdev, char *buf) 1023 { 1024 struct mthca_dev *dev = container_of(cdev, struct mthca_dev, ib_dev.class_dev); 1025 return sprintf(buf, "%x\n", dev->rev_id); 1026 } 1027 1028 static ssize_t show_fw_ver(struct class_device *cdev, char *buf) 1029 { 1030 struct mthca_dev *dev = container_of(cdev, struct mthca_dev, ib_dev.class_dev); 1031 return sprintf(buf, "%d.%d.%d\n", (int) (dev->fw_ver >> 32), 1032 (int) (dev->fw_ver >> 16) & 0xffff, 1033 (int) dev->fw_ver & 0xffff); 1034 } 1035 1036 static ssize_t show_hca(struct class_device *cdev, char *buf) 1037 { 1038 struct mthca_dev *dev = container_of(cdev, struct mthca_dev, ib_dev.class_dev); 1039 switch (dev->pdev->device) { 1040 case PCI_DEVICE_ID_MELLANOX_TAVOR: 1041 return sprintf(buf, "MT23108\n"); 1042 case PCI_DEVICE_ID_MELLANOX_ARBEL_COMPAT: 1043 return sprintf(buf, "MT25208 (MT23108 compat mode)\n"); 1044 case PCI_DEVICE_ID_MELLANOX_ARBEL: 1045 return sprintf(buf, "MT25208\n"); 1046 case PCI_DEVICE_ID_MELLANOX_SINAI: 1047 case PCI_DEVICE_ID_MELLANOX_SINAI_OLD: 1048 return sprintf(buf, "MT25204\n"); 1049 default: 1050 return sprintf(buf, "unknown\n"); 1051 } 1052 } 1053 1054 static ssize_t show_board(struct class_device *cdev, char *buf) 1055 { 1056 struct mthca_dev *dev = container_of(cdev, struct mthca_dev, ib_dev.class_dev); 1057 return sprintf(buf, "%.*s\n", MTHCA_BOARD_ID_LEN, dev->board_id); 1058 } 1059 1060 static CLASS_DEVICE_ATTR(hw_rev, S_IRUGO, show_rev, NULL); 1061 static CLASS_DEVICE_ATTR(fw_ver, S_IRUGO, show_fw_ver, NULL); 1062 static CLASS_DEVICE_ATTR(hca_type, S_IRUGO, show_hca, NULL); 1063 static CLASS_DEVICE_ATTR(board_id, S_IRUGO, show_board, NULL); 1064 1065 static struct class_device_attribute *mthca_class_attributes[] = { 1066 &class_device_attr_hw_rev, 1067 &class_device_attr_fw_ver, 1068 &class_device_attr_hca_type, 1069 &class_device_attr_board_id 1070 }; 1071 1072 int mthca_register_device(struct mthca_dev *dev) 1073 { 1074 int ret; 1075 int i; 1076 1077 strlcpy(dev->ib_dev.name, "mthca%d", IB_DEVICE_NAME_MAX); 1078 dev->ib_dev.owner = THIS_MODULE; 1079 1080 dev->ib_dev.uverbs_abi_ver = MTHCA_UVERBS_ABI_VERSION; 1081 dev->ib_dev.uverbs_cmd_mask = 1082 (1ull << IB_USER_VERBS_CMD_GET_CONTEXT) | 1083 (1ull << IB_USER_VERBS_CMD_QUERY_DEVICE) | 1084 (1ull << IB_USER_VERBS_CMD_QUERY_PORT) | 1085 (1ull << IB_USER_VERBS_CMD_ALLOC_PD) | 1086 (1ull << IB_USER_VERBS_CMD_DEALLOC_PD) | 1087 (1ull << IB_USER_VERBS_CMD_REG_MR) | 1088 (1ull << IB_USER_VERBS_CMD_DEREG_MR) | 1089 (1ull << IB_USER_VERBS_CMD_CREATE_COMP_CHANNEL) | 1090 (1ull << IB_USER_VERBS_CMD_CREATE_CQ) | 1091 (1ull << IB_USER_VERBS_CMD_DESTROY_CQ) | 1092 (1ull << IB_USER_VERBS_CMD_CREATE_QP) | 1093 (1ull << IB_USER_VERBS_CMD_MODIFY_QP) | 1094 (1ull << IB_USER_VERBS_CMD_DESTROY_QP) | 1095 (1ull << IB_USER_VERBS_CMD_ATTACH_MCAST) | 1096 (1ull << IB_USER_VERBS_CMD_DETACH_MCAST) | 1097 (1ull << IB_USER_VERBS_CMD_CREATE_SRQ) | 1098 (1ull << IB_USER_VERBS_CMD_MODIFY_SRQ) | 1099 (1ull << IB_USER_VERBS_CMD_DESTROY_SRQ); 1100 dev->ib_dev.node_type = IB_NODE_CA; 1101 dev->ib_dev.phys_port_cnt = dev->limits.num_ports; 1102 dev->ib_dev.dma_device = &dev->pdev->dev; 1103 dev->ib_dev.class_dev.dev = &dev->pdev->dev; 1104 dev->ib_dev.query_device = mthca_query_device; 1105 dev->ib_dev.query_port = mthca_query_port; 1106 dev->ib_dev.modify_port = mthca_modify_port; 1107 dev->ib_dev.query_pkey = mthca_query_pkey; 1108 dev->ib_dev.query_gid = mthca_query_gid; 1109 dev->ib_dev.alloc_ucontext = mthca_alloc_ucontext; 1110 dev->ib_dev.dealloc_ucontext = mthca_dealloc_ucontext; 1111 dev->ib_dev.mmap = mthca_mmap_uar; 1112 dev->ib_dev.alloc_pd = mthca_alloc_pd; 1113 dev->ib_dev.dealloc_pd = mthca_dealloc_pd; 1114 dev->ib_dev.create_ah = mthca_ah_create; 1115 dev->ib_dev.destroy_ah = mthca_ah_destroy; 1116 1117 if (dev->mthca_flags & MTHCA_FLAG_SRQ) { 1118 dev->ib_dev.create_srq = mthca_create_srq; 1119 dev->ib_dev.modify_srq = mthca_modify_srq; 1120 dev->ib_dev.destroy_srq = mthca_destroy_srq; 1121 1122 if (mthca_is_memfree(dev)) 1123 dev->ib_dev.post_srq_recv = mthca_arbel_post_srq_recv; 1124 else 1125 dev->ib_dev.post_srq_recv = mthca_tavor_post_srq_recv; 1126 } 1127 1128 dev->ib_dev.create_qp = mthca_create_qp; 1129 dev->ib_dev.modify_qp = mthca_modify_qp; 1130 dev->ib_dev.destroy_qp = mthca_destroy_qp; 1131 dev->ib_dev.create_cq = mthca_create_cq; 1132 dev->ib_dev.destroy_cq = mthca_destroy_cq; 1133 dev->ib_dev.poll_cq = mthca_poll_cq; 1134 dev->ib_dev.get_dma_mr = mthca_get_dma_mr; 1135 dev->ib_dev.reg_phys_mr = mthca_reg_phys_mr; 1136 dev->ib_dev.reg_user_mr = mthca_reg_user_mr; 1137 dev->ib_dev.dereg_mr = mthca_dereg_mr; 1138 1139 if (dev->mthca_flags & MTHCA_FLAG_FMR) { 1140 dev->ib_dev.alloc_fmr = mthca_alloc_fmr; 1141 dev->ib_dev.unmap_fmr = mthca_unmap_fmr; 1142 dev->ib_dev.dealloc_fmr = mthca_dealloc_fmr; 1143 if (mthca_is_memfree(dev)) 1144 dev->ib_dev.map_phys_fmr = mthca_arbel_map_phys_fmr; 1145 else 1146 dev->ib_dev.map_phys_fmr = mthca_tavor_map_phys_fmr; 1147 } 1148 1149 dev->ib_dev.attach_mcast = mthca_multicast_attach; 1150 dev->ib_dev.detach_mcast = mthca_multicast_detach; 1151 dev->ib_dev.process_mad = mthca_process_mad; 1152 1153 if (mthca_is_memfree(dev)) { 1154 dev->ib_dev.req_notify_cq = mthca_arbel_arm_cq; 1155 dev->ib_dev.post_send = mthca_arbel_post_send; 1156 dev->ib_dev.post_recv = mthca_arbel_post_receive; 1157 } else { 1158 dev->ib_dev.req_notify_cq = mthca_tavor_arm_cq; 1159 dev->ib_dev.post_send = mthca_tavor_post_send; 1160 dev->ib_dev.post_recv = mthca_tavor_post_receive; 1161 } 1162 1163 init_MUTEX(&dev->cap_mask_mutex); 1164 1165 ret = ib_register_device(&dev->ib_dev); 1166 if (ret) 1167 return ret; 1168 1169 for (i = 0; i < ARRAY_SIZE(mthca_class_attributes); ++i) { 1170 ret = class_device_create_file(&dev->ib_dev.class_dev, 1171 mthca_class_attributes[i]); 1172 if (ret) { 1173 ib_unregister_device(&dev->ib_dev); 1174 return ret; 1175 } 1176 } 1177 1178 mthca_start_catas_poll(dev); 1179 1180 return 0; 1181 } 1182 1183 void mthca_unregister_device(struct mthca_dev *dev) 1184 { 1185 mthca_stop_catas_poll(dev); 1186 ib_unregister_device(&dev->ib_dev); 1187 } 1188