1 /* 2 * Copyright (c) 2004, 2005 Topspin Communications. All rights reserved. 3 * Copyright (c) 2005 Sun Microsystems, Inc. All rights reserved. 4 * Copyright (c) 2005 Mellanox Technologies. All rights reserved. 5 * 6 * This software is available to you under a choice of one of two 7 * licenses. You may choose to be licensed under the terms of the GNU 8 * General Public License (GPL) Version 2, available from the file 9 * COPYING in the main directory of this source tree, or the 10 * OpenIB.org BSD license below: 11 * 12 * Redistribution and use in source and binary forms, with or 13 * without modification, are permitted provided that the following 14 * conditions are met: 15 * 16 * - Redistributions of source code must retain the above 17 * copyright notice, this list of conditions and the following 18 * disclaimer. 19 * 20 * - Redistributions in binary form must reproduce the above 21 * copyright notice, this list of conditions and the following 22 * disclaimer in the documentation and/or other materials 23 * provided with the distribution. 24 * 25 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, 26 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF 27 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND 28 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS 29 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN 30 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN 31 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE 32 * SOFTWARE. 33 * 34 * $Id: mthca_main.c 1396 2004-12-28 04:10:27Z roland $ 35 */ 36 37 #include <linux/config.h> 38 #include <linux/module.h> 39 #include <linux/init.h> 40 #include <linux/errno.h> 41 #include <linux/pci.h> 42 #include <linux/interrupt.h> 43 44 #include "mthca_dev.h" 45 #include "mthca_config_reg.h" 46 #include "mthca_cmd.h" 47 #include "mthca_profile.h" 48 #include "mthca_memfree.h" 49 50 MODULE_AUTHOR("Roland Dreier"); 51 MODULE_DESCRIPTION("Mellanox InfiniBand HCA low-level driver"); 52 MODULE_LICENSE("Dual BSD/GPL"); 53 MODULE_VERSION(DRV_VERSION); 54 55 #ifdef CONFIG_PCI_MSI 56 57 static int msi_x = 0; 58 module_param(msi_x, int, 0444); 59 MODULE_PARM_DESC(msi_x, "attempt to use MSI-X if nonzero"); 60 61 static int msi = 0; 62 module_param(msi, int, 0444); 63 MODULE_PARM_DESC(msi, "attempt to use MSI if nonzero"); 64 65 #else /* CONFIG_PCI_MSI */ 66 67 #define msi_x (0) 68 #define msi (0) 69 70 #endif /* CONFIG_PCI_MSI */ 71 72 static const char mthca_version[] __devinitdata = 73 DRV_NAME ": Mellanox InfiniBand HCA driver v" 74 DRV_VERSION " (" DRV_RELDATE ")\n"; 75 76 static struct mthca_profile default_profile = { 77 .num_qp = 1 << 16, 78 .rdb_per_qp = 4, 79 .num_cq = 1 << 16, 80 .num_mcg = 1 << 13, 81 .num_mpt = 1 << 17, 82 .num_mtt = 1 << 20, 83 .num_udav = 1 << 15, /* Tavor only */ 84 .fmr_reserved_mtts = 1 << 18, /* Tavor only */ 85 .uarc_size = 1 << 18, /* Arbel only */ 86 }; 87 88 static int __devinit mthca_tune_pci(struct mthca_dev *mdev) 89 { 90 int cap; 91 u16 val; 92 93 /* First try to max out Read Byte Count */ 94 cap = pci_find_capability(mdev->pdev, PCI_CAP_ID_PCIX); 95 if (cap) { 96 if (pci_read_config_word(mdev->pdev, cap + PCI_X_CMD, &val)) { 97 mthca_err(mdev, "Couldn't read PCI-X command register, " 98 "aborting.\n"); 99 return -ENODEV; 100 } 101 val = (val & ~PCI_X_CMD_MAX_READ) | (3 << 2); 102 if (pci_write_config_word(mdev->pdev, cap + PCI_X_CMD, val)) { 103 mthca_err(mdev, "Couldn't write PCI-X command register, " 104 "aborting.\n"); 105 return -ENODEV; 106 } 107 } else if (!(mdev->mthca_flags & MTHCA_FLAG_PCIE)) 108 mthca_info(mdev, "No PCI-X capability, not setting RBC.\n"); 109 110 cap = pci_find_capability(mdev->pdev, PCI_CAP_ID_EXP); 111 if (cap) { 112 if (pci_read_config_word(mdev->pdev, cap + PCI_EXP_DEVCTL, &val)) { 113 mthca_err(mdev, "Couldn't read PCI Express device control " 114 "register, aborting.\n"); 115 return -ENODEV; 116 } 117 val = (val & ~PCI_EXP_DEVCTL_READRQ) | (5 << 12); 118 if (pci_write_config_word(mdev->pdev, cap + PCI_EXP_DEVCTL, val)) { 119 mthca_err(mdev, "Couldn't write PCI Express device control " 120 "register, aborting.\n"); 121 return -ENODEV; 122 } 123 } else if (mdev->mthca_flags & MTHCA_FLAG_PCIE) 124 mthca_info(mdev, "No PCI Express capability, " 125 "not setting Max Read Request Size.\n"); 126 127 return 0; 128 } 129 130 static int __devinit mthca_dev_lim(struct mthca_dev *mdev, struct mthca_dev_lim *dev_lim) 131 { 132 int err; 133 u8 status; 134 135 err = mthca_QUERY_DEV_LIM(mdev, dev_lim, &status); 136 if (err) { 137 mthca_err(mdev, "QUERY_DEV_LIM command failed, aborting.\n"); 138 return err; 139 } 140 if (status) { 141 mthca_err(mdev, "QUERY_DEV_LIM returned status 0x%02x, " 142 "aborting.\n", status); 143 return -EINVAL; 144 } 145 if (dev_lim->min_page_sz > PAGE_SIZE) { 146 mthca_err(mdev, "HCA minimum page size of %d bigger than " 147 "kernel PAGE_SIZE of %ld, aborting.\n", 148 dev_lim->min_page_sz, PAGE_SIZE); 149 return -ENODEV; 150 } 151 if (dev_lim->num_ports > MTHCA_MAX_PORTS) { 152 mthca_err(mdev, "HCA has %d ports, but we only support %d, " 153 "aborting.\n", 154 dev_lim->num_ports, MTHCA_MAX_PORTS); 155 return -ENODEV; 156 } 157 158 mdev->limits.num_ports = dev_lim->num_ports; 159 mdev->limits.vl_cap = dev_lim->max_vl; 160 mdev->limits.mtu_cap = dev_lim->max_mtu; 161 mdev->limits.gid_table_len = dev_lim->max_gids; 162 mdev->limits.pkey_table_len = dev_lim->max_pkeys; 163 mdev->limits.local_ca_ack_delay = dev_lim->local_ca_ack_delay; 164 mdev->limits.max_sg = dev_lim->max_sg; 165 mdev->limits.max_wqes = dev_lim->max_qp_sz; 166 mdev->limits.max_qp_init_rdma = dev_lim->max_requester_per_qp; 167 mdev->limits.reserved_qps = dev_lim->reserved_qps; 168 mdev->limits.max_srq_wqes = dev_lim->max_srq_sz; 169 mdev->limits.reserved_srqs = dev_lim->reserved_srqs; 170 mdev->limits.reserved_eecs = dev_lim->reserved_eecs; 171 mdev->limits.max_desc_sz = dev_lim->max_desc_sz; 172 /* 173 * Subtract 1 from the limit because we need to allocate a 174 * spare CQE so the HCA HW can tell the difference between an 175 * empty CQ and a full CQ. 176 */ 177 mdev->limits.max_cqes = dev_lim->max_cq_sz - 1; 178 mdev->limits.reserved_cqs = dev_lim->reserved_cqs; 179 mdev->limits.reserved_eqs = dev_lim->reserved_eqs; 180 mdev->limits.reserved_mtts = dev_lim->reserved_mtts; 181 mdev->limits.reserved_mrws = dev_lim->reserved_mrws; 182 mdev->limits.reserved_uars = dev_lim->reserved_uars; 183 mdev->limits.reserved_pds = dev_lim->reserved_pds; 184 mdev->limits.port_width_cap = dev_lim->max_port_width; 185 mdev->limits.page_size_cap = ~(u32) (dev_lim->min_page_sz - 1); 186 mdev->limits.flags = dev_lim->flags; 187 188 /* IB_DEVICE_RESIZE_MAX_WR not supported by driver. 189 May be doable since hardware supports it for SRQ. 190 191 IB_DEVICE_N_NOTIFY_CQ is supported by hardware but not by driver. 192 193 IB_DEVICE_SRQ_RESIZE is supported by hardware but SRQ is not 194 supported by driver. */ 195 mdev->device_cap_flags = IB_DEVICE_CHANGE_PHY_PORT | 196 IB_DEVICE_PORT_ACTIVE_EVENT | 197 IB_DEVICE_SYS_IMAGE_GUID | 198 IB_DEVICE_RC_RNR_NAK_GEN; 199 200 if (dev_lim->flags & DEV_LIM_FLAG_BAD_PKEY_CNTR) 201 mdev->device_cap_flags |= IB_DEVICE_BAD_PKEY_CNTR; 202 203 if (dev_lim->flags & DEV_LIM_FLAG_BAD_QKEY_CNTR) 204 mdev->device_cap_flags |= IB_DEVICE_BAD_QKEY_CNTR; 205 206 if (dev_lim->flags & DEV_LIM_FLAG_RAW_MULTI) 207 mdev->device_cap_flags |= IB_DEVICE_RAW_MULTI; 208 209 if (dev_lim->flags & DEV_LIM_FLAG_AUTO_PATH_MIG) 210 mdev->device_cap_flags |= IB_DEVICE_AUTO_PATH_MIG; 211 212 if (dev_lim->flags & DEV_LIM_FLAG_UD_AV_PORT_ENFORCE) 213 mdev->device_cap_flags |= IB_DEVICE_UD_AV_PORT_ENFORCE; 214 215 if (dev_lim->flags & DEV_LIM_FLAG_SRQ) 216 mdev->mthca_flags |= MTHCA_FLAG_SRQ; 217 218 return 0; 219 } 220 221 static int __devinit mthca_init_tavor(struct mthca_dev *mdev) 222 { 223 u8 status; 224 int err; 225 struct mthca_dev_lim dev_lim; 226 struct mthca_profile profile; 227 struct mthca_init_hca_param init_hca; 228 229 err = mthca_SYS_EN(mdev, &status); 230 if (err) { 231 mthca_err(mdev, "SYS_EN command failed, aborting.\n"); 232 return err; 233 } 234 if (status) { 235 mthca_err(mdev, "SYS_EN returned status 0x%02x, " 236 "aborting.\n", status); 237 return -EINVAL; 238 } 239 240 err = mthca_QUERY_FW(mdev, &status); 241 if (err) { 242 mthca_err(mdev, "QUERY_FW command failed, aborting.\n"); 243 goto err_disable; 244 } 245 if (status) { 246 mthca_err(mdev, "QUERY_FW returned status 0x%02x, " 247 "aborting.\n", status); 248 err = -EINVAL; 249 goto err_disable; 250 } 251 err = mthca_QUERY_DDR(mdev, &status); 252 if (err) { 253 mthca_err(mdev, "QUERY_DDR command failed, aborting.\n"); 254 goto err_disable; 255 } 256 if (status) { 257 mthca_err(mdev, "QUERY_DDR returned status 0x%02x, " 258 "aborting.\n", status); 259 err = -EINVAL; 260 goto err_disable; 261 } 262 263 err = mthca_dev_lim(mdev, &dev_lim); 264 265 profile = default_profile; 266 profile.num_uar = dev_lim.uar_size / PAGE_SIZE; 267 profile.uarc_size = 0; 268 if (mdev->mthca_flags & MTHCA_FLAG_SRQ) 269 profile.num_srq = dev_lim.max_srqs; 270 271 err = mthca_make_profile(mdev, &profile, &dev_lim, &init_hca); 272 if (err < 0) 273 goto err_disable; 274 275 err = mthca_INIT_HCA(mdev, &init_hca, &status); 276 if (err) { 277 mthca_err(mdev, "INIT_HCA command failed, aborting.\n"); 278 goto err_disable; 279 } 280 if (status) { 281 mthca_err(mdev, "INIT_HCA returned status 0x%02x, " 282 "aborting.\n", status); 283 err = -EINVAL; 284 goto err_disable; 285 } 286 287 return 0; 288 289 err_disable: 290 mthca_SYS_DIS(mdev, &status); 291 292 return err; 293 } 294 295 static int __devinit mthca_load_fw(struct mthca_dev *mdev) 296 { 297 u8 status; 298 int err; 299 300 /* FIXME: use HCA-attached memory for FW if present */ 301 302 mdev->fw.arbel.fw_icm = 303 mthca_alloc_icm(mdev, mdev->fw.arbel.fw_pages, 304 GFP_HIGHUSER | __GFP_NOWARN); 305 if (!mdev->fw.arbel.fw_icm) { 306 mthca_err(mdev, "Couldn't allocate FW area, aborting.\n"); 307 return -ENOMEM; 308 } 309 310 err = mthca_MAP_FA(mdev, mdev->fw.arbel.fw_icm, &status); 311 if (err) { 312 mthca_err(mdev, "MAP_FA command failed, aborting.\n"); 313 goto err_free; 314 } 315 if (status) { 316 mthca_err(mdev, "MAP_FA returned status 0x%02x, aborting.\n", status); 317 err = -EINVAL; 318 goto err_free; 319 } 320 err = mthca_RUN_FW(mdev, &status); 321 if (err) { 322 mthca_err(mdev, "RUN_FW command failed, aborting.\n"); 323 goto err_unmap_fa; 324 } 325 if (status) { 326 mthca_err(mdev, "RUN_FW returned status 0x%02x, aborting.\n", status); 327 err = -EINVAL; 328 goto err_unmap_fa; 329 } 330 331 return 0; 332 333 err_unmap_fa: 334 mthca_UNMAP_FA(mdev, &status); 335 336 err_free: 337 mthca_free_icm(mdev, mdev->fw.arbel.fw_icm); 338 return err; 339 } 340 341 static int __devinit mthca_init_icm(struct mthca_dev *mdev, 342 struct mthca_dev_lim *dev_lim, 343 struct mthca_init_hca_param *init_hca, 344 u64 icm_size) 345 { 346 u64 aux_pages; 347 u8 status; 348 int err; 349 350 err = mthca_SET_ICM_SIZE(mdev, icm_size, &aux_pages, &status); 351 if (err) { 352 mthca_err(mdev, "SET_ICM_SIZE command failed, aborting.\n"); 353 return err; 354 } 355 if (status) { 356 mthca_err(mdev, "SET_ICM_SIZE returned status 0x%02x, " 357 "aborting.\n", status); 358 return -EINVAL; 359 } 360 361 mthca_dbg(mdev, "%lld KB of HCA context requires %lld KB aux memory.\n", 362 (unsigned long long) icm_size >> 10, 363 (unsigned long long) aux_pages << 2); 364 365 mdev->fw.arbel.aux_icm = mthca_alloc_icm(mdev, aux_pages, 366 GFP_HIGHUSER | __GFP_NOWARN); 367 if (!mdev->fw.arbel.aux_icm) { 368 mthca_err(mdev, "Couldn't allocate aux memory, aborting.\n"); 369 return -ENOMEM; 370 } 371 372 err = mthca_MAP_ICM_AUX(mdev, mdev->fw.arbel.aux_icm, &status); 373 if (err) { 374 mthca_err(mdev, "MAP_ICM_AUX command failed, aborting.\n"); 375 goto err_free_aux; 376 } 377 if (status) { 378 mthca_err(mdev, "MAP_ICM_AUX returned status 0x%02x, aborting.\n", status); 379 err = -EINVAL; 380 goto err_free_aux; 381 } 382 383 err = mthca_map_eq_icm(mdev, init_hca->eqc_base); 384 if (err) { 385 mthca_err(mdev, "Failed to map EQ context memory, aborting.\n"); 386 goto err_unmap_aux; 387 } 388 389 mdev->mr_table.mtt_table = mthca_alloc_icm_table(mdev, init_hca->mtt_base, 390 MTHCA_MTT_SEG_SIZE, 391 mdev->limits.num_mtt_segs, 392 mdev->limits.reserved_mtts, 1); 393 if (!mdev->mr_table.mtt_table) { 394 mthca_err(mdev, "Failed to map MTT context memory, aborting.\n"); 395 err = -ENOMEM; 396 goto err_unmap_eq; 397 } 398 399 mdev->mr_table.mpt_table = mthca_alloc_icm_table(mdev, init_hca->mpt_base, 400 dev_lim->mpt_entry_sz, 401 mdev->limits.num_mpts, 402 mdev->limits.reserved_mrws, 1); 403 if (!mdev->mr_table.mpt_table) { 404 mthca_err(mdev, "Failed to map MPT context memory, aborting.\n"); 405 err = -ENOMEM; 406 goto err_unmap_mtt; 407 } 408 409 mdev->qp_table.qp_table = mthca_alloc_icm_table(mdev, init_hca->qpc_base, 410 dev_lim->qpc_entry_sz, 411 mdev->limits.num_qps, 412 mdev->limits.reserved_qps, 0); 413 if (!mdev->qp_table.qp_table) { 414 mthca_err(mdev, "Failed to map QP context memory, aborting.\n"); 415 err = -ENOMEM; 416 goto err_unmap_mpt; 417 } 418 419 mdev->qp_table.eqp_table = mthca_alloc_icm_table(mdev, init_hca->eqpc_base, 420 dev_lim->eqpc_entry_sz, 421 mdev->limits.num_qps, 422 mdev->limits.reserved_qps, 0); 423 if (!mdev->qp_table.eqp_table) { 424 mthca_err(mdev, "Failed to map EQP context memory, aborting.\n"); 425 err = -ENOMEM; 426 goto err_unmap_qp; 427 } 428 429 mdev->qp_table.rdb_table = mthca_alloc_icm_table(mdev, init_hca->rdb_base, 430 MTHCA_RDB_ENTRY_SIZE, 431 mdev->limits.num_qps << 432 mdev->qp_table.rdb_shift, 433 0, 0); 434 if (!mdev->qp_table.rdb_table) { 435 mthca_err(mdev, "Failed to map RDB context memory, aborting\n"); 436 err = -ENOMEM; 437 goto err_unmap_eqp; 438 } 439 440 mdev->cq_table.table = mthca_alloc_icm_table(mdev, init_hca->cqc_base, 441 dev_lim->cqc_entry_sz, 442 mdev->limits.num_cqs, 443 mdev->limits.reserved_cqs, 0); 444 if (!mdev->cq_table.table) { 445 mthca_err(mdev, "Failed to map CQ context memory, aborting.\n"); 446 err = -ENOMEM; 447 goto err_unmap_rdb; 448 } 449 450 if (mdev->mthca_flags & MTHCA_FLAG_SRQ) { 451 mdev->srq_table.table = 452 mthca_alloc_icm_table(mdev, init_hca->srqc_base, 453 dev_lim->srq_entry_sz, 454 mdev->limits.num_srqs, 455 mdev->limits.reserved_srqs, 0); 456 if (!mdev->srq_table.table) { 457 mthca_err(mdev, "Failed to map SRQ context memory, " 458 "aborting.\n"); 459 err = -ENOMEM; 460 goto err_unmap_cq; 461 } 462 } 463 464 /* 465 * It's not strictly required, but for simplicity just map the 466 * whole multicast group table now. The table isn't very big 467 * and it's a lot easier than trying to track ref counts. 468 */ 469 mdev->mcg_table.table = mthca_alloc_icm_table(mdev, init_hca->mc_base, 470 MTHCA_MGM_ENTRY_SIZE, 471 mdev->limits.num_mgms + 472 mdev->limits.num_amgms, 473 mdev->limits.num_mgms + 474 mdev->limits.num_amgms, 475 0); 476 if (!mdev->mcg_table.table) { 477 mthca_err(mdev, "Failed to map MCG context memory, aborting.\n"); 478 err = -ENOMEM; 479 goto err_unmap_srq; 480 } 481 482 return 0; 483 484 err_unmap_srq: 485 if (mdev->mthca_flags & MTHCA_FLAG_SRQ) 486 mthca_free_icm_table(mdev, mdev->srq_table.table); 487 488 err_unmap_cq: 489 mthca_free_icm_table(mdev, mdev->cq_table.table); 490 491 err_unmap_rdb: 492 mthca_free_icm_table(mdev, mdev->qp_table.rdb_table); 493 494 err_unmap_eqp: 495 mthca_free_icm_table(mdev, mdev->qp_table.eqp_table); 496 497 err_unmap_qp: 498 mthca_free_icm_table(mdev, mdev->qp_table.qp_table); 499 500 err_unmap_mpt: 501 mthca_free_icm_table(mdev, mdev->mr_table.mpt_table); 502 503 err_unmap_mtt: 504 mthca_free_icm_table(mdev, mdev->mr_table.mtt_table); 505 506 err_unmap_eq: 507 mthca_unmap_eq_icm(mdev); 508 509 err_unmap_aux: 510 mthca_UNMAP_ICM_AUX(mdev, &status); 511 512 err_free_aux: 513 mthca_free_icm(mdev, mdev->fw.arbel.aux_icm); 514 515 return err; 516 } 517 518 static void mthca_free_icms(struct mthca_dev *mdev) 519 { 520 u8 status; 521 522 mthca_free_icm_table(mdev, mdev->mcg_table.table); 523 if (mdev->mthca_flags & MTHCA_FLAG_SRQ) 524 mthca_free_icm_table(mdev, mdev->srq_table.table); 525 mthca_free_icm_table(mdev, mdev->cq_table.table); 526 mthca_free_icm_table(mdev, mdev->qp_table.rdb_table); 527 mthca_free_icm_table(mdev, mdev->qp_table.eqp_table); 528 mthca_free_icm_table(mdev, mdev->qp_table.qp_table); 529 mthca_free_icm_table(mdev, mdev->mr_table.mpt_table); 530 mthca_free_icm_table(mdev, mdev->mr_table.mtt_table); 531 mthca_unmap_eq_icm(mdev); 532 533 mthca_UNMAP_ICM_AUX(mdev, &status); 534 mthca_free_icm(mdev, mdev->fw.arbel.aux_icm); 535 } 536 537 static int __devinit mthca_init_arbel(struct mthca_dev *mdev) 538 { 539 struct mthca_dev_lim dev_lim; 540 struct mthca_profile profile; 541 struct mthca_init_hca_param init_hca; 542 u64 icm_size; 543 u8 status; 544 int err; 545 546 err = mthca_QUERY_FW(mdev, &status); 547 if (err) { 548 mthca_err(mdev, "QUERY_FW command failed, aborting.\n"); 549 return err; 550 } 551 if (status) { 552 mthca_err(mdev, "QUERY_FW returned status 0x%02x, " 553 "aborting.\n", status); 554 return -EINVAL; 555 } 556 557 err = mthca_ENABLE_LAM(mdev, &status); 558 if (err) { 559 mthca_err(mdev, "ENABLE_LAM command failed, aborting.\n"); 560 return err; 561 } 562 if (status == MTHCA_CMD_STAT_LAM_NOT_PRE) { 563 mthca_dbg(mdev, "No HCA-attached memory (running in MemFree mode)\n"); 564 mdev->mthca_flags |= MTHCA_FLAG_NO_LAM; 565 } else if (status) { 566 mthca_err(mdev, "ENABLE_LAM returned status 0x%02x, " 567 "aborting.\n", status); 568 return -EINVAL; 569 } 570 571 err = mthca_load_fw(mdev); 572 if (err) { 573 mthca_err(mdev, "Failed to start FW, aborting.\n"); 574 goto err_disable; 575 } 576 577 err = mthca_dev_lim(mdev, &dev_lim); 578 if (err) { 579 mthca_err(mdev, "QUERY_DEV_LIM command failed, aborting.\n"); 580 goto err_stop_fw; 581 } 582 583 profile = default_profile; 584 profile.num_uar = dev_lim.uar_size / PAGE_SIZE; 585 profile.num_udav = 0; 586 if (mdev->mthca_flags & MTHCA_FLAG_SRQ) 587 profile.num_srq = dev_lim.max_srqs; 588 589 icm_size = mthca_make_profile(mdev, &profile, &dev_lim, &init_hca); 590 if ((int) icm_size < 0) { 591 err = icm_size; 592 goto err_stop_fw; 593 } 594 595 err = mthca_init_icm(mdev, &dev_lim, &init_hca, icm_size); 596 if (err) 597 goto err_stop_fw; 598 599 err = mthca_INIT_HCA(mdev, &init_hca, &status); 600 if (err) { 601 mthca_err(mdev, "INIT_HCA command failed, aborting.\n"); 602 goto err_free_icm; 603 } 604 if (status) { 605 mthca_err(mdev, "INIT_HCA returned status 0x%02x, " 606 "aborting.\n", status); 607 err = -EINVAL; 608 goto err_free_icm; 609 } 610 611 return 0; 612 613 err_free_icm: 614 mthca_free_icms(mdev); 615 616 err_stop_fw: 617 mthca_UNMAP_FA(mdev, &status); 618 mthca_free_icm(mdev, mdev->fw.arbel.fw_icm); 619 620 err_disable: 621 if (!(mdev->mthca_flags & MTHCA_FLAG_NO_LAM)) 622 mthca_DISABLE_LAM(mdev, &status); 623 624 return err; 625 } 626 627 static void mthca_close_hca(struct mthca_dev *mdev) 628 { 629 u8 status; 630 631 mthca_CLOSE_HCA(mdev, 0, &status); 632 633 if (mthca_is_memfree(mdev)) { 634 mthca_free_icms(mdev); 635 636 mthca_UNMAP_FA(mdev, &status); 637 mthca_free_icm(mdev, mdev->fw.arbel.fw_icm); 638 639 if (!(mdev->mthca_flags & MTHCA_FLAG_NO_LAM)) 640 mthca_DISABLE_LAM(mdev, &status); 641 } else 642 mthca_SYS_DIS(mdev, &status); 643 } 644 645 static int __devinit mthca_init_hca(struct mthca_dev *mdev) 646 { 647 u8 status; 648 int err; 649 struct mthca_adapter adapter; 650 651 if (mthca_is_memfree(mdev)) 652 err = mthca_init_arbel(mdev); 653 else 654 err = mthca_init_tavor(mdev); 655 656 if (err) 657 return err; 658 659 err = mthca_QUERY_ADAPTER(mdev, &adapter, &status); 660 if (err) { 661 mthca_err(mdev, "QUERY_ADAPTER command failed, aborting.\n"); 662 goto err_close; 663 } 664 if (status) { 665 mthca_err(mdev, "QUERY_ADAPTER returned status 0x%02x, " 666 "aborting.\n", status); 667 err = -EINVAL; 668 goto err_close; 669 } 670 671 mdev->eq_table.inta_pin = adapter.inta_pin; 672 mdev->rev_id = adapter.revision_id; 673 memcpy(mdev->board_id, adapter.board_id, sizeof mdev->board_id); 674 675 return 0; 676 677 err_close: 678 mthca_close_hca(mdev); 679 return err; 680 } 681 682 static int __devinit mthca_setup_hca(struct mthca_dev *dev) 683 { 684 int err; 685 u8 status; 686 687 MTHCA_INIT_DOORBELL_LOCK(&dev->doorbell_lock); 688 689 err = mthca_init_uar_table(dev); 690 if (err) { 691 mthca_err(dev, "Failed to initialize " 692 "user access region table, aborting.\n"); 693 return err; 694 } 695 696 err = mthca_uar_alloc(dev, &dev->driver_uar); 697 if (err) { 698 mthca_err(dev, "Failed to allocate driver access region, " 699 "aborting.\n"); 700 goto err_uar_table_free; 701 } 702 703 dev->kar = ioremap(dev->driver_uar.pfn << PAGE_SHIFT, PAGE_SIZE); 704 if (!dev->kar) { 705 mthca_err(dev, "Couldn't map kernel access region, " 706 "aborting.\n"); 707 err = -ENOMEM; 708 goto err_uar_free; 709 } 710 711 err = mthca_init_pd_table(dev); 712 if (err) { 713 mthca_err(dev, "Failed to initialize " 714 "protection domain table, aborting.\n"); 715 goto err_kar_unmap; 716 } 717 718 err = mthca_init_mr_table(dev); 719 if (err) { 720 mthca_err(dev, "Failed to initialize " 721 "memory region table, aborting.\n"); 722 goto err_pd_table_free; 723 } 724 725 err = mthca_pd_alloc(dev, 1, &dev->driver_pd); 726 if (err) { 727 mthca_err(dev, "Failed to create driver PD, " 728 "aborting.\n"); 729 goto err_mr_table_free; 730 } 731 732 err = mthca_init_eq_table(dev); 733 if (err) { 734 mthca_err(dev, "Failed to initialize " 735 "event queue table, aborting.\n"); 736 goto err_pd_free; 737 } 738 739 err = mthca_cmd_use_events(dev); 740 if (err) { 741 mthca_err(dev, "Failed to switch to event-driven " 742 "firmware commands, aborting.\n"); 743 goto err_eq_table_free; 744 } 745 746 err = mthca_NOP(dev, &status); 747 if (err || status) { 748 mthca_err(dev, "NOP command failed to generate interrupt (IRQ %d), aborting.\n", 749 dev->mthca_flags & MTHCA_FLAG_MSI_X ? 750 dev->eq_table.eq[MTHCA_EQ_CMD].msi_x_vector : 751 dev->pdev->irq); 752 if (dev->mthca_flags & (MTHCA_FLAG_MSI | MTHCA_FLAG_MSI_X)) 753 mthca_err(dev, "Try again with MSI/MSI-X disabled.\n"); 754 else 755 mthca_err(dev, "BIOS or ACPI interrupt routing problem?\n"); 756 757 goto err_cmd_poll; 758 } 759 760 mthca_dbg(dev, "NOP command IRQ test passed\n"); 761 762 err = mthca_init_cq_table(dev); 763 if (err) { 764 mthca_err(dev, "Failed to initialize " 765 "completion queue table, aborting.\n"); 766 goto err_cmd_poll; 767 } 768 769 err = mthca_init_srq_table(dev); 770 if (err) { 771 mthca_err(dev, "Failed to initialize " 772 "shared receive queue table, aborting.\n"); 773 goto err_cq_table_free; 774 } 775 776 err = mthca_init_qp_table(dev); 777 if (err) { 778 mthca_err(dev, "Failed to initialize " 779 "queue pair table, aborting.\n"); 780 goto err_srq_table_free; 781 } 782 783 err = mthca_init_av_table(dev); 784 if (err) { 785 mthca_err(dev, "Failed to initialize " 786 "address vector table, aborting.\n"); 787 goto err_qp_table_free; 788 } 789 790 err = mthca_init_mcg_table(dev); 791 if (err) { 792 mthca_err(dev, "Failed to initialize " 793 "multicast group table, aborting.\n"); 794 goto err_av_table_free; 795 } 796 797 return 0; 798 799 err_av_table_free: 800 mthca_cleanup_av_table(dev); 801 802 err_qp_table_free: 803 mthca_cleanup_qp_table(dev); 804 805 err_srq_table_free: 806 mthca_cleanup_srq_table(dev); 807 808 err_cq_table_free: 809 mthca_cleanup_cq_table(dev); 810 811 err_cmd_poll: 812 mthca_cmd_use_polling(dev); 813 814 err_eq_table_free: 815 mthca_cleanup_eq_table(dev); 816 817 err_pd_free: 818 mthca_pd_free(dev, &dev->driver_pd); 819 820 err_mr_table_free: 821 mthca_cleanup_mr_table(dev); 822 823 err_pd_table_free: 824 mthca_cleanup_pd_table(dev); 825 826 err_kar_unmap: 827 iounmap(dev->kar); 828 829 err_uar_free: 830 mthca_uar_free(dev, &dev->driver_uar); 831 832 err_uar_table_free: 833 mthca_cleanup_uar_table(dev); 834 return err; 835 } 836 837 static int __devinit mthca_request_regions(struct pci_dev *pdev, 838 int ddr_hidden) 839 { 840 int err; 841 842 /* 843 * We can't just use pci_request_regions() because the MSI-X 844 * table is right in the middle of the first BAR. If we did 845 * pci_request_region and grab all of the first BAR, then 846 * setting up MSI-X would fail, since the PCI core wants to do 847 * request_mem_region on the MSI-X vector table. 848 * 849 * So just request what we need right now, and request any 850 * other regions we need when setting up EQs. 851 */ 852 if (!request_mem_region(pci_resource_start(pdev, 0) + MTHCA_HCR_BASE, 853 MTHCA_HCR_SIZE, DRV_NAME)) 854 return -EBUSY; 855 856 err = pci_request_region(pdev, 2, DRV_NAME); 857 if (err) 858 goto err_bar2_failed; 859 860 if (!ddr_hidden) { 861 err = pci_request_region(pdev, 4, DRV_NAME); 862 if (err) 863 goto err_bar4_failed; 864 } 865 866 return 0; 867 868 err_bar4_failed: 869 pci_release_region(pdev, 2); 870 871 err_bar2_failed: 872 release_mem_region(pci_resource_start(pdev, 0) + MTHCA_HCR_BASE, 873 MTHCA_HCR_SIZE); 874 875 return err; 876 } 877 878 static void mthca_release_regions(struct pci_dev *pdev, 879 int ddr_hidden) 880 { 881 if (!ddr_hidden) 882 pci_release_region(pdev, 4); 883 884 pci_release_region(pdev, 2); 885 886 release_mem_region(pci_resource_start(pdev, 0) + MTHCA_HCR_BASE, 887 MTHCA_HCR_SIZE); 888 } 889 890 static int __devinit mthca_enable_msi_x(struct mthca_dev *mdev) 891 { 892 struct msix_entry entries[3]; 893 int err; 894 895 entries[0].entry = 0; 896 entries[1].entry = 1; 897 entries[2].entry = 2; 898 899 err = pci_enable_msix(mdev->pdev, entries, ARRAY_SIZE(entries)); 900 if (err) { 901 if (err > 0) 902 mthca_info(mdev, "Only %d MSI-X vectors available, " 903 "not using MSI-X\n", err); 904 return err; 905 } 906 907 mdev->eq_table.eq[MTHCA_EQ_COMP ].msi_x_vector = entries[0].vector; 908 mdev->eq_table.eq[MTHCA_EQ_ASYNC].msi_x_vector = entries[1].vector; 909 mdev->eq_table.eq[MTHCA_EQ_CMD ].msi_x_vector = entries[2].vector; 910 911 return 0; 912 } 913 914 /* Types of supported HCA */ 915 enum { 916 TAVOR, /* MT23108 */ 917 ARBEL_COMPAT, /* MT25208 in Tavor compat mode */ 918 ARBEL_NATIVE, /* MT25208 with extended features */ 919 SINAI /* MT25204 */ 920 }; 921 922 #define MTHCA_FW_VER(major, minor, subminor) \ 923 (((u64) (major) << 32) | ((u64) (minor) << 16) | (u64) (subminor)) 924 925 static struct { 926 u64 latest_fw; 927 int is_memfree; 928 int is_pcie; 929 } mthca_hca_table[] = { 930 [TAVOR] = { .latest_fw = MTHCA_FW_VER(3, 3, 3), .is_memfree = 0, .is_pcie = 0 }, 931 [ARBEL_COMPAT] = { .latest_fw = MTHCA_FW_VER(4, 7, 0), .is_memfree = 0, .is_pcie = 1 }, 932 [ARBEL_NATIVE] = { .latest_fw = MTHCA_FW_VER(5, 1, 0), .is_memfree = 1, .is_pcie = 1 }, 933 [SINAI] = { .latest_fw = MTHCA_FW_VER(1, 0, 1), .is_memfree = 1, .is_pcie = 1 } 934 }; 935 936 static int __devinit mthca_init_one(struct pci_dev *pdev, 937 const struct pci_device_id *id) 938 { 939 static int mthca_version_printed = 0; 940 int ddr_hidden = 0; 941 int err; 942 struct mthca_dev *mdev; 943 944 if (!mthca_version_printed) { 945 printk(KERN_INFO "%s", mthca_version); 946 ++mthca_version_printed; 947 } 948 949 printk(KERN_INFO PFX "Initializing %s\n", 950 pci_name(pdev)); 951 952 if (id->driver_data >= ARRAY_SIZE(mthca_hca_table)) { 953 printk(KERN_ERR PFX "%s has invalid driver data %lx\n", 954 pci_name(pdev), id->driver_data); 955 return -ENODEV; 956 } 957 958 err = pci_enable_device(pdev); 959 if (err) { 960 dev_err(&pdev->dev, "Cannot enable PCI device, " 961 "aborting.\n"); 962 return err; 963 } 964 965 /* 966 * Check for BARs. We expect 0: 1MB, 2: 8MB, 4: DDR (may not 967 * be present) 968 */ 969 if (!(pci_resource_flags(pdev, 0) & IORESOURCE_MEM) || 970 pci_resource_len(pdev, 0) != 1 << 20) { 971 dev_err(&pdev->dev, "Missing DCS, aborting.\n"); 972 err = -ENODEV; 973 goto err_disable_pdev; 974 } 975 if (!(pci_resource_flags(pdev, 2) & IORESOURCE_MEM) || 976 pci_resource_len(pdev, 2) != 1 << 23) { 977 dev_err(&pdev->dev, "Missing UAR, aborting.\n"); 978 err = -ENODEV; 979 goto err_disable_pdev; 980 } 981 if (!(pci_resource_flags(pdev, 4) & IORESOURCE_MEM)) 982 ddr_hidden = 1; 983 984 err = mthca_request_regions(pdev, ddr_hidden); 985 if (err) { 986 dev_err(&pdev->dev, "Cannot obtain PCI resources, " 987 "aborting.\n"); 988 goto err_disable_pdev; 989 } 990 991 pci_set_master(pdev); 992 993 err = pci_set_dma_mask(pdev, DMA_64BIT_MASK); 994 if (err) { 995 dev_warn(&pdev->dev, "Warning: couldn't set 64-bit PCI DMA mask.\n"); 996 err = pci_set_dma_mask(pdev, DMA_32BIT_MASK); 997 if (err) { 998 dev_err(&pdev->dev, "Can't set PCI DMA mask, aborting.\n"); 999 goto err_free_res; 1000 } 1001 } 1002 err = pci_set_consistent_dma_mask(pdev, DMA_64BIT_MASK); 1003 if (err) { 1004 dev_warn(&pdev->dev, "Warning: couldn't set 64-bit " 1005 "consistent PCI DMA mask.\n"); 1006 err = pci_set_consistent_dma_mask(pdev, DMA_32BIT_MASK); 1007 if (err) { 1008 dev_err(&pdev->dev, "Can't set consistent PCI DMA mask, " 1009 "aborting.\n"); 1010 goto err_free_res; 1011 } 1012 } 1013 1014 mdev = (struct mthca_dev *) ib_alloc_device(sizeof *mdev); 1015 if (!mdev) { 1016 dev_err(&pdev->dev, "Device struct alloc failed, " 1017 "aborting.\n"); 1018 err = -ENOMEM; 1019 goto err_free_res; 1020 } 1021 1022 mdev->pdev = pdev; 1023 1024 if (ddr_hidden) 1025 mdev->mthca_flags |= MTHCA_FLAG_DDR_HIDDEN; 1026 if (mthca_hca_table[id->driver_data].is_memfree) 1027 mdev->mthca_flags |= MTHCA_FLAG_MEMFREE; 1028 if (mthca_hca_table[id->driver_data].is_pcie) 1029 mdev->mthca_flags |= MTHCA_FLAG_PCIE; 1030 1031 /* 1032 * Now reset the HCA before we touch the PCI capabilities or 1033 * attempt a firmware command, since a boot ROM may have left 1034 * the HCA in an undefined state. 1035 */ 1036 err = mthca_reset(mdev); 1037 if (err) { 1038 mthca_err(mdev, "Failed to reset HCA, aborting.\n"); 1039 goto err_free_dev; 1040 } 1041 1042 if (msi_x && !mthca_enable_msi_x(mdev)) 1043 mdev->mthca_flags |= MTHCA_FLAG_MSI_X; 1044 if (msi && !(mdev->mthca_flags & MTHCA_FLAG_MSI_X) && 1045 !pci_enable_msi(pdev)) 1046 mdev->mthca_flags |= MTHCA_FLAG_MSI; 1047 1048 if (mthca_cmd_init(mdev)) { 1049 mthca_err(mdev, "Failed to init command interface, aborting.\n"); 1050 goto err_free_dev; 1051 } 1052 1053 err = mthca_tune_pci(mdev); 1054 if (err) 1055 goto err_cmd; 1056 1057 err = mthca_init_hca(mdev); 1058 if (err) 1059 goto err_cmd; 1060 1061 if (mdev->fw_ver < mthca_hca_table[id->driver_data].latest_fw) { 1062 mthca_warn(mdev, "HCA FW version %d.%d.%d is old (%d.%d.%d is current).\n", 1063 (int) (mdev->fw_ver >> 32), (int) (mdev->fw_ver >> 16) & 0xffff, 1064 (int) (mdev->fw_ver & 0xffff), 1065 (int) (mthca_hca_table[id->driver_data].latest_fw >> 32), 1066 (int) (mthca_hca_table[id->driver_data].latest_fw >> 16) & 0xffff, 1067 (int) (mthca_hca_table[id->driver_data].latest_fw & 0xffff)); 1068 mthca_warn(mdev, "If you have problems, try updating your HCA FW.\n"); 1069 } 1070 1071 err = mthca_setup_hca(mdev); 1072 if (err) 1073 goto err_close; 1074 1075 err = mthca_register_device(mdev); 1076 if (err) 1077 goto err_cleanup; 1078 1079 err = mthca_create_agents(mdev); 1080 if (err) 1081 goto err_unregister; 1082 1083 pci_set_drvdata(pdev, mdev); 1084 1085 return 0; 1086 1087 err_unregister: 1088 mthca_unregister_device(mdev); 1089 1090 err_cleanup: 1091 mthca_cleanup_mcg_table(mdev); 1092 mthca_cleanup_av_table(mdev); 1093 mthca_cleanup_qp_table(mdev); 1094 mthca_cleanup_srq_table(mdev); 1095 mthca_cleanup_cq_table(mdev); 1096 mthca_cmd_use_polling(mdev); 1097 mthca_cleanup_eq_table(mdev); 1098 1099 mthca_pd_free(mdev, &mdev->driver_pd); 1100 1101 mthca_cleanup_mr_table(mdev); 1102 mthca_cleanup_pd_table(mdev); 1103 mthca_cleanup_uar_table(mdev); 1104 1105 err_close: 1106 mthca_close_hca(mdev); 1107 1108 err_cmd: 1109 mthca_cmd_cleanup(mdev); 1110 1111 err_free_dev: 1112 if (mdev->mthca_flags & MTHCA_FLAG_MSI_X) 1113 pci_disable_msix(pdev); 1114 if (mdev->mthca_flags & MTHCA_FLAG_MSI) 1115 pci_disable_msi(pdev); 1116 1117 ib_dealloc_device(&mdev->ib_dev); 1118 1119 err_free_res: 1120 mthca_release_regions(pdev, ddr_hidden); 1121 1122 err_disable_pdev: 1123 pci_disable_device(pdev); 1124 pci_set_drvdata(pdev, NULL); 1125 return err; 1126 } 1127 1128 static void __devexit mthca_remove_one(struct pci_dev *pdev) 1129 { 1130 struct mthca_dev *mdev = pci_get_drvdata(pdev); 1131 u8 status; 1132 int p; 1133 1134 if (mdev) { 1135 mthca_free_agents(mdev); 1136 mthca_unregister_device(mdev); 1137 1138 for (p = 1; p <= mdev->limits.num_ports; ++p) 1139 mthca_CLOSE_IB(mdev, p, &status); 1140 1141 mthca_cleanup_mcg_table(mdev); 1142 mthca_cleanup_av_table(mdev); 1143 mthca_cleanup_qp_table(mdev); 1144 mthca_cleanup_srq_table(mdev); 1145 mthca_cleanup_cq_table(mdev); 1146 mthca_cmd_use_polling(mdev); 1147 mthca_cleanup_eq_table(mdev); 1148 1149 mthca_pd_free(mdev, &mdev->driver_pd); 1150 1151 mthca_cleanup_mr_table(mdev); 1152 mthca_cleanup_pd_table(mdev); 1153 1154 iounmap(mdev->kar); 1155 mthca_uar_free(mdev, &mdev->driver_uar); 1156 mthca_cleanup_uar_table(mdev); 1157 mthca_close_hca(mdev); 1158 mthca_cmd_cleanup(mdev); 1159 1160 if (mdev->mthca_flags & MTHCA_FLAG_MSI_X) 1161 pci_disable_msix(pdev); 1162 if (mdev->mthca_flags & MTHCA_FLAG_MSI) 1163 pci_disable_msi(pdev); 1164 1165 ib_dealloc_device(&mdev->ib_dev); 1166 mthca_release_regions(pdev, mdev->mthca_flags & 1167 MTHCA_FLAG_DDR_HIDDEN); 1168 pci_disable_device(pdev); 1169 pci_set_drvdata(pdev, NULL); 1170 } 1171 } 1172 1173 static struct pci_device_id mthca_pci_table[] = { 1174 { PCI_DEVICE(PCI_VENDOR_ID_MELLANOX, PCI_DEVICE_ID_MELLANOX_TAVOR), 1175 .driver_data = TAVOR }, 1176 { PCI_DEVICE(PCI_VENDOR_ID_TOPSPIN, PCI_DEVICE_ID_MELLANOX_TAVOR), 1177 .driver_data = TAVOR }, 1178 { PCI_DEVICE(PCI_VENDOR_ID_MELLANOX, PCI_DEVICE_ID_MELLANOX_ARBEL_COMPAT), 1179 .driver_data = ARBEL_COMPAT }, 1180 { PCI_DEVICE(PCI_VENDOR_ID_TOPSPIN, PCI_DEVICE_ID_MELLANOX_ARBEL_COMPAT), 1181 .driver_data = ARBEL_COMPAT }, 1182 { PCI_DEVICE(PCI_VENDOR_ID_MELLANOX, PCI_DEVICE_ID_MELLANOX_ARBEL), 1183 .driver_data = ARBEL_NATIVE }, 1184 { PCI_DEVICE(PCI_VENDOR_ID_TOPSPIN, PCI_DEVICE_ID_MELLANOX_ARBEL), 1185 .driver_data = ARBEL_NATIVE }, 1186 { PCI_DEVICE(PCI_VENDOR_ID_MELLANOX, PCI_DEVICE_ID_MELLANOX_SINAI), 1187 .driver_data = SINAI }, 1188 { PCI_DEVICE(PCI_VENDOR_ID_TOPSPIN, PCI_DEVICE_ID_MELLANOX_SINAI), 1189 .driver_data = SINAI }, 1190 { PCI_DEVICE(PCI_VENDOR_ID_MELLANOX, PCI_DEVICE_ID_MELLANOX_SINAI_OLD), 1191 .driver_data = SINAI }, 1192 { PCI_DEVICE(PCI_VENDOR_ID_TOPSPIN, PCI_DEVICE_ID_MELLANOX_SINAI_OLD), 1193 .driver_data = SINAI }, 1194 { 0, } 1195 }; 1196 1197 MODULE_DEVICE_TABLE(pci, mthca_pci_table); 1198 1199 static struct pci_driver mthca_driver = { 1200 .name = DRV_NAME, 1201 .id_table = mthca_pci_table, 1202 .probe = mthca_init_one, 1203 .remove = __devexit_p(mthca_remove_one) 1204 }; 1205 1206 static int __init mthca_init(void) 1207 { 1208 int ret; 1209 1210 ret = pci_register_driver(&mthca_driver); 1211 return ret < 0 ? ret : 0; 1212 } 1213 1214 static void __exit mthca_cleanup(void) 1215 { 1216 pci_unregister_driver(&mthca_driver); 1217 } 1218 1219 module_init(mthca_init); 1220 module_exit(mthca_cleanup); 1221