1 /* 2 * Copyright (c) 2004, 2005 Topspin Communications. All rights reserved. 3 * Copyright (c) 2005 Sun Microsystems, Inc. All rights reserved. 4 * Copyright (c) 2005 Cisco Systems. All rights reserved. 5 * Copyright (c) 2005 Mellanox Technologies. All rights reserved. 6 * Copyright (c) 2004 Voltaire, Inc. All rights reserved. 7 * 8 * This software is available to you under a choice of one of two 9 * licenses. You may choose to be licensed under the terms of the GNU 10 * General Public License (GPL) Version 2, available from the file 11 * COPYING in the main directory of this source tree, or the 12 * OpenIB.org BSD license below: 13 * 14 * Redistribution and use in source and binary forms, with or 15 * without modification, are permitted provided that the following 16 * conditions are met: 17 * 18 * - Redistributions of source code must retain the above 19 * copyright notice, this list of conditions and the following 20 * disclaimer. 21 * 22 * - Redistributions in binary form must reproduce the above 23 * copyright notice, this list of conditions and the following 24 * disclaimer in the documentation and/or other materials 25 * provided with the distribution. 26 * 27 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, 28 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF 29 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND 30 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS 31 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN 32 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN 33 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE 34 * SOFTWARE. 35 * 36 * $Id: mthca_dev.h 1349 2004-12-16 21:09:43Z roland $ 37 */ 38 39 #ifndef MTHCA_DEV_H 40 #define MTHCA_DEV_H 41 42 #include <linux/spinlock.h> 43 #include <linux/kernel.h> 44 #include <linux/pci.h> 45 #include <linux/dma-mapping.h> 46 #include <asm/semaphore.h> 47 48 #include "mthca_provider.h" 49 #include "mthca_doorbell.h" 50 51 #define DRV_NAME "ib_mthca" 52 #define PFX DRV_NAME ": " 53 #define DRV_VERSION "0.06" 54 #define DRV_RELDATE "June 23, 2005" 55 56 enum { 57 MTHCA_FLAG_DDR_HIDDEN = 1 << 1, 58 MTHCA_FLAG_SRQ = 1 << 2, 59 MTHCA_FLAG_MSI = 1 << 3, 60 MTHCA_FLAG_MSI_X = 1 << 4, 61 MTHCA_FLAG_NO_LAM = 1 << 5, 62 MTHCA_FLAG_FMR = 1 << 6, 63 MTHCA_FLAG_MEMFREE = 1 << 7, 64 MTHCA_FLAG_PCIE = 1 << 8 65 }; 66 67 enum { 68 MTHCA_MAX_PORTS = 2 69 }; 70 71 enum { 72 MTHCA_BOARD_ID_LEN = 64 73 }; 74 75 enum { 76 MTHCA_EQ_CONTEXT_SIZE = 0x40, 77 MTHCA_CQ_CONTEXT_SIZE = 0x40, 78 MTHCA_QP_CONTEXT_SIZE = 0x200, 79 MTHCA_RDB_ENTRY_SIZE = 0x20, 80 MTHCA_AV_SIZE = 0x20, 81 MTHCA_MGM_ENTRY_SIZE = 0x40, 82 83 /* Arbel FW gives us these, but we need them for Tavor */ 84 MTHCA_MPT_ENTRY_SIZE = 0x40, 85 MTHCA_MTT_SEG_SIZE = 0x40, 86 87 MTHCA_QP_PER_MGM = 4 * (MTHCA_MGM_ENTRY_SIZE / 16 - 2) 88 }; 89 90 enum { 91 MTHCA_EQ_CMD, 92 MTHCA_EQ_ASYNC, 93 MTHCA_EQ_COMP, 94 MTHCA_NUM_EQ 95 }; 96 97 enum { 98 MTHCA_OPCODE_NOP = 0x00, 99 MTHCA_OPCODE_RDMA_WRITE = 0x08, 100 MTHCA_OPCODE_RDMA_WRITE_IMM = 0x09, 101 MTHCA_OPCODE_SEND = 0x0a, 102 MTHCA_OPCODE_SEND_IMM = 0x0b, 103 MTHCA_OPCODE_RDMA_READ = 0x10, 104 MTHCA_OPCODE_ATOMIC_CS = 0x11, 105 MTHCA_OPCODE_ATOMIC_FA = 0x12, 106 MTHCA_OPCODE_BIND_MW = 0x18, 107 MTHCA_OPCODE_INVALID = 0xff 108 }; 109 110 struct mthca_cmd { 111 struct pci_pool *pool; 112 int use_events; 113 struct semaphore hcr_sem; 114 struct semaphore poll_sem; 115 struct semaphore event_sem; 116 int max_cmds; 117 spinlock_t context_lock; 118 int free_head; 119 struct mthca_cmd_context *context; 120 u16 token_mask; 121 }; 122 123 struct mthca_limits { 124 int num_ports; 125 int vl_cap; 126 int mtu_cap; 127 int gid_table_len; 128 int pkey_table_len; 129 int local_ca_ack_delay; 130 int num_uars; 131 int max_sg; 132 int num_qps; 133 int max_wqes; 134 int max_desc_sz; 135 int max_qp_init_rdma; 136 int reserved_qps; 137 int num_srqs; 138 int max_srq_wqes; 139 int reserved_srqs; 140 int num_eecs; 141 int reserved_eecs; 142 int num_cqs; 143 int max_cqes; 144 int reserved_cqs; 145 int num_eqs; 146 int reserved_eqs; 147 int num_mpts; 148 int num_mtt_segs; 149 int fmr_reserved_mtts; 150 int reserved_mtts; 151 int reserved_mrws; 152 int reserved_uars; 153 int num_mgms; 154 int num_amgms; 155 int reserved_mcgs; 156 int num_pds; 157 int reserved_pds; 158 u32 page_size_cap; 159 u32 flags; 160 u8 port_width_cap; 161 }; 162 163 struct mthca_alloc { 164 u32 last; 165 u32 top; 166 u32 max; 167 u32 mask; 168 spinlock_t lock; 169 unsigned long *table; 170 }; 171 172 struct mthca_array { 173 struct { 174 void **page; 175 int used; 176 } *page_list; 177 }; 178 179 struct mthca_uar_table { 180 struct mthca_alloc alloc; 181 u64 uarc_base; 182 int uarc_size; 183 }; 184 185 struct mthca_pd_table { 186 struct mthca_alloc alloc; 187 }; 188 189 struct mthca_buddy { 190 unsigned long **bits; 191 int max_order; 192 spinlock_t lock; 193 }; 194 195 struct mthca_mr_table { 196 struct mthca_alloc mpt_alloc; 197 struct mthca_buddy mtt_buddy; 198 struct mthca_buddy *fmr_mtt_buddy; 199 u64 mtt_base; 200 u64 mpt_base; 201 struct mthca_icm_table *mtt_table; 202 struct mthca_icm_table *mpt_table; 203 struct { 204 void __iomem *mpt_base; 205 void __iomem *mtt_base; 206 struct mthca_buddy mtt_buddy; 207 } tavor_fmr; 208 }; 209 210 struct mthca_eq_table { 211 struct mthca_alloc alloc; 212 void __iomem *clr_int; 213 u32 clr_mask; 214 u32 arm_mask; 215 struct mthca_eq eq[MTHCA_NUM_EQ]; 216 u64 icm_virt; 217 struct page *icm_page; 218 dma_addr_t icm_dma; 219 int have_irq; 220 u8 inta_pin; 221 }; 222 223 struct mthca_cq_table { 224 struct mthca_alloc alloc; 225 spinlock_t lock; 226 struct mthca_array cq; 227 struct mthca_icm_table *table; 228 }; 229 230 struct mthca_srq_table { 231 struct mthca_alloc alloc; 232 spinlock_t lock; 233 struct mthca_array srq; 234 struct mthca_icm_table *table; 235 }; 236 237 struct mthca_qp_table { 238 struct mthca_alloc alloc; 239 u32 rdb_base; 240 int rdb_shift; 241 int sqp_start; 242 spinlock_t lock; 243 struct mthca_array qp; 244 struct mthca_icm_table *qp_table; 245 struct mthca_icm_table *eqp_table; 246 struct mthca_icm_table *rdb_table; 247 }; 248 249 struct mthca_av_table { 250 struct pci_pool *pool; 251 int num_ddr_avs; 252 u64 ddr_av_base; 253 void __iomem *av_map; 254 struct mthca_alloc alloc; 255 }; 256 257 struct mthca_mcg_table { 258 struct semaphore sem; 259 struct mthca_alloc alloc; 260 struct mthca_icm_table *table; 261 }; 262 263 struct mthca_catas_err { 264 u64 addr; 265 u32 __iomem *map; 266 unsigned long stop; 267 u32 size; 268 struct timer_list timer; 269 }; 270 271 struct mthca_dev { 272 struct ib_device ib_dev; 273 struct pci_dev *pdev; 274 275 int hca_type; 276 unsigned long mthca_flags; 277 unsigned long device_cap_flags; 278 279 u32 rev_id; 280 char board_id[MTHCA_BOARD_ID_LEN]; 281 282 /* firmware info */ 283 u64 fw_ver; 284 union { 285 struct { 286 u64 fw_start; 287 u64 fw_end; 288 } tavor; 289 struct { 290 u64 clr_int_base; 291 u64 eq_arm_base; 292 u64 eq_set_ci_base; 293 struct mthca_icm *fw_icm; 294 struct mthca_icm *aux_icm; 295 u16 fw_pages; 296 } arbel; 297 } fw; 298 299 u64 ddr_start; 300 u64 ddr_end; 301 302 MTHCA_DECLARE_DOORBELL_LOCK(doorbell_lock) 303 struct semaphore cap_mask_mutex; 304 305 void __iomem *hcr; 306 void __iomem *kar; 307 void __iomem *clr_base; 308 union { 309 struct { 310 void __iomem *ecr_base; 311 } tavor; 312 struct { 313 void __iomem *eq_arm; 314 void __iomem *eq_set_ci_base; 315 } arbel; 316 } eq_regs; 317 318 struct mthca_cmd cmd; 319 struct mthca_limits limits; 320 321 struct mthca_uar_table uar_table; 322 struct mthca_pd_table pd_table; 323 struct mthca_mr_table mr_table; 324 struct mthca_eq_table eq_table; 325 struct mthca_cq_table cq_table; 326 struct mthca_srq_table srq_table; 327 struct mthca_qp_table qp_table; 328 struct mthca_av_table av_table; 329 struct mthca_mcg_table mcg_table; 330 331 struct mthca_catas_err catas_err; 332 333 struct mthca_uar driver_uar; 334 struct mthca_db_table *db_tab; 335 struct mthca_pd driver_pd; 336 struct mthca_mr driver_mr; 337 338 struct ib_mad_agent *send_agent[MTHCA_MAX_PORTS][2]; 339 struct ib_ah *sm_ah[MTHCA_MAX_PORTS]; 340 spinlock_t sm_lock; 341 }; 342 343 #define mthca_dbg(mdev, format, arg...) \ 344 dev_dbg(&mdev->pdev->dev, format, ## arg) 345 #define mthca_err(mdev, format, arg...) \ 346 dev_err(&mdev->pdev->dev, format, ## arg) 347 #define mthca_info(mdev, format, arg...) \ 348 dev_info(&mdev->pdev->dev, format, ## arg) 349 #define mthca_warn(mdev, format, arg...) \ 350 dev_warn(&mdev->pdev->dev, format, ## arg) 351 352 extern void __buggy_use_of_MTHCA_GET(void); 353 extern void __buggy_use_of_MTHCA_PUT(void); 354 355 #define MTHCA_GET(dest, source, offset) \ 356 do { \ 357 void *__p = (char *) (source) + (offset); \ 358 switch (sizeof (dest)) { \ 359 case 1: (dest) = *(u8 *) __p; break; \ 360 case 2: (dest) = be16_to_cpup(__p); break; \ 361 case 4: (dest) = be32_to_cpup(__p); break; \ 362 case 8: (dest) = be64_to_cpup(__p); break; \ 363 default: __buggy_use_of_MTHCA_GET(); \ 364 } \ 365 } while (0) 366 367 #define MTHCA_PUT(dest, source, offset) \ 368 do { \ 369 void *__d = ((char *) (dest) + (offset)); \ 370 switch (sizeof(source)) { \ 371 case 1: *(u8 *) __d = (source); break; \ 372 case 2: *(__be16 *) __d = cpu_to_be16(source); break; \ 373 case 4: *(__be32 *) __d = cpu_to_be32(source); break; \ 374 case 8: *(__be64 *) __d = cpu_to_be64(source); break; \ 375 default: __buggy_use_of_MTHCA_PUT(); \ 376 } \ 377 } while (0) 378 379 int mthca_reset(struct mthca_dev *mdev); 380 381 u32 mthca_alloc(struct mthca_alloc *alloc); 382 void mthca_free(struct mthca_alloc *alloc, u32 obj); 383 int mthca_alloc_init(struct mthca_alloc *alloc, u32 num, u32 mask, 384 u32 reserved); 385 void mthca_alloc_cleanup(struct mthca_alloc *alloc); 386 void *mthca_array_get(struct mthca_array *array, int index); 387 int mthca_array_set(struct mthca_array *array, int index, void *value); 388 void mthca_array_clear(struct mthca_array *array, int index); 389 int mthca_array_init(struct mthca_array *array, int nent); 390 void mthca_array_cleanup(struct mthca_array *array, int nent); 391 int mthca_buf_alloc(struct mthca_dev *dev, int size, int max_direct, 392 union mthca_buf *buf, int *is_direct, struct mthca_pd *pd, 393 int hca_write, struct mthca_mr *mr); 394 void mthca_buf_free(struct mthca_dev *dev, int size, union mthca_buf *buf, 395 int is_direct, struct mthca_mr *mr); 396 397 int mthca_init_uar_table(struct mthca_dev *dev); 398 int mthca_init_pd_table(struct mthca_dev *dev); 399 int mthca_init_mr_table(struct mthca_dev *dev); 400 int mthca_init_eq_table(struct mthca_dev *dev); 401 int mthca_init_cq_table(struct mthca_dev *dev); 402 int mthca_init_srq_table(struct mthca_dev *dev); 403 int mthca_init_qp_table(struct mthca_dev *dev); 404 int mthca_init_av_table(struct mthca_dev *dev); 405 int mthca_init_mcg_table(struct mthca_dev *dev); 406 407 void mthca_cleanup_uar_table(struct mthca_dev *dev); 408 void mthca_cleanup_pd_table(struct mthca_dev *dev); 409 void mthca_cleanup_mr_table(struct mthca_dev *dev); 410 void mthca_cleanup_eq_table(struct mthca_dev *dev); 411 void mthca_cleanup_cq_table(struct mthca_dev *dev); 412 void mthca_cleanup_srq_table(struct mthca_dev *dev); 413 void mthca_cleanup_qp_table(struct mthca_dev *dev); 414 void mthca_cleanup_av_table(struct mthca_dev *dev); 415 void mthca_cleanup_mcg_table(struct mthca_dev *dev); 416 417 int mthca_register_device(struct mthca_dev *dev); 418 void mthca_unregister_device(struct mthca_dev *dev); 419 420 void mthca_start_catas_poll(struct mthca_dev *dev); 421 void mthca_stop_catas_poll(struct mthca_dev *dev); 422 423 int mthca_uar_alloc(struct mthca_dev *dev, struct mthca_uar *uar); 424 void mthca_uar_free(struct mthca_dev *dev, struct mthca_uar *uar); 425 426 int mthca_pd_alloc(struct mthca_dev *dev, int privileged, struct mthca_pd *pd); 427 void mthca_pd_free(struct mthca_dev *dev, struct mthca_pd *pd); 428 429 struct mthca_mtt *mthca_alloc_mtt(struct mthca_dev *dev, int size); 430 void mthca_free_mtt(struct mthca_dev *dev, struct mthca_mtt *mtt); 431 int mthca_write_mtt(struct mthca_dev *dev, struct mthca_mtt *mtt, 432 int start_index, u64 *buffer_list, int list_len); 433 int mthca_mr_alloc(struct mthca_dev *dev, u32 pd, int buffer_size_shift, 434 u64 iova, u64 total_size, u32 access, struct mthca_mr *mr); 435 int mthca_mr_alloc_notrans(struct mthca_dev *dev, u32 pd, 436 u32 access, struct mthca_mr *mr); 437 int mthca_mr_alloc_phys(struct mthca_dev *dev, u32 pd, 438 u64 *buffer_list, int buffer_size_shift, 439 int list_len, u64 iova, u64 total_size, 440 u32 access, struct mthca_mr *mr); 441 void mthca_free_mr(struct mthca_dev *dev, struct mthca_mr *mr); 442 443 int mthca_fmr_alloc(struct mthca_dev *dev, u32 pd, 444 u32 access, struct mthca_fmr *fmr); 445 int mthca_tavor_map_phys_fmr(struct ib_fmr *ibfmr, u64 *page_list, 446 int list_len, u64 iova); 447 void mthca_tavor_fmr_unmap(struct mthca_dev *dev, struct mthca_fmr *fmr); 448 int mthca_arbel_map_phys_fmr(struct ib_fmr *ibfmr, u64 *page_list, 449 int list_len, u64 iova); 450 void mthca_arbel_fmr_unmap(struct mthca_dev *dev, struct mthca_fmr *fmr); 451 int mthca_free_fmr(struct mthca_dev *dev, struct mthca_fmr *fmr); 452 453 int mthca_map_eq_icm(struct mthca_dev *dev, u64 icm_virt); 454 void mthca_unmap_eq_icm(struct mthca_dev *dev); 455 456 int mthca_poll_cq(struct ib_cq *ibcq, int num_entries, 457 struct ib_wc *entry); 458 int mthca_tavor_arm_cq(struct ib_cq *cq, enum ib_cq_notify notify); 459 int mthca_arbel_arm_cq(struct ib_cq *cq, enum ib_cq_notify notify); 460 int mthca_init_cq(struct mthca_dev *dev, int nent, 461 struct mthca_ucontext *ctx, u32 pdn, 462 struct mthca_cq *cq); 463 void mthca_free_cq(struct mthca_dev *dev, 464 struct mthca_cq *cq); 465 void mthca_cq_completion(struct mthca_dev *dev, u32 cqn); 466 void mthca_cq_event(struct mthca_dev *dev, u32 cqn, 467 enum ib_event_type event_type); 468 void mthca_cq_clean(struct mthca_dev *dev, u32 cqn, u32 qpn, 469 struct mthca_srq *srq); 470 471 int mthca_alloc_srq(struct mthca_dev *dev, struct mthca_pd *pd, 472 struct ib_srq_attr *attr, struct mthca_srq *srq); 473 void mthca_free_srq(struct mthca_dev *dev, struct mthca_srq *srq); 474 int mthca_modify_srq(struct ib_srq *ibsrq, struct ib_srq_attr *attr, 475 enum ib_srq_attr_mask attr_mask); 476 void mthca_srq_event(struct mthca_dev *dev, u32 srqn, 477 enum ib_event_type event_type); 478 void mthca_free_srq_wqe(struct mthca_srq *srq, u32 wqe_addr); 479 int mthca_tavor_post_srq_recv(struct ib_srq *srq, struct ib_recv_wr *wr, 480 struct ib_recv_wr **bad_wr); 481 int mthca_arbel_post_srq_recv(struct ib_srq *srq, struct ib_recv_wr *wr, 482 struct ib_recv_wr **bad_wr); 483 484 void mthca_qp_event(struct mthca_dev *dev, u32 qpn, 485 enum ib_event_type event_type); 486 int mthca_modify_qp(struct ib_qp *ibqp, struct ib_qp_attr *attr, int attr_mask); 487 int mthca_tavor_post_send(struct ib_qp *ibqp, struct ib_send_wr *wr, 488 struct ib_send_wr **bad_wr); 489 int mthca_tavor_post_receive(struct ib_qp *ibqp, struct ib_recv_wr *wr, 490 struct ib_recv_wr **bad_wr); 491 int mthca_arbel_post_send(struct ib_qp *ibqp, struct ib_send_wr *wr, 492 struct ib_send_wr **bad_wr); 493 int mthca_arbel_post_receive(struct ib_qp *ibqp, struct ib_recv_wr *wr, 494 struct ib_recv_wr **bad_wr); 495 int mthca_free_err_wqe(struct mthca_dev *dev, struct mthca_qp *qp, int is_send, 496 int index, int *dbd, __be32 *new_wqe); 497 int mthca_alloc_qp(struct mthca_dev *dev, 498 struct mthca_pd *pd, 499 struct mthca_cq *send_cq, 500 struct mthca_cq *recv_cq, 501 enum ib_qp_type type, 502 enum ib_sig_type send_policy, 503 struct ib_qp_cap *cap, 504 struct mthca_qp *qp); 505 int mthca_alloc_sqp(struct mthca_dev *dev, 506 struct mthca_pd *pd, 507 struct mthca_cq *send_cq, 508 struct mthca_cq *recv_cq, 509 enum ib_sig_type send_policy, 510 struct ib_qp_cap *cap, 511 int qpn, 512 int port, 513 struct mthca_sqp *sqp); 514 void mthca_free_qp(struct mthca_dev *dev, struct mthca_qp *qp); 515 int mthca_create_ah(struct mthca_dev *dev, 516 struct mthca_pd *pd, 517 struct ib_ah_attr *ah_attr, 518 struct mthca_ah *ah); 519 int mthca_destroy_ah(struct mthca_dev *dev, struct mthca_ah *ah); 520 int mthca_read_ah(struct mthca_dev *dev, struct mthca_ah *ah, 521 struct ib_ud_header *header); 522 523 int mthca_multicast_attach(struct ib_qp *ibqp, union ib_gid *gid, u16 lid); 524 int mthca_multicast_detach(struct ib_qp *ibqp, union ib_gid *gid, u16 lid); 525 526 int mthca_process_mad(struct ib_device *ibdev, 527 int mad_flags, 528 u8 port_num, 529 struct ib_wc *in_wc, 530 struct ib_grh *in_grh, 531 struct ib_mad *in_mad, 532 struct ib_mad *out_mad); 533 int mthca_create_agents(struct mthca_dev *dev); 534 void mthca_free_agents(struct mthca_dev *dev); 535 536 static inline struct mthca_dev *to_mdev(struct ib_device *ibdev) 537 { 538 return container_of(ibdev, struct mthca_dev, ib_dev); 539 } 540 541 static inline int mthca_is_memfree(struct mthca_dev *dev) 542 { 543 return dev->mthca_flags & MTHCA_FLAG_MEMFREE; 544 } 545 546 #endif /* MTHCA_DEV_H */ 547