1 /* 2 * Copyright (c) 2013-2015, Mellanox Technologies. All rights reserved. 3 * 4 * This software is available to you under a choice of one of two 5 * licenses. You may choose to be licensed under the terms of the GNU 6 * General Public License (GPL) Version 2, available from the file 7 * COPYING in the main directory of this source tree, or the 8 * OpenIB.org BSD license below: 9 * 10 * Redistribution and use in source and binary forms, with or 11 * without modification, are permitted provided that the following 12 * conditions are met: 13 * 14 * - Redistributions of source code must retain the above 15 * copyright notice, this list of conditions and the following 16 * disclaimer. 17 * 18 * - Redistributions in binary form must reproduce the above 19 * copyright notice, this list of conditions and the following 20 * disclaimer in the documentation and/or other materials 21 * provided with the distribution. 22 * 23 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, 24 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF 25 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND 26 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS 27 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN 28 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN 29 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE 30 * SOFTWARE. 31 */ 32 33 #include <asm-generic/kmap_types.h> 34 #include <linux/module.h> 35 #include <linux/init.h> 36 #include <linux/errno.h> 37 #include <linux/pci.h> 38 #include <linux/dma-mapping.h> 39 #include <linux/slab.h> 40 #include <linux/io-mapping.h> 41 #include <linux/sched.h> 42 #include <rdma/ib_user_verbs.h> 43 #include <rdma/ib_smi.h> 44 #include <rdma/ib_umem.h> 45 #include "user.h" 46 #include "mlx5_ib.h" 47 48 #define DRIVER_NAME "mlx5_ib" 49 #define DRIVER_VERSION "2.2-1" 50 #define DRIVER_RELDATE "Feb 2014" 51 52 MODULE_AUTHOR("Eli Cohen <eli@mellanox.com>"); 53 MODULE_DESCRIPTION("Mellanox Connect-IB HCA IB driver"); 54 MODULE_LICENSE("Dual BSD/GPL"); 55 MODULE_VERSION(DRIVER_VERSION); 56 57 static int deprecated_prof_sel = 2; 58 module_param_named(prof_sel, deprecated_prof_sel, int, 0444); 59 MODULE_PARM_DESC(prof_sel, "profile selector. Deprecated here. Moved to module mlx5_core"); 60 61 static char mlx5_version[] = 62 DRIVER_NAME ": Mellanox Connect-IB Infiniband driver v" 63 DRIVER_VERSION " (" DRIVER_RELDATE ")\n"; 64 65 static int mlx5_ib_query_device(struct ib_device *ibdev, 66 struct ib_device_attr *props) 67 { 68 struct mlx5_ib_dev *dev = to_mdev(ibdev); 69 struct mlx5_core_dev *mdev = dev->mdev; 70 struct ib_smp *in_mad = NULL; 71 struct ib_smp *out_mad = NULL; 72 int err = -ENOMEM; 73 int max_rq_sg; 74 int max_sq_sg; 75 76 in_mad = kzalloc(sizeof(*in_mad), GFP_KERNEL); 77 out_mad = kmalloc(sizeof(*out_mad), GFP_KERNEL); 78 if (!in_mad || !out_mad) 79 goto out; 80 81 init_query_mad(in_mad); 82 in_mad->attr_id = IB_SMP_ATTR_NODE_INFO; 83 84 err = mlx5_MAD_IFC(to_mdev(ibdev), 1, 1, 1, NULL, NULL, in_mad, out_mad); 85 if (err) 86 goto out; 87 88 memset(props, 0, sizeof(*props)); 89 90 props->fw_ver = ((u64)fw_rev_maj(dev->mdev) << 32) | 91 (fw_rev_min(dev->mdev) << 16) | 92 fw_rev_sub(dev->mdev); 93 props->device_cap_flags = IB_DEVICE_CHANGE_PHY_PORT | 94 IB_DEVICE_PORT_ACTIVE_EVENT | 95 IB_DEVICE_SYS_IMAGE_GUID | 96 IB_DEVICE_RC_RNR_NAK_GEN; 97 98 if (MLX5_CAP_GEN(mdev, pkv)) 99 props->device_cap_flags |= IB_DEVICE_BAD_PKEY_CNTR; 100 if (MLX5_CAP_GEN(mdev, qkv)) 101 props->device_cap_flags |= IB_DEVICE_BAD_QKEY_CNTR; 102 if (MLX5_CAP_GEN(mdev, apm)) 103 props->device_cap_flags |= IB_DEVICE_AUTO_PATH_MIG; 104 props->device_cap_flags |= IB_DEVICE_LOCAL_DMA_LKEY; 105 if (MLX5_CAP_GEN(mdev, xrc)) 106 props->device_cap_flags |= IB_DEVICE_XRC; 107 props->device_cap_flags |= IB_DEVICE_MEM_MGT_EXTENSIONS; 108 if (MLX5_CAP_GEN(mdev, sho)) { 109 props->device_cap_flags |= IB_DEVICE_SIGNATURE_HANDOVER; 110 /* At this stage no support for signature handover */ 111 props->sig_prot_cap = IB_PROT_T10DIF_TYPE_1 | 112 IB_PROT_T10DIF_TYPE_2 | 113 IB_PROT_T10DIF_TYPE_3; 114 props->sig_guard_cap = IB_GUARD_T10DIF_CRC | 115 IB_GUARD_T10DIF_CSUM; 116 } 117 if (MLX5_CAP_GEN(mdev, block_lb_mc)) 118 props->device_cap_flags |= IB_DEVICE_BLOCK_MULTICAST_LOOPBACK; 119 120 props->vendor_id = be32_to_cpup((__be32 *)(out_mad->data + 36)) & 121 0xffffff; 122 props->vendor_part_id = be16_to_cpup((__be16 *)(out_mad->data + 30)); 123 props->hw_ver = be32_to_cpup((__be32 *)(out_mad->data + 32)); 124 memcpy(&props->sys_image_guid, out_mad->data + 4, 8); 125 126 props->max_mr_size = ~0ull; 127 props->page_size_cap = 1ull << MLX5_CAP_GEN(mdev, log_pg_sz); 128 props->max_qp = 1 << MLX5_CAP_GEN(mdev, log_max_qp); 129 props->max_qp_wr = 1 << MLX5_CAP_GEN(mdev, log_max_qp_sz); 130 max_rq_sg = MLX5_CAP_GEN(mdev, max_wqe_sz_rq) / 131 sizeof(struct mlx5_wqe_data_seg); 132 max_sq_sg = (MLX5_CAP_GEN(mdev, max_wqe_sz_sq) - 133 sizeof(struct mlx5_wqe_ctrl_seg)) / 134 sizeof(struct mlx5_wqe_data_seg); 135 props->max_sge = min(max_rq_sg, max_sq_sg); 136 props->max_cq = 1 << MLX5_CAP_GEN(mdev, log_max_cq); 137 props->max_cqe = (1 << MLX5_CAP_GEN(mdev, log_max_eq_sz)) - 1; 138 props->max_mr = 1 << MLX5_CAP_GEN(mdev, log_max_mkey); 139 props->max_pd = 1 << MLX5_CAP_GEN(mdev, log_max_pd); 140 props->max_qp_rd_atom = 1 << MLX5_CAP_GEN(mdev, log_max_ra_req_qp); 141 props->max_qp_init_rd_atom = 1 << MLX5_CAP_GEN(mdev, log_max_ra_res_qp); 142 props->max_srq = 1 << MLX5_CAP_GEN(mdev, log_max_srq); 143 props->max_srq_wr = (1 << MLX5_CAP_GEN(mdev, log_max_srq_sz)) - 1; 144 props->local_ca_ack_delay = MLX5_CAP_GEN(mdev, local_ca_ack_delay); 145 props->max_res_rd_atom = props->max_qp_rd_atom * props->max_qp; 146 props->max_srq_sge = max_rq_sg - 1; 147 props->max_fast_reg_page_list_len = (unsigned int)-1; 148 props->atomic_cap = IB_ATOMIC_NONE; 149 props->masked_atomic_cap = IB_ATOMIC_NONE; 150 props->max_pkeys = be16_to_cpup((__be16 *)(out_mad->data + 28)); 151 props->max_mcast_grp = 1 << MLX5_CAP_GEN(mdev, log_max_mcg); 152 props->max_mcast_qp_attach = MLX5_CAP_GEN(mdev, max_qp_mcg); 153 props->max_total_mcast_qp_attach = props->max_mcast_qp_attach * 154 props->max_mcast_grp; 155 props->max_map_per_fmr = INT_MAX; /* no limit in ConnectIB */ 156 157 #ifdef CONFIG_INFINIBAND_ON_DEMAND_PAGING 158 if (MLX5_CAP_GEN(mdev, pg)) 159 props->device_cap_flags |= IB_DEVICE_ON_DEMAND_PAGING; 160 props->odp_caps = dev->odp_caps; 161 #endif 162 163 out: 164 kfree(in_mad); 165 kfree(out_mad); 166 167 return err; 168 } 169 170 int mlx5_ib_query_port(struct ib_device *ibdev, u8 port, 171 struct ib_port_attr *props) 172 { 173 struct mlx5_ib_dev *dev = to_mdev(ibdev); 174 struct mlx5_core_dev *mdev = dev->mdev; 175 struct ib_smp *in_mad = NULL; 176 struct ib_smp *out_mad = NULL; 177 int ext_active_speed; 178 int err = -ENOMEM; 179 180 if (port < 1 || port > MLX5_CAP_GEN(mdev, num_ports)) { 181 mlx5_ib_warn(dev, "invalid port number %d\n", port); 182 return -EINVAL; 183 } 184 185 in_mad = kzalloc(sizeof(*in_mad), GFP_KERNEL); 186 out_mad = kmalloc(sizeof(*out_mad), GFP_KERNEL); 187 if (!in_mad || !out_mad) 188 goto out; 189 190 memset(props, 0, sizeof(*props)); 191 192 init_query_mad(in_mad); 193 in_mad->attr_id = IB_SMP_ATTR_PORT_INFO; 194 in_mad->attr_mod = cpu_to_be32(port); 195 196 err = mlx5_MAD_IFC(dev, 1, 1, port, NULL, NULL, in_mad, out_mad); 197 if (err) { 198 mlx5_ib_warn(dev, "err %d\n", err); 199 goto out; 200 } 201 202 203 props->lid = be16_to_cpup((__be16 *)(out_mad->data + 16)); 204 props->lmc = out_mad->data[34] & 0x7; 205 props->sm_lid = be16_to_cpup((__be16 *)(out_mad->data + 18)); 206 props->sm_sl = out_mad->data[36] & 0xf; 207 props->state = out_mad->data[32] & 0xf; 208 props->phys_state = out_mad->data[33] >> 4; 209 props->port_cap_flags = be32_to_cpup((__be32 *)(out_mad->data + 20)); 210 props->gid_tbl_len = out_mad->data[50]; 211 props->max_msg_sz = 1 << MLX5_CAP_GEN(mdev, log_max_msg); 212 props->pkey_tbl_len = mdev->port_caps[port - 1].pkey_table_len; 213 props->bad_pkey_cntr = be16_to_cpup((__be16 *)(out_mad->data + 46)); 214 props->qkey_viol_cntr = be16_to_cpup((__be16 *)(out_mad->data + 48)); 215 props->active_width = out_mad->data[31] & 0xf; 216 props->active_speed = out_mad->data[35] >> 4; 217 props->max_mtu = out_mad->data[41] & 0xf; 218 props->active_mtu = out_mad->data[36] >> 4; 219 props->subnet_timeout = out_mad->data[51] & 0x1f; 220 props->max_vl_num = out_mad->data[37] >> 4; 221 props->init_type_reply = out_mad->data[41] >> 4; 222 223 /* Check if extended speeds (EDR/FDR/...) are supported */ 224 if (props->port_cap_flags & IB_PORT_EXTENDED_SPEEDS_SUP) { 225 ext_active_speed = out_mad->data[62] >> 4; 226 227 switch (ext_active_speed) { 228 case 1: 229 props->active_speed = 16; /* FDR */ 230 break; 231 case 2: 232 props->active_speed = 32; /* EDR */ 233 break; 234 } 235 } 236 237 /* If reported active speed is QDR, check if is FDR-10 */ 238 if (props->active_speed == 4) { 239 if (mdev->port_caps[port - 1].ext_port_cap & 240 MLX_EXT_PORT_CAP_FLAG_EXTENDED_PORT_INFO) { 241 init_query_mad(in_mad); 242 in_mad->attr_id = MLX5_ATTR_EXTENDED_PORT_INFO; 243 in_mad->attr_mod = cpu_to_be32(port); 244 245 err = mlx5_MAD_IFC(dev, 1, 1, port, 246 NULL, NULL, in_mad, out_mad); 247 if (err) 248 goto out; 249 250 /* Checking LinkSpeedActive for FDR-10 */ 251 if (out_mad->data[15] & 0x1) 252 props->active_speed = 8; 253 } 254 } 255 256 out: 257 kfree(in_mad); 258 kfree(out_mad); 259 260 return err; 261 } 262 263 static int mlx5_ib_query_gid(struct ib_device *ibdev, u8 port, int index, 264 union ib_gid *gid) 265 { 266 struct ib_smp *in_mad = NULL; 267 struct ib_smp *out_mad = NULL; 268 int err = -ENOMEM; 269 270 in_mad = kzalloc(sizeof(*in_mad), GFP_KERNEL); 271 out_mad = kmalloc(sizeof(*out_mad), GFP_KERNEL); 272 if (!in_mad || !out_mad) 273 goto out; 274 275 init_query_mad(in_mad); 276 in_mad->attr_id = IB_SMP_ATTR_PORT_INFO; 277 in_mad->attr_mod = cpu_to_be32(port); 278 279 err = mlx5_MAD_IFC(to_mdev(ibdev), 1, 1, port, NULL, NULL, in_mad, out_mad); 280 if (err) 281 goto out; 282 283 memcpy(gid->raw, out_mad->data + 8, 8); 284 285 init_query_mad(in_mad); 286 in_mad->attr_id = IB_SMP_ATTR_GUID_INFO; 287 in_mad->attr_mod = cpu_to_be32(index / 8); 288 289 err = mlx5_MAD_IFC(to_mdev(ibdev), 1, 1, port, NULL, NULL, in_mad, out_mad); 290 if (err) 291 goto out; 292 293 memcpy(gid->raw + 8, out_mad->data + (index % 8) * 8, 8); 294 295 out: 296 kfree(in_mad); 297 kfree(out_mad); 298 return err; 299 } 300 301 static int mlx5_ib_query_pkey(struct ib_device *ibdev, u8 port, u16 index, 302 u16 *pkey) 303 { 304 struct ib_smp *in_mad = NULL; 305 struct ib_smp *out_mad = NULL; 306 int err = -ENOMEM; 307 308 in_mad = kzalloc(sizeof(*in_mad), GFP_KERNEL); 309 out_mad = kmalloc(sizeof(*out_mad), GFP_KERNEL); 310 if (!in_mad || !out_mad) 311 goto out; 312 313 init_query_mad(in_mad); 314 in_mad->attr_id = IB_SMP_ATTR_PKEY_TABLE; 315 in_mad->attr_mod = cpu_to_be32(index / 32); 316 317 err = mlx5_MAD_IFC(to_mdev(ibdev), 1, 1, port, NULL, NULL, in_mad, out_mad); 318 if (err) 319 goto out; 320 321 *pkey = be16_to_cpu(((__be16 *)out_mad->data)[index % 32]); 322 323 out: 324 kfree(in_mad); 325 kfree(out_mad); 326 return err; 327 } 328 329 struct mlx5_reg_node_desc { 330 u8 desc[64]; 331 }; 332 333 static int mlx5_ib_modify_device(struct ib_device *ibdev, int mask, 334 struct ib_device_modify *props) 335 { 336 struct mlx5_ib_dev *dev = to_mdev(ibdev); 337 struct mlx5_reg_node_desc in; 338 struct mlx5_reg_node_desc out; 339 int err; 340 341 if (mask & ~IB_DEVICE_MODIFY_NODE_DESC) 342 return -EOPNOTSUPP; 343 344 if (!(mask & IB_DEVICE_MODIFY_NODE_DESC)) 345 return 0; 346 347 /* 348 * If possible, pass node desc to FW, so it can generate 349 * a 144 trap. If cmd fails, just ignore. 350 */ 351 memcpy(&in, props->node_desc, 64); 352 err = mlx5_core_access_reg(dev->mdev, &in, sizeof(in), &out, 353 sizeof(out), MLX5_REG_NODE_DESC, 0, 1); 354 if (err) 355 return err; 356 357 memcpy(ibdev->node_desc, props->node_desc, 64); 358 359 return err; 360 } 361 362 static int mlx5_ib_modify_port(struct ib_device *ibdev, u8 port, int mask, 363 struct ib_port_modify *props) 364 { 365 struct mlx5_ib_dev *dev = to_mdev(ibdev); 366 struct ib_port_attr attr; 367 u32 tmp; 368 int err; 369 370 mutex_lock(&dev->cap_mask_mutex); 371 372 err = mlx5_ib_query_port(ibdev, port, &attr); 373 if (err) 374 goto out; 375 376 tmp = (attr.port_cap_flags | props->set_port_cap_mask) & 377 ~props->clr_port_cap_mask; 378 379 err = mlx5_set_port_caps(dev->mdev, port, tmp); 380 381 out: 382 mutex_unlock(&dev->cap_mask_mutex); 383 return err; 384 } 385 386 static struct ib_ucontext *mlx5_ib_alloc_ucontext(struct ib_device *ibdev, 387 struct ib_udata *udata) 388 { 389 struct mlx5_ib_dev *dev = to_mdev(ibdev); 390 struct mlx5_ib_alloc_ucontext_req_v2 req; 391 struct mlx5_ib_alloc_ucontext_resp resp; 392 struct mlx5_ib_ucontext *context; 393 struct mlx5_uuar_info *uuari; 394 struct mlx5_uar *uars; 395 int gross_uuars; 396 int num_uars; 397 int ver; 398 int uuarn; 399 int err; 400 int i; 401 size_t reqlen; 402 403 if (!dev->ib_active) 404 return ERR_PTR(-EAGAIN); 405 406 memset(&req, 0, sizeof(req)); 407 reqlen = udata->inlen - sizeof(struct ib_uverbs_cmd_hdr); 408 if (reqlen == sizeof(struct mlx5_ib_alloc_ucontext_req)) 409 ver = 0; 410 else if (reqlen == sizeof(struct mlx5_ib_alloc_ucontext_req_v2)) 411 ver = 2; 412 else 413 return ERR_PTR(-EINVAL); 414 415 err = ib_copy_from_udata(&req, udata, reqlen); 416 if (err) 417 return ERR_PTR(err); 418 419 if (req.flags || req.reserved) 420 return ERR_PTR(-EINVAL); 421 422 if (req.total_num_uuars > MLX5_MAX_UUARS) 423 return ERR_PTR(-ENOMEM); 424 425 if (req.total_num_uuars == 0) 426 return ERR_PTR(-EINVAL); 427 428 req.total_num_uuars = ALIGN(req.total_num_uuars, 429 MLX5_NON_FP_BF_REGS_PER_PAGE); 430 if (req.num_low_latency_uuars > req.total_num_uuars - 1) 431 return ERR_PTR(-EINVAL); 432 433 num_uars = req.total_num_uuars / MLX5_NON_FP_BF_REGS_PER_PAGE; 434 gross_uuars = num_uars * MLX5_BF_REGS_PER_PAGE; 435 resp.qp_tab_size = 1 << MLX5_CAP_GEN(dev->mdev, log_max_qp); 436 resp.bf_reg_size = 1 << MLX5_CAP_GEN(dev->mdev, log_bf_reg_size); 437 resp.cache_line_size = L1_CACHE_BYTES; 438 resp.max_sq_desc_sz = MLX5_CAP_GEN(dev->mdev, max_wqe_sz_sq); 439 resp.max_rq_desc_sz = MLX5_CAP_GEN(dev->mdev, max_wqe_sz_rq); 440 resp.max_send_wqebb = 1 << MLX5_CAP_GEN(dev->mdev, log_max_qp_sz); 441 resp.max_recv_wr = 1 << MLX5_CAP_GEN(dev->mdev, log_max_qp_sz); 442 resp.max_srq_recv_wr = 1 << MLX5_CAP_GEN(dev->mdev, log_max_srq_sz); 443 444 context = kzalloc(sizeof(*context), GFP_KERNEL); 445 if (!context) 446 return ERR_PTR(-ENOMEM); 447 448 uuari = &context->uuari; 449 mutex_init(&uuari->lock); 450 uars = kcalloc(num_uars, sizeof(*uars), GFP_KERNEL); 451 if (!uars) { 452 err = -ENOMEM; 453 goto out_ctx; 454 } 455 456 uuari->bitmap = kcalloc(BITS_TO_LONGS(gross_uuars), 457 sizeof(*uuari->bitmap), 458 GFP_KERNEL); 459 if (!uuari->bitmap) { 460 err = -ENOMEM; 461 goto out_uar_ctx; 462 } 463 /* 464 * clear all fast path uuars 465 */ 466 for (i = 0; i < gross_uuars; i++) { 467 uuarn = i & 3; 468 if (uuarn == 2 || uuarn == 3) 469 set_bit(i, uuari->bitmap); 470 } 471 472 uuari->count = kcalloc(gross_uuars, sizeof(*uuari->count), GFP_KERNEL); 473 if (!uuari->count) { 474 err = -ENOMEM; 475 goto out_bitmap; 476 } 477 478 for (i = 0; i < num_uars; i++) { 479 err = mlx5_cmd_alloc_uar(dev->mdev, &uars[i].index); 480 if (err) 481 goto out_count; 482 } 483 484 #ifdef CONFIG_INFINIBAND_ON_DEMAND_PAGING 485 context->ibucontext.invalidate_range = &mlx5_ib_invalidate_range; 486 #endif 487 488 INIT_LIST_HEAD(&context->db_page_list); 489 mutex_init(&context->db_page_mutex); 490 491 resp.tot_uuars = req.total_num_uuars; 492 resp.num_ports = MLX5_CAP_GEN(dev->mdev, num_ports); 493 err = ib_copy_to_udata(udata, &resp, 494 sizeof(resp) - sizeof(resp.reserved)); 495 if (err) 496 goto out_uars; 497 498 uuari->ver = ver; 499 uuari->num_low_latency_uuars = req.num_low_latency_uuars; 500 uuari->uars = uars; 501 uuari->num_uars = num_uars; 502 return &context->ibucontext; 503 504 out_uars: 505 for (i--; i >= 0; i--) 506 mlx5_cmd_free_uar(dev->mdev, uars[i].index); 507 out_count: 508 kfree(uuari->count); 509 510 out_bitmap: 511 kfree(uuari->bitmap); 512 513 out_uar_ctx: 514 kfree(uars); 515 516 out_ctx: 517 kfree(context); 518 return ERR_PTR(err); 519 } 520 521 static int mlx5_ib_dealloc_ucontext(struct ib_ucontext *ibcontext) 522 { 523 struct mlx5_ib_ucontext *context = to_mucontext(ibcontext); 524 struct mlx5_ib_dev *dev = to_mdev(ibcontext->device); 525 struct mlx5_uuar_info *uuari = &context->uuari; 526 int i; 527 528 for (i = 0; i < uuari->num_uars; i++) { 529 if (mlx5_cmd_free_uar(dev->mdev, uuari->uars[i].index)) 530 mlx5_ib_warn(dev, "failed to free UAR 0x%x\n", uuari->uars[i].index); 531 } 532 533 kfree(uuari->count); 534 kfree(uuari->bitmap); 535 kfree(uuari->uars); 536 kfree(context); 537 538 return 0; 539 } 540 541 static phys_addr_t uar_index2pfn(struct mlx5_ib_dev *dev, int index) 542 { 543 return (pci_resource_start(dev->mdev->pdev, 0) >> PAGE_SHIFT) + index; 544 } 545 546 static int get_command(unsigned long offset) 547 { 548 return (offset >> MLX5_IB_MMAP_CMD_SHIFT) & MLX5_IB_MMAP_CMD_MASK; 549 } 550 551 static int get_arg(unsigned long offset) 552 { 553 return offset & ((1 << MLX5_IB_MMAP_CMD_SHIFT) - 1); 554 } 555 556 static int get_index(unsigned long offset) 557 { 558 return get_arg(offset); 559 } 560 561 static int mlx5_ib_mmap(struct ib_ucontext *ibcontext, struct vm_area_struct *vma) 562 { 563 struct mlx5_ib_ucontext *context = to_mucontext(ibcontext); 564 struct mlx5_ib_dev *dev = to_mdev(ibcontext->device); 565 struct mlx5_uuar_info *uuari = &context->uuari; 566 unsigned long command; 567 unsigned long idx; 568 phys_addr_t pfn; 569 570 command = get_command(vma->vm_pgoff); 571 switch (command) { 572 case MLX5_IB_MMAP_REGULAR_PAGE: 573 if (vma->vm_end - vma->vm_start != PAGE_SIZE) 574 return -EINVAL; 575 576 idx = get_index(vma->vm_pgoff); 577 if (idx >= uuari->num_uars) 578 return -EINVAL; 579 580 pfn = uar_index2pfn(dev, uuari->uars[idx].index); 581 mlx5_ib_dbg(dev, "uar idx 0x%lx, pfn 0x%llx\n", idx, 582 (unsigned long long)pfn); 583 584 vma->vm_page_prot = pgprot_writecombine(vma->vm_page_prot); 585 if (io_remap_pfn_range(vma, vma->vm_start, pfn, 586 PAGE_SIZE, vma->vm_page_prot)) 587 return -EAGAIN; 588 589 mlx5_ib_dbg(dev, "mapped WC at 0x%lx, PA 0x%llx\n", 590 vma->vm_start, 591 (unsigned long long)pfn << PAGE_SHIFT); 592 break; 593 594 case MLX5_IB_MMAP_GET_CONTIGUOUS_PAGES: 595 return -ENOSYS; 596 597 default: 598 return -EINVAL; 599 } 600 601 return 0; 602 } 603 604 static int alloc_pa_mkey(struct mlx5_ib_dev *dev, u32 *key, u32 pdn) 605 { 606 struct mlx5_create_mkey_mbox_in *in; 607 struct mlx5_mkey_seg *seg; 608 struct mlx5_core_mr mr; 609 int err; 610 611 in = kzalloc(sizeof(*in), GFP_KERNEL); 612 if (!in) 613 return -ENOMEM; 614 615 seg = &in->seg; 616 seg->flags = MLX5_PERM_LOCAL_READ | MLX5_ACCESS_MODE_PA; 617 seg->flags_pd = cpu_to_be32(pdn | MLX5_MKEY_LEN64); 618 seg->qpn_mkey7_0 = cpu_to_be32(0xffffff << 8); 619 seg->start_addr = 0; 620 621 err = mlx5_core_create_mkey(dev->mdev, &mr, in, sizeof(*in), 622 NULL, NULL, NULL); 623 if (err) { 624 mlx5_ib_warn(dev, "failed to create mkey, %d\n", err); 625 goto err_in; 626 } 627 628 kfree(in); 629 *key = mr.key; 630 631 return 0; 632 633 err_in: 634 kfree(in); 635 636 return err; 637 } 638 639 static void free_pa_mkey(struct mlx5_ib_dev *dev, u32 key) 640 { 641 struct mlx5_core_mr mr; 642 int err; 643 644 memset(&mr, 0, sizeof(mr)); 645 mr.key = key; 646 err = mlx5_core_destroy_mkey(dev->mdev, &mr); 647 if (err) 648 mlx5_ib_warn(dev, "failed to destroy mkey 0x%x\n", key); 649 } 650 651 static struct ib_pd *mlx5_ib_alloc_pd(struct ib_device *ibdev, 652 struct ib_ucontext *context, 653 struct ib_udata *udata) 654 { 655 struct mlx5_ib_alloc_pd_resp resp; 656 struct mlx5_ib_pd *pd; 657 int err; 658 659 pd = kmalloc(sizeof(*pd), GFP_KERNEL); 660 if (!pd) 661 return ERR_PTR(-ENOMEM); 662 663 err = mlx5_core_alloc_pd(to_mdev(ibdev)->mdev, &pd->pdn); 664 if (err) { 665 kfree(pd); 666 return ERR_PTR(err); 667 } 668 669 if (context) { 670 resp.pdn = pd->pdn; 671 if (ib_copy_to_udata(udata, &resp, sizeof(resp))) { 672 mlx5_core_dealloc_pd(to_mdev(ibdev)->mdev, pd->pdn); 673 kfree(pd); 674 return ERR_PTR(-EFAULT); 675 } 676 } else { 677 err = alloc_pa_mkey(to_mdev(ibdev), &pd->pa_lkey, pd->pdn); 678 if (err) { 679 mlx5_core_dealloc_pd(to_mdev(ibdev)->mdev, pd->pdn); 680 kfree(pd); 681 return ERR_PTR(err); 682 } 683 } 684 685 return &pd->ibpd; 686 } 687 688 static int mlx5_ib_dealloc_pd(struct ib_pd *pd) 689 { 690 struct mlx5_ib_dev *mdev = to_mdev(pd->device); 691 struct mlx5_ib_pd *mpd = to_mpd(pd); 692 693 if (!pd->uobject) 694 free_pa_mkey(mdev, mpd->pa_lkey); 695 696 mlx5_core_dealloc_pd(mdev->mdev, mpd->pdn); 697 kfree(mpd); 698 699 return 0; 700 } 701 702 static int mlx5_ib_mcg_attach(struct ib_qp *ibqp, union ib_gid *gid, u16 lid) 703 { 704 struct mlx5_ib_dev *dev = to_mdev(ibqp->device); 705 int err; 706 707 err = mlx5_core_attach_mcg(dev->mdev, gid, ibqp->qp_num); 708 if (err) 709 mlx5_ib_warn(dev, "failed attaching QPN 0x%x, MGID %pI6\n", 710 ibqp->qp_num, gid->raw); 711 712 return err; 713 } 714 715 static int mlx5_ib_mcg_detach(struct ib_qp *ibqp, union ib_gid *gid, u16 lid) 716 { 717 struct mlx5_ib_dev *dev = to_mdev(ibqp->device); 718 int err; 719 720 err = mlx5_core_detach_mcg(dev->mdev, gid, ibqp->qp_num); 721 if (err) 722 mlx5_ib_warn(dev, "failed detaching QPN 0x%x, MGID %pI6\n", 723 ibqp->qp_num, gid->raw); 724 725 return err; 726 } 727 728 static int init_node_data(struct mlx5_ib_dev *dev) 729 { 730 struct ib_smp *in_mad = NULL; 731 struct ib_smp *out_mad = NULL; 732 int err = -ENOMEM; 733 734 in_mad = kzalloc(sizeof(*in_mad), GFP_KERNEL); 735 out_mad = kmalloc(sizeof(*out_mad), GFP_KERNEL); 736 if (!in_mad || !out_mad) 737 goto out; 738 739 init_query_mad(in_mad); 740 in_mad->attr_id = IB_SMP_ATTR_NODE_DESC; 741 742 err = mlx5_MAD_IFC(dev, 1, 1, 1, NULL, NULL, in_mad, out_mad); 743 if (err) 744 goto out; 745 746 memcpy(dev->ib_dev.node_desc, out_mad->data, 64); 747 748 in_mad->attr_id = IB_SMP_ATTR_NODE_INFO; 749 750 err = mlx5_MAD_IFC(dev, 1, 1, 1, NULL, NULL, in_mad, out_mad); 751 if (err) 752 goto out; 753 754 dev->mdev->rev_id = be32_to_cpup((__be32 *)(out_mad->data + 32)); 755 memcpy(&dev->ib_dev.node_guid, out_mad->data + 12, 8); 756 757 out: 758 kfree(in_mad); 759 kfree(out_mad); 760 return err; 761 } 762 763 static ssize_t show_fw_pages(struct device *device, struct device_attribute *attr, 764 char *buf) 765 { 766 struct mlx5_ib_dev *dev = 767 container_of(device, struct mlx5_ib_dev, ib_dev.dev); 768 769 return sprintf(buf, "%d\n", dev->mdev->priv.fw_pages); 770 } 771 772 static ssize_t show_reg_pages(struct device *device, 773 struct device_attribute *attr, char *buf) 774 { 775 struct mlx5_ib_dev *dev = 776 container_of(device, struct mlx5_ib_dev, ib_dev.dev); 777 778 return sprintf(buf, "%d\n", atomic_read(&dev->mdev->priv.reg_pages)); 779 } 780 781 static ssize_t show_hca(struct device *device, struct device_attribute *attr, 782 char *buf) 783 { 784 struct mlx5_ib_dev *dev = 785 container_of(device, struct mlx5_ib_dev, ib_dev.dev); 786 return sprintf(buf, "MT%d\n", dev->mdev->pdev->device); 787 } 788 789 static ssize_t show_fw_ver(struct device *device, struct device_attribute *attr, 790 char *buf) 791 { 792 struct mlx5_ib_dev *dev = 793 container_of(device, struct mlx5_ib_dev, ib_dev.dev); 794 return sprintf(buf, "%d.%d.%d\n", fw_rev_maj(dev->mdev), 795 fw_rev_min(dev->mdev), fw_rev_sub(dev->mdev)); 796 } 797 798 static ssize_t show_rev(struct device *device, struct device_attribute *attr, 799 char *buf) 800 { 801 struct mlx5_ib_dev *dev = 802 container_of(device, struct mlx5_ib_dev, ib_dev.dev); 803 return sprintf(buf, "%x\n", dev->mdev->rev_id); 804 } 805 806 static ssize_t show_board(struct device *device, struct device_attribute *attr, 807 char *buf) 808 { 809 struct mlx5_ib_dev *dev = 810 container_of(device, struct mlx5_ib_dev, ib_dev.dev); 811 return sprintf(buf, "%.*s\n", MLX5_BOARD_ID_LEN, 812 dev->mdev->board_id); 813 } 814 815 static DEVICE_ATTR(hw_rev, S_IRUGO, show_rev, NULL); 816 static DEVICE_ATTR(fw_ver, S_IRUGO, show_fw_ver, NULL); 817 static DEVICE_ATTR(hca_type, S_IRUGO, show_hca, NULL); 818 static DEVICE_ATTR(board_id, S_IRUGO, show_board, NULL); 819 static DEVICE_ATTR(fw_pages, S_IRUGO, show_fw_pages, NULL); 820 static DEVICE_ATTR(reg_pages, S_IRUGO, show_reg_pages, NULL); 821 822 static struct device_attribute *mlx5_class_attributes[] = { 823 &dev_attr_hw_rev, 824 &dev_attr_fw_ver, 825 &dev_attr_hca_type, 826 &dev_attr_board_id, 827 &dev_attr_fw_pages, 828 &dev_attr_reg_pages, 829 }; 830 831 static void mlx5_ib_event(struct mlx5_core_dev *dev, void *context, 832 enum mlx5_dev_event event, unsigned long param) 833 { 834 struct mlx5_ib_dev *ibdev = (struct mlx5_ib_dev *)context; 835 struct ib_event ibev; 836 837 u8 port = 0; 838 839 switch (event) { 840 case MLX5_DEV_EVENT_SYS_ERROR: 841 ibdev->ib_active = false; 842 ibev.event = IB_EVENT_DEVICE_FATAL; 843 break; 844 845 case MLX5_DEV_EVENT_PORT_UP: 846 ibev.event = IB_EVENT_PORT_ACTIVE; 847 port = (u8)param; 848 break; 849 850 case MLX5_DEV_EVENT_PORT_DOWN: 851 ibev.event = IB_EVENT_PORT_ERR; 852 port = (u8)param; 853 break; 854 855 case MLX5_DEV_EVENT_PORT_INITIALIZED: 856 /* not used by ULPs */ 857 return; 858 859 case MLX5_DEV_EVENT_LID_CHANGE: 860 ibev.event = IB_EVENT_LID_CHANGE; 861 port = (u8)param; 862 break; 863 864 case MLX5_DEV_EVENT_PKEY_CHANGE: 865 ibev.event = IB_EVENT_PKEY_CHANGE; 866 port = (u8)param; 867 break; 868 869 case MLX5_DEV_EVENT_GUID_CHANGE: 870 ibev.event = IB_EVENT_GID_CHANGE; 871 port = (u8)param; 872 break; 873 874 case MLX5_DEV_EVENT_CLIENT_REREG: 875 ibev.event = IB_EVENT_CLIENT_REREGISTER; 876 port = (u8)param; 877 break; 878 } 879 880 ibev.device = &ibdev->ib_dev; 881 ibev.element.port_num = port; 882 883 if (port < 1 || port > ibdev->num_ports) { 884 mlx5_ib_warn(ibdev, "warning: event on port %d\n", port); 885 return; 886 } 887 888 if (ibdev->ib_active) 889 ib_dispatch_event(&ibev); 890 } 891 892 static void get_ext_port_caps(struct mlx5_ib_dev *dev) 893 { 894 int port; 895 896 for (port = 1; port <= MLX5_CAP_GEN(dev->mdev, num_ports); port++) 897 mlx5_query_ext_port_caps(dev, port); 898 } 899 900 static int get_port_caps(struct mlx5_ib_dev *dev) 901 { 902 struct ib_device_attr *dprops = NULL; 903 struct ib_port_attr *pprops = NULL; 904 int err = -ENOMEM; 905 int port; 906 907 pprops = kmalloc(sizeof(*pprops), GFP_KERNEL); 908 if (!pprops) 909 goto out; 910 911 dprops = kmalloc(sizeof(*dprops), GFP_KERNEL); 912 if (!dprops) 913 goto out; 914 915 err = mlx5_ib_query_device(&dev->ib_dev, dprops); 916 if (err) { 917 mlx5_ib_warn(dev, "query_device failed %d\n", err); 918 goto out; 919 } 920 921 for (port = 1; port <= MLX5_CAP_GEN(dev->mdev, num_ports); port++) { 922 err = mlx5_ib_query_port(&dev->ib_dev, port, pprops); 923 if (err) { 924 mlx5_ib_warn(dev, "query_port %d failed %d\n", 925 port, err); 926 break; 927 } 928 dev->mdev->port_caps[port - 1].pkey_table_len = 929 dprops->max_pkeys; 930 dev->mdev->port_caps[port - 1].gid_table_len = 931 pprops->gid_tbl_len; 932 mlx5_ib_dbg(dev, "pkey_table_len %d, gid_table_len %d\n", 933 dprops->max_pkeys, pprops->gid_tbl_len); 934 } 935 936 out: 937 kfree(pprops); 938 kfree(dprops); 939 940 return err; 941 } 942 943 static void destroy_umrc_res(struct mlx5_ib_dev *dev) 944 { 945 int err; 946 947 err = mlx5_mr_cache_cleanup(dev); 948 if (err) 949 mlx5_ib_warn(dev, "mr cache cleanup failed\n"); 950 951 mlx5_ib_destroy_qp(dev->umrc.qp); 952 ib_destroy_cq(dev->umrc.cq); 953 ib_dereg_mr(dev->umrc.mr); 954 ib_dealloc_pd(dev->umrc.pd); 955 } 956 957 enum { 958 MAX_UMR_WR = 128, 959 }; 960 961 static int create_umr_res(struct mlx5_ib_dev *dev) 962 { 963 struct ib_qp_init_attr *init_attr = NULL; 964 struct ib_qp_attr *attr = NULL; 965 struct ib_pd *pd; 966 struct ib_cq *cq; 967 struct ib_qp *qp; 968 struct ib_mr *mr; 969 int ret; 970 971 attr = kzalloc(sizeof(*attr), GFP_KERNEL); 972 init_attr = kzalloc(sizeof(*init_attr), GFP_KERNEL); 973 if (!attr || !init_attr) { 974 ret = -ENOMEM; 975 goto error_0; 976 } 977 978 pd = ib_alloc_pd(&dev->ib_dev); 979 if (IS_ERR(pd)) { 980 mlx5_ib_dbg(dev, "Couldn't create PD for sync UMR QP\n"); 981 ret = PTR_ERR(pd); 982 goto error_0; 983 } 984 985 mr = ib_get_dma_mr(pd, IB_ACCESS_LOCAL_WRITE); 986 if (IS_ERR(mr)) { 987 mlx5_ib_dbg(dev, "Couldn't create DMA MR for sync UMR QP\n"); 988 ret = PTR_ERR(mr); 989 goto error_1; 990 } 991 992 cq = ib_create_cq(&dev->ib_dev, mlx5_umr_cq_handler, NULL, NULL, 128, 993 0); 994 if (IS_ERR(cq)) { 995 mlx5_ib_dbg(dev, "Couldn't create CQ for sync UMR QP\n"); 996 ret = PTR_ERR(cq); 997 goto error_2; 998 } 999 ib_req_notify_cq(cq, IB_CQ_NEXT_COMP); 1000 1001 init_attr->send_cq = cq; 1002 init_attr->recv_cq = cq; 1003 init_attr->sq_sig_type = IB_SIGNAL_ALL_WR; 1004 init_attr->cap.max_send_wr = MAX_UMR_WR; 1005 init_attr->cap.max_send_sge = 1; 1006 init_attr->qp_type = MLX5_IB_QPT_REG_UMR; 1007 init_attr->port_num = 1; 1008 qp = mlx5_ib_create_qp(pd, init_attr, NULL); 1009 if (IS_ERR(qp)) { 1010 mlx5_ib_dbg(dev, "Couldn't create sync UMR QP\n"); 1011 ret = PTR_ERR(qp); 1012 goto error_3; 1013 } 1014 qp->device = &dev->ib_dev; 1015 qp->real_qp = qp; 1016 qp->uobject = NULL; 1017 qp->qp_type = MLX5_IB_QPT_REG_UMR; 1018 1019 attr->qp_state = IB_QPS_INIT; 1020 attr->port_num = 1; 1021 ret = mlx5_ib_modify_qp(qp, attr, IB_QP_STATE | IB_QP_PKEY_INDEX | 1022 IB_QP_PORT, NULL); 1023 if (ret) { 1024 mlx5_ib_dbg(dev, "Couldn't modify UMR QP\n"); 1025 goto error_4; 1026 } 1027 1028 memset(attr, 0, sizeof(*attr)); 1029 attr->qp_state = IB_QPS_RTR; 1030 attr->path_mtu = IB_MTU_256; 1031 1032 ret = mlx5_ib_modify_qp(qp, attr, IB_QP_STATE, NULL); 1033 if (ret) { 1034 mlx5_ib_dbg(dev, "Couldn't modify umr QP to rtr\n"); 1035 goto error_4; 1036 } 1037 1038 memset(attr, 0, sizeof(*attr)); 1039 attr->qp_state = IB_QPS_RTS; 1040 ret = mlx5_ib_modify_qp(qp, attr, IB_QP_STATE, NULL); 1041 if (ret) { 1042 mlx5_ib_dbg(dev, "Couldn't modify umr QP to rts\n"); 1043 goto error_4; 1044 } 1045 1046 dev->umrc.qp = qp; 1047 dev->umrc.cq = cq; 1048 dev->umrc.mr = mr; 1049 dev->umrc.pd = pd; 1050 1051 sema_init(&dev->umrc.sem, MAX_UMR_WR); 1052 ret = mlx5_mr_cache_init(dev); 1053 if (ret) { 1054 mlx5_ib_warn(dev, "mr cache init failed %d\n", ret); 1055 goto error_4; 1056 } 1057 1058 kfree(attr); 1059 kfree(init_attr); 1060 1061 return 0; 1062 1063 error_4: 1064 mlx5_ib_destroy_qp(qp); 1065 1066 error_3: 1067 ib_destroy_cq(cq); 1068 1069 error_2: 1070 ib_dereg_mr(mr); 1071 1072 error_1: 1073 ib_dealloc_pd(pd); 1074 1075 error_0: 1076 kfree(attr); 1077 kfree(init_attr); 1078 return ret; 1079 } 1080 1081 static int create_dev_resources(struct mlx5_ib_resources *devr) 1082 { 1083 struct ib_srq_init_attr attr; 1084 struct mlx5_ib_dev *dev; 1085 int ret = 0; 1086 1087 dev = container_of(devr, struct mlx5_ib_dev, devr); 1088 1089 devr->p0 = mlx5_ib_alloc_pd(&dev->ib_dev, NULL, NULL); 1090 if (IS_ERR(devr->p0)) { 1091 ret = PTR_ERR(devr->p0); 1092 goto error0; 1093 } 1094 devr->p0->device = &dev->ib_dev; 1095 devr->p0->uobject = NULL; 1096 atomic_set(&devr->p0->usecnt, 0); 1097 1098 devr->c0 = mlx5_ib_create_cq(&dev->ib_dev, 1, 0, NULL, NULL); 1099 if (IS_ERR(devr->c0)) { 1100 ret = PTR_ERR(devr->c0); 1101 goto error1; 1102 } 1103 devr->c0->device = &dev->ib_dev; 1104 devr->c0->uobject = NULL; 1105 devr->c0->comp_handler = NULL; 1106 devr->c0->event_handler = NULL; 1107 devr->c0->cq_context = NULL; 1108 atomic_set(&devr->c0->usecnt, 0); 1109 1110 devr->x0 = mlx5_ib_alloc_xrcd(&dev->ib_dev, NULL, NULL); 1111 if (IS_ERR(devr->x0)) { 1112 ret = PTR_ERR(devr->x0); 1113 goto error2; 1114 } 1115 devr->x0->device = &dev->ib_dev; 1116 devr->x0->inode = NULL; 1117 atomic_set(&devr->x0->usecnt, 0); 1118 mutex_init(&devr->x0->tgt_qp_mutex); 1119 INIT_LIST_HEAD(&devr->x0->tgt_qp_list); 1120 1121 devr->x1 = mlx5_ib_alloc_xrcd(&dev->ib_dev, NULL, NULL); 1122 if (IS_ERR(devr->x1)) { 1123 ret = PTR_ERR(devr->x1); 1124 goto error3; 1125 } 1126 devr->x1->device = &dev->ib_dev; 1127 devr->x1->inode = NULL; 1128 atomic_set(&devr->x1->usecnt, 0); 1129 mutex_init(&devr->x1->tgt_qp_mutex); 1130 INIT_LIST_HEAD(&devr->x1->tgt_qp_list); 1131 1132 memset(&attr, 0, sizeof(attr)); 1133 attr.attr.max_sge = 1; 1134 attr.attr.max_wr = 1; 1135 attr.srq_type = IB_SRQT_XRC; 1136 attr.ext.xrc.cq = devr->c0; 1137 attr.ext.xrc.xrcd = devr->x0; 1138 1139 devr->s0 = mlx5_ib_create_srq(devr->p0, &attr, NULL); 1140 if (IS_ERR(devr->s0)) { 1141 ret = PTR_ERR(devr->s0); 1142 goto error4; 1143 } 1144 devr->s0->device = &dev->ib_dev; 1145 devr->s0->pd = devr->p0; 1146 devr->s0->uobject = NULL; 1147 devr->s0->event_handler = NULL; 1148 devr->s0->srq_context = NULL; 1149 devr->s0->srq_type = IB_SRQT_XRC; 1150 devr->s0->ext.xrc.xrcd = devr->x0; 1151 devr->s0->ext.xrc.cq = devr->c0; 1152 atomic_inc(&devr->s0->ext.xrc.xrcd->usecnt); 1153 atomic_inc(&devr->s0->ext.xrc.cq->usecnt); 1154 atomic_inc(&devr->p0->usecnt); 1155 atomic_set(&devr->s0->usecnt, 0); 1156 1157 return 0; 1158 1159 error4: 1160 mlx5_ib_dealloc_xrcd(devr->x1); 1161 error3: 1162 mlx5_ib_dealloc_xrcd(devr->x0); 1163 error2: 1164 mlx5_ib_destroy_cq(devr->c0); 1165 error1: 1166 mlx5_ib_dealloc_pd(devr->p0); 1167 error0: 1168 return ret; 1169 } 1170 1171 static void destroy_dev_resources(struct mlx5_ib_resources *devr) 1172 { 1173 mlx5_ib_destroy_srq(devr->s0); 1174 mlx5_ib_dealloc_xrcd(devr->x0); 1175 mlx5_ib_dealloc_xrcd(devr->x1); 1176 mlx5_ib_destroy_cq(devr->c0); 1177 mlx5_ib_dealloc_pd(devr->p0); 1178 } 1179 1180 static void *mlx5_ib_add(struct mlx5_core_dev *mdev) 1181 { 1182 struct mlx5_ib_dev *dev; 1183 int err; 1184 int i; 1185 1186 printk_once(KERN_INFO "%s", mlx5_version); 1187 1188 dev = (struct mlx5_ib_dev *)ib_alloc_device(sizeof(*dev)); 1189 if (!dev) 1190 return NULL; 1191 1192 dev->mdev = mdev; 1193 1194 err = get_port_caps(dev); 1195 if (err) 1196 goto err_dealloc; 1197 1198 get_ext_port_caps(dev); 1199 1200 MLX5_INIT_DOORBELL_LOCK(&dev->uar_lock); 1201 1202 strlcpy(dev->ib_dev.name, "mlx5_%d", IB_DEVICE_NAME_MAX); 1203 dev->ib_dev.owner = THIS_MODULE; 1204 dev->ib_dev.node_type = RDMA_NODE_IB_CA; 1205 dev->ib_dev.local_dma_lkey = 0 /* not supported for now */; 1206 dev->num_ports = MLX5_CAP_GEN(mdev, num_ports); 1207 dev->ib_dev.phys_port_cnt = dev->num_ports; 1208 dev->ib_dev.num_comp_vectors = 1209 dev->mdev->priv.eq_table.num_comp_vectors; 1210 dev->ib_dev.dma_device = &mdev->pdev->dev; 1211 1212 dev->ib_dev.uverbs_abi_ver = MLX5_IB_UVERBS_ABI_VERSION; 1213 dev->ib_dev.uverbs_cmd_mask = 1214 (1ull << IB_USER_VERBS_CMD_GET_CONTEXT) | 1215 (1ull << IB_USER_VERBS_CMD_QUERY_DEVICE) | 1216 (1ull << IB_USER_VERBS_CMD_QUERY_PORT) | 1217 (1ull << IB_USER_VERBS_CMD_ALLOC_PD) | 1218 (1ull << IB_USER_VERBS_CMD_DEALLOC_PD) | 1219 (1ull << IB_USER_VERBS_CMD_REG_MR) | 1220 (1ull << IB_USER_VERBS_CMD_DEREG_MR) | 1221 (1ull << IB_USER_VERBS_CMD_CREATE_COMP_CHANNEL) | 1222 (1ull << IB_USER_VERBS_CMD_CREATE_CQ) | 1223 (1ull << IB_USER_VERBS_CMD_RESIZE_CQ) | 1224 (1ull << IB_USER_VERBS_CMD_DESTROY_CQ) | 1225 (1ull << IB_USER_VERBS_CMD_CREATE_QP) | 1226 (1ull << IB_USER_VERBS_CMD_MODIFY_QP) | 1227 (1ull << IB_USER_VERBS_CMD_QUERY_QP) | 1228 (1ull << IB_USER_VERBS_CMD_DESTROY_QP) | 1229 (1ull << IB_USER_VERBS_CMD_ATTACH_MCAST) | 1230 (1ull << IB_USER_VERBS_CMD_DETACH_MCAST) | 1231 (1ull << IB_USER_VERBS_CMD_CREATE_SRQ) | 1232 (1ull << IB_USER_VERBS_CMD_MODIFY_SRQ) | 1233 (1ull << IB_USER_VERBS_CMD_QUERY_SRQ) | 1234 (1ull << IB_USER_VERBS_CMD_DESTROY_SRQ) | 1235 (1ull << IB_USER_VERBS_CMD_CREATE_XSRQ) | 1236 (1ull << IB_USER_VERBS_CMD_OPEN_QP); 1237 dev->ib_dev.uverbs_ex_cmd_mask = 1238 (1ull << IB_USER_VERBS_EX_CMD_QUERY_DEVICE); 1239 1240 dev->ib_dev.query_device = mlx5_ib_query_device; 1241 dev->ib_dev.query_port = mlx5_ib_query_port; 1242 dev->ib_dev.query_gid = mlx5_ib_query_gid; 1243 dev->ib_dev.query_pkey = mlx5_ib_query_pkey; 1244 dev->ib_dev.modify_device = mlx5_ib_modify_device; 1245 dev->ib_dev.modify_port = mlx5_ib_modify_port; 1246 dev->ib_dev.alloc_ucontext = mlx5_ib_alloc_ucontext; 1247 dev->ib_dev.dealloc_ucontext = mlx5_ib_dealloc_ucontext; 1248 dev->ib_dev.mmap = mlx5_ib_mmap; 1249 dev->ib_dev.alloc_pd = mlx5_ib_alloc_pd; 1250 dev->ib_dev.dealloc_pd = mlx5_ib_dealloc_pd; 1251 dev->ib_dev.create_ah = mlx5_ib_create_ah; 1252 dev->ib_dev.query_ah = mlx5_ib_query_ah; 1253 dev->ib_dev.destroy_ah = mlx5_ib_destroy_ah; 1254 dev->ib_dev.create_srq = mlx5_ib_create_srq; 1255 dev->ib_dev.modify_srq = mlx5_ib_modify_srq; 1256 dev->ib_dev.query_srq = mlx5_ib_query_srq; 1257 dev->ib_dev.destroy_srq = mlx5_ib_destroy_srq; 1258 dev->ib_dev.post_srq_recv = mlx5_ib_post_srq_recv; 1259 dev->ib_dev.create_qp = mlx5_ib_create_qp; 1260 dev->ib_dev.modify_qp = mlx5_ib_modify_qp; 1261 dev->ib_dev.query_qp = mlx5_ib_query_qp; 1262 dev->ib_dev.destroy_qp = mlx5_ib_destroy_qp; 1263 dev->ib_dev.post_send = mlx5_ib_post_send; 1264 dev->ib_dev.post_recv = mlx5_ib_post_recv; 1265 dev->ib_dev.create_cq = mlx5_ib_create_cq; 1266 dev->ib_dev.modify_cq = mlx5_ib_modify_cq; 1267 dev->ib_dev.resize_cq = mlx5_ib_resize_cq; 1268 dev->ib_dev.destroy_cq = mlx5_ib_destroy_cq; 1269 dev->ib_dev.poll_cq = mlx5_ib_poll_cq; 1270 dev->ib_dev.req_notify_cq = mlx5_ib_arm_cq; 1271 dev->ib_dev.get_dma_mr = mlx5_ib_get_dma_mr; 1272 dev->ib_dev.reg_user_mr = mlx5_ib_reg_user_mr; 1273 dev->ib_dev.dereg_mr = mlx5_ib_dereg_mr; 1274 dev->ib_dev.destroy_mr = mlx5_ib_destroy_mr; 1275 dev->ib_dev.attach_mcast = mlx5_ib_mcg_attach; 1276 dev->ib_dev.detach_mcast = mlx5_ib_mcg_detach; 1277 dev->ib_dev.process_mad = mlx5_ib_process_mad; 1278 dev->ib_dev.create_mr = mlx5_ib_create_mr; 1279 dev->ib_dev.alloc_fast_reg_mr = mlx5_ib_alloc_fast_reg_mr; 1280 dev->ib_dev.alloc_fast_reg_page_list = mlx5_ib_alloc_fast_reg_page_list; 1281 dev->ib_dev.free_fast_reg_page_list = mlx5_ib_free_fast_reg_page_list; 1282 dev->ib_dev.check_mr_status = mlx5_ib_check_mr_status; 1283 1284 mlx5_ib_internal_fill_odp_caps(dev); 1285 1286 if (MLX5_CAP_GEN(mdev, xrc)) { 1287 dev->ib_dev.alloc_xrcd = mlx5_ib_alloc_xrcd; 1288 dev->ib_dev.dealloc_xrcd = mlx5_ib_dealloc_xrcd; 1289 dev->ib_dev.uverbs_cmd_mask |= 1290 (1ull << IB_USER_VERBS_CMD_OPEN_XRCD) | 1291 (1ull << IB_USER_VERBS_CMD_CLOSE_XRCD); 1292 } 1293 1294 err = init_node_data(dev); 1295 if (err) 1296 goto err_dealloc; 1297 1298 mutex_init(&dev->cap_mask_mutex); 1299 1300 err = create_dev_resources(&dev->devr); 1301 if (err) 1302 goto err_dealloc; 1303 1304 err = mlx5_ib_odp_init_one(dev); 1305 if (err) 1306 goto err_rsrc; 1307 1308 err = ib_register_device(&dev->ib_dev, NULL); 1309 if (err) 1310 goto err_odp; 1311 1312 err = create_umr_res(dev); 1313 if (err) 1314 goto err_dev; 1315 1316 for (i = 0; i < ARRAY_SIZE(mlx5_class_attributes); i++) { 1317 err = device_create_file(&dev->ib_dev.dev, 1318 mlx5_class_attributes[i]); 1319 if (err) 1320 goto err_umrc; 1321 } 1322 1323 dev->ib_active = true; 1324 1325 return dev; 1326 1327 err_umrc: 1328 destroy_umrc_res(dev); 1329 1330 err_dev: 1331 ib_unregister_device(&dev->ib_dev); 1332 1333 err_odp: 1334 mlx5_ib_odp_remove_one(dev); 1335 1336 err_rsrc: 1337 destroy_dev_resources(&dev->devr); 1338 1339 err_dealloc: 1340 ib_dealloc_device((struct ib_device *)dev); 1341 1342 return NULL; 1343 } 1344 1345 static void mlx5_ib_remove(struct mlx5_core_dev *mdev, void *context) 1346 { 1347 struct mlx5_ib_dev *dev = context; 1348 1349 ib_unregister_device(&dev->ib_dev); 1350 destroy_umrc_res(dev); 1351 mlx5_ib_odp_remove_one(dev); 1352 destroy_dev_resources(&dev->devr); 1353 ib_dealloc_device(&dev->ib_dev); 1354 } 1355 1356 static struct mlx5_interface mlx5_ib_interface = { 1357 .add = mlx5_ib_add, 1358 .remove = mlx5_ib_remove, 1359 .event = mlx5_ib_event, 1360 .protocol = MLX5_INTERFACE_PROTOCOL_IB, 1361 }; 1362 1363 static int __init mlx5_ib_init(void) 1364 { 1365 int err; 1366 1367 if (deprecated_prof_sel != 2) 1368 pr_warn("prof_sel is deprecated for mlx5_ib, set it for mlx5_core\n"); 1369 1370 err = mlx5_ib_odp_init(); 1371 if (err) 1372 return err; 1373 1374 err = mlx5_register_interface(&mlx5_ib_interface); 1375 if (err) 1376 goto clean_odp; 1377 1378 return err; 1379 1380 clean_odp: 1381 mlx5_ib_odp_cleanup(); 1382 return err; 1383 } 1384 1385 static void __exit mlx5_ib_cleanup(void) 1386 { 1387 mlx5_unregister_interface(&mlx5_ib_interface); 1388 mlx5_ib_odp_cleanup(); 1389 } 1390 1391 module_init(mlx5_ib_init); 1392 module_exit(mlx5_ib_cleanup); 1393