1 /* 2 * Copyright (c) 2006, 2007 Cisco Systems. All rights reserved. 3 * Copyright (c) 2007, 2008 Mellanox Technologies. All rights reserved. 4 * 5 * This software is available to you under a choice of one of two 6 * licenses. You may choose to be licensed under the terms of the GNU 7 * General Public License (GPL) Version 2, available from the file 8 * COPYING in the main directory of this source tree, or the 9 * OpenIB.org BSD license below: 10 * 11 * Redistribution and use in source and binary forms, with or 12 * without modification, are permitted provided that the following 13 * conditions are met: 14 * 15 * - Redistributions of source code must retain the above 16 * copyright notice, this list of conditions and the following 17 * disclaimer. 18 * 19 * - Redistributions in binary form must reproduce the above 20 * copyright notice, this list of conditions and the following 21 * disclaimer in the documentation and/or other materials 22 * provided with the distribution. 23 * 24 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, 25 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF 26 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND 27 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS 28 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN 29 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN 30 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE 31 * SOFTWARE. 32 */ 33 34 #ifndef MLX4_IB_H 35 #define MLX4_IB_H 36 37 #include <linux/compiler.h> 38 #include <linux/list.h> 39 #include <linux/mutex.h> 40 #include <linux/idr.h> 41 #include <linux/notifier.h> 42 43 #include <rdma/ib_verbs.h> 44 #include <rdma/ib_umem.h> 45 #include <rdma/ib_mad.h> 46 #include <rdma/ib_sa.h> 47 48 #include <linux/mlx4/device.h> 49 #include <linux/mlx4/doorbell.h> 50 #include <linux/mlx4/qp.h> 51 #include <linux/mlx4/cq.h> 52 53 #define MLX4_IB_DRV_NAME "mlx4_ib" 54 55 #ifdef pr_fmt 56 #undef pr_fmt 57 #endif 58 #define pr_fmt(fmt) "<" MLX4_IB_DRV_NAME "> %s: " fmt, __func__ 59 60 #define mlx4_ib_warn(ibdev, format, arg...) \ 61 dev_warn((ibdev)->dev.parent, MLX4_IB_DRV_NAME ": " format, ## arg) 62 63 enum { 64 MLX4_IB_SQ_MIN_WQE_SHIFT = 6, 65 MLX4_IB_MAX_HEADROOM = 2048 66 }; 67 68 #define MLX4_IB_SQ_HEADROOM(shift) ((MLX4_IB_MAX_HEADROOM >> (shift)) + 1) 69 #define MLX4_IB_SQ_MAX_SPARE (MLX4_IB_SQ_HEADROOM(MLX4_IB_SQ_MIN_WQE_SHIFT)) 70 71 /*module param to indicate if SM assigns the alias_GUID*/ 72 extern int mlx4_ib_sm_guid_assign; 73 74 #define MLX4_IB_UC_STEER_QPN_ALIGN 1 75 #define MLX4_IB_UC_MAX_NUM_QPS 256 76 77 enum hw_bar_type { 78 HW_BAR_BF, 79 HW_BAR_DB, 80 HW_BAR_CLOCK, 81 HW_BAR_COUNT 82 }; 83 84 struct mlx4_ib_ucontext { 85 struct ib_ucontext ibucontext; 86 struct mlx4_uar uar; 87 struct list_head db_page_list; 88 struct mutex db_page_mutex; 89 struct list_head wqn_ranges_list; 90 struct mutex wqn_ranges_mutex; /* protect wqn_ranges_list */ 91 }; 92 93 struct mlx4_ib_pd { 94 struct ib_pd ibpd; 95 u32 pdn; 96 }; 97 98 struct mlx4_ib_xrcd { 99 struct ib_xrcd ibxrcd; 100 u32 xrcdn; 101 struct ib_pd *pd; 102 struct ib_cq *cq; 103 }; 104 105 struct mlx4_ib_cq_buf { 106 struct mlx4_buf buf; 107 struct mlx4_mtt mtt; 108 int entry_size; 109 }; 110 111 struct mlx4_ib_cq_resize { 112 struct mlx4_ib_cq_buf buf; 113 int cqe; 114 }; 115 116 struct mlx4_ib_cq { 117 struct ib_cq ibcq; 118 struct mlx4_cq mcq; 119 struct mlx4_ib_cq_buf buf; 120 struct mlx4_ib_cq_resize *resize_buf; 121 struct mlx4_db db; 122 spinlock_t lock; 123 struct mutex resize_mutex; 124 struct ib_umem *resize_umem; 125 /* List of qps that it serves.*/ 126 struct list_head send_qp_list; 127 struct list_head recv_qp_list; 128 }; 129 130 #define MLX4_MR_PAGES_ALIGN 0x40 131 132 struct mlx4_ib_mr { 133 struct ib_mr ibmr; 134 __be64 *pages; 135 dma_addr_t page_map; 136 u32 npages; 137 u32 max_pages; 138 struct mlx4_mr mmr; 139 struct ib_umem *umem; 140 size_t page_map_size; 141 }; 142 143 struct mlx4_ib_mw { 144 struct ib_mw ibmw; 145 struct mlx4_mw mmw; 146 }; 147 148 #define MAX_REGS_PER_FLOW 2 149 150 struct mlx4_flow_reg_id { 151 u64 id; 152 u64 mirror; 153 }; 154 155 struct mlx4_ib_flow { 156 struct ib_flow ibflow; 157 /* translating DMFS verbs sniffer rule to FW API requires two reg IDs */ 158 struct mlx4_flow_reg_id reg_id[MAX_REGS_PER_FLOW]; 159 }; 160 161 struct mlx4_ib_wq { 162 u64 *wrid; 163 spinlock_t lock; 164 int wqe_cnt; 165 int max_post; 166 int max_gs; 167 int offset; 168 int wqe_shift; 169 unsigned head; 170 unsigned tail; 171 }; 172 173 enum { 174 MLX4_IB_QP_CREATE_ROCE_V2_GSI = IB_QP_CREATE_RESERVED_START 175 }; 176 177 enum mlx4_ib_qp_flags { 178 MLX4_IB_QP_LSO = IB_QP_CREATE_IPOIB_UD_LSO, 179 MLX4_IB_QP_BLOCK_MULTICAST_LOOPBACK = IB_QP_CREATE_BLOCK_MULTICAST_LOOPBACK, 180 MLX4_IB_QP_NETIF = IB_QP_CREATE_NETIF_QP, 181 MLX4_IB_QP_SCATTER_FCS = IB_QP_CREATE_SCATTER_FCS, 182 183 /* Mellanox specific flags start from IB_QP_CREATE_RESERVED_START */ 184 MLX4_IB_ROCE_V2_GSI_QP = MLX4_IB_QP_CREATE_ROCE_V2_GSI, 185 MLX4_IB_SRIOV_TUNNEL_QP = 1 << 30, 186 MLX4_IB_SRIOV_SQP = 1 << 31, 187 }; 188 189 struct mlx4_ib_gid_entry { 190 struct list_head list; 191 union ib_gid gid; 192 int added; 193 u8 port; 194 }; 195 196 enum mlx4_ib_qp_type { 197 /* 198 * IB_QPT_SMI and IB_QPT_GSI have to be the first two entries 199 * here (and in that order) since the MAD layer uses them as 200 * indices into a 2-entry table. 201 */ 202 MLX4_IB_QPT_SMI = IB_QPT_SMI, 203 MLX4_IB_QPT_GSI = IB_QPT_GSI, 204 205 MLX4_IB_QPT_RC = IB_QPT_RC, 206 MLX4_IB_QPT_UC = IB_QPT_UC, 207 MLX4_IB_QPT_UD = IB_QPT_UD, 208 MLX4_IB_QPT_RAW_IPV6 = IB_QPT_RAW_IPV6, 209 MLX4_IB_QPT_RAW_ETHERTYPE = IB_QPT_RAW_ETHERTYPE, 210 MLX4_IB_QPT_RAW_PACKET = IB_QPT_RAW_PACKET, 211 MLX4_IB_QPT_XRC_INI = IB_QPT_XRC_INI, 212 MLX4_IB_QPT_XRC_TGT = IB_QPT_XRC_TGT, 213 214 MLX4_IB_QPT_PROXY_SMI_OWNER = 1 << 16, 215 MLX4_IB_QPT_PROXY_SMI = 1 << 17, 216 MLX4_IB_QPT_PROXY_GSI = 1 << 18, 217 MLX4_IB_QPT_TUN_SMI_OWNER = 1 << 19, 218 MLX4_IB_QPT_TUN_SMI = 1 << 20, 219 MLX4_IB_QPT_TUN_GSI = 1 << 21, 220 }; 221 222 #define MLX4_IB_QPT_ANY_SRIOV (MLX4_IB_QPT_PROXY_SMI_OWNER | \ 223 MLX4_IB_QPT_PROXY_SMI | MLX4_IB_QPT_PROXY_GSI | MLX4_IB_QPT_TUN_SMI_OWNER | \ 224 MLX4_IB_QPT_TUN_SMI | MLX4_IB_QPT_TUN_GSI) 225 226 enum mlx4_ib_mad_ifc_flags { 227 MLX4_MAD_IFC_IGNORE_MKEY = 1, 228 MLX4_MAD_IFC_IGNORE_BKEY = 2, 229 MLX4_MAD_IFC_IGNORE_KEYS = (MLX4_MAD_IFC_IGNORE_MKEY | 230 MLX4_MAD_IFC_IGNORE_BKEY), 231 MLX4_MAD_IFC_NET_VIEW = 4, 232 }; 233 234 enum { 235 MLX4_NUM_TUNNEL_BUFS = 512, 236 MLX4_NUM_WIRE_BUFS = 2048, 237 }; 238 239 struct mlx4_ib_tunnel_header { 240 struct mlx4_av av; 241 __be32 remote_qpn; 242 __be32 qkey; 243 __be16 vlan; 244 u8 mac[6]; 245 __be16 pkey_index; 246 u8 reserved[6]; 247 }; 248 249 struct mlx4_ib_buf { 250 void *addr; 251 dma_addr_t map; 252 }; 253 254 struct mlx4_rcv_tunnel_hdr { 255 __be32 flags_src_qp; /* flags[6:5] is defined for VLANs: 256 * 0x0 - no vlan was in the packet 257 * 0x01 - C-VLAN was in the packet */ 258 u8 g_ml_path; /* gid bit stands for ipv6/4 header in RoCE */ 259 u8 reserved; 260 __be16 pkey_index; 261 __be16 sl_vid; 262 __be16 slid_mac_47_32; 263 __be32 mac_31_0; 264 }; 265 266 struct mlx4_ib_proxy_sqp_hdr { 267 struct ib_grh grh; 268 struct mlx4_rcv_tunnel_hdr tun; 269 } __packed; 270 271 struct mlx4_roce_smac_vlan_info { 272 u64 smac; 273 int smac_index; 274 int smac_port; 275 u64 candidate_smac; 276 int candidate_smac_index; 277 int candidate_smac_port; 278 u16 vid; 279 int vlan_index; 280 int vlan_port; 281 u16 candidate_vid; 282 int candidate_vlan_index; 283 int candidate_vlan_port; 284 int update_vid; 285 }; 286 287 struct mlx4_wqn_range { 288 int base_wqn; 289 int size; 290 int refcount; 291 bool dirty; 292 struct list_head list; 293 }; 294 295 struct mlx4_ib_rss { 296 unsigned int base_qpn_tbl_sz; 297 u8 flags; 298 u8 rss_key[MLX4_EN_RSS_KEY_SIZE]; 299 }; 300 301 enum { 302 /* 303 * Largest possible UD header: send with GRH and immediate 304 * data plus 18 bytes for an Ethernet header with VLAN/802.1Q 305 * tag. (LRH would only use 8 bytes, so Ethernet is the 306 * biggest case) 307 */ 308 MLX4_IB_UD_HEADER_SIZE = 82, 309 MLX4_IB_LSO_HEADER_SPARE = 128, 310 }; 311 312 struct mlx4_ib_sqp { 313 int pkey_index; 314 u32 qkey; 315 u32 send_psn; 316 struct ib_ud_header ud_header; 317 u8 header_buf[MLX4_IB_UD_HEADER_SIZE]; 318 struct ib_qp *roce_v2_gsi; 319 }; 320 321 struct mlx4_ib_qp { 322 union { 323 struct ib_qp ibqp; 324 struct ib_wq ibwq; 325 }; 326 struct mlx4_qp mqp; 327 struct mlx4_buf buf; 328 329 struct mlx4_db db; 330 struct mlx4_ib_wq rq; 331 332 u32 doorbell_qpn; 333 __be32 sq_signal_bits; 334 unsigned sq_next_wqe; 335 int sq_spare_wqes; 336 struct mlx4_ib_wq sq; 337 338 enum mlx4_ib_qp_type mlx4_ib_qp_type; 339 struct ib_umem *umem; 340 struct mlx4_mtt mtt; 341 int buf_size; 342 struct mutex mutex; 343 u16 xrcdn; 344 u32 flags; 345 u8 port; 346 u8 alt_port; 347 u8 atomic_rd_en; 348 u8 resp_depth; 349 u8 sq_no_prefetch; 350 u8 state; 351 int mlx_type; 352 u32 inl_recv_sz; 353 struct list_head gid_list; 354 struct list_head steering_rules; 355 struct mlx4_ib_buf *sqp_proxy_rcv; 356 struct mlx4_roce_smac_vlan_info pri; 357 struct mlx4_roce_smac_vlan_info alt; 358 u64 reg_id; 359 struct list_head qps_list; 360 struct list_head cq_recv_list; 361 struct list_head cq_send_list; 362 struct counter_index *counter_index; 363 struct mlx4_wqn_range *wqn_range; 364 /* Number of RSS QP parents that uses this WQ */ 365 u32 rss_usecnt; 366 union { 367 struct mlx4_ib_rss *rss_ctx; 368 struct mlx4_ib_sqp *sqp; 369 }; 370 }; 371 372 struct mlx4_ib_srq { 373 struct ib_srq ibsrq; 374 struct mlx4_srq msrq; 375 struct mlx4_buf buf; 376 struct mlx4_db db; 377 u64 *wrid; 378 spinlock_t lock; 379 int head; 380 int tail; 381 u16 wqe_ctr; 382 struct ib_umem *umem; 383 struct mlx4_mtt mtt; 384 struct mutex mutex; 385 }; 386 387 struct mlx4_ib_ah { 388 struct ib_ah ibah; 389 union mlx4_ext_av av; 390 }; 391 392 struct mlx4_ib_rwq_ind_table { 393 struct ib_rwq_ind_table ib_rwq_ind_tbl; 394 }; 395 396 /****************************************/ 397 /* alias guid support */ 398 /****************************************/ 399 #define NUM_PORT_ALIAS_GUID 2 400 #define NUM_ALIAS_GUID_IN_REC 8 401 #define NUM_ALIAS_GUID_REC_IN_PORT 16 402 #define GUID_REC_SIZE 8 403 #define NUM_ALIAS_GUID_PER_PORT 128 404 #define MLX4_NOT_SET_GUID (0x00LL) 405 #define MLX4_GUID_FOR_DELETE_VAL (~(0x00LL)) 406 407 enum mlx4_guid_alias_rec_status { 408 MLX4_GUID_INFO_STATUS_IDLE, 409 MLX4_GUID_INFO_STATUS_SET, 410 }; 411 412 #define GUID_STATE_NEED_PORT_INIT 0x01 413 414 enum mlx4_guid_alias_rec_method { 415 MLX4_GUID_INFO_RECORD_SET = IB_MGMT_METHOD_SET, 416 MLX4_GUID_INFO_RECORD_DELETE = IB_SA_METHOD_DELETE, 417 }; 418 419 struct mlx4_sriov_alias_guid_info_rec_det { 420 u8 all_recs[GUID_REC_SIZE * NUM_ALIAS_GUID_IN_REC]; 421 ib_sa_comp_mask guid_indexes; /*indicates what from the 8 records are valid*/ 422 enum mlx4_guid_alias_rec_status status; /*indicates the administraively status of the record.*/ 423 unsigned int guids_retry_schedule[NUM_ALIAS_GUID_IN_REC]; 424 u64 time_to_run; 425 }; 426 427 struct mlx4_sriov_alias_guid_port_rec_det { 428 struct mlx4_sriov_alias_guid_info_rec_det all_rec_per_port[NUM_ALIAS_GUID_REC_IN_PORT]; 429 struct workqueue_struct *wq; 430 struct delayed_work alias_guid_work; 431 u32 port; 432 u32 state_flags; 433 struct mlx4_sriov_alias_guid *parent; 434 struct list_head cb_list; 435 }; 436 437 struct mlx4_sriov_alias_guid { 438 struct mlx4_sriov_alias_guid_port_rec_det ports_guid[MLX4_MAX_PORTS]; 439 spinlock_t ag_work_lock; 440 struct ib_sa_client *sa_client; 441 }; 442 443 struct mlx4_ib_demux_work { 444 struct work_struct work; 445 struct mlx4_ib_dev *dev; 446 int slave; 447 int do_init; 448 u8 port; 449 450 }; 451 452 struct mlx4_ib_tun_tx_buf { 453 struct mlx4_ib_buf buf; 454 struct ib_ah *ah; 455 }; 456 457 struct mlx4_ib_demux_pv_qp { 458 struct ib_qp *qp; 459 enum ib_qp_type proxy_qpt; 460 struct mlx4_ib_buf *ring; 461 struct mlx4_ib_tun_tx_buf *tx_ring; 462 spinlock_t tx_lock; 463 unsigned tx_ix_head; 464 unsigned tx_ix_tail; 465 }; 466 467 enum mlx4_ib_demux_pv_state { 468 DEMUX_PV_STATE_DOWN, 469 DEMUX_PV_STATE_STARTING, 470 DEMUX_PV_STATE_ACTIVE, 471 DEMUX_PV_STATE_DOWNING, 472 }; 473 474 struct mlx4_ib_demux_pv_ctx { 475 int port; 476 int slave; 477 enum mlx4_ib_demux_pv_state state; 478 int has_smi; 479 struct ib_device *ib_dev; 480 struct ib_cq *cq; 481 struct ib_pd *pd; 482 struct work_struct work; 483 struct workqueue_struct *wq; 484 struct workqueue_struct *wi_wq; 485 struct mlx4_ib_demux_pv_qp qp[2]; 486 }; 487 488 struct mlx4_ib_demux_ctx { 489 struct ib_device *ib_dev; 490 int port; 491 struct workqueue_struct *wq; 492 struct workqueue_struct *wi_wq; 493 struct workqueue_struct *ud_wq; 494 spinlock_t ud_lock; 495 atomic64_t subnet_prefix; 496 __be64 guid_cache[128]; 497 struct mlx4_ib_dev *dev; 498 /* the following lock protects both mcg_table and mcg_mgid0_list */ 499 struct mutex mcg_table_lock; 500 struct rb_root mcg_table; 501 struct list_head mcg_mgid0_list; 502 struct workqueue_struct *mcg_wq; 503 struct mlx4_ib_demux_pv_ctx **tun; 504 atomic_t tid; 505 int flushing; /* flushing the work queue */ 506 }; 507 508 struct mlx4_ib_sriov { 509 struct mlx4_ib_demux_ctx demux[MLX4_MAX_PORTS]; 510 struct mlx4_ib_demux_pv_ctx *sqps[MLX4_MAX_PORTS]; 511 /* when using this spinlock you should use "irq" because 512 * it may be called from interrupt context.*/ 513 spinlock_t going_down_lock; 514 int is_going_down; 515 516 struct mlx4_sriov_alias_guid alias_guid; 517 518 /* CM paravirtualization fields */ 519 struct xarray pv_id_table; 520 u32 pv_id_next; 521 spinlock_t id_map_lock; 522 struct rb_root sl_id_map; 523 struct list_head cm_list; 524 struct xarray xa_rej_tmout; 525 }; 526 527 struct gid_cache_context { 528 int real_index; 529 int refcount; 530 }; 531 532 struct gid_entry { 533 union ib_gid gid; 534 enum ib_gid_type gid_type; 535 struct gid_cache_context *ctx; 536 u16 vlan_id; 537 }; 538 539 struct mlx4_port_gid_table { 540 struct gid_entry gids[MLX4_MAX_PORT_GIDS]; 541 }; 542 543 struct mlx4_ib_iboe { 544 spinlock_t lock; 545 struct net_device *netdevs[MLX4_MAX_PORTS]; 546 atomic64_t mac[MLX4_MAX_PORTS]; 547 struct notifier_block nb; 548 struct mlx4_port_gid_table gids[MLX4_MAX_PORTS]; 549 enum ib_port_state last_port_state[MLX4_MAX_PORTS]; 550 }; 551 552 struct pkey_mgt { 553 u8 virt2phys_pkey[MLX4_MFUNC_MAX][MLX4_MAX_PORTS][MLX4_MAX_PORT_PKEYS]; 554 u16 phys_pkey_cache[MLX4_MAX_PORTS][MLX4_MAX_PORT_PKEYS]; 555 struct list_head pkey_port_list[MLX4_MFUNC_MAX]; 556 struct kobject *device_parent[MLX4_MFUNC_MAX]; 557 }; 558 559 struct mlx4_ib_iov_sysfs_attr { 560 void *ctx; 561 struct kobject *kobj; 562 unsigned long data; 563 u32 entry_num; 564 char name[15]; 565 struct device_attribute dentry; 566 struct device *dev; 567 }; 568 569 struct mlx4_ib_iov_sysfs_attr_ar { 570 struct mlx4_ib_iov_sysfs_attr dentries[3 * NUM_ALIAS_GUID_PER_PORT + 1]; 571 }; 572 573 struct mlx4_ib_iov_port { 574 char name[100]; 575 u8 num; 576 struct mlx4_ib_dev *dev; 577 struct list_head list; 578 struct mlx4_ib_iov_sysfs_attr_ar *dentr_ar; 579 struct ib_port_attr attr; 580 struct kobject *cur_port; 581 struct kobject *admin_alias_parent; 582 struct kobject *gids_parent; 583 struct kobject *pkeys_parent; 584 struct kobject *mcgs_parent; 585 struct mlx4_ib_iov_sysfs_attr mcg_dentry; 586 }; 587 588 struct counter_index { 589 struct list_head list; 590 u32 index; 591 u8 allocated; 592 }; 593 594 struct mlx4_ib_counters { 595 struct list_head counters_list; 596 struct mutex mutex; /* mutex for accessing counters list */ 597 u32 default_counter; 598 }; 599 600 #define MLX4_DIAG_COUNTERS_TYPES 2 601 602 struct mlx4_ib_diag_counters { 603 struct rdma_stat_desc *descs; 604 u32 *offset; 605 u32 num_counters; 606 }; 607 608 struct mlx4_ib_dev { 609 struct ib_device ib_dev; 610 struct mlx4_dev *dev; 611 int num_ports; 612 void __iomem *uar_map; 613 614 struct mlx4_uar priv_uar; 615 u32 priv_pdn; 616 MLX4_DECLARE_DOORBELL_LOCK(uar_lock); 617 618 struct ib_mad_agent *send_agent[MLX4_MAX_PORTS][2]; 619 struct ib_ah *sm_ah[MLX4_MAX_PORTS]; 620 spinlock_t sm_lock; 621 atomic64_t sl2vl[MLX4_MAX_PORTS]; 622 struct mlx4_ib_sriov sriov; 623 624 struct mutex cap_mask_mutex; 625 bool ib_active; 626 struct mlx4_ib_iboe iboe; 627 struct mlx4_ib_counters counters_table[MLX4_MAX_PORTS]; 628 int *eq_table; 629 struct kobject *iov_parent; 630 struct kobject *ports_parent; 631 struct kobject *dev_ports_parent[MLX4_MFUNC_MAX]; 632 struct mlx4_ib_iov_port iov_ports[MLX4_MAX_PORTS]; 633 struct pkey_mgt pkeys; 634 unsigned long *ib_uc_qpns_bitmap; 635 int steer_qpn_count; 636 int steer_qpn_base; 637 int steering_support; 638 struct mlx4_ib_qp *qp1_proxy[MLX4_MAX_PORTS]; 639 /* lock when destroying qp1_proxy and getting netdev events */ 640 struct mutex qp1_proxy_lock[MLX4_MAX_PORTS]; 641 u8 bond_next_port; 642 /* protect resources needed as part of reset flow */ 643 spinlock_t reset_flow_resource_lock; 644 struct list_head qp_list; 645 struct mlx4_ib_diag_counters diag_counters[MLX4_DIAG_COUNTERS_TYPES]; 646 struct notifier_block mlx_nb; 647 }; 648 649 struct ib_event_work { 650 struct work_struct work; 651 struct mlx4_ib_dev *ib_dev; 652 struct mlx4_eqe ib_eqe; 653 int port; 654 }; 655 656 struct mlx4_ib_qp_tunnel_init_attr { 657 struct ib_qp_init_attr init_attr; 658 int slave; 659 enum ib_qp_type proxy_qp_type; 660 u32 port; 661 }; 662 663 struct mlx4_uverbs_ex_query_device { 664 __u32 comp_mask; 665 __u32 reserved; 666 }; 667 668 /* 4k - 4G */ 669 #define MLX4_PAGE_SIZE_SUPPORTED ((unsigned long)GENMASK_ULL(31, 12)) 670 671 static inline struct mlx4_ib_dev *to_mdev(struct ib_device *ibdev) 672 { 673 return container_of(ibdev, struct mlx4_ib_dev, ib_dev); 674 } 675 676 static inline struct mlx4_ib_ucontext *to_mucontext(struct ib_ucontext *ibucontext) 677 { 678 return container_of(ibucontext, struct mlx4_ib_ucontext, ibucontext); 679 } 680 681 static inline struct mlx4_ib_pd *to_mpd(struct ib_pd *ibpd) 682 { 683 return container_of(ibpd, struct mlx4_ib_pd, ibpd); 684 } 685 686 static inline struct mlx4_ib_xrcd *to_mxrcd(struct ib_xrcd *ibxrcd) 687 { 688 return container_of(ibxrcd, struct mlx4_ib_xrcd, ibxrcd); 689 } 690 691 static inline struct mlx4_ib_cq *to_mcq(struct ib_cq *ibcq) 692 { 693 return container_of(ibcq, struct mlx4_ib_cq, ibcq); 694 } 695 696 static inline struct mlx4_ib_cq *to_mibcq(struct mlx4_cq *mcq) 697 { 698 return container_of(mcq, struct mlx4_ib_cq, mcq); 699 } 700 701 static inline struct mlx4_ib_mr *to_mmr(struct ib_mr *ibmr) 702 { 703 return container_of(ibmr, struct mlx4_ib_mr, ibmr); 704 } 705 706 static inline struct mlx4_ib_mw *to_mmw(struct ib_mw *ibmw) 707 { 708 return container_of(ibmw, struct mlx4_ib_mw, ibmw); 709 } 710 711 static inline struct mlx4_ib_flow *to_mflow(struct ib_flow *ibflow) 712 { 713 return container_of(ibflow, struct mlx4_ib_flow, ibflow); 714 } 715 716 static inline struct mlx4_ib_qp *to_mqp(struct ib_qp *ibqp) 717 { 718 return container_of(ibqp, struct mlx4_ib_qp, ibqp); 719 } 720 721 static inline struct mlx4_ib_qp *to_mibqp(struct mlx4_qp *mqp) 722 { 723 return container_of(mqp, struct mlx4_ib_qp, mqp); 724 } 725 726 static inline struct mlx4_ib_srq *to_msrq(struct ib_srq *ibsrq) 727 { 728 return container_of(ibsrq, struct mlx4_ib_srq, ibsrq); 729 } 730 731 static inline struct mlx4_ib_srq *to_mibsrq(struct mlx4_srq *msrq) 732 { 733 return container_of(msrq, struct mlx4_ib_srq, msrq); 734 } 735 736 static inline struct mlx4_ib_ah *to_mah(struct ib_ah *ibah) 737 { 738 return container_of(ibah, struct mlx4_ib_ah, ibah); 739 } 740 741 static inline u8 mlx4_ib_bond_next_port(struct mlx4_ib_dev *dev) 742 { 743 dev->bond_next_port = (dev->bond_next_port + 1) % dev->num_ports; 744 745 return dev->bond_next_port + 1; 746 } 747 748 int mlx4_ib_init_sriov(struct mlx4_ib_dev *dev); 749 void mlx4_ib_close_sriov(struct mlx4_ib_dev *dev); 750 751 int mlx4_ib_db_map_user(struct ib_udata *udata, unsigned long virt, 752 struct mlx4_db *db); 753 void mlx4_ib_db_unmap_user(struct mlx4_ib_ucontext *context, struct mlx4_db *db); 754 755 struct ib_mr *mlx4_ib_get_dma_mr(struct ib_pd *pd, int acc); 756 int mlx4_ib_umem_write_mtt(struct mlx4_ib_dev *dev, struct mlx4_mtt *mtt, 757 struct ib_umem *umem); 758 struct ib_mr *mlx4_ib_reg_user_mr(struct ib_pd *pd, u64 start, u64 length, 759 u64 virt_addr, int access_flags, 760 struct ib_dmah *dmah, 761 struct ib_udata *udata); 762 int mlx4_ib_dereg_mr(struct ib_mr *mr, struct ib_udata *udata); 763 int mlx4_ib_alloc_mw(struct ib_mw *mw, struct ib_udata *udata); 764 int mlx4_ib_dealloc_mw(struct ib_mw *mw); 765 struct ib_mr *mlx4_ib_alloc_mr(struct ib_pd *pd, enum ib_mr_type mr_type, 766 u32 max_num_sg); 767 int mlx4_ib_map_mr_sg(struct ib_mr *ibmr, struct scatterlist *sg, int sg_nents, 768 unsigned int *sg_offset); 769 int mlx4_ib_modify_cq(struct ib_cq *cq, u16 cq_count, u16 cq_period); 770 int mlx4_ib_resize_cq(struct ib_cq *ibcq, unsigned int entries, 771 struct ib_udata *udata); 772 int mlx4_ib_create_cq(struct ib_cq *ibcq, const struct ib_cq_init_attr *attr, 773 struct uverbs_attr_bundle *attrs); 774 int mlx4_ib_create_user_cq(struct ib_cq *ibcq, 775 const struct ib_cq_init_attr *attr, 776 struct uverbs_attr_bundle *attrs); 777 int mlx4_ib_destroy_cq(struct ib_cq *cq, struct ib_udata *udata); 778 int mlx4_ib_poll_cq(struct ib_cq *ibcq, int num_entries, struct ib_wc *wc); 779 int mlx4_ib_arm_cq(struct ib_cq *cq, enum ib_cq_notify_flags flags); 780 void __mlx4_ib_cq_clean(struct mlx4_ib_cq *cq, u32 qpn, struct mlx4_ib_srq *srq); 781 void mlx4_ib_cq_clean(struct mlx4_ib_cq *cq, u32 qpn, struct mlx4_ib_srq *srq); 782 783 int mlx4_ib_create_ah(struct ib_ah *ah, struct rdma_ah_init_attr *init_attr, 784 struct ib_udata *udata); 785 int mlx4_ib_create_ah_slave(struct ib_ah *ah, struct rdma_ah_attr *ah_attr, 786 int slave_sgid_index, u8 *s_mac, u16 vlan_tag); 787 int mlx4_ib_query_ah(struct ib_ah *ibah, struct rdma_ah_attr *ah_attr); 788 static inline int mlx4_ib_destroy_ah(struct ib_ah *ah, u32 flags) 789 { 790 return 0; 791 } 792 793 int mlx4_ib_create_srq(struct ib_srq *srq, struct ib_srq_init_attr *init_attr, 794 struct ib_udata *udata); 795 int mlx4_ib_modify_srq(struct ib_srq *ibsrq, struct ib_srq_attr *attr, 796 enum ib_srq_attr_mask attr_mask, struct ib_udata *udata); 797 int mlx4_ib_query_srq(struct ib_srq *srq, struct ib_srq_attr *srq_attr); 798 int mlx4_ib_destroy_srq(struct ib_srq *srq, struct ib_udata *udata); 799 void mlx4_ib_free_srq_wqe(struct mlx4_ib_srq *srq, int wqe_index); 800 int mlx4_ib_post_srq_recv(struct ib_srq *ibsrq, const struct ib_recv_wr *wr, 801 const struct ib_recv_wr **bad_wr); 802 803 int mlx4_ib_create_qp(struct ib_qp *qp, struct ib_qp_init_attr *init_attr, 804 struct ib_udata *udata); 805 int mlx4_ib_destroy_qp(struct ib_qp *qp, struct ib_udata *udata); 806 void mlx4_ib_drain_sq(struct ib_qp *qp); 807 void mlx4_ib_drain_rq(struct ib_qp *qp); 808 int mlx4_ib_modify_qp(struct ib_qp *ibqp, struct ib_qp_attr *attr, 809 int attr_mask, struct ib_udata *udata); 810 int mlx4_ib_query_qp(struct ib_qp *ibqp, struct ib_qp_attr *qp_attr, int qp_attr_mask, 811 struct ib_qp_init_attr *qp_init_attr); 812 int mlx4_ib_post_send(struct ib_qp *ibqp, const struct ib_send_wr *wr, 813 const struct ib_send_wr **bad_wr); 814 int mlx4_ib_post_recv(struct ib_qp *ibqp, const struct ib_recv_wr *wr, 815 const struct ib_recv_wr **bad_wr); 816 817 int mlx4_MAD_IFC(struct mlx4_ib_dev *dev, int mad_ifc_flags, 818 int port, const struct ib_wc *in_wc, const struct ib_grh *in_grh, 819 const void *in_mad, void *response_mad); 820 int mlx4_ib_process_mad(struct ib_device *ibdev, int mad_flags, u32 port_num, 821 const struct ib_wc *in_wc, const struct ib_grh *in_grh, 822 const struct ib_mad *in, struct ib_mad *out, 823 size_t *out_mad_size, u16 *out_mad_pkey_index); 824 int mlx4_ib_mad_init(struct mlx4_ib_dev *dev); 825 void mlx4_ib_mad_cleanup(struct mlx4_ib_dev *dev); 826 827 int __mlx4_ib_query_port(struct ib_device *ibdev, u32 port, 828 struct ib_port_attr *props, int netw_view); 829 int __mlx4_ib_query_pkey(struct ib_device *ibdev, u32 port, u16 index, 830 u16 *pkey, int netw_view); 831 832 int __mlx4_ib_query_gid(struct ib_device *ibdev, u32 port, int index, 833 union ib_gid *gid, int netw_view); 834 835 static inline bool mlx4_ib_ah_grh_present(struct mlx4_ib_ah *ah) 836 { 837 u32 port = be32_to_cpu(ah->av.ib.port_pd) >> 24 & 3; 838 839 if (rdma_port_get_link_layer(ah->ibah.device, port) == IB_LINK_LAYER_ETHERNET) 840 return true; 841 842 return !!(ah->av.ib.g_slid & 0x80); 843 } 844 845 int mlx4_ib_mcg_port_init(struct mlx4_ib_demux_ctx *ctx); 846 void mlx4_ib_mcg_port_cleanup(struct mlx4_ib_demux_ctx *ctx, int destroy_wq); 847 void clean_vf_mcast(struct mlx4_ib_demux_ctx *ctx, int slave); 848 int mlx4_ib_mcg_init(void); 849 void mlx4_ib_mcg_destroy(void); 850 851 int mlx4_ib_find_real_gid(struct ib_device *ibdev, u32 port, __be64 guid); 852 853 int mlx4_ib_mcg_multiplex_handler(struct ib_device *ibdev, int port, int slave, 854 struct ib_sa_mad *sa_mad); 855 int mlx4_ib_mcg_demux_handler(struct ib_device *ibdev, int port, int slave, 856 struct ib_sa_mad *mad); 857 858 int mlx4_ib_add_mc(struct mlx4_ib_dev *mdev, struct mlx4_ib_qp *mqp, 859 union ib_gid *gid); 860 861 void mlx4_ib_dispatch_event(struct mlx4_ib_dev *dev, u32 port_num, 862 enum ib_event_type type); 863 864 void mlx4_ib_tunnels_update_work(struct work_struct *work); 865 866 int mlx4_ib_send_to_slave(struct mlx4_ib_dev *dev, int slave, u32 port, 867 enum ib_qp_type qpt, struct ib_wc *wc, 868 struct ib_grh *grh, struct ib_mad *mad); 869 870 int mlx4_ib_send_to_wire(struct mlx4_ib_dev *dev, int slave, u32 port, 871 enum ib_qp_type dest_qpt, u16 pkey_index, u32 remote_qpn, 872 u32 qkey, struct rdma_ah_attr *attr, u8 *s_mac, 873 u16 vlan_id, struct ib_mad *mad); 874 875 __be64 mlx4_ib_get_new_demux_tid(struct mlx4_ib_demux_ctx *ctx); 876 877 int mlx4_ib_demux_cm_handler(struct ib_device *ibdev, int port, int *slave, 878 struct ib_mad *mad); 879 880 int mlx4_ib_multiplex_cm_handler(struct ib_device *ibdev, int port, int slave_id, 881 struct ib_mad *mad); 882 883 void mlx4_ib_cm_paravirt_init(struct mlx4_ib_dev *dev); 884 void mlx4_ib_cm_paravirt_clean(struct mlx4_ib_dev *dev, int slave_id); 885 886 /* alias guid support */ 887 void mlx4_ib_init_alias_guid_work(struct mlx4_ib_dev *dev, int port); 888 int mlx4_ib_init_alias_guid_service(struct mlx4_ib_dev *dev); 889 void mlx4_ib_destroy_alias_guid_service(struct mlx4_ib_dev *dev); 890 void mlx4_ib_invalidate_all_guid_record(struct mlx4_ib_dev *dev, int port); 891 892 void mlx4_ib_notify_slaves_on_guid_change(struct mlx4_ib_dev *dev, 893 int block_num, 894 u32 port_num, u8 *p_data); 895 896 void mlx4_ib_update_cache_on_guid_change(struct mlx4_ib_dev *dev, 897 int block_num, u32 port_num, 898 u8 *p_data); 899 900 int add_sysfs_port_mcg_attr(struct mlx4_ib_dev *device, int port_num, 901 struct attribute *attr); 902 void del_sysfs_port_mcg_attr(struct mlx4_ib_dev *device, int port_num, 903 struct attribute *attr); 904 ib_sa_comp_mask mlx4_ib_get_aguid_comp_mask_from_ix(int index); 905 void mlx4_ib_slave_alias_guid_event(struct mlx4_ib_dev *dev, int slave, 906 int port, int slave_init); 907 908 int mlx4_ib_device_register_sysfs(struct mlx4_ib_dev *device) ; 909 910 void mlx4_ib_device_unregister_sysfs(struct mlx4_ib_dev *device); 911 912 __be64 mlx4_ib_gen_node_guid(void); 913 914 int mlx4_ib_steer_qp_alloc(struct mlx4_ib_dev *dev, int count, int *qpn); 915 void mlx4_ib_steer_qp_free(struct mlx4_ib_dev *dev, u32 qpn, int count); 916 int mlx4_ib_steer_qp_reg(struct mlx4_ib_dev *mdev, struct mlx4_ib_qp *mqp, 917 int is_attach); 918 struct ib_mr *mlx4_ib_rereg_user_mr(struct ib_mr *mr, int flags, u64 start, 919 u64 length, u64 virt_addr, 920 int mr_access_flags, struct ib_pd *pd, 921 struct ib_udata *udata); 922 int mlx4_ib_gid_index_to_real_index(struct mlx4_ib_dev *ibdev, 923 const struct ib_gid_attr *attr); 924 925 void mlx4_sched_ib_sl2vl_update_work(struct mlx4_ib_dev *ibdev, 926 int port); 927 928 void mlx4_ib_sl2vl_update(struct mlx4_ib_dev *mdev, int port); 929 930 struct ib_wq *mlx4_ib_create_wq(struct ib_pd *pd, 931 struct ib_wq_init_attr *init_attr, 932 struct ib_udata *udata); 933 int mlx4_ib_destroy_wq(struct ib_wq *wq, struct ib_udata *udata); 934 int mlx4_ib_modify_wq(struct ib_wq *wq, struct ib_wq_attr *wq_attr, 935 u32 wq_attr_mask, struct ib_udata *udata); 936 937 int mlx4_ib_create_rwq_ind_table(struct ib_rwq_ind_table *ib_rwq_ind_tbl, 938 struct ib_rwq_ind_table_init_attr *init_attr, 939 struct ib_udata *udata); 940 static inline int 941 mlx4_ib_destroy_rwq_ind_table(struct ib_rwq_ind_table *wq_ind_table) 942 { 943 return 0; 944 } 945 static inline int mlx4_ib_umem_calc_optimal_mtt_size(struct ib_umem *umem, 946 u64 start, 947 int *num_of_mtts) 948 { 949 unsigned long pg_sz; 950 951 pg_sz = ib_umem_find_best_pgsz(umem, MLX4_PAGE_SIZE_SUPPORTED, start); 952 if (!pg_sz) 953 return -EOPNOTSUPP; 954 955 *num_of_mtts = ib_umem_num_dma_blocks(umem, pg_sz); 956 return order_base_2(pg_sz); 957 } 958 959 int mlx4_ib_cm_init(void); 960 void mlx4_ib_cm_destroy(void); 961 962 int mlx4_ib_qp_event_init(void); 963 void mlx4_ib_qp_event_cleanup(void); 964 965 #endif /* MLX4_IB_H */ 966