1 /* SPDX-License-Identifier: GPL-2.0 or Linux-OpenIB */ 2 /* Copyright (c) 2015 - 2024 Intel Corporation */ 3 #ifndef IRDMA_VIRTCHNL_H 4 #define IRDMA_VIRTCHNL_H 5 6 #include "hmc.h" 7 #include "irdma.h" 8 9 /* IRDMA_VCHNL_CHNL_VER_V0 is for legacy hw, no longer supported. */ 10 #define IRDMA_VCHNL_CHNL_VER_V2 2 11 #define IRDMA_VCHNL_CHNL_VER_MIN IRDMA_VCHNL_CHNL_VER_V2 12 #define IRDMA_VCHNL_CHNL_VER_MAX IRDMA_VCHNL_CHNL_VER_V2 13 #define IRDMA_VCHNL_OP_GET_HMC_FCN_V0 0 14 #define IRDMA_VCHNL_OP_GET_HMC_FCN_V1 1 15 #define IRDMA_VCHNL_OP_GET_HMC_FCN_V2 2 16 #define IRDMA_VCHNL_OP_PUT_HMC_FCN_V0 0 17 #define IRDMA_VCHNL_OP_GET_REG_LAYOUT_V0 0 18 #define IRDMA_VCHNL_OP_QUEUE_VECTOR_MAP_V0 0 19 #define IRDMA_VCHNL_OP_QUEUE_VECTOR_UNMAP_V0 0 20 #define IRDMA_VCHNL_OP_ADD_VPORT_V0 0 21 #define IRDMA_VCHNL_OP_DEL_VPORT_V0 0 22 #define IRDMA_VCHNL_OP_GET_RDMA_CAPS_V0 0 23 #define IRDMA_VCHNL_OP_GET_RDMA_CAPS_MIN_SIZE 1 24 25 #define IRDMA_VCHNL_REG_ID_CQPTAIL 0 26 #define IRDMA_VCHNL_REG_ID_CQPDB 1 27 #define IRDMA_VCHNL_REG_ID_CCQPSTATUS 2 28 #define IRDMA_VCHNL_REG_ID_CCQPHIGH 3 29 #define IRDMA_VCHNL_REG_ID_CCQPLOW 4 30 #define IRDMA_VCHNL_REG_ID_CQARM 5 31 #define IRDMA_VCHNL_REG_ID_CQACK 6 32 #define IRDMA_VCHNL_REG_ID_AEQALLOC 7 33 #define IRDMA_VCHNL_REG_ID_CQPERRCODES 8 34 #define IRDMA_VCHNL_REG_ID_WQEALLOC 9 35 #define IRDMA_VCHNL_REG_ID_IPCONFIG0 10 36 #define IRDMA_VCHNL_REG_ID_DB_ADDR_OFFSET 11 37 #define IRDMA_VCHNL_REG_ID_DYN_CTL 12 38 #define IRDMA_VCHNL_REG_ID_AEQITRMASK 13 39 #define IRDMA_VCHNL_REG_ID_CEQITRMASK 14 40 #define IRDMA_VCHNL_REG_INV_ID 0xFFFF 41 #define IRDMA_VCHNL_REG_PAGE_REL 0x8000 42 43 #define IRDMA_VCHNL_REGFLD_ID_CCQPSTATUS_CQP_OP_ERR 2 44 #define IRDMA_VCHNL_REGFLD_ID_CCQPSTATUS_CCQP_DONE 5 45 #define IRDMA_VCHNL_REGFLD_ID_CQPSQ_STAG_PDID 6 46 #define IRDMA_VCHNL_REGFLD_ID_CQPSQ_CQ_CEQID 7 47 #define IRDMA_VCHNL_REGFLD_ID_CQPSQ_CQ_CQID 8 48 #define IRDMA_VCHNL_REGFLD_ID_COMMIT_FPM_CQCNT 9 49 #define IRDMA_VCHNL_REGFLD_ID_UPESD_HMCN_ID 10 50 #define IRDMA_VCHNL_REGFLD_INV_ID 0xFFFF 51 52 #define IRDMA_VCHNL_RESP_MIN_SIZE (sizeof(struct irdma_vchnl_resp_buf)) 53 54 enum irdma_vchnl_ops { 55 IRDMA_VCHNL_OP_GET_VER = 0, 56 IRDMA_VCHNL_OP_GET_HMC_FCN = 1, 57 IRDMA_VCHNL_OP_PUT_HMC_FCN = 2, 58 IRDMA_VCHNL_OP_GET_REG_LAYOUT = 11, 59 IRDMA_VCHNL_OP_GET_RDMA_CAPS = 13, 60 IRDMA_VCHNL_OP_QUEUE_VECTOR_MAP = 14, 61 IRDMA_VCHNL_OP_QUEUE_VECTOR_UNMAP = 15, 62 IRDMA_VCHNL_OP_ADD_VPORT = 16, 63 IRDMA_VCHNL_OP_DEL_VPORT = 17, 64 }; 65 66 struct irdma_vchnl_req_hmc_info { 67 u8 protocol_used; 68 u8 disable_qos; 69 } __packed; 70 71 struct irdma_vchnl_resp_hmc_info { 72 u16 hmc_func; 73 u16 qs_handle[IRDMA_MAX_USER_PRIORITY]; 74 } __packed; 75 76 struct irdma_vchnl_qv_info { 77 u32 v_idx; 78 u16 ceq_idx; 79 u16 aeq_idx; 80 u8 itr_idx; 81 }; 82 83 struct irdma_vchnl_qvlist_info { 84 u32 num_vectors; 85 struct irdma_vchnl_qv_info qv_info[]; 86 }; 87 88 struct irdma_vchnl_req_vport_info { 89 u16 vport_id; 90 u32 qp1_id; 91 }; 92 93 struct irdma_vchnl_resp_vport_info { 94 u16 qs_handle[IRDMA_MAX_USER_PRIORITY]; 95 }; 96 97 struct irdma_vchnl_op_buf { 98 u16 op_code; 99 u16 op_ver; 100 u16 buf_len; 101 u16 rsvd; 102 u64 op_ctx; 103 u8 buf[]; 104 } __packed; 105 106 struct irdma_vchnl_resp_buf { 107 u64 op_ctx; 108 u16 buf_len; 109 s16 op_ret; 110 u16 rsvd[2]; 111 u8 buf[]; 112 } __packed; 113 114 struct irdma_vchnl_rdma_caps { 115 u8 hw_rev; 116 u16 cqp_timeout_s; 117 u16 cqp_def_timeout_s; 118 u16 max_hw_push_len; 119 } __packed; 120 121 struct irdma_vchnl_init_info { 122 struct workqueue_struct *vchnl_wq; 123 enum irdma_vers hw_rev; 124 bool privileged; 125 bool is_pf; 126 }; 127 128 struct irdma_vchnl_reg_info { 129 u32 reg_offset; 130 u16 field_cnt; 131 u16 reg_id; /* High bit of reg_id: bar or page relative */ 132 }; 133 134 struct irdma_vchnl_reg_field_info { 135 u8 fld_shift; 136 u8 fld_bits; 137 u16 fld_id; 138 }; 139 140 struct irdma_vchnl_req { 141 struct irdma_vchnl_op_buf *vchnl_msg; 142 void *parm; 143 u32 vf_id; 144 u16 parm_len; 145 u16 resp_len; 146 }; 147 148 struct irdma_vchnl_req_init_info { 149 void *req_parm; 150 void *resp_parm; 151 u16 req_parm_len; 152 u16 resp_parm_len; 153 u16 op_code; 154 u16 op_ver; 155 } __packed; 156 157 struct irdma_qos; 158 159 int irdma_sc_vchnl_init(struct irdma_sc_dev *dev, 160 struct irdma_vchnl_init_info *info); 161 int irdma_vchnl_req_get_ver(struct irdma_sc_dev *dev, u16 ver_req, 162 u32 *ver_res); 163 int irdma_vchnl_req_get_hmc_fcn(struct irdma_sc_dev *dev); 164 int irdma_vchnl_req_put_hmc_fcn(struct irdma_sc_dev *dev); 165 int irdma_vchnl_req_get_caps(struct irdma_sc_dev *dev); 166 int irdma_vchnl_req_get_resp(struct irdma_sc_dev *dev, 167 struct irdma_vchnl_req *vc_req); 168 int irdma_vchnl_req_get_reg_layout(struct irdma_sc_dev *dev); 169 int irdma_vchnl_req_aeq_vec_map(struct irdma_sc_dev *dev, u32 v_idx); 170 int irdma_vchnl_req_ceq_vec_map(struct irdma_sc_dev *dev, u16 ceq_id, 171 u32 v_idx); 172 int irdma_vchnl_req_add_vport(struct irdma_sc_dev *dev, u16 vport_id, 173 u32 qp1_id, struct irdma_qos *qos); 174 int irdma_vchnl_req_del_vport(struct irdma_sc_dev *dev, u16 vport_id, 175 u32 qp1_id); 176 #endif /* IRDMA_VIRTCHNL_H */ 177