xref: /linux/drivers/infiniband/hw/irdma/verbs.c (revision 17d85f33a83b84e7d36bc3356614ae06c90e7a08)
1 // SPDX-License-Identifier: GPL-2.0 OR Linux-OpenIB
2 /* Copyright (c) 2015 - 2021 Intel Corporation */
3 #include "main.h"
4 
5 /**
6  * irdma_query_device - get device attributes
7  * @ibdev: device pointer from stack
8  * @props: returning device attributes
9  * @udata: user data
10  */
irdma_query_device(struct ib_device * ibdev,struct ib_device_attr * props,struct ib_udata * udata)11 static int irdma_query_device(struct ib_device *ibdev,
12 			      struct ib_device_attr *props,
13 			      struct ib_udata *udata)
14 {
15 	struct irdma_device *iwdev = to_iwdev(ibdev);
16 	struct irdma_pci_f *rf = iwdev->rf;
17 	struct pci_dev *pcidev = iwdev->rf->pcidev;
18 	struct irdma_hw_attrs *hw_attrs = &rf->sc_dev.hw_attrs;
19 
20 	if (udata->inlen || udata->outlen)
21 		return -EINVAL;
22 
23 	memset(props, 0, sizeof(*props));
24 	addrconf_addr_eui48((u8 *)&props->sys_image_guid,
25 			    iwdev->netdev->dev_addr);
26 	props->fw_ver = (u64)irdma_fw_major_ver(&rf->sc_dev) << 32 |
27 			irdma_fw_minor_ver(&rf->sc_dev);
28 	props->device_cap_flags = IB_DEVICE_MEM_WINDOW |
29 				  IB_DEVICE_MEM_MGT_EXTENSIONS;
30 	props->kernel_cap_flags = IBK_LOCAL_DMA_LKEY;
31 	props->vendor_id = pcidev->vendor;
32 	props->vendor_part_id = pcidev->device;
33 
34 	props->hw_ver = rf->pcidev->revision;
35 	props->page_size_cap = hw_attrs->page_size_cap;
36 	props->max_mr_size = hw_attrs->max_mr_size;
37 	props->max_qp = rf->max_qp - rf->used_qps;
38 	props->max_qp_wr = hw_attrs->max_qp_wr;
39 	props->max_send_sge = hw_attrs->uk_attrs.max_hw_wq_frags;
40 	props->max_recv_sge = hw_attrs->uk_attrs.max_hw_wq_frags;
41 	props->max_cq = rf->max_cq - rf->used_cqs;
42 	props->max_cqe = rf->max_cqe - 1;
43 	props->max_mr = rf->max_mr - rf->used_mrs;
44 	if (hw_attrs->uk_attrs.hw_rev >= IRDMA_GEN_3)
45 		props->max_mw = props->max_mr;
46 	props->max_pd = rf->max_pd - rf->used_pds;
47 	props->max_sge_rd = hw_attrs->uk_attrs.max_hw_read_sges;
48 	props->max_qp_rd_atom = hw_attrs->max_hw_ird;
49 	props->max_qp_init_rd_atom = hw_attrs->max_hw_ord;
50 	if (rdma_protocol_roce(ibdev, 1)) {
51 		props->device_cap_flags |= IB_DEVICE_RC_RNR_NAK_GEN;
52 		props->max_pkeys = IRDMA_PKEY_TBL_SZ;
53 	}
54 
55 	props->max_ah = rf->max_ah;
56 	props->max_mcast_grp = rf->max_mcg;
57 	props->max_mcast_qp_attach = IRDMA_MAX_MGS_PER_CTX;
58 	props->max_total_mcast_qp_attach = rf->max_qp * IRDMA_MAX_MGS_PER_CTX;
59 	props->max_fast_reg_page_list_len = IRDMA_MAX_PAGES_PER_FMR;
60 	props->max_srq = rf->max_srq - rf->used_srqs;
61 	props->max_srq_wr = IRDMA_MAX_SRQ_WRS;
62 	props->max_srq_sge = hw_attrs->uk_attrs.max_hw_wq_frags;
63 	if (hw_attrs->uk_attrs.feature_flags & IRDMA_FEATURE_ATOMIC_OPS)
64 		props->atomic_cap = IB_ATOMIC_HCA;
65 	else
66 		props->atomic_cap = IB_ATOMIC_NONE;
67 	props->masked_atomic_cap = props->atomic_cap;
68 	if (hw_attrs->uk_attrs.hw_rev >= IRDMA_GEN_3) {
69 #define HCA_CORE_CLOCK_KHZ 1000000UL
70 		props->timestamp_mask = GENMASK(31, 0);
71 		props->hca_core_clock = HCA_CORE_CLOCK_KHZ;
72 	}
73 	if (hw_attrs->uk_attrs.hw_rev >= IRDMA_GEN_3)
74 		props->device_cap_flags |= IB_DEVICE_MEM_WINDOW_TYPE_2B;
75 
76 	return 0;
77 }
78 
79 /**
80  * irdma_query_port - get port attributes
81  * @ibdev: device pointer from stack
82  * @port: port number for query
83  * @props: returning device attributes
84  */
irdma_query_port(struct ib_device * ibdev,u32 port,struct ib_port_attr * props)85 static int irdma_query_port(struct ib_device *ibdev, u32 port,
86 			    struct ib_port_attr *props)
87 {
88 	struct irdma_device *iwdev = to_iwdev(ibdev);
89 	struct net_device *netdev = iwdev->netdev;
90 
91 	/* no need to zero out pros here. done by caller */
92 
93 	props->max_mtu = IB_MTU_4096;
94 	props->active_mtu = ib_mtu_int_to_enum(netdev->mtu);
95 	props->lid = 1;
96 	props->lmc = 0;
97 	props->sm_lid = 0;
98 	props->sm_sl = 0;
99 	if (netif_carrier_ok(netdev) && netif_running(netdev)) {
100 		props->state = IB_PORT_ACTIVE;
101 		props->phys_state = IB_PORT_PHYS_STATE_LINK_UP;
102 	} else {
103 		props->state = IB_PORT_DOWN;
104 		props->phys_state = IB_PORT_PHYS_STATE_DISABLED;
105 	}
106 
107 	ib_get_eth_speed(ibdev, port, &props->active_speed,
108 			 &props->active_width);
109 
110 	if (rdma_protocol_roce(ibdev, 1)) {
111 		props->gid_tbl_len = 32;
112 		props->ip_gids = true;
113 		props->pkey_tbl_len = IRDMA_PKEY_TBL_SZ;
114 	} else {
115 		props->gid_tbl_len = 1;
116 	}
117 	props->qkey_viol_cntr = 0;
118 	props->port_cap_flags |= IB_PORT_CM_SUP | IB_PORT_REINIT_SUP;
119 	props->max_msg_sz = iwdev->rf->sc_dev.hw_attrs.max_hw_outbound_msg_size;
120 
121 	return 0;
122 }
123 
124 /**
125  * irdma_disassociate_ucontext - Disassociate user context
126  * @context: ib user context
127  */
irdma_disassociate_ucontext(struct ib_ucontext * context)128 static void irdma_disassociate_ucontext(struct ib_ucontext *context)
129 {
130 }
131 
irdma_mmap_legacy(struct irdma_ucontext * ucontext,struct vm_area_struct * vma)132 static int irdma_mmap_legacy(struct irdma_ucontext *ucontext,
133 			     struct vm_area_struct *vma)
134 {
135 	u64 pfn;
136 
137 	if (vma->vm_pgoff || vma->vm_end - vma->vm_start != PAGE_SIZE)
138 		return -EINVAL;
139 
140 	vma->vm_private_data = ucontext;
141 	pfn = ((uintptr_t)ucontext->iwdev->rf->sc_dev.hw_regs[IRDMA_DB_ADDR_OFFSET] +
142 	       pci_resource_start(ucontext->iwdev->rf->pcidev, 0)) >> PAGE_SHIFT;
143 
144 	return rdma_user_mmap_io(&ucontext->ibucontext, vma, pfn, PAGE_SIZE,
145 				 pgprot_noncached(vma->vm_page_prot), NULL);
146 }
147 
irdma_mmap_free(struct rdma_user_mmap_entry * rdma_entry)148 static void irdma_mmap_free(struct rdma_user_mmap_entry *rdma_entry)
149 {
150 	struct irdma_user_mmap_entry *entry = to_irdma_mmap_entry(rdma_entry);
151 
152 	kfree(entry);
153 }
154 
155 static struct rdma_user_mmap_entry*
irdma_user_mmap_entry_insert(struct irdma_ucontext * ucontext,u64 bar_offset,enum irdma_mmap_flag mmap_flag,u64 * mmap_offset)156 irdma_user_mmap_entry_insert(struct irdma_ucontext *ucontext, u64 bar_offset,
157 			     enum irdma_mmap_flag mmap_flag, u64 *mmap_offset)
158 {
159 	struct irdma_user_mmap_entry *entry = kzalloc(sizeof(*entry), GFP_KERNEL);
160 	int ret;
161 
162 	if (!entry)
163 		return NULL;
164 
165 	entry->bar_offset = bar_offset;
166 	entry->mmap_flag = mmap_flag;
167 
168 	ret = rdma_user_mmap_entry_insert(&ucontext->ibucontext,
169 					  &entry->rdma_entry, PAGE_SIZE);
170 	if (ret) {
171 		kfree(entry);
172 		return NULL;
173 	}
174 	*mmap_offset = rdma_user_mmap_get_offset(&entry->rdma_entry);
175 
176 	return &entry->rdma_entry;
177 }
178 
179 /**
180  * irdma_mmap - user memory map
181  * @context: context created during alloc
182  * @vma: kernel info for user memory map
183  */
irdma_mmap(struct ib_ucontext * context,struct vm_area_struct * vma)184 static int irdma_mmap(struct ib_ucontext *context, struct vm_area_struct *vma)
185 {
186 	struct rdma_user_mmap_entry *rdma_entry;
187 	struct irdma_user_mmap_entry *entry;
188 	struct irdma_ucontext *ucontext;
189 	u64 pfn;
190 	int ret;
191 
192 	ucontext = to_ucontext(context);
193 
194 	/* Legacy support for libi40iw with hard-coded mmap key */
195 	if (ucontext->legacy_mode)
196 		return irdma_mmap_legacy(ucontext, vma);
197 
198 	rdma_entry = rdma_user_mmap_entry_get(&ucontext->ibucontext, vma);
199 	if (!rdma_entry) {
200 		ibdev_dbg(&ucontext->iwdev->ibdev,
201 			  "VERBS: pgoff[0x%lx] does not have valid entry\n",
202 			  vma->vm_pgoff);
203 		return -EINVAL;
204 	}
205 
206 	entry = to_irdma_mmap_entry(rdma_entry);
207 	ibdev_dbg(&ucontext->iwdev->ibdev,
208 		  "VERBS: bar_offset [0x%llx] mmap_flag [%d]\n",
209 		  entry->bar_offset, entry->mmap_flag);
210 
211 	pfn = (entry->bar_offset +
212 	      pci_resource_start(ucontext->iwdev->rf->pcidev, 0)) >> PAGE_SHIFT;
213 
214 	switch (entry->mmap_flag) {
215 	case IRDMA_MMAP_IO_NC:
216 		ret = rdma_user_mmap_io(context, vma, pfn, PAGE_SIZE,
217 					pgprot_noncached(vma->vm_page_prot),
218 					rdma_entry);
219 		break;
220 	case IRDMA_MMAP_IO_WC:
221 		ret = rdma_user_mmap_io(context, vma, pfn, PAGE_SIZE,
222 					pgprot_writecombine(vma->vm_page_prot),
223 					rdma_entry);
224 		break;
225 	default:
226 		ret = -EINVAL;
227 	}
228 
229 	if (ret)
230 		ibdev_dbg(&ucontext->iwdev->ibdev,
231 			  "VERBS: bar_offset [0x%llx] mmap_flag[%d] err[%d]\n",
232 			  entry->bar_offset, entry->mmap_flag, ret);
233 	rdma_user_mmap_entry_put(rdma_entry);
234 
235 	return ret;
236 }
237 
238 /**
239  * irdma_alloc_push_page - allocate a push page for qp
240  * @iwqp: qp pointer
241  */
irdma_alloc_push_page(struct irdma_qp * iwqp)242 static void irdma_alloc_push_page(struct irdma_qp *iwqp)
243 {
244 	struct irdma_cqp_request *cqp_request;
245 	struct cqp_cmds_info *cqp_info;
246 	struct irdma_device *iwdev = iwqp->iwdev;
247 	struct irdma_sc_qp *qp = &iwqp->sc_qp;
248 	int status;
249 
250 	cqp_request = irdma_alloc_and_get_cqp_request(&iwdev->rf->cqp, true);
251 	if (!cqp_request)
252 		return;
253 
254 	cqp_info = &cqp_request->info;
255 	cqp_info->cqp_cmd = IRDMA_OP_MANAGE_PUSH_PAGE;
256 	cqp_info->post_sq = 1;
257 	cqp_info->in.u.manage_push_page.info.push_idx = 0;
258 	cqp_info->in.u.manage_push_page.info.qs_handle =
259 		qp->vsi->qos[qp->user_pri].qs_handle;
260 	cqp_info->in.u.manage_push_page.info.free_page = 0;
261 	cqp_info->in.u.manage_push_page.info.push_page_type = 0;
262 	cqp_info->in.u.manage_push_page.cqp = &iwdev->rf->cqp.sc_cqp;
263 	cqp_info->in.u.manage_push_page.scratch = (uintptr_t)cqp_request;
264 
265 	status = irdma_handle_cqp_op(iwdev->rf, cqp_request);
266 	if (!status && cqp_request->compl_info.op_ret_val <
267 	    iwdev->rf->sc_dev.hw_attrs.max_hw_device_pages) {
268 		qp->push_idx = cqp_request->compl_info.op_ret_val;
269 		qp->push_offset = 0;
270 	}
271 
272 	irdma_put_cqp_request(&iwdev->rf->cqp, cqp_request);
273 }
274 
275 /**
276  * irdma_alloc_ucontext - Allocate the user context data structure
277  * @uctx: uverbs context pointer
278  * @udata: user data
279  *
280  * This keeps track of all objects associated with a particular
281  * user-mode client.
282  */
irdma_alloc_ucontext(struct ib_ucontext * uctx,struct ib_udata * udata)283 static int irdma_alloc_ucontext(struct ib_ucontext *uctx,
284 				struct ib_udata *udata)
285 {
286 #define IRDMA_ALLOC_UCTX_MIN_REQ_LEN offsetofend(struct irdma_alloc_ucontext_req, rsvd8)
287 #define IRDMA_ALLOC_UCTX_MIN_RESP_LEN offsetofend(struct irdma_alloc_ucontext_resp, rsvd)
288 	struct ib_device *ibdev = uctx->device;
289 	struct irdma_device *iwdev = to_iwdev(ibdev);
290 	struct irdma_alloc_ucontext_req req = {};
291 	struct irdma_alloc_ucontext_resp uresp = {};
292 	struct irdma_ucontext *ucontext = to_ucontext(uctx);
293 	struct irdma_uk_attrs *uk_attrs = &iwdev->rf->sc_dev.hw_attrs.uk_attrs;
294 
295 	if (udata->inlen < IRDMA_ALLOC_UCTX_MIN_REQ_LEN ||
296 	    udata->outlen < IRDMA_ALLOC_UCTX_MIN_RESP_LEN)
297 		return -EINVAL;
298 
299 	if (ib_copy_from_udata(&req, udata, min(sizeof(req), udata->inlen)))
300 		return -EINVAL;
301 
302 	if (req.userspace_ver < 4 || req.userspace_ver > IRDMA_ABI_VER)
303 		goto ver_error;
304 
305 	ucontext->iwdev = iwdev;
306 	ucontext->abi_ver = req.userspace_ver;
307 
308 	if (!(req.comp_mask & IRDMA_SUPPORT_WQE_FORMAT_V2) &&
309 	    uk_attrs->hw_rev >= IRDMA_GEN_3)
310 		return -EOPNOTSUPP;
311 
312 	if (req.comp_mask & IRDMA_ALLOC_UCTX_USE_RAW_ATTR)
313 		ucontext->use_raw_attrs = true;
314 
315 	/* GEN_1 legacy support with libi40iw */
316 	if (udata->outlen == IRDMA_ALLOC_UCTX_MIN_RESP_LEN) {
317 		if (uk_attrs->hw_rev != IRDMA_GEN_1)
318 			return -EOPNOTSUPP;
319 
320 		ucontext->legacy_mode = true;
321 		uresp.max_qps = iwdev->rf->max_qp;
322 		uresp.max_pds = iwdev->rf->sc_dev.hw_attrs.max_hw_pds;
323 		uresp.wq_size = iwdev->rf->sc_dev.hw_attrs.max_qp_wr * 2;
324 		uresp.kernel_ver = req.userspace_ver;
325 		if (ib_copy_to_udata(udata, &uresp,
326 				     min(sizeof(uresp), udata->outlen)))
327 			return -EFAULT;
328 	} else {
329 		u64 bar_off = (uintptr_t)iwdev->rf->sc_dev.hw_regs[IRDMA_DB_ADDR_OFFSET];
330 
331 		ucontext->db_mmap_entry =
332 			irdma_user_mmap_entry_insert(ucontext, bar_off,
333 						     IRDMA_MMAP_IO_NC,
334 						     &uresp.db_mmap_key);
335 		if (!ucontext->db_mmap_entry)
336 			return -ENOMEM;
337 
338 		uresp.kernel_ver = IRDMA_ABI_VER;
339 		uresp.feature_flags = uk_attrs->feature_flags;
340 		uresp.max_hw_wq_frags = uk_attrs->max_hw_wq_frags;
341 		uresp.max_hw_read_sges = uk_attrs->max_hw_read_sges;
342 		uresp.max_hw_inline = uk_attrs->max_hw_inline;
343 		uresp.max_hw_rq_quanta = uk_attrs->max_hw_rq_quanta;
344 		uresp.max_hw_wq_quanta = uk_attrs->max_hw_wq_quanta;
345 		uresp.max_hw_sq_chunk = uk_attrs->max_hw_sq_chunk;
346 		uresp.max_hw_cq_size = uk_attrs->max_hw_cq_size;
347 		uresp.min_hw_cq_size = uk_attrs->min_hw_cq_size;
348 		uresp.hw_rev = uk_attrs->hw_rev;
349 		uresp.comp_mask |= IRDMA_ALLOC_UCTX_USE_RAW_ATTR;
350 		uresp.min_hw_wq_size = uk_attrs->min_hw_wq_size;
351 		uresp.comp_mask |= IRDMA_ALLOC_UCTX_MIN_HW_WQ_SIZE;
352 		uresp.max_hw_srq_quanta = uk_attrs->max_hw_srq_quanta;
353 		uresp.comp_mask |= IRDMA_ALLOC_UCTX_MAX_HW_SRQ_QUANTA;
354 		if (ib_copy_to_udata(udata, &uresp,
355 				     min(sizeof(uresp), udata->outlen))) {
356 			rdma_user_mmap_entry_remove(ucontext->db_mmap_entry);
357 			return -EFAULT;
358 		}
359 	}
360 
361 	INIT_LIST_HEAD(&ucontext->cq_reg_mem_list);
362 	spin_lock_init(&ucontext->cq_reg_mem_list_lock);
363 	INIT_LIST_HEAD(&ucontext->qp_reg_mem_list);
364 	spin_lock_init(&ucontext->qp_reg_mem_list_lock);
365 	INIT_LIST_HEAD(&ucontext->srq_reg_mem_list);
366 	spin_lock_init(&ucontext->srq_reg_mem_list_lock);
367 
368 	return 0;
369 
370 ver_error:
371 	ibdev_err(&iwdev->ibdev,
372 		  "Invalid userspace driver version detected. Detected version %d, should be %d\n",
373 		  req.userspace_ver, IRDMA_ABI_VER);
374 	return -EINVAL;
375 }
376 
377 /**
378  * irdma_dealloc_ucontext - deallocate the user context data structure
379  * @context: user context created during alloc
380  */
irdma_dealloc_ucontext(struct ib_ucontext * context)381 static void irdma_dealloc_ucontext(struct ib_ucontext *context)
382 {
383 	struct irdma_ucontext *ucontext = to_ucontext(context);
384 
385 	rdma_user_mmap_entry_remove(ucontext->db_mmap_entry);
386 }
387 
388 /**
389  * irdma_alloc_pd - allocate protection domain
390  * @pd: PD pointer
391  * @udata: user data
392  */
irdma_alloc_pd(struct ib_pd * pd,struct ib_udata * udata)393 static int irdma_alloc_pd(struct ib_pd *pd, struct ib_udata *udata)
394 {
395 #define IRDMA_ALLOC_PD_MIN_RESP_LEN offsetofend(struct irdma_alloc_pd_resp, rsvd)
396 	struct irdma_pd *iwpd = to_iwpd(pd);
397 	struct irdma_device *iwdev = to_iwdev(pd->device);
398 	struct irdma_sc_dev *dev = &iwdev->rf->sc_dev;
399 	struct irdma_pci_f *rf = iwdev->rf;
400 	struct irdma_alloc_pd_resp uresp = {};
401 	struct irdma_sc_pd *sc_pd;
402 	u32 pd_id = 0;
403 	int err;
404 
405 	if (udata && udata->outlen < IRDMA_ALLOC_PD_MIN_RESP_LEN)
406 		return -EINVAL;
407 
408 	err = irdma_alloc_rsrc(rf, rf->allocated_pds, rf->max_pd, &pd_id,
409 			       &rf->next_pd);
410 	if (err)
411 		return err;
412 
413 	sc_pd = &iwpd->sc_pd;
414 	if (udata) {
415 		struct irdma_ucontext *ucontext =
416 			rdma_udata_to_drv_context(udata, struct irdma_ucontext,
417 						  ibucontext);
418 		irdma_sc_pd_init(dev, sc_pd, pd_id, ucontext->abi_ver);
419 		uresp.pd_id = pd_id;
420 		if (ib_copy_to_udata(udata, &uresp,
421 				     min(sizeof(uresp), udata->outlen))) {
422 			err = -EFAULT;
423 			goto error;
424 		}
425 	} else {
426 		irdma_sc_pd_init(dev, sc_pd, pd_id, IRDMA_ABI_VER);
427 	}
428 
429 	return 0;
430 error:
431 	irdma_free_rsrc(rf, rf->allocated_pds, pd_id);
432 
433 	return err;
434 }
435 
436 /**
437  * irdma_dealloc_pd - deallocate pd
438  * @ibpd: ptr of pd to be deallocated
439  * @udata: user data
440  */
irdma_dealloc_pd(struct ib_pd * ibpd,struct ib_udata * udata)441 static int irdma_dealloc_pd(struct ib_pd *ibpd, struct ib_udata *udata)
442 {
443 	struct irdma_pd *iwpd = to_iwpd(ibpd);
444 	struct irdma_device *iwdev = to_iwdev(ibpd->device);
445 
446 	irdma_free_rsrc(iwdev->rf, iwdev->rf->allocated_pds, iwpd->sc_pd.pd_id);
447 
448 	return 0;
449 }
450 
451 /**
452  * irdma_get_pbl - Retrieve pbl from a list given a virtual
453  * address
454  * @va: user virtual address
455  * @pbl_list: pbl list to search in (QP's or CQ's)
456  */
irdma_get_pbl(unsigned long va,struct list_head * pbl_list)457 static struct irdma_pbl *irdma_get_pbl(unsigned long va,
458 				       struct list_head *pbl_list)
459 {
460 	struct irdma_pbl *iwpbl;
461 
462 	list_for_each_entry (iwpbl, pbl_list, list) {
463 		if (iwpbl->user_base == va) {
464 			list_del(&iwpbl->list);
465 			iwpbl->on_list = false;
466 			return iwpbl;
467 		}
468 	}
469 
470 	return NULL;
471 }
472 
473 /**
474  * irdma_clean_cqes - clean cq entries for qp
475  * @iwqp: qp ptr (user or kernel)
476  * @iwcq: cq ptr
477  */
irdma_clean_cqes(struct irdma_qp * iwqp,struct irdma_cq * iwcq)478 static void irdma_clean_cqes(struct irdma_qp *iwqp, struct irdma_cq *iwcq)
479 {
480 	struct irdma_cq_uk *ukcq = &iwcq->sc_cq.cq_uk;
481 	unsigned long flags;
482 
483 	spin_lock_irqsave(&iwcq->lock, flags);
484 	irdma_uk_clean_cq(&iwqp->sc_qp.qp_uk, ukcq);
485 	spin_unlock_irqrestore(&iwcq->lock, flags);
486 }
487 
irdma_remove_push_mmap_entries(struct irdma_qp * iwqp)488 static void irdma_remove_push_mmap_entries(struct irdma_qp *iwqp)
489 {
490 	if (iwqp->push_db_mmap_entry) {
491 		rdma_user_mmap_entry_remove(iwqp->push_db_mmap_entry);
492 		iwqp->push_db_mmap_entry = NULL;
493 	}
494 	if (iwqp->push_wqe_mmap_entry) {
495 		rdma_user_mmap_entry_remove(iwqp->push_wqe_mmap_entry);
496 		iwqp->push_wqe_mmap_entry = NULL;
497 	}
498 }
499 
irdma_setup_push_mmap_entries(struct irdma_ucontext * ucontext,struct irdma_qp * iwqp,u64 * push_wqe_mmap_key,u64 * push_db_mmap_key)500 static int irdma_setup_push_mmap_entries(struct irdma_ucontext *ucontext,
501 					 struct irdma_qp *iwqp,
502 					 u64 *push_wqe_mmap_key,
503 					 u64 *push_db_mmap_key)
504 {
505 	struct irdma_device *iwdev = ucontext->iwdev;
506 	u64 rsvd, bar_off;
507 
508 	rsvd = IRDMA_PF_BAR_RSVD;
509 	bar_off = (uintptr_t)iwdev->rf->sc_dev.hw_regs[IRDMA_DB_ADDR_OFFSET];
510 	/* skip over db page */
511 	bar_off += IRDMA_HW_PAGE_SIZE;
512 	/* push wqe page */
513 	bar_off += rsvd + iwqp->sc_qp.push_idx * IRDMA_HW_PAGE_SIZE;
514 	iwqp->push_wqe_mmap_entry = irdma_user_mmap_entry_insert(ucontext,
515 					bar_off, IRDMA_MMAP_IO_WC,
516 					push_wqe_mmap_key);
517 	if (!iwqp->push_wqe_mmap_entry)
518 		return -ENOMEM;
519 
520 	/* push doorbell page */
521 	bar_off += IRDMA_HW_PAGE_SIZE;
522 	iwqp->push_db_mmap_entry = irdma_user_mmap_entry_insert(ucontext,
523 					bar_off, IRDMA_MMAP_IO_NC,
524 					push_db_mmap_key);
525 	if (!iwqp->push_db_mmap_entry) {
526 		rdma_user_mmap_entry_remove(iwqp->push_wqe_mmap_entry);
527 		return -ENOMEM;
528 	}
529 
530 	return 0;
531 }
532 
533 /**
534  * irdma_destroy_qp - destroy qp
535  * @ibqp: qp's ib pointer also to get to device's qp address
536  * @udata: user data
537  */
irdma_destroy_qp(struct ib_qp * ibqp,struct ib_udata * udata)538 static int irdma_destroy_qp(struct ib_qp *ibqp, struct ib_udata *udata)
539 {
540 	struct irdma_qp *iwqp = to_iwqp(ibqp);
541 	struct irdma_device *iwdev = iwqp->iwdev;
542 
543 	iwqp->sc_qp.qp_uk.destroy_pending = true;
544 
545 	if (iwqp->iwarp_state >= IRDMA_QP_STATE_IDLE)
546 		irdma_modify_qp_to_err(&iwqp->sc_qp);
547 
548 	if (!iwqp->user_mode)
549 		cancel_delayed_work_sync(&iwqp->dwork_flush);
550 
551 	if (!iwqp->user_mode) {
552 		if (iwqp->iwscq) {
553 			irdma_clean_cqes(iwqp, iwqp->iwscq);
554 			if (iwqp->iwrcq != iwqp->iwscq)
555 				irdma_clean_cqes(iwqp, iwqp->iwrcq);
556 		}
557 	}
558 
559 	irdma_qp_rem_ref(&iwqp->ibqp);
560 	wait_for_completion(&iwqp->free_qp);
561 	irdma_free_lsmm_rsrc(iwqp);
562 	irdma_cqp_qp_destroy_cmd(&iwdev->rf->sc_dev, &iwqp->sc_qp);
563 
564 	irdma_remove_push_mmap_entries(iwqp);
565 
566 	if (iwqp->sc_qp.qp_uk.qp_id == 1)
567 		iwdev->rf->hwqp1_rsvd = false;
568 	irdma_free_qp_rsrc(iwqp);
569 
570 	return 0;
571 }
572 
573 /**
574  * irdma_setup_virt_qp - setup for allocation of virtual qp
575  * @iwdev: irdma device
576  * @iwqp: qp ptr
577  * @init_info: initialize info to return
578  */
irdma_setup_virt_qp(struct irdma_device * iwdev,struct irdma_qp * iwqp,struct irdma_qp_init_info * init_info)579 static void irdma_setup_virt_qp(struct irdma_device *iwdev,
580 			       struct irdma_qp *iwqp,
581 			       struct irdma_qp_init_info *init_info)
582 {
583 	struct irdma_pbl *iwpbl = iwqp->iwpbl;
584 	struct irdma_qp_mr *qpmr = &iwpbl->qp_mr;
585 
586 	iwqp->page = qpmr->sq_page;
587 	init_info->shadow_area_pa = qpmr->shadow;
588 	if (iwpbl->pbl_allocated) {
589 		init_info->virtual_map = true;
590 		init_info->sq_pa = qpmr->sq_pbl.idx;
591 		/* Need to use contiguous buffer for RQ of QP
592 		 * in case it is associated with SRQ.
593 		 */
594 		init_info->rq_pa = init_info->qp_uk_init_info.srq_uk ?
595 			qpmr->rq_pa : qpmr->rq_pbl.idx;
596 	} else {
597 		init_info->sq_pa = qpmr->sq_pbl.addr;
598 		init_info->rq_pa = qpmr->rq_pbl.addr;
599 	}
600 }
601 
602 /**
603  * irdma_setup_umode_qp - setup sq and rq size in user mode qp
604  * @udata: udata
605  * @iwdev: iwarp device
606  * @iwqp: qp ptr (user or kernel)
607  * @info: initialize info to return
608  * @init_attr: Initial QP create attributes
609  */
irdma_setup_umode_qp(struct ib_udata * udata,struct irdma_device * iwdev,struct irdma_qp * iwqp,struct irdma_qp_init_info * info,struct ib_qp_init_attr * init_attr)610 static int irdma_setup_umode_qp(struct ib_udata *udata,
611 				struct irdma_device *iwdev,
612 				struct irdma_qp *iwqp,
613 				struct irdma_qp_init_info *info,
614 				struct ib_qp_init_attr *init_attr)
615 {
616 	struct irdma_ucontext *ucontext = rdma_udata_to_drv_context(udata,
617 				struct irdma_ucontext, ibucontext);
618 	struct irdma_qp_uk_init_info *ukinfo = &info->qp_uk_init_info;
619 	struct irdma_create_qp_req req;
620 	unsigned long flags;
621 	int ret;
622 
623 	ret = ib_copy_from_udata(&req, udata,
624 				 min(sizeof(req), udata->inlen));
625 	if (ret) {
626 		ibdev_dbg(&iwdev->ibdev, "VERBS: ib_copy_from_data fail\n");
627 		return ret;
628 	}
629 
630 	iwqp->ctx_info.qp_compl_ctx = req.user_compl_ctx;
631 	iwqp->user_mode = 1;
632 	if (req.user_wqe_bufs) {
633 		info->qp_uk_init_info.legacy_mode = ucontext->legacy_mode;
634 		spin_lock_irqsave(&ucontext->qp_reg_mem_list_lock, flags);
635 		iwqp->iwpbl = irdma_get_pbl((unsigned long)req.user_wqe_bufs,
636 					    &ucontext->qp_reg_mem_list);
637 		spin_unlock_irqrestore(&ucontext->qp_reg_mem_list_lock, flags);
638 
639 		if (!iwqp->iwpbl) {
640 			ret = -ENODATA;
641 			ibdev_dbg(&iwdev->ibdev, "VERBS: no pbl info\n");
642 			return ret;
643 		}
644 	}
645 
646 	if (!ucontext->use_raw_attrs) {
647 		/**
648 		 * Maintain backward compat with older ABI which passes sq and
649 		 * rq depth in quanta in cap.max_send_wr and cap.max_recv_wr.
650 		 * There is no way to compute the correct value of
651 		 * iwqp->max_send_wr/max_recv_wr in the kernel.
652 		 */
653 		iwqp->max_send_wr = init_attr->cap.max_send_wr;
654 		iwqp->max_recv_wr = init_attr->cap.max_recv_wr;
655 		ukinfo->sq_size = init_attr->cap.max_send_wr;
656 		ukinfo->rq_size = init_attr->cap.max_recv_wr;
657 		irdma_uk_calc_shift_wq(ukinfo, &ukinfo->sq_shift,
658 				       &ukinfo->rq_shift);
659 	} else {
660 		ret = irdma_uk_calc_depth_shift_sq(ukinfo, &ukinfo->sq_depth,
661 						   &ukinfo->sq_shift);
662 		if (ret)
663 			return ret;
664 
665 		ret = irdma_uk_calc_depth_shift_rq(ukinfo, &ukinfo->rq_depth,
666 						   &ukinfo->rq_shift);
667 		if (ret)
668 			return ret;
669 
670 		iwqp->max_send_wr =
671 			(ukinfo->sq_depth - IRDMA_SQ_RSVD) >> ukinfo->sq_shift;
672 		iwqp->max_recv_wr =
673 			(ukinfo->rq_depth - IRDMA_RQ_RSVD) >> ukinfo->rq_shift;
674 		ukinfo->sq_size = ukinfo->sq_depth >> ukinfo->sq_shift;
675 		ukinfo->rq_size = ukinfo->rq_depth >> ukinfo->rq_shift;
676 	}
677 
678 	irdma_setup_virt_qp(iwdev, iwqp, info);
679 
680 	return 0;
681 }
682 
683 /**
684  * irdma_setup_kmode_qp - setup initialization for kernel mode qp
685  * @iwdev: iwarp device
686  * @iwqp: qp ptr (user or kernel)
687  * @info: initialize info to return
688  * @init_attr: Initial QP create attributes
689  */
irdma_setup_kmode_qp(struct irdma_device * iwdev,struct irdma_qp * iwqp,struct irdma_qp_init_info * info,struct ib_qp_init_attr * init_attr)690 static int irdma_setup_kmode_qp(struct irdma_device *iwdev,
691 				struct irdma_qp *iwqp,
692 				struct irdma_qp_init_info *info,
693 				struct ib_qp_init_attr *init_attr)
694 {
695 	struct irdma_dma_mem *mem = &iwqp->kqp.dma_mem;
696 	u32 size;
697 	int status;
698 	struct irdma_qp_uk_init_info *ukinfo = &info->qp_uk_init_info;
699 
700 	status = irdma_uk_calc_depth_shift_sq(ukinfo, &ukinfo->sq_depth,
701 					      &ukinfo->sq_shift);
702 	if (status)
703 		return status;
704 
705 	status = irdma_uk_calc_depth_shift_rq(ukinfo, &ukinfo->rq_depth,
706 					      &ukinfo->rq_shift);
707 	if (status)
708 		return status;
709 
710 	iwqp->kqp.sq_wrid_mem =
711 		kcalloc(ukinfo->sq_depth, sizeof(*iwqp->kqp.sq_wrid_mem), GFP_KERNEL);
712 	if (!iwqp->kqp.sq_wrid_mem)
713 		return -ENOMEM;
714 
715 	iwqp->kqp.rq_wrid_mem =
716 		kcalloc(ukinfo->rq_depth, sizeof(*iwqp->kqp.rq_wrid_mem), GFP_KERNEL);
717 
718 	if (!iwqp->kqp.rq_wrid_mem) {
719 		kfree(iwqp->kqp.sq_wrid_mem);
720 		iwqp->kqp.sq_wrid_mem = NULL;
721 		return -ENOMEM;
722 	}
723 
724 	ukinfo->sq_wrtrk_array = iwqp->kqp.sq_wrid_mem;
725 	ukinfo->rq_wrid_array = iwqp->kqp.rq_wrid_mem;
726 
727 	size = (ukinfo->sq_depth + ukinfo->rq_depth) * IRDMA_QP_WQE_MIN_SIZE;
728 	size += (IRDMA_SHADOW_AREA_SIZE << 3);
729 
730 	mem->size = ALIGN(size, 256);
731 	mem->va = dma_alloc_coherent(iwdev->rf->hw.device, mem->size,
732 				     &mem->pa, GFP_KERNEL);
733 	if (!mem->va) {
734 		kfree(iwqp->kqp.sq_wrid_mem);
735 		iwqp->kqp.sq_wrid_mem = NULL;
736 		kfree(iwqp->kqp.rq_wrid_mem);
737 		iwqp->kqp.rq_wrid_mem = NULL;
738 		return -ENOMEM;
739 	}
740 
741 	ukinfo->sq = mem->va;
742 	info->sq_pa = mem->pa;
743 	ukinfo->rq = &ukinfo->sq[ukinfo->sq_depth];
744 	info->rq_pa = info->sq_pa + (ukinfo->sq_depth * IRDMA_QP_WQE_MIN_SIZE);
745 	ukinfo->shadow_area = ukinfo->rq[ukinfo->rq_depth].elem;
746 	info->shadow_area_pa =
747 		info->rq_pa + (ukinfo->rq_depth * IRDMA_QP_WQE_MIN_SIZE);
748 	ukinfo->sq_size = ukinfo->sq_depth >> ukinfo->sq_shift;
749 	ukinfo->rq_size = ukinfo->rq_depth >> ukinfo->rq_shift;
750 	ukinfo->qp_id = info->qp_uk_init_info.qp_id;
751 
752 	iwqp->max_send_wr = (ukinfo->sq_depth - IRDMA_SQ_RSVD) >> ukinfo->sq_shift;
753 	iwqp->max_recv_wr = (ukinfo->rq_depth - IRDMA_RQ_RSVD) >> ukinfo->rq_shift;
754 	init_attr->cap.max_send_wr = iwqp->max_send_wr;
755 	init_attr->cap.max_recv_wr = iwqp->max_recv_wr;
756 
757 	return 0;
758 }
759 
irdma_cqp_create_qp_cmd(struct irdma_qp * iwqp)760 static int irdma_cqp_create_qp_cmd(struct irdma_qp *iwqp)
761 {
762 	struct irdma_pci_f *rf = iwqp->iwdev->rf;
763 	struct irdma_cqp_request *cqp_request;
764 	struct cqp_cmds_info *cqp_info;
765 	struct irdma_create_qp_info *qp_info;
766 	int status;
767 
768 	cqp_request = irdma_alloc_and_get_cqp_request(&rf->cqp, true);
769 	if (!cqp_request)
770 		return -ENOMEM;
771 
772 	cqp_info = &cqp_request->info;
773 	qp_info = &cqp_request->info.in.u.qp_create.info;
774 	memset(qp_info, 0, sizeof(*qp_info));
775 	qp_info->mac_valid = true;
776 	qp_info->cq_num_valid = true;
777 	qp_info->next_iwarp_state = IRDMA_QP_STATE_IDLE;
778 
779 	cqp_info->cqp_cmd = IRDMA_OP_QP_CREATE;
780 	cqp_info->post_sq = 1;
781 	cqp_info->in.u.qp_create.qp = &iwqp->sc_qp;
782 	cqp_info->in.u.qp_create.scratch = (uintptr_t)cqp_request;
783 	status = irdma_handle_cqp_op(rf, cqp_request);
784 	irdma_put_cqp_request(&rf->cqp, cqp_request);
785 
786 	return status;
787 }
788 
irdma_roce_fill_and_set_qpctx_info(struct irdma_qp * iwqp,struct irdma_qp_host_ctx_info * ctx_info)789 static void irdma_roce_fill_and_set_qpctx_info(struct irdma_qp *iwqp,
790 					       struct irdma_qp_host_ctx_info *ctx_info)
791 {
792 	struct irdma_device *iwdev = iwqp->iwdev;
793 	struct irdma_sc_dev *dev = &iwdev->rf->sc_dev;
794 	struct irdma_roce_offload_info *roce_info;
795 	struct irdma_udp_offload_info *udp_info;
796 
797 	udp_info = &iwqp->udp_info;
798 	udp_info->snd_mss = ib_mtu_enum_to_int(ib_mtu_int_to_enum(iwdev->vsi.mtu));
799 	udp_info->cwnd = iwdev->roce_cwnd;
800 	udp_info->rexmit_thresh = 2;
801 	udp_info->rnr_nak_thresh = 2;
802 	udp_info->src_port = 0xc000;
803 	udp_info->dst_port = ROCE_V2_UDP_DPORT;
804 	roce_info = &iwqp->roce_info;
805 	ether_addr_copy(roce_info->mac_addr, iwdev->netdev->dev_addr);
806 
807 	if (iwqp->ibqp.qp_type == IB_QPT_GSI && iwqp->ibqp.qp_num != 1)
808 		roce_info->is_qp1 = true;
809 	roce_info->rd_en = true;
810 	roce_info->wr_rdresp_en = true;
811 	if (dev->hw_attrs.uk_attrs.hw_rev >= IRDMA_GEN_3)
812 		roce_info->bind_en = true;
813 	roce_info->dcqcn_en = false;
814 	roce_info->rtomin = 5;
815 
816 	roce_info->ack_credits = iwdev->roce_ackcreds;
817 	roce_info->ird_size = dev->hw_attrs.max_hw_ird;
818 	roce_info->ord_size = dev->hw_attrs.max_hw_ord;
819 
820 	if (!iwqp->user_mode) {
821 		roce_info->priv_mode_en = true;
822 		roce_info->fast_reg_en = true;
823 		roce_info->udprivcq_en = true;
824 	}
825 	roce_info->roce_tver = 0;
826 
827 	ctx_info->roce_info = &iwqp->roce_info;
828 	ctx_info->udp_info = &iwqp->udp_info;
829 	irdma_sc_qp_setctx_roce(&iwqp->sc_qp, iwqp->host_ctx.va, ctx_info);
830 }
831 
irdma_iw_fill_and_set_qpctx_info(struct irdma_qp * iwqp,struct irdma_qp_host_ctx_info * ctx_info)832 static void irdma_iw_fill_and_set_qpctx_info(struct irdma_qp *iwqp,
833 					     struct irdma_qp_host_ctx_info *ctx_info)
834 {
835 	struct irdma_device *iwdev = iwqp->iwdev;
836 	struct irdma_sc_dev *dev = &iwdev->rf->sc_dev;
837 	struct irdma_iwarp_offload_info *iwarp_info;
838 
839 	iwarp_info = &iwqp->iwarp_info;
840 	ether_addr_copy(iwarp_info->mac_addr, iwdev->netdev->dev_addr);
841 	iwarp_info->rd_en = true;
842 	iwarp_info->wr_rdresp_en = true;
843 	iwarp_info->ecn_en = true;
844 	iwarp_info->rtomin = 5;
845 
846 	if (dev->hw_attrs.uk_attrs.hw_rev >= IRDMA_GEN_2)
847 		iwarp_info->ib_rd_en = true;
848 	if (!iwqp->user_mode) {
849 		iwarp_info->priv_mode_en = true;
850 		iwarp_info->fast_reg_en = true;
851 	}
852 	iwarp_info->ddp_ver = 1;
853 	iwarp_info->rdmap_ver = 1;
854 
855 	ctx_info->iwarp_info = &iwqp->iwarp_info;
856 	ctx_info->iwarp_info_valid = true;
857 	irdma_sc_qp_setctx(&iwqp->sc_qp, iwqp->host_ctx.va, ctx_info);
858 	ctx_info->iwarp_info_valid = false;
859 }
860 
irdma_validate_qp_attrs(struct ib_qp_init_attr * init_attr,struct irdma_device * iwdev)861 static int irdma_validate_qp_attrs(struct ib_qp_init_attr *init_attr,
862 				   struct irdma_device *iwdev)
863 {
864 	struct irdma_sc_dev *dev = &iwdev->rf->sc_dev;
865 	struct irdma_uk_attrs *uk_attrs = &dev->hw_attrs.uk_attrs;
866 
867 	if (init_attr->create_flags)
868 		return -EOPNOTSUPP;
869 
870 	if (init_attr->cap.max_inline_data > uk_attrs->max_hw_inline ||
871 	    init_attr->cap.max_send_sge > uk_attrs->max_hw_wq_frags ||
872 	    init_attr->cap.max_recv_sge > uk_attrs->max_hw_wq_frags ||
873 	    init_attr->cap.max_send_wr > uk_attrs->max_hw_wq_quanta ||
874 	    init_attr->cap.max_recv_wr > uk_attrs->max_hw_rq_quanta)
875 		return -EINVAL;
876 
877 	if (rdma_protocol_roce(&iwdev->ibdev, 1)) {
878 		if (init_attr->qp_type != IB_QPT_RC &&
879 		    init_attr->qp_type != IB_QPT_UD &&
880 		    init_attr->qp_type != IB_QPT_GSI)
881 			return -EOPNOTSUPP;
882 	} else {
883 		if (init_attr->qp_type != IB_QPT_RC)
884 			return -EOPNOTSUPP;
885 	}
886 
887 	return 0;
888 }
889 
irdma_flush_worker(struct work_struct * work)890 static void irdma_flush_worker(struct work_struct *work)
891 {
892 	struct delayed_work *dwork = to_delayed_work(work);
893 	struct irdma_qp *iwqp = container_of(dwork, struct irdma_qp, dwork_flush);
894 
895 	irdma_generate_flush_completions(iwqp);
896 }
897 
irdma_setup_gsi_qp_rsrc(struct irdma_qp * iwqp,u32 * qp_num)898 static int irdma_setup_gsi_qp_rsrc(struct irdma_qp *iwqp, u32 *qp_num)
899 {
900 	struct irdma_device *iwdev = iwqp->iwdev;
901 	struct irdma_pci_f *rf = iwdev->rf;
902 	unsigned long flags;
903 	int ret;
904 
905 	if (rf->rdma_ver <= IRDMA_GEN_2) {
906 		*qp_num = 1;
907 		return 0;
908 	}
909 
910 	spin_lock_irqsave(&rf->rsrc_lock, flags);
911 	if (!rf->hwqp1_rsvd) {
912 		*qp_num = 1;
913 		rf->hwqp1_rsvd = true;
914 		spin_unlock_irqrestore(&rf->rsrc_lock, flags);
915 	} else {
916 		spin_unlock_irqrestore(&rf->rsrc_lock, flags);
917 		ret = irdma_alloc_rsrc(rf, rf->allocated_qps, rf->max_qp,
918 				       qp_num, &rf->next_qp);
919 		if (ret)
920 			return ret;
921 	}
922 
923 	ret = irdma_vchnl_req_add_vport(&rf->sc_dev, iwdev->vport_id, *qp_num,
924 					(&iwdev->vsi)->qos);
925 	if (ret) {
926 		if (*qp_num != 1) {
927 			irdma_free_rsrc(rf, rf->allocated_qps, *qp_num);
928 		} else {
929 			spin_lock_irqsave(&rf->rsrc_lock, flags);
930 			rf->hwqp1_rsvd = false;
931 			spin_unlock_irqrestore(&rf->rsrc_lock, flags);
932 		}
933 		return ret;
934 	}
935 
936 	return 0;
937 }
938 
939 /**
940  * irdma_create_qp - create qp
941  * @ibqp: ptr of qp
942  * @init_attr: attributes for qp
943  * @udata: user data for create qp
944  */
irdma_create_qp(struct ib_qp * ibqp,struct ib_qp_init_attr * init_attr,struct ib_udata * udata)945 static int irdma_create_qp(struct ib_qp *ibqp,
946 			   struct ib_qp_init_attr *init_attr,
947 			   struct ib_udata *udata)
948 {
949 #define IRDMA_CREATE_QP_MIN_REQ_LEN offsetofend(struct irdma_create_qp_req, user_compl_ctx)
950 #define IRDMA_CREATE_QP_MIN_RESP_LEN offsetofend(struct irdma_create_qp_resp, rsvd)
951 	struct ib_pd *ibpd = ibqp->pd;
952 	struct irdma_pd *iwpd = to_iwpd(ibpd);
953 	struct irdma_device *iwdev = to_iwdev(ibpd->device);
954 	struct irdma_pci_f *rf = iwdev->rf;
955 	struct irdma_qp *iwqp = to_iwqp(ibqp);
956 	struct irdma_create_qp_resp uresp = {};
957 	u32 qp_num = 0;
958 	int err_code;
959 	struct irdma_sc_qp *qp;
960 	struct irdma_sc_dev *dev = &rf->sc_dev;
961 	struct irdma_uk_attrs *uk_attrs = &dev->hw_attrs.uk_attrs;
962 	struct irdma_qp_init_info init_info = {};
963 	struct irdma_qp_host_ctx_info *ctx_info;
964 	struct irdma_srq *iwsrq;
965 	bool srq_valid = false;
966 	u32 srq_id = 0;
967 
968 	if (init_attr->srq) {
969 		iwsrq = to_iwsrq(init_attr->srq);
970 		srq_valid = true;
971 		srq_id = iwsrq->srq_num;
972 		init_attr->cap.max_recv_sge = uk_attrs->max_hw_wq_frags;
973 		init_attr->cap.max_recv_wr = 4;
974 		init_info.qp_uk_init_info.srq_uk = &iwsrq->sc_srq.srq_uk;
975 	}
976 
977 	err_code = irdma_validate_qp_attrs(init_attr, iwdev);
978 	if (err_code)
979 		return err_code;
980 
981 	if (udata && (udata->inlen < IRDMA_CREATE_QP_MIN_REQ_LEN ||
982 		      udata->outlen < IRDMA_CREATE_QP_MIN_RESP_LEN))
983 		return -EINVAL;
984 
985 	init_info.vsi = &iwdev->vsi;
986 	init_info.qp_uk_init_info.uk_attrs = uk_attrs;
987 	init_info.qp_uk_init_info.sq_size = init_attr->cap.max_send_wr;
988 	init_info.qp_uk_init_info.rq_size = init_attr->cap.max_recv_wr;
989 	init_info.qp_uk_init_info.max_sq_frag_cnt = init_attr->cap.max_send_sge;
990 	init_info.qp_uk_init_info.max_rq_frag_cnt = init_attr->cap.max_recv_sge;
991 	init_info.qp_uk_init_info.max_inline_data = init_attr->cap.max_inline_data;
992 
993 	qp = &iwqp->sc_qp;
994 	qp->qp_uk.back_qp = iwqp;
995 	qp->push_idx = IRDMA_INVALID_PUSH_PAGE_INDEX;
996 
997 	iwqp->iwdev = iwdev;
998 	iwqp->q2_ctx_mem.size = ALIGN(IRDMA_Q2_BUF_SIZE + IRDMA_QP_CTX_SIZE,
999 				      256);
1000 	iwqp->q2_ctx_mem.va = dma_alloc_coherent(dev->hw->device,
1001 						 iwqp->q2_ctx_mem.size,
1002 						 &iwqp->q2_ctx_mem.pa,
1003 						 GFP_KERNEL);
1004 	if (!iwqp->q2_ctx_mem.va)
1005 		return -ENOMEM;
1006 
1007 	init_info.q2 = iwqp->q2_ctx_mem.va;
1008 	init_info.q2_pa = iwqp->q2_ctx_mem.pa;
1009 	init_info.host_ctx = (__le64 *)(init_info.q2 + IRDMA_Q2_BUF_SIZE);
1010 	init_info.host_ctx_pa = init_info.q2_pa + IRDMA_Q2_BUF_SIZE;
1011 
1012 	if (init_attr->qp_type == IB_QPT_GSI) {
1013 		err_code = irdma_setup_gsi_qp_rsrc(iwqp, &qp_num);
1014 		if (err_code)
1015 			goto error;
1016 		iwqp->ibqp.qp_num = 1;
1017 	} else {
1018 		err_code = irdma_alloc_rsrc(rf, rf->allocated_qps, rf->max_qp,
1019 					    &qp_num, &rf->next_qp);
1020 		if (err_code)
1021 			goto error;
1022 		iwqp->ibqp.qp_num = qp_num;
1023 	}
1024 
1025 	iwqp->iwpd = iwpd;
1026 	qp = &iwqp->sc_qp;
1027 	iwqp->iwscq = to_iwcq(init_attr->send_cq);
1028 	iwqp->iwrcq = to_iwcq(init_attr->recv_cq);
1029 	iwqp->host_ctx.va = init_info.host_ctx;
1030 	iwqp->host_ctx.pa = init_info.host_ctx_pa;
1031 	iwqp->host_ctx.size = IRDMA_QP_CTX_SIZE;
1032 
1033 	init_info.pd = &iwpd->sc_pd;
1034 	init_info.qp_uk_init_info.qp_id = qp_num;
1035 	if (!rdma_protocol_roce(&iwdev->ibdev, 1))
1036 		init_info.qp_uk_init_info.first_sq_wq = 1;
1037 	iwqp->ctx_info.qp_compl_ctx = (uintptr_t)qp;
1038 	init_waitqueue_head(&iwqp->waitq);
1039 	init_waitqueue_head(&iwqp->mod_qp_waitq);
1040 
1041 	if (udata) {
1042 		init_info.qp_uk_init_info.abi_ver = iwpd->sc_pd.abi_ver;
1043 		err_code = irdma_setup_umode_qp(udata, iwdev, iwqp, &init_info,
1044 						init_attr);
1045 	} else {
1046 		INIT_DELAYED_WORK(&iwqp->dwork_flush, irdma_flush_worker);
1047 		init_info.qp_uk_init_info.abi_ver = IRDMA_ABI_VER;
1048 		err_code = irdma_setup_kmode_qp(iwdev, iwqp, &init_info, init_attr);
1049 	}
1050 
1051 	if (err_code) {
1052 		ibdev_dbg(&iwdev->ibdev, "VERBS: setup qp failed\n");
1053 		goto error;
1054 	}
1055 
1056 	if (rdma_protocol_roce(&iwdev->ibdev, 1)) {
1057 		if (init_attr->qp_type == IB_QPT_RC) {
1058 			init_info.qp_uk_init_info.type = IRDMA_QP_TYPE_ROCE_RC;
1059 			init_info.qp_uk_init_info.qp_caps = IRDMA_SEND_WITH_IMM |
1060 							    IRDMA_WRITE_WITH_IMM |
1061 							    IRDMA_ROCE;
1062 		} else {
1063 			init_info.qp_uk_init_info.type = IRDMA_QP_TYPE_ROCE_UD;
1064 			init_info.qp_uk_init_info.qp_caps = IRDMA_SEND_WITH_IMM |
1065 							    IRDMA_ROCE;
1066 		}
1067 	} else {
1068 		init_info.qp_uk_init_info.type = IRDMA_QP_TYPE_IWARP;
1069 		init_info.qp_uk_init_info.qp_caps = IRDMA_WRITE_WITH_IMM;
1070 	}
1071 
1072 	if (dev->hw_attrs.uk_attrs.hw_rev > IRDMA_GEN_1)
1073 		init_info.qp_uk_init_info.qp_caps |= IRDMA_PUSH_MODE;
1074 
1075 	err_code = irdma_sc_qp_init(qp, &init_info);
1076 	if (err_code) {
1077 		ibdev_dbg(&iwdev->ibdev, "VERBS: qp_init fail\n");
1078 		goto error;
1079 	}
1080 
1081 	ctx_info = &iwqp->ctx_info;
1082 	ctx_info->srq_valid = srq_valid;
1083 	ctx_info->srq_id = srq_id;
1084 	ctx_info->send_cq_num = iwqp->iwscq->sc_cq.cq_uk.cq_id;
1085 	ctx_info->rcv_cq_num = iwqp->iwrcq->sc_cq.cq_uk.cq_id;
1086 
1087 	if (rdma_protocol_roce(&iwdev->ibdev, 1)) {
1088 		if (dev->ws_add(&iwdev->vsi, 0)) {
1089 			irdma_cqp_qp_destroy_cmd(&rf->sc_dev, &iwqp->sc_qp);
1090 			err_code = -EINVAL;
1091 			goto error;
1092 		}
1093 		irdma_qp_add_qos(&iwqp->sc_qp);
1094 		irdma_roce_fill_and_set_qpctx_info(iwqp, ctx_info);
1095 	} else {
1096 		irdma_iw_fill_and_set_qpctx_info(iwqp, ctx_info);
1097 	}
1098 
1099 	err_code = irdma_cqp_create_qp_cmd(iwqp);
1100 	if (err_code)
1101 		goto error;
1102 
1103 	refcount_set(&iwqp->refcnt, 1);
1104 	spin_lock_init(&iwqp->lock);
1105 	spin_lock_init(&iwqp->sc_qp.pfpdu.lock);
1106 	iwqp->sig_all = init_attr->sq_sig_type == IB_SIGNAL_ALL_WR;
1107 	rf->qp_table[qp_num] = iwqp;
1108 
1109 	if (udata) {
1110 		/* GEN_1 legacy support with libi40iw does not have expanded uresp struct */
1111 		if (udata->outlen < sizeof(uresp)) {
1112 			uresp.lsmm = 1;
1113 			uresp.push_idx = IRDMA_INVALID_PUSH_PAGE_INDEX_GEN_1;
1114 		} else {
1115 			if (rdma_protocol_iwarp(&iwdev->ibdev, 1))
1116 				uresp.lsmm = 1;
1117 		}
1118 		uresp.actual_sq_size = init_info.qp_uk_init_info.sq_size;
1119 		uresp.actual_rq_size = init_info.qp_uk_init_info.rq_size;
1120 		uresp.qp_id = qp_num;
1121 		uresp.qp_caps = qp->qp_uk.qp_caps;
1122 
1123 		err_code = ib_copy_to_udata(udata, &uresp,
1124 					    min(sizeof(uresp), udata->outlen));
1125 		if (err_code) {
1126 			ibdev_dbg(&iwdev->ibdev, "VERBS: copy_to_udata failed\n");
1127 			irdma_destroy_qp(&iwqp->ibqp, udata);
1128 			return err_code;
1129 		}
1130 	}
1131 
1132 	init_completion(&iwqp->free_qp);
1133 	return 0;
1134 
1135 error:
1136 	irdma_free_qp_rsrc(iwqp);
1137 	return err_code;
1138 }
1139 
irdma_get_ib_acc_flags(struct irdma_qp * iwqp)1140 static int irdma_get_ib_acc_flags(struct irdma_qp *iwqp)
1141 {
1142 	int acc_flags = 0;
1143 
1144 	if (rdma_protocol_roce(iwqp->ibqp.device, 1)) {
1145 		if (iwqp->roce_info.wr_rdresp_en) {
1146 			acc_flags |= IB_ACCESS_LOCAL_WRITE;
1147 			acc_flags |= IB_ACCESS_REMOTE_WRITE;
1148 		}
1149 		if (iwqp->roce_info.rd_en)
1150 			acc_flags |= IB_ACCESS_REMOTE_READ;
1151 		if (iwqp->roce_info.bind_en)
1152 			acc_flags |= IB_ACCESS_MW_BIND;
1153 		if (iwqp->ctx_info.remote_atomics_en)
1154 			acc_flags |= IB_ACCESS_REMOTE_ATOMIC;
1155 	} else {
1156 		if (iwqp->iwarp_info.wr_rdresp_en) {
1157 			acc_flags |= IB_ACCESS_LOCAL_WRITE;
1158 			acc_flags |= IB_ACCESS_REMOTE_WRITE;
1159 		}
1160 		if (iwqp->iwarp_info.rd_en)
1161 			acc_flags |= IB_ACCESS_REMOTE_READ;
1162 		if (iwqp->ctx_info.remote_atomics_en)
1163 			acc_flags |= IB_ACCESS_REMOTE_ATOMIC;
1164 	}
1165 	return acc_flags;
1166 }
1167 
1168 /**
1169  * irdma_query_qp - query qp attributes
1170  * @ibqp: qp pointer
1171  * @attr: attributes pointer
1172  * @attr_mask: Not used
1173  * @init_attr: qp attributes to return
1174  */
irdma_query_qp(struct ib_qp * ibqp,struct ib_qp_attr * attr,int attr_mask,struct ib_qp_init_attr * init_attr)1175 static int irdma_query_qp(struct ib_qp *ibqp, struct ib_qp_attr *attr,
1176 			  int attr_mask, struct ib_qp_init_attr *init_attr)
1177 {
1178 	struct irdma_qp *iwqp = to_iwqp(ibqp);
1179 	struct irdma_sc_qp *qp = &iwqp->sc_qp;
1180 
1181 	memset(attr, 0, sizeof(*attr));
1182 	memset(init_attr, 0, sizeof(*init_attr));
1183 
1184 	attr->qp_state = iwqp->ibqp_state;
1185 	attr->cur_qp_state = iwqp->ibqp_state;
1186 	attr->cap.max_send_wr = iwqp->max_send_wr;
1187 	attr->cap.max_recv_wr = iwqp->max_recv_wr;
1188 	attr->cap.max_inline_data = qp->qp_uk.max_inline_data;
1189 	attr->cap.max_send_sge = qp->qp_uk.max_sq_frag_cnt;
1190 	attr->cap.max_recv_sge = qp->qp_uk.max_rq_frag_cnt;
1191 	attr->qp_access_flags = irdma_get_ib_acc_flags(iwqp);
1192 	attr->port_num = 1;
1193 	if (rdma_protocol_roce(ibqp->device, 1)) {
1194 		attr->path_mtu = ib_mtu_int_to_enum(iwqp->udp_info.snd_mss);
1195 		attr->qkey = iwqp->roce_info.qkey;
1196 		attr->rq_psn = iwqp->udp_info.epsn;
1197 		attr->sq_psn = iwqp->udp_info.psn_nxt;
1198 		attr->dest_qp_num = iwqp->roce_info.dest_qp;
1199 		attr->pkey_index = iwqp->roce_info.p_key;
1200 		attr->retry_cnt = iwqp->udp_info.rexmit_thresh;
1201 		attr->rnr_retry = iwqp->udp_info.rnr_nak_thresh;
1202 		attr->min_rnr_timer = iwqp->udp_info.min_rnr_timer;
1203 		attr->max_rd_atomic = iwqp->roce_info.ord_size;
1204 		attr->max_dest_rd_atomic = iwqp->roce_info.ird_size;
1205 	}
1206 
1207 	init_attr->event_handler = iwqp->ibqp.event_handler;
1208 	init_attr->qp_context = iwqp->ibqp.qp_context;
1209 	init_attr->send_cq = iwqp->ibqp.send_cq;
1210 	init_attr->recv_cq = iwqp->ibqp.recv_cq;
1211 	init_attr->srq = iwqp->ibqp.srq;
1212 	init_attr->cap = attr->cap;
1213 
1214 	return 0;
1215 }
1216 
1217 /**
1218  * irdma_query_pkey - Query partition key
1219  * @ibdev: device pointer from stack
1220  * @port: port number
1221  * @index: index of pkey
1222  * @pkey: pointer to store the pkey
1223  */
irdma_query_pkey(struct ib_device * ibdev,u32 port,u16 index,u16 * pkey)1224 static int irdma_query_pkey(struct ib_device *ibdev, u32 port, u16 index,
1225 			    u16 *pkey)
1226 {
1227 	if (index >= IRDMA_PKEY_TBL_SZ)
1228 		return -EINVAL;
1229 
1230 	*pkey = IRDMA_DEFAULT_PKEY;
1231 	return 0;
1232 }
1233 
irdma_roce_get_vlan_prio(const struct ib_gid_attr * attr,u8 prio)1234 static u8 irdma_roce_get_vlan_prio(const struct ib_gid_attr *attr, u8 prio)
1235 {
1236 	struct net_device *ndev;
1237 
1238 	rcu_read_lock();
1239 	ndev = rcu_dereference(attr->ndev);
1240 	if (!ndev)
1241 		goto exit;
1242 	if (is_vlan_dev(ndev)) {
1243 		u16 vlan_qos = vlan_dev_get_egress_qos_mask(ndev, prio);
1244 
1245 		prio = (vlan_qos & VLAN_PRIO_MASK) >> VLAN_PRIO_SHIFT;
1246 	}
1247 exit:
1248 	rcu_read_unlock();
1249 	return prio;
1250 }
1251 
irdma_wait_for_suspend(struct irdma_qp * iwqp)1252 static int irdma_wait_for_suspend(struct irdma_qp *iwqp)
1253 {
1254 	if (!wait_event_timeout(iwqp->iwdev->suspend_wq,
1255 				!iwqp->suspend_pending,
1256 				msecs_to_jiffies(IRDMA_EVENT_TIMEOUT_MS))) {
1257 		iwqp->suspend_pending = false;
1258 		ibdev_warn(&iwqp->iwdev->ibdev,
1259 			   "modify_qp timed out waiting for suspend. qp_id = %d, last_ae = 0x%x\n",
1260 			   iwqp->ibqp.qp_num, iwqp->last_aeq);
1261 		return -EBUSY;
1262 	}
1263 
1264 	return 0;
1265 }
1266 
1267 /**
1268  * irdma_modify_qp_roce - modify qp request
1269  * @ibqp: qp's pointer for modify
1270  * @attr: access attributes
1271  * @attr_mask: state mask
1272  * @udata: user data
1273  */
irdma_modify_qp_roce(struct ib_qp * ibqp,struct ib_qp_attr * attr,int attr_mask,struct ib_udata * udata)1274 int irdma_modify_qp_roce(struct ib_qp *ibqp, struct ib_qp_attr *attr,
1275 			 int attr_mask, struct ib_udata *udata)
1276 {
1277 #define IRDMA_MODIFY_QP_MIN_REQ_LEN offsetofend(struct irdma_modify_qp_req, rq_flush)
1278 #define IRDMA_MODIFY_QP_MIN_RESP_LEN offsetofend(struct irdma_modify_qp_resp, push_valid)
1279 	struct irdma_pd *iwpd = to_iwpd(ibqp->pd);
1280 	struct irdma_qp *iwqp = to_iwqp(ibqp);
1281 	struct irdma_device *iwdev = iwqp->iwdev;
1282 	struct irdma_sc_dev *dev = &iwdev->rf->sc_dev;
1283 	struct irdma_qp_host_ctx_info *ctx_info;
1284 	struct irdma_roce_offload_info *roce_info;
1285 	struct irdma_udp_offload_info *udp_info;
1286 	struct irdma_modify_qp_info info = {};
1287 	struct irdma_modify_qp_resp uresp = {};
1288 	struct irdma_modify_qp_req ureq = {};
1289 	unsigned long flags;
1290 	u8 issue_modify_qp = 0;
1291 	int ret = 0;
1292 
1293 	ctx_info = &iwqp->ctx_info;
1294 	roce_info = &iwqp->roce_info;
1295 	udp_info = &iwqp->udp_info;
1296 
1297 	if (udata) {
1298 		/* udata inlen/outlen can be 0 when supporting legacy libi40iw */
1299 		if ((udata->inlen && udata->inlen < IRDMA_MODIFY_QP_MIN_REQ_LEN) ||
1300 		    (udata->outlen && udata->outlen < IRDMA_MODIFY_QP_MIN_RESP_LEN))
1301 			return -EINVAL;
1302 	}
1303 
1304 	if (attr_mask & ~IB_QP_ATTR_STANDARD_BITS)
1305 		return -EOPNOTSUPP;
1306 
1307 	if (attr_mask & IB_QP_DEST_QPN)
1308 		roce_info->dest_qp = attr->dest_qp_num;
1309 
1310 	if (attr_mask & IB_QP_PKEY_INDEX) {
1311 		ret = irdma_query_pkey(ibqp->device, 0, attr->pkey_index,
1312 				       &roce_info->p_key);
1313 		if (ret)
1314 			return ret;
1315 	}
1316 
1317 	if (attr_mask & IB_QP_QKEY)
1318 		roce_info->qkey = attr->qkey;
1319 
1320 	if (attr_mask & IB_QP_PATH_MTU)
1321 		udp_info->snd_mss = ib_mtu_enum_to_int(attr->path_mtu);
1322 
1323 	if (attr_mask & IB_QP_SQ_PSN) {
1324 		udp_info->psn_nxt = attr->sq_psn;
1325 		udp_info->lsn =  0xffff;
1326 		udp_info->psn_una = attr->sq_psn;
1327 		udp_info->psn_max = attr->sq_psn;
1328 	}
1329 
1330 	if (attr_mask & IB_QP_RQ_PSN)
1331 		udp_info->epsn = attr->rq_psn;
1332 
1333 	if (attr_mask & IB_QP_RNR_RETRY)
1334 		udp_info->rnr_nak_thresh = attr->rnr_retry;
1335 
1336 	if (attr_mask & IB_QP_MIN_RNR_TIMER &&
1337 	    dev->hw_attrs.uk_attrs.hw_rev >= IRDMA_GEN_3)
1338 		udp_info->min_rnr_timer = attr->min_rnr_timer;
1339 
1340 	if (attr_mask & IB_QP_RETRY_CNT)
1341 		udp_info->rexmit_thresh = attr->retry_cnt;
1342 
1343 	ctx_info->roce_info->pd_id = iwpd->sc_pd.pd_id;
1344 
1345 	if (attr_mask & IB_QP_AV) {
1346 		struct irdma_av *av = &iwqp->roce_ah.av;
1347 		const struct ib_gid_attr *sgid_attr =
1348 				attr->ah_attr.grh.sgid_attr;
1349 		u16 vlan_id = VLAN_N_VID;
1350 		u32 local_ip[4];
1351 
1352 		memset(&iwqp->roce_ah, 0, sizeof(iwqp->roce_ah));
1353 		if (attr->ah_attr.ah_flags & IB_AH_GRH) {
1354 			udp_info->ttl = attr->ah_attr.grh.hop_limit;
1355 			udp_info->flow_label = attr->ah_attr.grh.flow_label;
1356 			udp_info->tos = attr->ah_attr.grh.traffic_class;
1357 			udp_info->src_port =
1358 				rdma_get_udp_sport(udp_info->flow_label,
1359 						   ibqp->qp_num,
1360 						   roce_info->dest_qp);
1361 			irdma_qp_rem_qos(&iwqp->sc_qp);
1362 			dev->ws_remove(iwqp->sc_qp.vsi, ctx_info->user_pri);
1363 			if (iwqp->sc_qp.vsi->dscp_mode)
1364 				ctx_info->user_pri =
1365 				iwqp->sc_qp.vsi->dscp_map[irdma_tos2dscp(udp_info->tos)];
1366 			else
1367 				ctx_info->user_pri = rt_tos2priority(udp_info->tos);
1368 		}
1369 		ret = rdma_read_gid_l2_fields(sgid_attr, &vlan_id,
1370 					      ctx_info->roce_info->mac_addr);
1371 		if (ret)
1372 			return ret;
1373 		ctx_info->user_pri = irdma_roce_get_vlan_prio(sgid_attr,
1374 							      ctx_info->user_pri);
1375 		if (dev->ws_add(iwqp->sc_qp.vsi, ctx_info->user_pri))
1376 			return -ENOMEM;
1377 		iwqp->sc_qp.user_pri = ctx_info->user_pri;
1378 		irdma_qp_add_qos(&iwqp->sc_qp);
1379 
1380 		if (vlan_id >= VLAN_N_VID && iwdev->dcb_vlan_mode)
1381 			vlan_id = 0;
1382 		if (vlan_id < VLAN_N_VID) {
1383 			udp_info->insert_vlan_tag = true;
1384 			udp_info->vlan_tag = vlan_id |
1385 				ctx_info->user_pri << VLAN_PRIO_SHIFT;
1386 		} else {
1387 			udp_info->insert_vlan_tag = false;
1388 		}
1389 
1390 		av->attrs = attr->ah_attr;
1391 		rdma_gid2ip((struct sockaddr *)&av->sgid_addr, &sgid_attr->gid);
1392 		rdma_gid2ip((struct sockaddr *)&av->dgid_addr, &attr->ah_attr.grh.dgid);
1393 		av->net_type = rdma_gid_attr_network_type(sgid_attr);
1394 		if (av->net_type == RDMA_NETWORK_IPV6) {
1395 			__be32 *daddr =
1396 				av->dgid_addr.saddr_in6.sin6_addr.in6_u.u6_addr32;
1397 			__be32 *saddr =
1398 				av->sgid_addr.saddr_in6.sin6_addr.in6_u.u6_addr32;
1399 
1400 			irdma_copy_ip_ntohl(&udp_info->dest_ip_addr[0], daddr);
1401 			irdma_copy_ip_ntohl(&udp_info->local_ipaddr[0], saddr);
1402 
1403 			udp_info->ipv4 = false;
1404 			irdma_copy_ip_ntohl(local_ip, daddr);
1405 
1406 		} else if (av->net_type == RDMA_NETWORK_IPV4) {
1407 			__be32 saddr = av->sgid_addr.saddr_in.sin_addr.s_addr;
1408 			__be32 daddr = av->dgid_addr.saddr_in.sin_addr.s_addr;
1409 
1410 			local_ip[0] = ntohl(daddr);
1411 
1412 			udp_info->ipv4 = true;
1413 			udp_info->dest_ip_addr[0] = 0;
1414 			udp_info->dest_ip_addr[1] = 0;
1415 			udp_info->dest_ip_addr[2] = 0;
1416 			udp_info->dest_ip_addr[3] = local_ip[0];
1417 
1418 			udp_info->local_ipaddr[0] = 0;
1419 			udp_info->local_ipaddr[1] = 0;
1420 			udp_info->local_ipaddr[2] = 0;
1421 			udp_info->local_ipaddr[3] = ntohl(saddr);
1422 		}
1423 		udp_info->arp_idx =
1424 			irdma_add_arp(iwdev->rf, local_ip, udp_info->ipv4,
1425 				      attr->ah_attr.roce.dmac);
1426 	}
1427 
1428 	if (attr_mask & IB_QP_MAX_QP_RD_ATOMIC) {
1429 		if (attr->max_rd_atomic > dev->hw_attrs.max_hw_ord) {
1430 			ibdev_err(&iwdev->ibdev,
1431 				  "rd_atomic = %d, above max_hw_ord=%d\n",
1432 				  attr->max_rd_atomic,
1433 				  dev->hw_attrs.max_hw_ord);
1434 			return -EINVAL;
1435 		}
1436 		if (attr->max_rd_atomic)
1437 			roce_info->ord_size = attr->max_rd_atomic;
1438 		info.ord_valid = true;
1439 	}
1440 
1441 	if (attr_mask & IB_QP_MAX_DEST_RD_ATOMIC) {
1442 		if (attr->max_dest_rd_atomic > dev->hw_attrs.max_hw_ird) {
1443 			ibdev_err(&iwdev->ibdev,
1444 				  "rd_atomic = %d, above max_hw_ird=%d\n",
1445 				   attr->max_dest_rd_atomic,
1446 				   dev->hw_attrs.max_hw_ird);
1447 			return -EINVAL;
1448 		}
1449 		if (attr->max_dest_rd_atomic)
1450 			roce_info->ird_size = attr->max_dest_rd_atomic;
1451 	}
1452 
1453 	if (attr_mask & IB_QP_ACCESS_FLAGS) {
1454 		if (attr->qp_access_flags & IB_ACCESS_LOCAL_WRITE)
1455 			roce_info->wr_rdresp_en = true;
1456 		if (attr->qp_access_flags & IB_ACCESS_REMOTE_WRITE)
1457 			roce_info->wr_rdresp_en = true;
1458 		if (attr->qp_access_flags & IB_ACCESS_REMOTE_READ)
1459 			roce_info->rd_en = true;
1460 		if (dev->hw_attrs.uk_attrs.feature_flags & IRDMA_FEATURE_ATOMIC_OPS)
1461 			if (attr->qp_access_flags & IB_ACCESS_REMOTE_ATOMIC)
1462 				ctx_info->remote_atomics_en = true;
1463 	}
1464 
1465 	wait_event(iwqp->mod_qp_waitq, !atomic_read(&iwqp->hw_mod_qp_pend));
1466 
1467 	ibdev_dbg(&iwdev->ibdev,
1468 		  "VERBS: caller: %pS qp_id=%d to_ibqpstate=%d ibqpstate=%d irdma_qpstate=%d attr_mask=0x%x\n",
1469 		  __builtin_return_address(0), ibqp->qp_num, attr->qp_state,
1470 		  iwqp->ibqp_state, iwqp->iwarp_state, attr_mask);
1471 
1472 	spin_lock_irqsave(&iwqp->lock, flags);
1473 	if (attr_mask & IB_QP_STATE) {
1474 		if (!ib_modify_qp_is_ok(iwqp->ibqp_state, attr->qp_state,
1475 					iwqp->ibqp.qp_type, attr_mask)) {
1476 			ibdev_warn(&iwdev->ibdev, "modify_qp invalid for qp_id=%d, old_state=0x%x, new_state=0x%x\n",
1477 				   iwqp->ibqp.qp_num, iwqp->ibqp_state,
1478 				   attr->qp_state);
1479 			ret = -EINVAL;
1480 			goto exit;
1481 		}
1482 		info.curr_iwarp_state = iwqp->iwarp_state;
1483 
1484 		switch (attr->qp_state) {
1485 		case IB_QPS_INIT:
1486 			if (iwqp->iwarp_state > IRDMA_QP_STATE_IDLE) {
1487 				ret = -EINVAL;
1488 				goto exit;
1489 			}
1490 
1491 			if (iwqp->iwarp_state == IRDMA_QP_STATE_INVALID) {
1492 				info.next_iwarp_state = IRDMA_QP_STATE_IDLE;
1493 				issue_modify_qp = 1;
1494 			}
1495 			break;
1496 		case IB_QPS_RTR:
1497 			if (iwqp->iwarp_state > IRDMA_QP_STATE_IDLE) {
1498 				ret = -EINVAL;
1499 				goto exit;
1500 			}
1501 			info.arp_cache_idx_valid = true;
1502 			info.cq_num_valid = true;
1503 			info.next_iwarp_state = IRDMA_QP_STATE_RTR;
1504 			issue_modify_qp = 1;
1505 			break;
1506 		case IB_QPS_RTS:
1507 			if (iwqp->ibqp_state < IB_QPS_RTR ||
1508 			    iwqp->ibqp_state == IB_QPS_ERR) {
1509 				ret = -EINVAL;
1510 				goto exit;
1511 			}
1512 
1513 			info.arp_cache_idx_valid = true;
1514 			info.cq_num_valid = true;
1515 			info.ord_valid = true;
1516 			info.next_iwarp_state = IRDMA_QP_STATE_RTS;
1517 			issue_modify_qp = 1;
1518 			if (iwdev->push_mode && udata &&
1519 			    iwqp->sc_qp.push_idx == IRDMA_INVALID_PUSH_PAGE_INDEX &&
1520 			    dev->hw_attrs.uk_attrs.hw_rev >= IRDMA_GEN_2) {
1521 				spin_unlock_irqrestore(&iwqp->lock, flags);
1522 				irdma_alloc_push_page(iwqp);
1523 				spin_lock_irqsave(&iwqp->lock, flags);
1524 			}
1525 			break;
1526 		case IB_QPS_SQD:
1527 			if (iwqp->iwarp_state == IRDMA_QP_STATE_SQD)
1528 				goto exit;
1529 
1530 			if (iwqp->iwarp_state != IRDMA_QP_STATE_RTS) {
1531 				ret = -EINVAL;
1532 				goto exit;
1533 			}
1534 
1535 			info.next_iwarp_state = IRDMA_QP_STATE_SQD;
1536 			issue_modify_qp = 1;
1537 			iwqp->suspend_pending = true;
1538 			break;
1539 		case IB_QPS_SQE:
1540 		case IB_QPS_ERR:
1541 		case IB_QPS_RESET:
1542 			if (iwqp->iwarp_state == IRDMA_QP_STATE_ERROR) {
1543 				spin_unlock_irqrestore(&iwqp->lock, flags);
1544 				if (udata && udata->inlen) {
1545 					if (ib_copy_from_udata(&ureq, udata,
1546 					    min(sizeof(ureq), udata->inlen)))
1547 						return -EINVAL;
1548 
1549 					irdma_flush_wqes(iwqp,
1550 					    (ureq.sq_flush ? IRDMA_FLUSH_SQ : 0) |
1551 					    (ureq.rq_flush ? IRDMA_FLUSH_RQ : 0) |
1552 					    IRDMA_REFLUSH);
1553 				}
1554 				return 0;
1555 			}
1556 
1557 			info.next_iwarp_state = IRDMA_QP_STATE_ERROR;
1558 			issue_modify_qp = 1;
1559 			break;
1560 		default:
1561 			ret = -EINVAL;
1562 			goto exit;
1563 		}
1564 
1565 		iwqp->ibqp_state = attr->qp_state;
1566 	}
1567 
1568 	ctx_info->send_cq_num = iwqp->iwscq->sc_cq.cq_uk.cq_id;
1569 	ctx_info->rcv_cq_num = iwqp->iwrcq->sc_cq.cq_uk.cq_id;
1570 	irdma_sc_qp_setctx_roce(&iwqp->sc_qp, iwqp->host_ctx.va, ctx_info);
1571 	spin_unlock_irqrestore(&iwqp->lock, flags);
1572 
1573 	if (attr_mask & IB_QP_STATE) {
1574 		if (issue_modify_qp) {
1575 			ctx_info->rem_endpoint_idx = udp_info->arp_idx;
1576 			if (irdma_hw_modify_qp(iwdev, iwqp, &info, true))
1577 				return -EINVAL;
1578 			if (info.next_iwarp_state == IRDMA_QP_STATE_SQD) {
1579 				ret = irdma_wait_for_suspend(iwqp);
1580 				if (ret)
1581 					return ret;
1582 			}
1583 			spin_lock_irqsave(&iwqp->lock, flags);
1584 			if (iwqp->iwarp_state == info.curr_iwarp_state) {
1585 				iwqp->iwarp_state = info.next_iwarp_state;
1586 				iwqp->ibqp_state = attr->qp_state;
1587 			}
1588 			if (iwqp->ibqp_state > IB_QPS_RTS &&
1589 			    !iwqp->flush_issued) {
1590 				spin_unlock_irqrestore(&iwqp->lock, flags);
1591 				irdma_flush_wqes(iwqp, IRDMA_FLUSH_SQ |
1592 						       IRDMA_FLUSH_RQ |
1593 						       IRDMA_FLUSH_WAIT);
1594 				iwqp->flush_issued = 1;
1595 			} else {
1596 				spin_unlock_irqrestore(&iwqp->lock, flags);
1597 			}
1598 		} else {
1599 			iwqp->ibqp_state = attr->qp_state;
1600 		}
1601 		if (udata && udata->outlen && dev->hw_attrs.uk_attrs.hw_rev >= IRDMA_GEN_2) {
1602 			struct irdma_ucontext *ucontext;
1603 
1604 			ucontext = rdma_udata_to_drv_context(udata,
1605 					struct irdma_ucontext, ibucontext);
1606 			if (iwqp->sc_qp.push_idx != IRDMA_INVALID_PUSH_PAGE_INDEX &&
1607 			    !iwqp->push_wqe_mmap_entry &&
1608 			    !irdma_setup_push_mmap_entries(ucontext, iwqp,
1609 				&uresp.push_wqe_mmap_key, &uresp.push_db_mmap_key)) {
1610 				uresp.push_valid = 1;
1611 				uresp.push_offset = iwqp->sc_qp.push_offset;
1612 			}
1613 			ret = ib_copy_to_udata(udata, &uresp, min(sizeof(uresp),
1614 					       udata->outlen));
1615 			if (ret) {
1616 				irdma_remove_push_mmap_entries(iwqp);
1617 				ibdev_dbg(&iwdev->ibdev,
1618 					  "VERBS: copy_to_udata failed\n");
1619 				return ret;
1620 			}
1621 		}
1622 	}
1623 
1624 	return 0;
1625 exit:
1626 	spin_unlock_irqrestore(&iwqp->lock, flags);
1627 
1628 	return ret;
1629 }
1630 
1631 /**
1632  * irdma_modify_qp - modify qp request
1633  * @ibqp: qp's pointer for modify
1634  * @attr: access attributes
1635  * @attr_mask: state mask
1636  * @udata: user data
1637  */
irdma_modify_qp(struct ib_qp * ibqp,struct ib_qp_attr * attr,int attr_mask,struct ib_udata * udata)1638 int irdma_modify_qp(struct ib_qp *ibqp, struct ib_qp_attr *attr, int attr_mask,
1639 		    struct ib_udata *udata)
1640 {
1641 #define IRDMA_MODIFY_QP_MIN_REQ_LEN offsetofend(struct irdma_modify_qp_req, rq_flush)
1642 #define IRDMA_MODIFY_QP_MIN_RESP_LEN offsetofend(struct irdma_modify_qp_resp, push_valid)
1643 	struct irdma_qp *iwqp = to_iwqp(ibqp);
1644 	struct irdma_device *iwdev = iwqp->iwdev;
1645 	struct irdma_sc_dev *dev = &iwdev->rf->sc_dev;
1646 	struct irdma_qp_host_ctx_info *ctx_info;
1647 	struct irdma_tcp_offload_info *tcp_info;
1648 	struct irdma_iwarp_offload_info *offload_info;
1649 	struct irdma_modify_qp_info info = {};
1650 	struct irdma_modify_qp_resp uresp = {};
1651 	struct irdma_modify_qp_req ureq = {};
1652 	u8 issue_modify_qp = 0;
1653 	u8 dont_wait = 0;
1654 	int err;
1655 	unsigned long flags;
1656 
1657 	if (udata) {
1658 		/* udata inlen/outlen can be 0 when supporting legacy libi40iw */
1659 		if ((udata->inlen && udata->inlen < IRDMA_MODIFY_QP_MIN_REQ_LEN) ||
1660 		    (udata->outlen && udata->outlen < IRDMA_MODIFY_QP_MIN_RESP_LEN))
1661 			return -EINVAL;
1662 	}
1663 
1664 	if (attr_mask & ~IB_QP_ATTR_STANDARD_BITS)
1665 		return -EOPNOTSUPP;
1666 
1667 	ctx_info = &iwqp->ctx_info;
1668 	offload_info = &iwqp->iwarp_info;
1669 	tcp_info = &iwqp->tcp_info;
1670 	wait_event(iwqp->mod_qp_waitq, !atomic_read(&iwqp->hw_mod_qp_pend));
1671 	ibdev_dbg(&iwdev->ibdev,
1672 		  "VERBS: caller: %pS qp_id=%d to_ibqpstate=%d ibqpstate=%d irdma_qpstate=%d last_aeq=%d hw_tcp_state=%d hw_iwarp_state=%d attr_mask=0x%x\n",
1673 		  __builtin_return_address(0), ibqp->qp_num, attr->qp_state,
1674 		  iwqp->ibqp_state, iwqp->iwarp_state, iwqp->last_aeq,
1675 		  iwqp->hw_tcp_state, iwqp->hw_iwarp_state, attr_mask);
1676 
1677 	spin_lock_irqsave(&iwqp->lock, flags);
1678 	if (attr_mask & IB_QP_STATE) {
1679 		info.curr_iwarp_state = iwqp->iwarp_state;
1680 		switch (attr->qp_state) {
1681 		case IB_QPS_INIT:
1682 		case IB_QPS_RTR:
1683 			if (iwqp->iwarp_state > IRDMA_QP_STATE_IDLE) {
1684 				err = -EINVAL;
1685 				goto exit;
1686 			}
1687 
1688 			if (iwqp->iwarp_state == IRDMA_QP_STATE_INVALID) {
1689 				info.next_iwarp_state = IRDMA_QP_STATE_IDLE;
1690 				issue_modify_qp = 1;
1691 			}
1692 			if (iwdev->push_mode && udata &&
1693 			    iwqp->sc_qp.push_idx == IRDMA_INVALID_PUSH_PAGE_INDEX &&
1694 			    dev->hw_attrs.uk_attrs.hw_rev >= IRDMA_GEN_2) {
1695 				spin_unlock_irqrestore(&iwqp->lock, flags);
1696 				irdma_alloc_push_page(iwqp);
1697 				spin_lock_irqsave(&iwqp->lock, flags);
1698 			}
1699 			break;
1700 		case IB_QPS_RTS:
1701 			if (iwqp->iwarp_state > IRDMA_QP_STATE_RTS ||
1702 			    !iwqp->cm_id) {
1703 				err = -EINVAL;
1704 				goto exit;
1705 			}
1706 
1707 			issue_modify_qp = 1;
1708 			iwqp->hw_tcp_state = IRDMA_TCP_STATE_ESTABLISHED;
1709 			iwqp->hte_added = 1;
1710 			info.next_iwarp_state = IRDMA_QP_STATE_RTS;
1711 			info.tcp_ctx_valid = true;
1712 			info.ord_valid = true;
1713 			info.arp_cache_idx_valid = true;
1714 			info.cq_num_valid = true;
1715 			break;
1716 		case IB_QPS_SQD:
1717 			if (iwqp->hw_iwarp_state > IRDMA_QP_STATE_RTS) {
1718 				err = 0;
1719 				goto exit;
1720 			}
1721 
1722 			if (iwqp->iwarp_state == IRDMA_QP_STATE_CLOSING ||
1723 			    iwqp->iwarp_state < IRDMA_QP_STATE_RTS) {
1724 				err = 0;
1725 				goto exit;
1726 			}
1727 
1728 			if (iwqp->iwarp_state > IRDMA_QP_STATE_CLOSING) {
1729 				err = -EINVAL;
1730 				goto exit;
1731 			}
1732 
1733 			info.next_iwarp_state = IRDMA_QP_STATE_CLOSING;
1734 			issue_modify_qp = 1;
1735 			break;
1736 		case IB_QPS_SQE:
1737 			if (iwqp->iwarp_state >= IRDMA_QP_STATE_TERMINATE) {
1738 				err = -EINVAL;
1739 				goto exit;
1740 			}
1741 
1742 			info.next_iwarp_state = IRDMA_QP_STATE_TERMINATE;
1743 			issue_modify_qp = 1;
1744 			break;
1745 		case IB_QPS_ERR:
1746 		case IB_QPS_RESET:
1747 			if (iwqp->iwarp_state == IRDMA_QP_STATE_ERROR) {
1748 				spin_unlock_irqrestore(&iwqp->lock, flags);
1749 				if (udata && udata->inlen) {
1750 					if (ib_copy_from_udata(&ureq, udata,
1751 					    min(sizeof(ureq), udata->inlen)))
1752 						return -EINVAL;
1753 
1754 					irdma_flush_wqes(iwqp,
1755 					    (ureq.sq_flush ? IRDMA_FLUSH_SQ : 0) |
1756 					    (ureq.rq_flush ? IRDMA_FLUSH_RQ : 0) |
1757 					    IRDMA_REFLUSH);
1758 				}
1759 				return 0;
1760 			}
1761 
1762 			if (iwqp->sc_qp.term_flags) {
1763 				spin_unlock_irqrestore(&iwqp->lock, flags);
1764 				irdma_terminate_del_timer(&iwqp->sc_qp);
1765 				spin_lock_irqsave(&iwqp->lock, flags);
1766 			}
1767 			info.next_iwarp_state = IRDMA_QP_STATE_ERROR;
1768 			if (iwqp->hw_tcp_state > IRDMA_TCP_STATE_CLOSED &&
1769 			    iwdev->iw_status &&
1770 			    iwqp->hw_tcp_state != IRDMA_TCP_STATE_TIME_WAIT)
1771 				info.reset_tcp_conn = true;
1772 			else
1773 				dont_wait = 1;
1774 
1775 			issue_modify_qp = 1;
1776 			info.next_iwarp_state = IRDMA_QP_STATE_ERROR;
1777 			break;
1778 		default:
1779 			err = -EINVAL;
1780 			goto exit;
1781 		}
1782 
1783 		iwqp->ibqp_state = attr->qp_state;
1784 	}
1785 	if (attr_mask & IB_QP_ACCESS_FLAGS) {
1786 		ctx_info->iwarp_info_valid = true;
1787 		if (attr->qp_access_flags & IB_ACCESS_LOCAL_WRITE)
1788 			offload_info->wr_rdresp_en = true;
1789 		if (attr->qp_access_flags & IB_ACCESS_REMOTE_WRITE)
1790 			offload_info->wr_rdresp_en = true;
1791 		if (attr->qp_access_flags & IB_ACCESS_REMOTE_READ)
1792 			offload_info->rd_en = true;
1793 	}
1794 
1795 	if (ctx_info->iwarp_info_valid) {
1796 		ctx_info->send_cq_num = iwqp->iwscq->sc_cq.cq_uk.cq_id;
1797 		ctx_info->rcv_cq_num = iwqp->iwrcq->sc_cq.cq_uk.cq_id;
1798 		irdma_sc_qp_setctx(&iwqp->sc_qp, iwqp->host_ctx.va, ctx_info);
1799 	}
1800 	spin_unlock_irqrestore(&iwqp->lock, flags);
1801 
1802 	if (attr_mask & IB_QP_STATE) {
1803 		if (issue_modify_qp) {
1804 			ctx_info->rem_endpoint_idx = tcp_info->arp_idx;
1805 			if (irdma_hw_modify_qp(iwdev, iwqp, &info, true))
1806 				return -EINVAL;
1807 		}
1808 
1809 		spin_lock_irqsave(&iwqp->lock, flags);
1810 		if (iwqp->iwarp_state == info.curr_iwarp_state) {
1811 			iwqp->iwarp_state = info.next_iwarp_state;
1812 			iwqp->ibqp_state = attr->qp_state;
1813 		}
1814 		spin_unlock_irqrestore(&iwqp->lock, flags);
1815 	}
1816 
1817 	if (issue_modify_qp && iwqp->ibqp_state > IB_QPS_RTS) {
1818 		if (dont_wait) {
1819 			if (iwqp->hw_tcp_state) {
1820 				spin_lock_irqsave(&iwqp->lock, flags);
1821 				iwqp->hw_tcp_state = IRDMA_TCP_STATE_CLOSED;
1822 				iwqp->last_aeq = IRDMA_AE_RESET_SENT;
1823 				spin_unlock_irqrestore(&iwqp->lock, flags);
1824 			}
1825 			irdma_cm_disconn(iwqp);
1826 		} else {
1827 			int close_timer_started;
1828 
1829 			spin_lock_irqsave(&iwdev->cm_core.ht_lock, flags);
1830 
1831 			if (iwqp->cm_node) {
1832 				refcount_inc(&iwqp->cm_node->refcnt);
1833 				spin_unlock_irqrestore(&iwdev->cm_core.ht_lock, flags);
1834 				close_timer_started = atomic_inc_return(&iwqp->close_timer_started);
1835 				if (iwqp->cm_id && close_timer_started == 1)
1836 					irdma_schedule_cm_timer(iwqp->cm_node,
1837 						(struct irdma_puda_buf *)iwqp,
1838 						IRDMA_TIMER_TYPE_CLOSE, 1, 0);
1839 
1840 				irdma_rem_ref_cm_node(iwqp->cm_node);
1841 			} else {
1842 				spin_unlock_irqrestore(&iwdev->cm_core.ht_lock, flags);
1843 			}
1844 		}
1845 	}
1846 	if (attr_mask & IB_QP_STATE && udata && udata->outlen &&
1847 	    dev->hw_attrs.uk_attrs.hw_rev >= IRDMA_GEN_2) {
1848 		struct irdma_ucontext *ucontext;
1849 
1850 		ucontext = rdma_udata_to_drv_context(udata,
1851 					struct irdma_ucontext, ibucontext);
1852 		if (iwqp->sc_qp.push_idx != IRDMA_INVALID_PUSH_PAGE_INDEX &&
1853 		    !iwqp->push_wqe_mmap_entry &&
1854 		    !irdma_setup_push_mmap_entries(ucontext, iwqp,
1855 			&uresp.push_wqe_mmap_key, &uresp.push_db_mmap_key)) {
1856 			uresp.push_valid = 1;
1857 			uresp.push_offset = iwqp->sc_qp.push_offset;
1858 		}
1859 
1860 		err = ib_copy_to_udata(udata, &uresp, min(sizeof(uresp),
1861 				       udata->outlen));
1862 		if (err) {
1863 			irdma_remove_push_mmap_entries(iwqp);
1864 			ibdev_dbg(&iwdev->ibdev,
1865 				  "VERBS: copy_to_udata failed\n");
1866 			return err;
1867 		}
1868 	}
1869 
1870 	return 0;
1871 exit:
1872 	spin_unlock_irqrestore(&iwqp->lock, flags);
1873 
1874 	return err;
1875 }
1876 
1877 /**
1878  * irdma_srq_free_rsrc - free up resources for srq
1879  * @rf: RDMA PCI function
1880  * @iwsrq: srq ptr
1881  */
irdma_srq_free_rsrc(struct irdma_pci_f * rf,struct irdma_srq * iwsrq)1882 static void irdma_srq_free_rsrc(struct irdma_pci_f *rf, struct irdma_srq *iwsrq)
1883 {
1884 	struct irdma_sc_srq *srq = &iwsrq->sc_srq;
1885 
1886 	if (!iwsrq->user_mode) {
1887 		dma_free_coherent(rf->sc_dev.hw->device, iwsrq->kmem.size,
1888 				  iwsrq->kmem.va, iwsrq->kmem.pa);
1889 		iwsrq->kmem.va = NULL;
1890 	}
1891 
1892 	irdma_free_rsrc(rf, rf->allocated_srqs, srq->srq_uk.srq_id);
1893 }
1894 
1895 /**
1896  * irdma_cq_free_rsrc - free up resources for cq
1897  * @rf: RDMA PCI function
1898  * @iwcq: cq ptr
1899  */
irdma_cq_free_rsrc(struct irdma_pci_f * rf,struct irdma_cq * iwcq)1900 static void irdma_cq_free_rsrc(struct irdma_pci_f *rf, struct irdma_cq *iwcq)
1901 {
1902 	struct irdma_sc_cq *cq = &iwcq->sc_cq;
1903 
1904 	if (!iwcq->user_mode) {
1905 		dma_free_coherent(rf->sc_dev.hw->device, iwcq->kmem.size,
1906 				  iwcq->kmem.va, iwcq->kmem.pa);
1907 		iwcq->kmem.va = NULL;
1908 		dma_free_coherent(rf->sc_dev.hw->device,
1909 				  iwcq->kmem_shadow.size,
1910 				  iwcq->kmem_shadow.va, iwcq->kmem_shadow.pa);
1911 		iwcq->kmem_shadow.va = NULL;
1912 	}
1913 
1914 	irdma_free_rsrc(rf, rf->allocated_cqs, cq->cq_uk.cq_id);
1915 }
1916 
1917 /**
1918  * irdma_free_cqbuf - worker to free a cq buffer
1919  * @work: provides access to the cq buffer to free
1920  */
irdma_free_cqbuf(struct work_struct * work)1921 static void irdma_free_cqbuf(struct work_struct *work)
1922 {
1923 	struct irdma_cq_buf *cq_buf = container_of(work, struct irdma_cq_buf, work);
1924 
1925 	dma_free_coherent(cq_buf->hw->device, cq_buf->kmem_buf.size,
1926 			  cq_buf->kmem_buf.va, cq_buf->kmem_buf.pa);
1927 	cq_buf->kmem_buf.va = NULL;
1928 	kfree(cq_buf);
1929 }
1930 
1931 /**
1932  * irdma_process_resize_list - remove resized cq buffers from the resize_list
1933  * @iwcq: cq which owns the resize_list
1934  * @iwdev: irdma device
1935  * @lcqe_buf: the buffer where the last cqe is received
1936  */
irdma_process_resize_list(struct irdma_cq * iwcq,struct irdma_device * iwdev,struct irdma_cq_buf * lcqe_buf)1937 static int irdma_process_resize_list(struct irdma_cq *iwcq,
1938 				     struct irdma_device *iwdev,
1939 				     struct irdma_cq_buf *lcqe_buf)
1940 {
1941 	struct list_head *tmp_node, *list_node;
1942 	struct irdma_cq_buf *cq_buf;
1943 	int cnt = 0;
1944 
1945 	list_for_each_safe(list_node, tmp_node, &iwcq->resize_list) {
1946 		cq_buf = list_entry(list_node, struct irdma_cq_buf, list);
1947 		if (cq_buf == lcqe_buf)
1948 			return cnt;
1949 
1950 		list_del(&cq_buf->list);
1951 		queue_work(iwdev->cleanup_wq, &cq_buf->work);
1952 		cnt++;
1953 	}
1954 
1955 	return cnt;
1956 }
1957 
1958 /**
1959  * irdma_destroy_srq - destroy srq
1960  * @ibsrq: srq pointer
1961  * @udata: user data
1962  */
irdma_destroy_srq(struct ib_srq * ibsrq,struct ib_udata * udata)1963 static int irdma_destroy_srq(struct ib_srq *ibsrq, struct ib_udata *udata)
1964 {
1965 	struct irdma_device *iwdev = to_iwdev(ibsrq->device);
1966 	struct irdma_srq *iwsrq = to_iwsrq(ibsrq);
1967 	struct irdma_sc_srq *srq = &iwsrq->sc_srq;
1968 
1969 	irdma_srq_wq_destroy(iwdev->rf, srq);
1970 	irdma_srq_free_rsrc(iwdev->rf, iwsrq);
1971 	return 0;
1972 }
1973 
1974 /**
1975  * irdma_destroy_cq - destroy cq
1976  * @ib_cq: cq pointer
1977  * @udata: user data
1978  */
irdma_destroy_cq(struct ib_cq * ib_cq,struct ib_udata * udata)1979 static int irdma_destroy_cq(struct ib_cq *ib_cq, struct ib_udata *udata)
1980 {
1981 	struct irdma_device *iwdev = to_iwdev(ib_cq->device);
1982 	struct irdma_cq *iwcq = to_iwcq(ib_cq);
1983 	struct irdma_sc_cq *cq = &iwcq->sc_cq;
1984 	struct irdma_sc_dev *dev = cq->dev;
1985 	struct irdma_sc_ceq *ceq = dev->ceq[cq->ceq_id];
1986 	struct irdma_ceq *iwceq = container_of(ceq, struct irdma_ceq, sc_ceq);
1987 	unsigned long flags;
1988 
1989 	spin_lock_irqsave(&iwcq->lock, flags);
1990 	if (!list_empty(&iwcq->cmpl_generated))
1991 		irdma_remove_cmpls_list(iwcq);
1992 	if (!list_empty(&iwcq->resize_list))
1993 		irdma_process_resize_list(iwcq, iwdev, NULL);
1994 	spin_unlock_irqrestore(&iwcq->lock, flags);
1995 
1996 	irdma_cq_rem_ref(ib_cq);
1997 	wait_for_completion(&iwcq->free_cq);
1998 
1999 	irdma_cq_wq_destroy(iwdev->rf, cq);
2000 
2001 	spin_lock_irqsave(&iwceq->ce_lock, flags);
2002 	irdma_sc_cleanup_ceqes(cq, ceq);
2003 	spin_unlock_irqrestore(&iwceq->ce_lock, flags);
2004 	irdma_cq_free_rsrc(iwdev->rf, iwcq);
2005 
2006 	return 0;
2007 }
2008 
2009 /**
2010  * irdma_resize_cq - resize cq
2011  * @ibcq: cq to be resized
2012  * @entries: desired cq size
2013  * @udata: user data
2014  */
irdma_resize_cq(struct ib_cq * ibcq,int entries,struct ib_udata * udata)2015 static int irdma_resize_cq(struct ib_cq *ibcq, int entries,
2016 			   struct ib_udata *udata)
2017 {
2018 #define IRDMA_RESIZE_CQ_MIN_REQ_LEN offsetofend(struct irdma_resize_cq_req, user_cq_buffer)
2019 	struct irdma_cq *iwcq = to_iwcq(ibcq);
2020 	struct irdma_sc_dev *dev = iwcq->sc_cq.dev;
2021 	struct irdma_cqp_request *cqp_request;
2022 	struct cqp_cmds_info *cqp_info;
2023 	struct irdma_modify_cq_info *m_info;
2024 	struct irdma_modify_cq_info info = {};
2025 	struct irdma_dma_mem kmem_buf;
2026 	struct irdma_cq_mr *cqmr_buf;
2027 	struct irdma_pbl *iwpbl_buf;
2028 	struct irdma_device *iwdev;
2029 	struct irdma_pci_f *rf;
2030 	struct irdma_cq_buf *cq_buf = NULL;
2031 	unsigned long flags;
2032 	int ret;
2033 
2034 	iwdev = to_iwdev(ibcq->device);
2035 	rf = iwdev->rf;
2036 
2037 	if (!(rf->sc_dev.hw_attrs.uk_attrs.feature_flags &
2038 	    IRDMA_FEATURE_CQ_RESIZE))
2039 		return -EOPNOTSUPP;
2040 
2041 	if (udata && udata->inlen < IRDMA_RESIZE_CQ_MIN_REQ_LEN)
2042 		return -EINVAL;
2043 
2044 	if (entries > rf->max_cqe)
2045 		return -EINVAL;
2046 
2047 	if (!iwcq->user_mode) {
2048 		entries++;
2049 
2050 		if (!iwcq->sc_cq.cq_uk.avoid_mem_cflct &&
2051 		    dev->hw_attrs.uk_attrs.hw_rev >= IRDMA_GEN_2)
2052 			entries *= 2;
2053 
2054 		if (entries & 1)
2055 			entries += 1; /* cq size must be an even number */
2056 	}
2057 
2058 	info.cq_size = max(entries, 4);
2059 
2060 	if (info.cq_size == iwcq->sc_cq.cq_uk.cq_size - 1)
2061 		return 0;
2062 
2063 	if (udata) {
2064 		struct irdma_resize_cq_req req = {};
2065 		struct irdma_ucontext *ucontext =
2066 			rdma_udata_to_drv_context(udata, struct irdma_ucontext,
2067 						  ibucontext);
2068 
2069 		/* CQ resize not supported with legacy GEN_1 libi40iw */
2070 		if (ucontext->legacy_mode)
2071 			return -EOPNOTSUPP;
2072 
2073 		if (ib_copy_from_udata(&req, udata,
2074 				       min(sizeof(req), udata->inlen)))
2075 			return -EINVAL;
2076 
2077 		spin_lock_irqsave(&ucontext->cq_reg_mem_list_lock, flags);
2078 		iwpbl_buf = irdma_get_pbl((unsigned long)req.user_cq_buffer,
2079 					  &ucontext->cq_reg_mem_list);
2080 		spin_unlock_irqrestore(&ucontext->cq_reg_mem_list_lock, flags);
2081 
2082 		if (!iwpbl_buf)
2083 			return -ENOMEM;
2084 
2085 		cqmr_buf = &iwpbl_buf->cq_mr;
2086 		if (iwpbl_buf->pbl_allocated) {
2087 			info.virtual_map = true;
2088 			info.pbl_chunk_size = 1;
2089 			info.first_pm_pbl_idx = cqmr_buf->cq_pbl.idx;
2090 		} else {
2091 			info.cq_pa = cqmr_buf->cq_pbl.addr;
2092 		}
2093 	} else {
2094 		/* Kmode CQ resize */
2095 		int rsize;
2096 
2097 		rsize = info.cq_size * sizeof(struct irdma_cqe);
2098 		kmem_buf.size = ALIGN(round_up(rsize, 256), 256);
2099 		kmem_buf.va = dma_alloc_coherent(dev->hw->device,
2100 						 kmem_buf.size, &kmem_buf.pa,
2101 						 GFP_KERNEL);
2102 		if (!kmem_buf.va)
2103 			return -ENOMEM;
2104 
2105 		info.cq_base = kmem_buf.va;
2106 		info.cq_pa = kmem_buf.pa;
2107 		cq_buf = kzalloc(sizeof(*cq_buf), GFP_KERNEL);
2108 		if (!cq_buf) {
2109 			ret = -ENOMEM;
2110 			goto error;
2111 		}
2112 	}
2113 
2114 	cqp_request = irdma_alloc_and_get_cqp_request(&rf->cqp, true);
2115 	if (!cqp_request) {
2116 		ret = -ENOMEM;
2117 		goto error;
2118 	}
2119 
2120 	info.shadow_read_threshold = iwcq->sc_cq.shadow_read_threshold;
2121 	info.cq_resize = true;
2122 
2123 	cqp_info = &cqp_request->info;
2124 	m_info = &cqp_info->in.u.cq_modify.info;
2125 	memcpy(m_info, &info, sizeof(*m_info));
2126 
2127 	cqp_info->cqp_cmd = IRDMA_OP_CQ_MODIFY;
2128 	cqp_info->in.u.cq_modify.cq = &iwcq->sc_cq;
2129 	cqp_info->in.u.cq_modify.scratch = (uintptr_t)cqp_request;
2130 	cqp_info->post_sq = 1;
2131 	ret = irdma_handle_cqp_op(rf, cqp_request);
2132 	irdma_put_cqp_request(&rf->cqp, cqp_request);
2133 	if (ret)
2134 		goto error;
2135 
2136 	spin_lock_irqsave(&iwcq->lock, flags);
2137 	if (cq_buf) {
2138 		cq_buf->kmem_buf = iwcq->kmem;
2139 		cq_buf->hw = dev->hw;
2140 		memcpy(&cq_buf->cq_uk, &iwcq->sc_cq.cq_uk, sizeof(cq_buf->cq_uk));
2141 		INIT_WORK(&cq_buf->work, irdma_free_cqbuf);
2142 		list_add_tail(&cq_buf->list, &iwcq->resize_list);
2143 		iwcq->kmem = kmem_buf;
2144 	}
2145 
2146 	irdma_sc_cq_resize(&iwcq->sc_cq, &info);
2147 	ibcq->cqe = info.cq_size - 1;
2148 	spin_unlock_irqrestore(&iwcq->lock, flags);
2149 
2150 	return 0;
2151 error:
2152 	if (!udata) {
2153 		dma_free_coherent(dev->hw->device, kmem_buf.size, kmem_buf.va,
2154 				  kmem_buf.pa);
2155 		kmem_buf.va = NULL;
2156 	}
2157 	kfree(cq_buf);
2158 
2159 	return ret;
2160 }
2161 
2162 /**
2163  * irdma_srq_event - event notification for srq limit
2164  * @srq: shared srq struct
2165  */
irdma_srq_event(struct irdma_sc_srq * srq)2166 void irdma_srq_event(struct irdma_sc_srq *srq)
2167 {
2168 	struct irdma_srq *iwsrq = container_of(srq, struct irdma_srq, sc_srq);
2169 	struct ib_srq *ibsrq = &iwsrq->ibsrq;
2170 	struct ib_event event;
2171 
2172 	srq->srq_limit = 0;
2173 
2174 	if (!ibsrq->event_handler)
2175 		return;
2176 
2177 	event.device = ibsrq->device;
2178 	event.element.port_num = 1;
2179 	event.element.srq = ibsrq;
2180 	event.event = IB_EVENT_SRQ_LIMIT_REACHED;
2181 	ibsrq->event_handler(&event, ibsrq->srq_context);
2182 }
2183 
2184 /**
2185  * irdma_modify_srq - modify srq request
2186  * @ibsrq: srq's pointer for modify
2187  * @attr: access attributes
2188  * @attr_mask: state mask
2189  * @udata: user data
2190  */
irdma_modify_srq(struct ib_srq * ibsrq,struct ib_srq_attr * attr,enum ib_srq_attr_mask attr_mask,struct ib_udata * udata)2191 static int irdma_modify_srq(struct ib_srq *ibsrq, struct ib_srq_attr *attr,
2192 			    enum ib_srq_attr_mask attr_mask,
2193 			    struct ib_udata *udata)
2194 {
2195 	struct irdma_device *iwdev = to_iwdev(ibsrq->device);
2196 	struct irdma_srq *iwsrq = to_iwsrq(ibsrq);
2197 	struct irdma_cqp_request *cqp_request;
2198 	struct irdma_pci_f *rf = iwdev->rf;
2199 	struct irdma_modify_srq_info *info;
2200 	struct cqp_cmds_info *cqp_info;
2201 	int status;
2202 
2203 	if (attr_mask & IB_SRQ_MAX_WR)
2204 		return -EINVAL;
2205 
2206 	if (!(attr_mask & IB_SRQ_LIMIT))
2207 		return 0;
2208 
2209 	if (attr->srq_limit > iwsrq->sc_srq.srq_uk.srq_size)
2210 		return -EINVAL;
2211 
2212 	/* Execute this cqp op synchronously, so we can update srq_limit
2213 	 * upon successful completion.
2214 	 */
2215 	cqp_request = irdma_alloc_and_get_cqp_request(&rf->cqp, true);
2216 	if (!cqp_request)
2217 		return -ENOMEM;
2218 
2219 	cqp_info = &cqp_request->info;
2220 	info = &cqp_info->in.u.srq_modify.info;
2221 	info->srq_limit = attr->srq_limit;
2222 	if (info->srq_limit > 0xFFF)
2223 		info->srq_limit = 0xFFF;
2224 	info->arm_limit_event = 1;
2225 
2226 	cqp_info->cqp_cmd = IRDMA_OP_SRQ_MODIFY;
2227 	cqp_info->post_sq = 1;
2228 	cqp_info->in.u.srq_modify.srq = &iwsrq->sc_srq;
2229 	cqp_info->in.u.srq_modify.scratch = (uintptr_t)cqp_request;
2230 	status = irdma_handle_cqp_op(rf, cqp_request);
2231 	irdma_put_cqp_request(&rf->cqp, cqp_request);
2232 	if (status)
2233 		return status;
2234 
2235 	iwsrq->sc_srq.srq_limit = info->srq_limit;
2236 
2237 	return 0;
2238 }
2239 
irdma_setup_umode_srq(struct irdma_device * iwdev,struct irdma_srq * iwsrq,struct irdma_srq_init_info * info,struct ib_udata * udata)2240 static int irdma_setup_umode_srq(struct irdma_device *iwdev,
2241 				 struct irdma_srq *iwsrq,
2242 				 struct irdma_srq_init_info *info,
2243 				 struct ib_udata *udata)
2244 {
2245 #define IRDMA_CREATE_SRQ_MIN_REQ_LEN \
2246 	offsetofend(struct irdma_create_srq_req, user_shadow_area)
2247 	struct irdma_create_srq_req req = {};
2248 	struct irdma_ucontext *ucontext;
2249 	struct irdma_srq_mr *srqmr;
2250 	struct irdma_pbl *iwpbl;
2251 	unsigned long flags;
2252 
2253 	iwsrq->user_mode = true;
2254 	ucontext = rdma_udata_to_drv_context(udata, struct irdma_ucontext,
2255 					     ibucontext);
2256 
2257 	if (udata->inlen < IRDMA_CREATE_SRQ_MIN_REQ_LEN)
2258 		return -EINVAL;
2259 
2260 	if (ib_copy_from_udata(&req, udata,
2261 			       min(sizeof(req), udata->inlen)))
2262 		return -EFAULT;
2263 
2264 	spin_lock_irqsave(&ucontext->srq_reg_mem_list_lock, flags);
2265 	iwpbl = irdma_get_pbl((unsigned long)req.user_srq_buf,
2266 			      &ucontext->srq_reg_mem_list);
2267 	spin_unlock_irqrestore(&ucontext->srq_reg_mem_list_lock, flags);
2268 	if (!iwpbl)
2269 		return -EPROTO;
2270 
2271 	iwsrq->iwpbl = iwpbl;
2272 	srqmr = &iwpbl->srq_mr;
2273 
2274 	if (iwpbl->pbl_allocated) {
2275 		info->virtual_map = true;
2276 		info->pbl_chunk_size = 1;
2277 		info->first_pm_pbl_idx = srqmr->srq_pbl.idx;
2278 		info->leaf_pbl_size = 1;
2279 	} else {
2280 		info->srq_pa = srqmr->srq_pbl.addr;
2281 	}
2282 	info->shadow_area_pa = srqmr->shadow;
2283 
2284 	return 0;
2285 }
2286 
irdma_setup_kmode_srq(struct irdma_device * iwdev,struct irdma_srq * iwsrq,struct irdma_srq_init_info * info,u32 depth,u8 shift)2287 static int irdma_setup_kmode_srq(struct irdma_device *iwdev,
2288 				 struct irdma_srq *iwsrq,
2289 				 struct irdma_srq_init_info *info, u32 depth,
2290 				 u8 shift)
2291 {
2292 	struct irdma_srq_uk_init_info *ukinfo = &info->srq_uk_init_info;
2293 	struct irdma_dma_mem *mem = &iwsrq->kmem;
2294 	u32 size, ring_size;
2295 
2296 	ring_size = depth * IRDMA_QP_WQE_MIN_SIZE;
2297 	size = ring_size + (IRDMA_SHADOW_AREA_SIZE << 3);
2298 
2299 	mem->size = ALIGN(size, 256);
2300 	mem->va = dma_alloc_coherent(iwdev->rf->hw.device, mem->size,
2301 				     &mem->pa, GFP_KERNEL);
2302 	if (!mem->va)
2303 		return -ENOMEM;
2304 
2305 	ukinfo->srq = mem->va;
2306 	ukinfo->srq_size = depth >> shift;
2307 	ukinfo->shadow_area = mem->va + ring_size;
2308 
2309 	info->shadow_area_pa = info->srq_pa + ring_size;
2310 	info->srq_pa = mem->pa;
2311 
2312 	return 0;
2313 }
2314 
2315 /**
2316  * irdma_create_srq - create srq
2317  * @ibsrq: ib's srq pointer
2318  * @initattrs: attributes for srq
2319  * @udata: user data for create srq
2320  */
irdma_create_srq(struct ib_srq * ibsrq,struct ib_srq_init_attr * initattrs,struct ib_udata * udata)2321 static int irdma_create_srq(struct ib_srq *ibsrq,
2322 			    struct ib_srq_init_attr *initattrs,
2323 			    struct ib_udata *udata)
2324 {
2325 	struct irdma_device *iwdev = to_iwdev(ibsrq->device);
2326 	struct ib_srq_attr *attr = &initattrs->attr;
2327 	struct irdma_pd *iwpd = to_iwpd(ibsrq->pd);
2328 	struct irdma_srq *iwsrq = to_iwsrq(ibsrq);
2329 	struct irdma_srq_uk_init_info *ukinfo;
2330 	struct irdma_cqp_request *cqp_request;
2331 	struct irdma_srq_init_info info = {};
2332 	struct irdma_pci_f *rf = iwdev->rf;
2333 	struct irdma_uk_attrs *uk_attrs;
2334 	struct cqp_cmds_info *cqp_info;
2335 	int err_code = 0;
2336 	u32 depth;
2337 	u8 shift;
2338 
2339 	uk_attrs = &rf->sc_dev.hw_attrs.uk_attrs;
2340 	ukinfo = &info.srq_uk_init_info;
2341 
2342 	if (initattrs->srq_type != IB_SRQT_BASIC)
2343 		return -EOPNOTSUPP;
2344 
2345 	if (!(uk_attrs->feature_flags & IRDMA_FEATURE_SRQ) ||
2346 	    attr->max_sge > uk_attrs->max_hw_wq_frags)
2347 		return -EINVAL;
2348 
2349 	refcount_set(&iwsrq->refcnt, 1);
2350 	spin_lock_init(&iwsrq->lock);
2351 	err_code = irdma_alloc_rsrc(rf, rf->allocated_srqs, rf->max_srq,
2352 				    &iwsrq->srq_num, &rf->next_srq);
2353 	if (err_code)
2354 		return err_code;
2355 
2356 	ukinfo->max_srq_frag_cnt = attr->max_sge;
2357 	ukinfo->uk_attrs = uk_attrs;
2358 	ukinfo->srq_id = iwsrq->srq_num;
2359 
2360 	irdma_get_wqe_shift(ukinfo->uk_attrs, ukinfo->max_srq_frag_cnt, 0,
2361 			    &shift);
2362 
2363 	err_code = irdma_get_srqdepth(ukinfo->uk_attrs, attr->max_wr,
2364 				      shift, &depth);
2365 	if (err_code)
2366 		return err_code;
2367 
2368 	/* Actual SRQ size in WRs for ring and HW */
2369 	ukinfo->srq_size = depth >> shift;
2370 
2371 	/* Max postable WRs to SRQ */
2372 	iwsrq->max_wr = (depth - IRDMA_RQ_RSVD) >> shift;
2373 	attr->max_wr = iwsrq->max_wr;
2374 
2375 	if (udata)
2376 		err_code = irdma_setup_umode_srq(iwdev, iwsrq, &info, udata);
2377 	else
2378 		err_code = irdma_setup_kmode_srq(iwdev, iwsrq, &info, depth,
2379 						 shift);
2380 
2381 	if (err_code)
2382 		goto free_rsrc;
2383 
2384 	info.vsi = &iwdev->vsi;
2385 	info.pd = &iwpd->sc_pd;
2386 
2387 	err_code = irdma_sc_srq_init(&iwsrq->sc_srq, &info);
2388 	if (err_code)
2389 		goto free_dmem;
2390 
2391 	cqp_request = irdma_alloc_and_get_cqp_request(&rf->cqp, true);
2392 	if (!cqp_request) {
2393 		err_code = -ENOMEM;
2394 		goto free_dmem;
2395 	}
2396 
2397 	cqp_info = &cqp_request->info;
2398 	cqp_info->cqp_cmd = IRDMA_OP_SRQ_CREATE;
2399 	cqp_info->post_sq = 1;
2400 	cqp_info->in.u.srq_create.srq = &iwsrq->sc_srq;
2401 	cqp_info->in.u.srq_create.scratch = (uintptr_t)cqp_request;
2402 	err_code = irdma_handle_cqp_op(rf, cqp_request);
2403 	irdma_put_cqp_request(&rf->cqp, cqp_request);
2404 	if (err_code)
2405 		goto free_dmem;
2406 
2407 	if (udata) {
2408 		struct irdma_create_srq_resp resp = {};
2409 
2410 		resp.srq_id = iwsrq->srq_num;
2411 		resp.srq_size = ukinfo->srq_size;
2412 		if (ib_copy_to_udata(udata, &resp,
2413 				     min(sizeof(resp), udata->outlen))) {
2414 			err_code = -EPROTO;
2415 			goto srq_destroy;
2416 		}
2417 	}
2418 
2419 	return 0;
2420 
2421 srq_destroy:
2422 	irdma_srq_wq_destroy(rf, &iwsrq->sc_srq);
2423 
2424 free_dmem:
2425 	if (!iwsrq->user_mode)
2426 		dma_free_coherent(rf->hw.device, iwsrq->kmem.size,
2427 				  iwsrq->kmem.va, iwsrq->kmem.pa);
2428 free_rsrc:
2429 	irdma_free_rsrc(rf, rf->allocated_srqs, iwsrq->srq_num);
2430 	return err_code;
2431 }
2432 
2433 /**
2434  * irdma_query_srq - get SRQ attributes
2435  * @ibsrq: the SRQ to query
2436  * @attr: the attributes of the SRQ
2437  */
irdma_query_srq(struct ib_srq * ibsrq,struct ib_srq_attr * attr)2438 static int irdma_query_srq(struct ib_srq *ibsrq, struct ib_srq_attr *attr)
2439 {
2440 	struct irdma_srq *iwsrq = to_iwsrq(ibsrq);
2441 
2442 	attr->max_wr = iwsrq->max_wr;
2443 	attr->max_sge = iwsrq->sc_srq.srq_uk.max_srq_frag_cnt;
2444 	attr->srq_limit = iwsrq->sc_srq.srq_limit;
2445 
2446 	return 0;
2447 }
2448 
cq_validate_flags(u32 flags,u8 hw_rev)2449 static inline int cq_validate_flags(u32 flags, u8 hw_rev)
2450 {
2451 	/* GEN1/2 does not support CQ create flags */
2452 	if (hw_rev <= IRDMA_GEN_2)
2453 		return flags ? -EOPNOTSUPP : 0;
2454 
2455 	return flags & ~IB_UVERBS_CQ_FLAGS_TIMESTAMP_COMPLETION ? -EOPNOTSUPP : 0;
2456 }
2457 
2458 /**
2459  * irdma_create_cq - create cq
2460  * @ibcq: CQ allocated
2461  * @attr: attributes for cq
2462  * @attrs: uverbs attribute bundle
2463  */
irdma_create_cq(struct ib_cq * ibcq,const struct ib_cq_init_attr * attr,struct uverbs_attr_bundle * attrs)2464 static int irdma_create_cq(struct ib_cq *ibcq,
2465 			   const struct ib_cq_init_attr *attr,
2466 			   struct uverbs_attr_bundle *attrs)
2467 {
2468 #define IRDMA_CREATE_CQ_MIN_REQ_LEN offsetofend(struct irdma_create_cq_req, user_cq_buf)
2469 #define IRDMA_CREATE_CQ_MIN_RESP_LEN offsetofend(struct irdma_create_cq_resp, cq_size)
2470 	struct ib_udata *udata = &attrs->driver_udata;
2471 	struct ib_device *ibdev = ibcq->device;
2472 	struct irdma_device *iwdev = to_iwdev(ibdev);
2473 	struct irdma_pci_f *rf = iwdev->rf;
2474 	struct irdma_cq *iwcq = to_iwcq(ibcq);
2475 	u32 cq_num = 0;
2476 	struct irdma_sc_cq *cq;
2477 	struct irdma_sc_dev *dev = &rf->sc_dev;
2478 	struct irdma_cq_init_info info = {};
2479 	struct irdma_cqp_request *cqp_request;
2480 	struct cqp_cmds_info *cqp_info;
2481 	struct irdma_cq_uk_init_info *ukinfo = &info.cq_uk_init_info;
2482 	unsigned long flags;
2483 	int err_code;
2484 	int entries = attr->cqe;
2485 	bool cqe_64byte_ena;
2486 
2487 	err_code = cq_validate_flags(attr->flags, dev->hw_attrs.uk_attrs.hw_rev);
2488 	if (err_code)
2489 		return err_code;
2490 
2491 	if (udata && (udata->inlen < IRDMA_CREATE_CQ_MIN_REQ_LEN ||
2492 		      udata->outlen < IRDMA_CREATE_CQ_MIN_RESP_LEN))
2493 		return -EINVAL;
2494 
2495 	err_code = irdma_alloc_rsrc(rf, rf->allocated_cqs, rf->max_cq, &cq_num,
2496 				    &rf->next_cq);
2497 	if (err_code)
2498 		return err_code;
2499 
2500 	cq = &iwcq->sc_cq;
2501 	cq->back_cq = iwcq;
2502 	refcount_set(&iwcq->refcnt, 1);
2503 	spin_lock_init(&iwcq->lock);
2504 	INIT_LIST_HEAD(&iwcq->resize_list);
2505 	INIT_LIST_HEAD(&iwcq->cmpl_generated);
2506 	iwcq->cq_num = cq_num;
2507 	info.dev = dev;
2508 	ukinfo->cq_size = max(entries, 4);
2509 	ukinfo->cq_id = cq_num;
2510 	cqe_64byte_ena = dev->hw_attrs.uk_attrs.feature_flags & IRDMA_FEATURE_64_BYTE_CQE ?
2511 			 true : false;
2512 	ukinfo->avoid_mem_cflct = cqe_64byte_ena;
2513 	iwcq->ibcq.cqe = info.cq_uk_init_info.cq_size;
2514 	if (attr->comp_vector < rf->ceqs_count)
2515 		info.ceq_id = attr->comp_vector;
2516 	info.ceq_id_valid = true;
2517 	info.ceqe_mask = 1;
2518 	info.type = IRDMA_CQ_TYPE_IWARP;
2519 	info.vsi = &iwdev->vsi;
2520 
2521 	if (udata) {
2522 		struct irdma_ucontext *ucontext;
2523 		struct irdma_create_cq_req req = {};
2524 		struct irdma_cq_mr *cqmr;
2525 		struct irdma_pbl *iwpbl;
2526 		struct irdma_pbl *iwpbl_shadow;
2527 		struct irdma_cq_mr *cqmr_shadow;
2528 
2529 		iwcq->user_mode = true;
2530 		ucontext =
2531 			rdma_udata_to_drv_context(udata, struct irdma_ucontext,
2532 						  ibucontext);
2533 		if (ib_copy_from_udata(&req, udata,
2534 				       min(sizeof(req), udata->inlen))) {
2535 			err_code = -EFAULT;
2536 			goto cq_free_rsrc;
2537 		}
2538 
2539 		spin_lock_irqsave(&ucontext->cq_reg_mem_list_lock, flags);
2540 		iwpbl = irdma_get_pbl((unsigned long)req.user_cq_buf,
2541 				      &ucontext->cq_reg_mem_list);
2542 		spin_unlock_irqrestore(&ucontext->cq_reg_mem_list_lock, flags);
2543 		if (!iwpbl) {
2544 			err_code = -EPROTO;
2545 			goto cq_free_rsrc;
2546 		}
2547 
2548 		cqmr = &iwpbl->cq_mr;
2549 
2550 		if (rf->sc_dev.hw_attrs.uk_attrs.feature_flags &
2551 		    IRDMA_FEATURE_CQ_RESIZE && !ucontext->legacy_mode) {
2552 			spin_lock_irqsave(&ucontext->cq_reg_mem_list_lock, flags);
2553 			iwpbl_shadow = irdma_get_pbl(
2554 					(unsigned long)req.user_shadow_area,
2555 					&ucontext->cq_reg_mem_list);
2556 			spin_unlock_irqrestore(&ucontext->cq_reg_mem_list_lock, flags);
2557 
2558 			if (!iwpbl_shadow) {
2559 				err_code = -EPROTO;
2560 				goto cq_free_rsrc;
2561 			}
2562 			cqmr_shadow = &iwpbl_shadow->cq_mr;
2563 			info.shadow_area_pa = cqmr_shadow->cq_pbl.addr;
2564 			cqmr->split = true;
2565 		} else {
2566 			info.shadow_area_pa = cqmr->shadow;
2567 		}
2568 		if (iwpbl->pbl_allocated) {
2569 			info.virtual_map = true;
2570 			info.pbl_chunk_size = 1;
2571 			info.first_pm_pbl_idx = cqmr->cq_pbl.idx;
2572 		} else {
2573 			info.cq_base_pa = cqmr->cq_pbl.addr;
2574 		}
2575 	} else {
2576 		/* Kmode allocations */
2577 		int rsize;
2578 
2579 		if (entries < 1 || entries > rf->max_cqe) {
2580 			err_code = -EINVAL;
2581 			goto cq_free_rsrc;
2582 		}
2583 
2584 		entries++;
2585 		if (!cqe_64byte_ena && dev->hw_attrs.uk_attrs.hw_rev >= IRDMA_GEN_2)
2586 			entries *= 2;
2587 
2588 		if (entries & 1)
2589 			entries += 1; /* cq size must be an even number */
2590 
2591 		ukinfo->cq_size = entries;
2592 
2593 		if (cqe_64byte_ena)
2594 			rsize = info.cq_uk_init_info.cq_size * sizeof(struct irdma_extended_cqe);
2595 		else
2596 			rsize = info.cq_uk_init_info.cq_size * sizeof(struct irdma_cqe);
2597 		iwcq->kmem.size = ALIGN(round_up(rsize, 256), 256);
2598 		iwcq->kmem.va = dma_alloc_coherent(dev->hw->device,
2599 						   iwcq->kmem.size,
2600 						   &iwcq->kmem.pa, GFP_KERNEL);
2601 		if (!iwcq->kmem.va) {
2602 			err_code = -ENOMEM;
2603 			goto cq_free_rsrc;
2604 		}
2605 
2606 		iwcq->kmem_shadow.size = ALIGN(IRDMA_SHADOW_AREA_SIZE << 3,
2607 					       64);
2608 		iwcq->kmem_shadow.va = dma_alloc_coherent(dev->hw->device,
2609 							  iwcq->kmem_shadow.size,
2610 							  &iwcq->kmem_shadow.pa,
2611 							  GFP_KERNEL);
2612 		if (!iwcq->kmem_shadow.va) {
2613 			err_code = -ENOMEM;
2614 			goto cq_free_rsrc;
2615 		}
2616 		info.shadow_area_pa = iwcq->kmem_shadow.pa;
2617 		ukinfo->shadow_area = iwcq->kmem_shadow.va;
2618 		ukinfo->cq_base = iwcq->kmem.va;
2619 		info.cq_base_pa = iwcq->kmem.pa;
2620 	}
2621 
2622 	info.shadow_read_threshold = min(info.cq_uk_init_info.cq_size / 2,
2623 					 (u32)IRDMA_MAX_CQ_READ_THRESH);
2624 
2625 	if (irdma_sc_cq_init(cq, &info)) {
2626 		ibdev_dbg(&iwdev->ibdev, "VERBS: init cq fail\n");
2627 		err_code = -EPROTO;
2628 		goto cq_free_rsrc;
2629 	}
2630 
2631 	cqp_request = irdma_alloc_and_get_cqp_request(&rf->cqp, true);
2632 	if (!cqp_request) {
2633 		err_code = -ENOMEM;
2634 		goto cq_free_rsrc;
2635 	}
2636 
2637 	cqp_info = &cqp_request->info;
2638 	cqp_info->cqp_cmd = IRDMA_OP_CQ_CREATE;
2639 	cqp_info->post_sq = 1;
2640 	cqp_info->in.u.cq_create.cq = cq;
2641 	cqp_info->in.u.cq_create.check_overflow = true;
2642 	cqp_info->in.u.cq_create.scratch = (uintptr_t)cqp_request;
2643 	err_code = irdma_handle_cqp_op(rf, cqp_request);
2644 	irdma_put_cqp_request(&rf->cqp, cqp_request);
2645 	if (err_code)
2646 		goto cq_free_rsrc;
2647 
2648 	if (udata) {
2649 		struct irdma_create_cq_resp resp = {};
2650 
2651 		resp.cq_id = info.cq_uk_init_info.cq_id;
2652 		resp.cq_size = info.cq_uk_init_info.cq_size;
2653 		if (ib_copy_to_udata(udata, &resp,
2654 				     min(sizeof(resp), udata->outlen))) {
2655 			ibdev_dbg(&iwdev->ibdev,
2656 				  "VERBS: copy to user data\n");
2657 			err_code = -EPROTO;
2658 			goto cq_destroy;
2659 		}
2660 	}
2661 	rf->cq_table[cq_num] = iwcq;
2662 	init_completion(&iwcq->free_cq);
2663 
2664 	return 0;
2665 cq_destroy:
2666 	irdma_cq_wq_destroy(rf, cq);
2667 cq_free_rsrc:
2668 	irdma_cq_free_rsrc(rf, iwcq);
2669 
2670 	return err_code;
2671 }
2672 
2673 /**
2674  * irdma_get_mr_access - get hw MR access permissions from IB access flags
2675  * @access: IB access flags
2676  * @hw_rev: Hardware version
2677  */
irdma_get_mr_access(int access,u8 hw_rev)2678 static inline u16 irdma_get_mr_access(int access, u8 hw_rev)
2679 {
2680 	u16 hw_access = 0;
2681 
2682 	hw_access |= (access & IB_ACCESS_LOCAL_WRITE) ?
2683 		     IRDMA_ACCESS_FLAGS_LOCALWRITE : 0;
2684 	hw_access |= (access & IB_ACCESS_REMOTE_WRITE) ?
2685 		     IRDMA_ACCESS_FLAGS_REMOTEWRITE : 0;
2686 	hw_access |= (access & IB_ACCESS_REMOTE_READ) ?
2687 		     IRDMA_ACCESS_FLAGS_REMOTEREAD : 0;
2688 	if (hw_rev >= IRDMA_GEN_3) {
2689 		hw_access |= (access & IB_ACCESS_MW_BIND) ?
2690 			     IRDMA_ACCESS_FLAGS_BIND_WINDOW : 0;
2691 	}
2692 	hw_access |= (access & IB_ZERO_BASED) ?
2693 		     IRDMA_ACCESS_FLAGS_ZERO_BASED : 0;
2694 	hw_access |= IRDMA_ACCESS_FLAGS_LOCALREAD;
2695 
2696 	return hw_access;
2697 }
2698 
2699 /**
2700  * irdma_free_stag - free stag resource
2701  * @iwdev: irdma device
2702  * @stag: stag to free
2703  */
irdma_free_stag(struct irdma_device * iwdev,u32 stag)2704 static void irdma_free_stag(struct irdma_device *iwdev, u32 stag)
2705 {
2706 	u32 stag_idx;
2707 
2708 	stag_idx = (stag & iwdev->rf->mr_stagmask) >> IRDMA_CQPSQ_STAG_IDX_S;
2709 	irdma_free_rsrc(iwdev->rf, iwdev->rf->allocated_mrs, stag_idx);
2710 }
2711 
2712 /**
2713  * irdma_create_stag - create random stag
2714  * @iwdev: irdma device
2715  */
irdma_create_stag(struct irdma_device * iwdev)2716 static u32 irdma_create_stag(struct irdma_device *iwdev)
2717 {
2718 	u32 stag = 0;
2719 	u32 stag_index = 0;
2720 	u32 next_stag_index;
2721 	u32 driver_key;
2722 	u32 random;
2723 	u8 consumer_key;
2724 	int ret;
2725 
2726 	get_random_bytes(&random, sizeof(random));
2727 	consumer_key = (u8)random;
2728 
2729 	driver_key = random & ~iwdev->rf->mr_stagmask;
2730 	next_stag_index = (random & iwdev->rf->mr_stagmask) >> 8;
2731 	next_stag_index %= iwdev->rf->max_mr;
2732 
2733 	ret = irdma_alloc_rsrc(iwdev->rf, iwdev->rf->allocated_mrs,
2734 			       iwdev->rf->max_mr, &stag_index,
2735 			       &next_stag_index);
2736 	if (ret)
2737 		return stag;
2738 	stag = stag_index << IRDMA_CQPSQ_STAG_IDX_S;
2739 	stag |= driver_key;
2740 	stag += (u32)consumer_key;
2741 
2742 	return stag;
2743 }
2744 
2745 /**
2746  * irdma_next_pbl_addr - Get next pbl address
2747  * @pbl: pointer to a pble
2748  * @pinfo: info pointer
2749  * @idx: index
2750  */
irdma_next_pbl_addr(u64 * pbl,struct irdma_pble_info ** pinfo,u32 * idx)2751 static inline u64 *irdma_next_pbl_addr(u64 *pbl, struct irdma_pble_info **pinfo,
2752 				       u32 *idx)
2753 {
2754 	*idx += 1;
2755 	if (!(*pinfo) || *idx != (*pinfo)->cnt)
2756 		return ++pbl;
2757 	*idx = 0;
2758 	(*pinfo)++;
2759 
2760 	return (*pinfo)->addr;
2761 }
2762 
2763 /**
2764  * irdma_copy_user_pgaddrs - copy user page address to pble's os locally
2765  * @iwmr: iwmr for IB's user page addresses
2766  * @pbl: ple pointer to save 1 level or 0 level pble
2767  * @level: indicated level 0, 1 or 2
2768  */
irdma_copy_user_pgaddrs(struct irdma_mr * iwmr,u64 * pbl,enum irdma_pble_level level)2769 static void irdma_copy_user_pgaddrs(struct irdma_mr *iwmr, u64 *pbl,
2770 				    enum irdma_pble_level level)
2771 {
2772 	struct ib_umem *region = iwmr->region;
2773 	struct irdma_pbl *iwpbl = &iwmr->iwpbl;
2774 	struct irdma_pble_alloc *palloc = &iwpbl->pble_alloc;
2775 	struct irdma_pble_info *pinfo;
2776 	struct ib_block_iter biter;
2777 	u32 idx = 0;
2778 	u32 pbl_cnt = 0;
2779 
2780 	pinfo = (level == PBLE_LEVEL_1) ? NULL : palloc->level2.leaf;
2781 
2782 	if (iwmr->type == IRDMA_MEMREG_TYPE_QP)
2783 		iwpbl->qp_mr.sq_page = sg_page(region->sgt_append.sgt.sgl);
2784 
2785 	rdma_umem_for_each_dma_block(region, &biter, iwmr->page_size) {
2786 		*pbl = rdma_block_iter_dma_address(&biter);
2787 		if (++pbl_cnt == palloc->total_cnt)
2788 			break;
2789 		pbl = irdma_next_pbl_addr(pbl, &pinfo, &idx);
2790 	}
2791 }
2792 
2793 /**
2794  * irdma_check_mem_contiguous - check if pbls stored in arr are contiguous
2795  * @arr: lvl1 pbl array
2796  * @npages: page count
2797  * @pg_size: page size
2798  *
2799  */
irdma_check_mem_contiguous(u64 * arr,u32 npages,u32 pg_size)2800 static bool irdma_check_mem_contiguous(u64 *arr, u32 npages, u32 pg_size)
2801 {
2802 	u32 pg_idx;
2803 
2804 	for (pg_idx = 0; pg_idx < npages; pg_idx++) {
2805 		if ((*arr + (pg_size * pg_idx)) != arr[pg_idx])
2806 			return false;
2807 	}
2808 
2809 	return true;
2810 }
2811 
2812 /**
2813  * irdma_check_mr_contiguous - check if MR is physically contiguous
2814  * @palloc: pbl allocation struct
2815  * @pg_size: page size
2816  */
irdma_check_mr_contiguous(struct irdma_pble_alloc * palloc,u32 pg_size)2817 static bool irdma_check_mr_contiguous(struct irdma_pble_alloc *palloc,
2818 				      u32 pg_size)
2819 {
2820 	struct irdma_pble_level2 *lvl2 = &palloc->level2;
2821 	struct irdma_pble_info *leaf = lvl2->leaf;
2822 	u64 *arr = NULL;
2823 	u64 *start_addr = NULL;
2824 	int i;
2825 	bool ret;
2826 
2827 	if (palloc->level == PBLE_LEVEL_1) {
2828 		arr = palloc->level1.addr;
2829 		ret = irdma_check_mem_contiguous(arr, palloc->total_cnt,
2830 						 pg_size);
2831 		return ret;
2832 	}
2833 
2834 	start_addr = leaf->addr;
2835 
2836 	for (i = 0; i < lvl2->leaf_cnt; i++, leaf++) {
2837 		arr = leaf->addr;
2838 		if ((*start_addr + (i * pg_size * PBLE_PER_PAGE)) != *arr)
2839 			return false;
2840 		ret = irdma_check_mem_contiguous(arr, leaf->cnt, pg_size);
2841 		if (!ret)
2842 			return false;
2843 	}
2844 
2845 	return true;
2846 }
2847 
2848 /**
2849  * irdma_setup_pbles - copy user pg address to pble's
2850  * @rf: RDMA PCI function
2851  * @iwmr: mr pointer for this memory registration
2852  * @lvl: requested pble levels
2853  */
irdma_setup_pbles(struct irdma_pci_f * rf,struct irdma_mr * iwmr,u8 lvl)2854 static int irdma_setup_pbles(struct irdma_pci_f *rf, struct irdma_mr *iwmr,
2855 			     u8 lvl)
2856 {
2857 	struct irdma_pbl *iwpbl = &iwmr->iwpbl;
2858 	struct irdma_pble_alloc *palloc = &iwpbl->pble_alloc;
2859 	struct irdma_pble_info *pinfo;
2860 	u64 *pbl;
2861 	int status;
2862 	enum irdma_pble_level level = PBLE_LEVEL_1;
2863 
2864 	if (lvl) {
2865 		status = irdma_get_pble(rf->pble_rsrc, palloc, iwmr->page_cnt,
2866 					lvl);
2867 		if (status)
2868 			return status;
2869 
2870 		iwpbl->pbl_allocated = true;
2871 		level = palloc->level;
2872 		pinfo = (level == PBLE_LEVEL_1) ? &palloc->level1 :
2873 						  palloc->level2.leaf;
2874 		pbl = pinfo->addr;
2875 	} else {
2876 		pbl = iwmr->pgaddrmem;
2877 	}
2878 
2879 	irdma_copy_user_pgaddrs(iwmr, pbl, level);
2880 
2881 	if (lvl)
2882 		iwmr->pgaddrmem[0] = *pbl;
2883 
2884 	return 0;
2885 }
2886 
2887 /**
2888  * irdma_handle_q_mem - handle memory for qp and cq
2889  * @iwdev: irdma device
2890  * @req: information for q memory management
2891  * @iwpbl: pble struct
2892  * @lvl: pble level mask
2893  */
irdma_handle_q_mem(struct irdma_device * iwdev,struct irdma_mem_reg_req * req,struct irdma_pbl * iwpbl,u8 lvl)2894 static int irdma_handle_q_mem(struct irdma_device *iwdev,
2895 			      struct irdma_mem_reg_req *req,
2896 			      struct irdma_pbl *iwpbl, u8 lvl)
2897 {
2898 	struct irdma_pble_alloc *palloc = &iwpbl->pble_alloc;
2899 	struct irdma_mr *iwmr = iwpbl->iwmr;
2900 	struct irdma_qp_mr *qpmr = &iwpbl->qp_mr;
2901 	struct irdma_cq_mr *cqmr = &iwpbl->cq_mr;
2902 	struct irdma_srq_mr *srqmr = &iwpbl->srq_mr;
2903 	struct irdma_hmc_pble *hmc_p;
2904 	u64 *arr = iwmr->pgaddrmem;
2905 	u32 pg_size, total;
2906 	int err = 0;
2907 	bool ret = true;
2908 
2909 	pg_size = iwmr->page_size;
2910 	err = irdma_setup_pbles(iwdev->rf, iwmr, lvl);
2911 	if (err)
2912 		return err;
2913 
2914 	if (lvl)
2915 		arr = palloc->level1.addr;
2916 
2917 	switch (iwmr->type) {
2918 	case IRDMA_MEMREG_TYPE_QP:
2919 		total = req->sq_pages + req->rq_pages;
2920 		hmc_p = &qpmr->sq_pbl;
2921 		qpmr->shadow = (dma_addr_t)arr[total];
2922 		/* Need to use physical address for RQ of QP
2923 		 * in case it is associated with SRQ.
2924 		 */
2925 		qpmr->rq_pa = (dma_addr_t)arr[req->sq_pages];
2926 		if (lvl) {
2927 			ret = irdma_check_mem_contiguous(arr, req->sq_pages,
2928 							 pg_size);
2929 			if (ret)
2930 				ret = irdma_check_mem_contiguous(&arr[req->sq_pages],
2931 								 req->rq_pages,
2932 								 pg_size);
2933 		}
2934 
2935 		if (!ret) {
2936 			hmc_p->idx = palloc->level1.idx;
2937 			hmc_p = &qpmr->rq_pbl;
2938 			hmc_p->idx = palloc->level1.idx + req->sq_pages;
2939 		} else {
2940 			hmc_p->addr = arr[0];
2941 			hmc_p = &qpmr->rq_pbl;
2942 			hmc_p->addr = arr[req->sq_pages];
2943 		}
2944 		break;
2945 	case IRDMA_MEMREG_TYPE_SRQ:
2946 		hmc_p = &srqmr->srq_pbl;
2947 		srqmr->shadow = (dma_addr_t)arr[req->rq_pages];
2948 		if (lvl)
2949 			ret = irdma_check_mem_contiguous(arr, req->rq_pages,
2950 							 pg_size);
2951 
2952 		if (!ret)
2953 			hmc_p->idx = palloc->level1.idx;
2954 		else
2955 			hmc_p->addr = arr[0];
2956 	break;
2957 	case IRDMA_MEMREG_TYPE_CQ:
2958 		hmc_p = &cqmr->cq_pbl;
2959 
2960 		if (!cqmr->split)
2961 			cqmr->shadow = (dma_addr_t)arr[req->cq_pages];
2962 
2963 		if (lvl)
2964 			ret = irdma_check_mem_contiguous(arr, req->cq_pages,
2965 							 pg_size);
2966 
2967 		if (!ret)
2968 			hmc_p->idx = palloc->level1.idx;
2969 		else
2970 			hmc_p->addr = arr[0];
2971 	break;
2972 	default:
2973 		ibdev_dbg(&iwdev->ibdev, "VERBS: MR type error\n");
2974 		err = -EINVAL;
2975 	}
2976 
2977 	if (lvl && ret) {
2978 		irdma_free_pble(iwdev->rf->pble_rsrc, palloc);
2979 		iwpbl->pbl_allocated = false;
2980 	}
2981 
2982 	return err;
2983 }
2984 
2985 /**
2986  * irdma_hw_alloc_mw - create the hw memory window
2987  * @iwdev: irdma device
2988  * @iwmr: pointer to memory window info
2989  */
irdma_hw_alloc_mw(struct irdma_device * iwdev,struct irdma_mr * iwmr)2990 static int irdma_hw_alloc_mw(struct irdma_device *iwdev, struct irdma_mr *iwmr)
2991 {
2992 	struct irdma_mw_alloc_info *info;
2993 	struct irdma_pd *iwpd = to_iwpd(iwmr->ibmr.pd);
2994 	struct irdma_cqp_request *cqp_request;
2995 	struct cqp_cmds_info *cqp_info;
2996 	int status;
2997 
2998 	cqp_request = irdma_alloc_and_get_cqp_request(&iwdev->rf->cqp, true);
2999 	if (!cqp_request)
3000 		return -ENOMEM;
3001 
3002 	cqp_info = &cqp_request->info;
3003 	info = &cqp_info->in.u.mw_alloc.info;
3004 	memset(info, 0, sizeof(*info));
3005 	if (iwmr->ibmw.type == IB_MW_TYPE_1)
3006 		info->mw_wide = true;
3007 
3008 	info->page_size = PAGE_SIZE;
3009 	info->mw_stag_index = iwmr->stag >> IRDMA_CQPSQ_STAG_IDX_S;
3010 	info->pd_id = iwpd->sc_pd.pd_id;
3011 	info->remote_access = true;
3012 	cqp_info->cqp_cmd = IRDMA_OP_MW_ALLOC;
3013 	cqp_info->post_sq = 1;
3014 	cqp_info->in.u.mw_alloc.dev = &iwdev->rf->sc_dev;
3015 	cqp_info->in.u.mw_alloc.scratch = (uintptr_t)cqp_request;
3016 	status = irdma_handle_cqp_op(iwdev->rf, cqp_request);
3017 	irdma_put_cqp_request(&iwdev->rf->cqp, cqp_request);
3018 
3019 	return status;
3020 }
3021 
3022 /**
3023  * irdma_alloc_mw - Allocate memory window
3024  * @ibmw: Memory Window
3025  * @udata: user data pointer
3026  */
irdma_alloc_mw(struct ib_mw * ibmw,struct ib_udata * udata)3027 static int irdma_alloc_mw(struct ib_mw *ibmw, struct ib_udata *udata)
3028 {
3029 	struct irdma_device *iwdev = to_iwdev(ibmw->device);
3030 	struct irdma_mr *iwmr = to_iwmw(ibmw);
3031 	int err_code;
3032 	u32 stag;
3033 
3034 	stag = irdma_create_stag(iwdev);
3035 	if (!stag)
3036 		return -ENOMEM;
3037 
3038 	iwmr->stag = stag;
3039 	ibmw->rkey = stag;
3040 
3041 	err_code = irdma_hw_alloc_mw(iwdev, iwmr);
3042 	if (err_code) {
3043 		irdma_free_stag(iwdev, stag);
3044 		return err_code;
3045 	}
3046 
3047 	return 0;
3048 }
3049 
3050 /**
3051  * irdma_dealloc_mw - Dealloc memory window
3052  * @ibmw: memory window structure.
3053  */
irdma_dealloc_mw(struct ib_mw * ibmw)3054 static int irdma_dealloc_mw(struct ib_mw *ibmw)
3055 {
3056 	struct ib_pd *ibpd = ibmw->pd;
3057 	struct irdma_pd *iwpd = to_iwpd(ibpd);
3058 	struct irdma_mr *iwmr = to_iwmr((struct ib_mr *)ibmw);
3059 	struct irdma_device *iwdev = to_iwdev(ibmw->device);
3060 	struct irdma_cqp_request *cqp_request;
3061 	struct cqp_cmds_info *cqp_info;
3062 	struct irdma_dealloc_stag_info *info;
3063 
3064 	cqp_request = irdma_alloc_and_get_cqp_request(&iwdev->rf->cqp, true);
3065 	if (!cqp_request)
3066 		return -ENOMEM;
3067 
3068 	cqp_info = &cqp_request->info;
3069 	info = &cqp_info->in.u.dealloc_stag.info;
3070 	memset(info, 0, sizeof(*info));
3071 	info->pd_id = iwpd->sc_pd.pd_id;
3072 	info->stag_idx = ibmw->rkey >> IRDMA_CQPSQ_STAG_IDX_S;
3073 	info->mr = false;
3074 	cqp_info->cqp_cmd = IRDMA_OP_DEALLOC_STAG;
3075 	cqp_info->post_sq = 1;
3076 	cqp_info->in.u.dealloc_stag.dev = &iwdev->rf->sc_dev;
3077 	cqp_info->in.u.dealloc_stag.scratch = (uintptr_t)cqp_request;
3078 	irdma_handle_cqp_op(iwdev->rf, cqp_request);
3079 	irdma_put_cqp_request(&iwdev->rf->cqp, cqp_request);
3080 	irdma_free_stag(iwdev, iwmr->stag);
3081 
3082 	return 0;
3083 }
3084 
3085 /**
3086  * irdma_hw_alloc_stag - cqp command to allocate stag
3087  * @iwdev: irdma device
3088  * @iwmr: irdma mr pointer
3089  */
irdma_hw_alloc_stag(struct irdma_device * iwdev,struct irdma_mr * iwmr)3090 static int irdma_hw_alloc_stag(struct irdma_device *iwdev,
3091 			       struct irdma_mr *iwmr)
3092 {
3093 	struct irdma_allocate_stag_info *info;
3094 	struct ib_pd *pd = iwmr->ibmr.pd;
3095 	struct irdma_pd *iwpd = to_iwpd(pd);
3096 	int status;
3097 	struct irdma_cqp_request *cqp_request;
3098 	struct cqp_cmds_info *cqp_info;
3099 
3100 	cqp_request = irdma_alloc_and_get_cqp_request(&iwdev->rf->cqp, true);
3101 	if (!cqp_request)
3102 		return -ENOMEM;
3103 
3104 	cqp_info = &cqp_request->info;
3105 	info = &cqp_info->in.u.alloc_stag.info;
3106 	memset(info, 0, sizeof(*info));
3107 	info->page_size = PAGE_SIZE;
3108 	info->stag_idx = iwmr->stag >> IRDMA_CQPSQ_STAG_IDX_S;
3109 	info->pd_id = iwpd->sc_pd.pd_id;
3110 	info->total_len = iwmr->len;
3111 	info->all_memory = pd->flags & IB_PD_UNSAFE_GLOBAL_RKEY;
3112 	info->remote_access = true;
3113 	cqp_info->cqp_cmd = IRDMA_OP_ALLOC_STAG;
3114 	cqp_info->post_sq = 1;
3115 	cqp_info->in.u.alloc_stag.dev = &iwdev->rf->sc_dev;
3116 	cqp_info->in.u.alloc_stag.scratch = (uintptr_t)cqp_request;
3117 	status = irdma_handle_cqp_op(iwdev->rf, cqp_request);
3118 	irdma_put_cqp_request(&iwdev->rf->cqp, cqp_request);
3119 	if (status)
3120 		return status;
3121 
3122 	iwmr->is_hwreg = 1;
3123 	return 0;
3124 }
3125 
3126 /**
3127  * irdma_alloc_mr - register stag for fast memory registration
3128  * @pd: ibpd pointer
3129  * @mr_type: memory for stag registrion
3130  * @max_num_sg: man number of pages
3131  */
irdma_alloc_mr(struct ib_pd * pd,enum ib_mr_type mr_type,u32 max_num_sg)3132 static struct ib_mr *irdma_alloc_mr(struct ib_pd *pd, enum ib_mr_type mr_type,
3133 				    u32 max_num_sg)
3134 {
3135 	struct irdma_device *iwdev = to_iwdev(pd->device);
3136 	struct irdma_pble_alloc *palloc;
3137 	struct irdma_pbl *iwpbl;
3138 	struct irdma_mr *iwmr;
3139 	u32 stag;
3140 	int err_code;
3141 
3142 	iwmr = kzalloc(sizeof(*iwmr), GFP_KERNEL);
3143 	if (!iwmr)
3144 		return ERR_PTR(-ENOMEM);
3145 
3146 	stag = irdma_create_stag(iwdev);
3147 	if (!stag) {
3148 		err_code = -ENOMEM;
3149 		goto err;
3150 	}
3151 
3152 	iwmr->stag = stag;
3153 	iwmr->ibmr.rkey = stag;
3154 	iwmr->ibmr.lkey = stag;
3155 	iwmr->ibmr.pd = pd;
3156 	iwmr->ibmr.device = pd->device;
3157 	iwpbl = &iwmr->iwpbl;
3158 	iwpbl->iwmr = iwmr;
3159 	iwmr->type = IRDMA_MEMREG_TYPE_MEM;
3160 	palloc = &iwpbl->pble_alloc;
3161 	iwmr->page_cnt = max_num_sg;
3162 	/* Use system PAGE_SIZE as the sg page sizes are unknown at this point */
3163 	iwmr->len = max_num_sg * PAGE_SIZE;
3164 	err_code = irdma_get_pble(iwdev->rf->pble_rsrc, palloc, iwmr->page_cnt,
3165 				  false);
3166 	if (err_code)
3167 		goto err_get_pble;
3168 
3169 	err_code = irdma_hw_alloc_stag(iwdev, iwmr);
3170 	if (err_code)
3171 		goto err_alloc_stag;
3172 
3173 	iwpbl->pbl_allocated = true;
3174 
3175 	return &iwmr->ibmr;
3176 err_alloc_stag:
3177 	irdma_free_pble(iwdev->rf->pble_rsrc, palloc);
3178 err_get_pble:
3179 	irdma_free_stag(iwdev, stag);
3180 err:
3181 	kfree(iwmr);
3182 
3183 	return ERR_PTR(err_code);
3184 }
3185 
3186 /**
3187  * irdma_set_page - populate pbl list for fmr
3188  * @ibmr: ib mem to access iwarp mr pointer
3189  * @addr: page dma address fro pbl list
3190  */
irdma_set_page(struct ib_mr * ibmr,u64 addr)3191 static int irdma_set_page(struct ib_mr *ibmr, u64 addr)
3192 {
3193 	struct irdma_mr *iwmr = to_iwmr(ibmr);
3194 	struct irdma_pbl *iwpbl = &iwmr->iwpbl;
3195 	struct irdma_pble_alloc *palloc = &iwpbl->pble_alloc;
3196 	u64 *pbl;
3197 
3198 	if (unlikely(iwmr->npages == iwmr->page_cnt))
3199 		return -ENOMEM;
3200 
3201 	if (palloc->level == PBLE_LEVEL_2) {
3202 		struct irdma_pble_info *palloc_info =
3203 			palloc->level2.leaf + (iwmr->npages >> PBLE_512_SHIFT);
3204 
3205 		palloc_info->addr[iwmr->npages & (PBLE_PER_PAGE - 1)] = addr;
3206 	} else {
3207 		pbl = palloc->level1.addr;
3208 		pbl[iwmr->npages] = addr;
3209 	}
3210 	iwmr->npages++;
3211 
3212 	return 0;
3213 }
3214 
3215 /**
3216  * irdma_map_mr_sg - map of sg list for fmr
3217  * @ibmr: ib mem to access iwarp mr pointer
3218  * @sg: scatter gather list
3219  * @sg_nents: number of sg pages
3220  * @sg_offset: scatter gather list for fmr
3221  */
irdma_map_mr_sg(struct ib_mr * ibmr,struct scatterlist * sg,int sg_nents,unsigned int * sg_offset)3222 static int irdma_map_mr_sg(struct ib_mr *ibmr, struct scatterlist *sg,
3223 			   int sg_nents, unsigned int *sg_offset)
3224 {
3225 	struct irdma_mr *iwmr = to_iwmr(ibmr);
3226 
3227 	iwmr->npages = 0;
3228 
3229 	return ib_sg_to_pages(ibmr, sg, sg_nents, sg_offset, irdma_set_page);
3230 }
3231 
3232 /**
3233  * irdma_hwreg_mr - send cqp command for memory registration
3234  * @iwdev: irdma device
3235  * @iwmr: irdma mr pointer
3236  * @access: access for MR
3237  */
irdma_hwreg_mr(struct irdma_device * iwdev,struct irdma_mr * iwmr,u16 access)3238 static int irdma_hwreg_mr(struct irdma_device *iwdev, struct irdma_mr *iwmr,
3239 			  u16 access)
3240 {
3241 	struct irdma_pbl *iwpbl = &iwmr->iwpbl;
3242 	struct irdma_reg_ns_stag_info *stag_info;
3243 	struct ib_pd *pd = iwmr->ibmr.pd;
3244 	struct irdma_pd *iwpd = to_iwpd(pd);
3245 	struct irdma_pble_alloc *palloc = &iwpbl->pble_alloc;
3246 	struct irdma_cqp_request *cqp_request;
3247 	struct cqp_cmds_info *cqp_info;
3248 	int ret;
3249 
3250 	cqp_request = irdma_alloc_and_get_cqp_request(&iwdev->rf->cqp, true);
3251 	if (!cqp_request)
3252 		return -ENOMEM;
3253 
3254 	cqp_info = &cqp_request->info;
3255 	stag_info = &cqp_info->in.u.mr_reg_non_shared.info;
3256 	memset(stag_info, 0, sizeof(*stag_info));
3257 	stag_info->va = iwpbl->user_base;
3258 	stag_info->stag_idx = iwmr->stag >> IRDMA_CQPSQ_STAG_IDX_S;
3259 	stag_info->stag_key = (u8)iwmr->stag;
3260 	stag_info->total_len = iwmr->len;
3261 	stag_info->access_rights = irdma_get_mr_access(access,
3262 						       iwdev->rf->sc_dev.hw_attrs.uk_attrs.hw_rev);
3263 	if (iwdev->rf->sc_dev.hw_attrs.uk_attrs.feature_flags & IRDMA_FEATURE_ATOMIC_OPS)
3264 		stag_info->remote_atomics_en = (access & IB_ACCESS_REMOTE_ATOMIC) ? 1 : 0;
3265 	stag_info->pd_id = iwpd->sc_pd.pd_id;
3266 	stag_info->all_memory = pd->flags & IB_PD_UNSAFE_GLOBAL_RKEY;
3267 	if (stag_info->access_rights & IRDMA_ACCESS_FLAGS_ZERO_BASED)
3268 		stag_info->addr_type = IRDMA_ADDR_TYPE_ZERO_BASED;
3269 	else
3270 		stag_info->addr_type = IRDMA_ADDR_TYPE_VA_BASED;
3271 	stag_info->page_size = iwmr->page_size;
3272 
3273 	if (iwpbl->pbl_allocated) {
3274 		if (palloc->level == PBLE_LEVEL_1) {
3275 			stag_info->first_pm_pbl_index = palloc->level1.idx;
3276 			stag_info->chunk_size = 1;
3277 		} else {
3278 			stag_info->first_pm_pbl_index = palloc->level2.root.idx;
3279 			stag_info->chunk_size = 3;
3280 		}
3281 	} else {
3282 		stag_info->reg_addr_pa = iwmr->pgaddrmem[0];
3283 	}
3284 
3285 	cqp_info->cqp_cmd = IRDMA_OP_MR_REG_NON_SHARED;
3286 	cqp_info->post_sq = 1;
3287 	cqp_info->in.u.mr_reg_non_shared.dev = &iwdev->rf->sc_dev;
3288 	cqp_info->in.u.mr_reg_non_shared.scratch = (uintptr_t)cqp_request;
3289 	ret = irdma_handle_cqp_op(iwdev->rf, cqp_request);
3290 	irdma_put_cqp_request(&iwdev->rf->cqp, cqp_request);
3291 
3292 	if (!ret)
3293 		iwmr->is_hwreg = 1;
3294 
3295 	return ret;
3296 }
3297 
irdma_reg_user_mr_type_mem(struct irdma_mr * iwmr,int access,bool create_stag)3298 static int irdma_reg_user_mr_type_mem(struct irdma_mr *iwmr, int access,
3299 				      bool create_stag)
3300 {
3301 	struct irdma_device *iwdev = to_iwdev(iwmr->ibmr.device);
3302 	struct irdma_pbl *iwpbl = &iwmr->iwpbl;
3303 	u32 stag = 0;
3304 	u8 lvl;
3305 	int err;
3306 
3307 	lvl = iwmr->page_cnt != 1 ? PBLE_LEVEL_1 | PBLE_LEVEL_2 : PBLE_LEVEL_0;
3308 
3309 	err = irdma_setup_pbles(iwdev->rf, iwmr, lvl);
3310 	if (err)
3311 		return err;
3312 
3313 	if (lvl) {
3314 		err = irdma_check_mr_contiguous(&iwpbl->pble_alloc,
3315 						iwmr->page_size);
3316 		if (err) {
3317 			irdma_free_pble(iwdev->rf->pble_rsrc, &iwpbl->pble_alloc);
3318 			iwpbl->pbl_allocated = false;
3319 		}
3320 	}
3321 
3322 	if (create_stag) {
3323 		stag = irdma_create_stag(iwdev);
3324 		if (!stag) {
3325 			err = -ENOMEM;
3326 			goto free_pble;
3327 		}
3328 
3329 		iwmr->stag = stag;
3330 		iwmr->ibmr.rkey = stag;
3331 		iwmr->ibmr.lkey = stag;
3332 	}
3333 
3334 	err = irdma_hwreg_mr(iwdev, iwmr, access);
3335 	if (err)
3336 		goto err_hwreg;
3337 
3338 	return 0;
3339 
3340 err_hwreg:
3341 	if (stag)
3342 		irdma_free_stag(iwdev, stag);
3343 
3344 free_pble:
3345 	if (iwpbl->pble_alloc.level != PBLE_LEVEL_0 && iwpbl->pbl_allocated)
3346 		irdma_free_pble(iwdev->rf->pble_rsrc, &iwpbl->pble_alloc);
3347 
3348 	return err;
3349 }
3350 
irdma_alloc_iwmr(struct ib_umem * region,struct ib_pd * pd,u64 virt,enum irdma_memreg_type reg_type)3351 static struct irdma_mr *irdma_alloc_iwmr(struct ib_umem *region,
3352 					 struct ib_pd *pd, u64 virt,
3353 					 enum irdma_memreg_type reg_type)
3354 {
3355 	struct irdma_device *iwdev = to_iwdev(pd->device);
3356 	struct irdma_pbl *iwpbl;
3357 	struct irdma_mr *iwmr;
3358 	unsigned long pgsz_bitmap;
3359 
3360 	iwmr = kzalloc(sizeof(*iwmr), GFP_KERNEL);
3361 	if (!iwmr)
3362 		return ERR_PTR(-ENOMEM);
3363 
3364 	iwpbl = &iwmr->iwpbl;
3365 	iwpbl->iwmr = iwmr;
3366 	iwmr->region = region;
3367 	iwmr->ibmr.pd = pd;
3368 	iwmr->ibmr.device = pd->device;
3369 	iwmr->ibmr.iova = virt;
3370 	iwmr->type = reg_type;
3371 
3372 	pgsz_bitmap = (reg_type == IRDMA_MEMREG_TYPE_MEM) ?
3373 		iwdev->rf->sc_dev.hw_attrs.page_size_cap : SZ_4K;
3374 
3375 	iwmr->page_size = ib_umem_find_best_pgsz(region, pgsz_bitmap, virt);
3376 	if (unlikely(!iwmr->page_size)) {
3377 		kfree(iwmr);
3378 		return ERR_PTR(-EOPNOTSUPP);
3379 	}
3380 
3381 	iwmr->len = region->length;
3382 	iwpbl->user_base = virt;
3383 	iwmr->page_cnt = ib_umem_num_dma_blocks(region, iwmr->page_size);
3384 
3385 	return iwmr;
3386 }
3387 
irdma_free_iwmr(struct irdma_mr * iwmr)3388 static void irdma_free_iwmr(struct irdma_mr *iwmr)
3389 {
3390 	kfree(iwmr);
3391 }
3392 
irdma_reg_user_mr_type_qp(struct irdma_mem_reg_req req,struct ib_udata * udata,struct irdma_mr * iwmr)3393 static int irdma_reg_user_mr_type_qp(struct irdma_mem_reg_req req,
3394 				     struct ib_udata *udata,
3395 				     struct irdma_mr *iwmr)
3396 {
3397 	struct irdma_device *iwdev = to_iwdev(iwmr->ibmr.device);
3398 	struct irdma_pbl *iwpbl = &iwmr->iwpbl;
3399 	struct irdma_ucontext *ucontext = NULL;
3400 	unsigned long flags;
3401 	u32 total;
3402 	int err;
3403 	u8 lvl;
3404 
3405 	/* iWarp: Catch page not starting on OS page boundary */
3406 	if (!rdma_protocol_roce(&iwdev->ibdev, 1) &&
3407 	    ib_umem_offset(iwmr->region))
3408 		return -EINVAL;
3409 
3410 	total = req.sq_pages + req.rq_pages + 1;
3411 	if (total > iwmr->page_cnt)
3412 		return -EINVAL;
3413 
3414 	total = req.sq_pages + req.rq_pages;
3415 	lvl = total > 2 ? PBLE_LEVEL_1 : PBLE_LEVEL_0;
3416 	err = irdma_handle_q_mem(iwdev, &req, iwpbl, lvl);
3417 	if (err)
3418 		return err;
3419 
3420 	ucontext = rdma_udata_to_drv_context(udata, struct irdma_ucontext,
3421 					     ibucontext);
3422 	spin_lock_irqsave(&ucontext->qp_reg_mem_list_lock, flags);
3423 	list_add_tail(&iwpbl->list, &ucontext->qp_reg_mem_list);
3424 	iwpbl->on_list = true;
3425 	spin_unlock_irqrestore(&ucontext->qp_reg_mem_list_lock, flags);
3426 
3427 	return 0;
3428 }
3429 
irdma_reg_user_mr_type_srq(struct irdma_mem_reg_req req,struct ib_udata * udata,struct irdma_mr * iwmr)3430 static int irdma_reg_user_mr_type_srq(struct irdma_mem_reg_req req,
3431 				      struct ib_udata *udata,
3432 				      struct irdma_mr *iwmr)
3433 {
3434 	struct irdma_device *iwdev = to_iwdev(iwmr->ibmr.device);
3435 	struct irdma_pbl *iwpbl = &iwmr->iwpbl;
3436 	struct irdma_ucontext *ucontext;
3437 	unsigned long flags;
3438 	u32 total;
3439 	int err;
3440 	u8 lvl;
3441 
3442 	total = req.rq_pages + IRDMA_SHADOW_PGCNT;
3443 	if (total > iwmr->page_cnt)
3444 		return -EINVAL;
3445 
3446 	lvl = req.rq_pages > 1 ? PBLE_LEVEL_1 : PBLE_LEVEL_0;
3447 	err = irdma_handle_q_mem(iwdev, &req, iwpbl, lvl);
3448 	if (err)
3449 		return err;
3450 
3451 	ucontext = rdma_udata_to_drv_context(udata, struct irdma_ucontext,
3452 					     ibucontext);
3453 	spin_lock_irqsave(&ucontext->srq_reg_mem_list_lock, flags);
3454 	list_add_tail(&iwpbl->list, &ucontext->srq_reg_mem_list);
3455 	iwpbl->on_list = true;
3456 	spin_unlock_irqrestore(&ucontext->srq_reg_mem_list_lock, flags);
3457 
3458 	return 0;
3459 }
3460 
irdma_reg_user_mr_type_cq(struct irdma_mem_reg_req req,struct ib_udata * udata,struct irdma_mr * iwmr)3461 static int irdma_reg_user_mr_type_cq(struct irdma_mem_reg_req req,
3462 				     struct ib_udata *udata,
3463 				     struct irdma_mr *iwmr)
3464 {
3465 	struct irdma_device *iwdev = to_iwdev(iwmr->ibmr.device);
3466 	struct irdma_pbl *iwpbl = &iwmr->iwpbl;
3467 	struct irdma_ucontext *ucontext = NULL;
3468 	u8 shadow_pgcnt = 1;
3469 	unsigned long flags;
3470 	u32 total;
3471 	int err;
3472 	u8 lvl;
3473 
3474 	if (iwdev->rf->sc_dev.hw_attrs.uk_attrs.feature_flags & IRDMA_FEATURE_CQ_RESIZE)
3475 		shadow_pgcnt = 0;
3476 	total = req.cq_pages + shadow_pgcnt;
3477 	if (total > iwmr->page_cnt)
3478 		return -EINVAL;
3479 
3480 	lvl = req.cq_pages > 1 ? PBLE_LEVEL_1 : PBLE_LEVEL_0;
3481 	err = irdma_handle_q_mem(iwdev, &req, iwpbl, lvl);
3482 	if (err)
3483 		return err;
3484 
3485 	ucontext = rdma_udata_to_drv_context(udata, struct irdma_ucontext,
3486 					     ibucontext);
3487 	spin_lock_irqsave(&ucontext->cq_reg_mem_list_lock, flags);
3488 	list_add_tail(&iwpbl->list, &ucontext->cq_reg_mem_list);
3489 	iwpbl->on_list = true;
3490 	spin_unlock_irqrestore(&ucontext->cq_reg_mem_list_lock, flags);
3491 
3492 	return 0;
3493 }
3494 
3495 /**
3496  * irdma_reg_user_mr - Register a user memory region
3497  * @pd: ptr of pd
3498  * @start: virtual start address
3499  * @len: length of mr
3500  * @virt: virtual address
3501  * @access: access of mr
3502  * @dmah: dma handle
3503  * @udata: user data
3504  */
irdma_reg_user_mr(struct ib_pd * pd,u64 start,u64 len,u64 virt,int access,struct ib_dmah * dmah,struct ib_udata * udata)3505 static struct ib_mr *irdma_reg_user_mr(struct ib_pd *pd, u64 start, u64 len,
3506 				       u64 virt, int access,
3507 				       struct ib_dmah *dmah,
3508 				       struct ib_udata *udata)
3509 {
3510 #define IRDMA_MEM_REG_MIN_REQ_LEN offsetofend(struct irdma_mem_reg_req, sq_pages)
3511 	struct irdma_device *iwdev = to_iwdev(pd->device);
3512 	struct irdma_mem_reg_req req = {};
3513 	struct ib_umem *region = NULL;
3514 	struct irdma_mr *iwmr = NULL;
3515 	int err;
3516 
3517 	if (dmah)
3518 		return ERR_PTR(-EOPNOTSUPP);
3519 
3520 	if (len > iwdev->rf->sc_dev.hw_attrs.max_mr_size)
3521 		return ERR_PTR(-EINVAL);
3522 
3523 	if (udata->inlen < IRDMA_MEM_REG_MIN_REQ_LEN)
3524 		return ERR_PTR(-EINVAL);
3525 
3526 	region = ib_umem_get(pd->device, start, len, access);
3527 
3528 	if (IS_ERR(region)) {
3529 		ibdev_dbg(&iwdev->ibdev,
3530 			  "VERBS: Failed to create ib_umem region\n");
3531 		return (struct ib_mr *)region;
3532 	}
3533 
3534 	if (ib_copy_from_udata(&req, udata, min(sizeof(req), udata->inlen))) {
3535 		ib_umem_release(region);
3536 		return ERR_PTR(-EFAULT);
3537 	}
3538 
3539 	iwmr = irdma_alloc_iwmr(region, pd, virt, req.reg_type);
3540 	if (IS_ERR(iwmr)) {
3541 		ib_umem_release(region);
3542 		return (struct ib_mr *)iwmr;
3543 	}
3544 
3545 	switch (req.reg_type) {
3546 	case IRDMA_MEMREG_TYPE_QP:
3547 		err = irdma_reg_user_mr_type_qp(req, udata, iwmr);
3548 		if (err)
3549 			goto error;
3550 
3551 		break;
3552 	case IRDMA_MEMREG_TYPE_SRQ:
3553 		err = irdma_reg_user_mr_type_srq(req, udata, iwmr);
3554 		if (err)
3555 			goto error;
3556 
3557 		break;
3558 	case IRDMA_MEMREG_TYPE_CQ:
3559 		err = irdma_reg_user_mr_type_cq(req, udata, iwmr);
3560 		if (err)
3561 			goto error;
3562 		break;
3563 	case IRDMA_MEMREG_TYPE_MEM:
3564 		err = irdma_reg_user_mr_type_mem(iwmr, access, true);
3565 		if (err)
3566 			goto error;
3567 
3568 		break;
3569 	default:
3570 		err = -EINVAL;
3571 		goto error;
3572 	}
3573 
3574 	return &iwmr->ibmr;
3575 error:
3576 	ib_umem_release(region);
3577 	irdma_free_iwmr(iwmr);
3578 
3579 	return ERR_PTR(err);
3580 }
3581 
irdma_reg_user_mr_dmabuf(struct ib_pd * pd,u64 start,u64 len,u64 virt,int fd,int access,struct ib_dmah * dmah,struct uverbs_attr_bundle * attrs)3582 static struct ib_mr *irdma_reg_user_mr_dmabuf(struct ib_pd *pd, u64 start,
3583 					      u64 len, u64 virt,
3584 					      int fd, int access,
3585 					      struct ib_dmah *dmah,
3586 					      struct uverbs_attr_bundle *attrs)
3587 {
3588 	struct irdma_device *iwdev = to_iwdev(pd->device);
3589 	struct ib_umem_dmabuf *umem_dmabuf;
3590 	struct irdma_mr *iwmr;
3591 	int err;
3592 
3593 	if (dmah)
3594 		return ERR_PTR(-EOPNOTSUPP);
3595 
3596 	if (len > iwdev->rf->sc_dev.hw_attrs.max_mr_size)
3597 		return ERR_PTR(-EINVAL);
3598 
3599 	umem_dmabuf = ib_umem_dmabuf_get_pinned(pd->device, start, len, fd, access);
3600 	if (IS_ERR(umem_dmabuf)) {
3601 		ibdev_dbg(&iwdev->ibdev, "Failed to get dmabuf umem[%pe]\n",
3602 			  umem_dmabuf);
3603 		return ERR_CAST(umem_dmabuf);
3604 	}
3605 
3606 	iwmr = irdma_alloc_iwmr(&umem_dmabuf->umem, pd, virt, IRDMA_MEMREG_TYPE_MEM);
3607 	if (IS_ERR(iwmr)) {
3608 		err = PTR_ERR(iwmr);
3609 		goto err_release;
3610 	}
3611 
3612 	err = irdma_reg_user_mr_type_mem(iwmr, access, true);
3613 	if (err)
3614 		goto err_iwmr;
3615 
3616 	return &iwmr->ibmr;
3617 
3618 err_iwmr:
3619 	irdma_free_iwmr(iwmr);
3620 
3621 err_release:
3622 	ib_umem_release(&umem_dmabuf->umem);
3623 
3624 	return ERR_PTR(err);
3625 }
3626 
irdma_hwdereg_mr(struct ib_mr * ib_mr)3627 static int irdma_hwdereg_mr(struct ib_mr *ib_mr)
3628 {
3629 	struct irdma_device *iwdev = to_iwdev(ib_mr->device);
3630 	struct irdma_mr *iwmr = to_iwmr(ib_mr);
3631 	struct irdma_pd *iwpd = to_iwpd(ib_mr->pd);
3632 	struct irdma_dealloc_stag_info *info;
3633 	struct irdma_pbl *iwpbl = &iwmr->iwpbl;
3634 	struct irdma_cqp_request *cqp_request;
3635 	struct cqp_cmds_info *cqp_info;
3636 	int status;
3637 
3638 	/* Skip HW MR de-register when it is already de-registered
3639 	 * during an MR re-reregister and the re-registration fails
3640 	 */
3641 	if (!iwmr->is_hwreg)
3642 		return 0;
3643 
3644 	cqp_request = irdma_alloc_and_get_cqp_request(&iwdev->rf->cqp, true);
3645 	if (!cqp_request)
3646 		return -ENOMEM;
3647 
3648 	cqp_info = &cqp_request->info;
3649 	info = &cqp_info->in.u.dealloc_stag.info;
3650 	memset(info, 0, sizeof(*info));
3651 	info->pd_id = iwpd->sc_pd.pd_id;
3652 	info->stag_idx = ib_mr->rkey >> IRDMA_CQPSQ_STAG_IDX_S;
3653 	info->mr = true;
3654 	if (iwpbl->pbl_allocated)
3655 		info->dealloc_pbl = true;
3656 
3657 	cqp_info->cqp_cmd = IRDMA_OP_DEALLOC_STAG;
3658 	cqp_info->post_sq = 1;
3659 	cqp_info->in.u.dealloc_stag.dev = &iwdev->rf->sc_dev;
3660 	cqp_info->in.u.dealloc_stag.scratch = (uintptr_t)cqp_request;
3661 	status = irdma_handle_cqp_op(iwdev->rf, cqp_request);
3662 	irdma_put_cqp_request(&iwdev->rf->cqp, cqp_request);
3663 	if (status)
3664 		return status;
3665 
3666 	iwmr->is_hwreg = 0;
3667 	return 0;
3668 }
3669 
3670 /*
3671  * irdma_rereg_mr_trans - Re-register a user MR for a change translation.
3672  * @iwmr: ptr of iwmr
3673  * @start: virtual start address
3674  * @len: length of mr
3675  * @virt: virtual address
3676  *
3677  * Re-register a user memory region when a change translation is requested.
3678  * Re-register a new region while reusing the stag from the original registration.
3679  */
irdma_rereg_mr_trans(struct irdma_mr * iwmr,u64 start,u64 len,u64 virt)3680 static int irdma_rereg_mr_trans(struct irdma_mr *iwmr, u64 start, u64 len,
3681 				u64 virt)
3682 {
3683 	struct irdma_device *iwdev = to_iwdev(iwmr->ibmr.device);
3684 	struct irdma_pbl *iwpbl = &iwmr->iwpbl;
3685 	struct ib_pd *pd = iwmr->ibmr.pd;
3686 	struct ib_umem *region;
3687 	int err;
3688 
3689 	region = ib_umem_get(pd->device, start, len, iwmr->access);
3690 	if (IS_ERR(region))
3691 		return PTR_ERR(region);
3692 
3693 	iwmr->region = region;
3694 	iwmr->ibmr.iova = virt;
3695 	iwmr->ibmr.pd = pd;
3696 	iwmr->page_size = ib_umem_find_best_pgsz(region,
3697 				iwdev->rf->sc_dev.hw_attrs.page_size_cap,
3698 				virt);
3699 	if (unlikely(!iwmr->page_size)) {
3700 		err = -EOPNOTSUPP;
3701 		goto err;
3702 	}
3703 
3704 	iwmr->len = region->length;
3705 	iwpbl->user_base = virt;
3706 	iwmr->page_cnt = ib_umem_num_dma_blocks(region, iwmr->page_size);
3707 
3708 	err = irdma_reg_user_mr_type_mem(iwmr, iwmr->access, false);
3709 	if (err)
3710 		goto err;
3711 
3712 	return 0;
3713 
3714 err:
3715 	ib_umem_release(region);
3716 	return err;
3717 }
3718 
3719 /*
3720  *  irdma_rereg_user_mr - Re-Register a user memory region(MR)
3721  *  @ibmr: ib mem to access iwarp mr pointer
3722  *  @flags: bit mask to indicate which of the attr's of MR modified
3723  *  @start: virtual start address
3724  *  @len: length of mr
3725  *  @virt: virtual address
3726  *  @new_access: bit mask of access flags
3727  *  @new_pd: ptr of pd
3728  *  @udata: user data
3729  *
3730  *  Return:
3731  *  NULL - Success, existing MR updated
3732  *  ERR_PTR - error occurred
3733  */
irdma_rereg_user_mr(struct ib_mr * ib_mr,int flags,u64 start,u64 len,u64 virt,int new_access,struct ib_pd * new_pd,struct ib_udata * udata)3734 static struct ib_mr *irdma_rereg_user_mr(struct ib_mr *ib_mr, int flags,
3735 					 u64 start, u64 len, u64 virt,
3736 					 int new_access, struct ib_pd *new_pd,
3737 					 struct ib_udata *udata)
3738 {
3739 	struct irdma_device *iwdev = to_iwdev(ib_mr->device);
3740 	struct irdma_mr *iwmr = to_iwmr(ib_mr);
3741 	struct irdma_pbl *iwpbl = &iwmr->iwpbl;
3742 	int ret;
3743 
3744 	if (len > iwdev->rf->sc_dev.hw_attrs.max_mr_size)
3745 		return ERR_PTR(-EINVAL);
3746 
3747 	if (flags & ~(IB_MR_REREG_TRANS | IB_MR_REREG_PD | IB_MR_REREG_ACCESS))
3748 		return ERR_PTR(-EOPNOTSUPP);
3749 
3750 	ret = irdma_hwdereg_mr(ib_mr);
3751 	if (ret)
3752 		return ERR_PTR(ret);
3753 
3754 	if (flags & IB_MR_REREG_ACCESS)
3755 		iwmr->access = new_access;
3756 
3757 	if (flags & IB_MR_REREG_PD) {
3758 		iwmr->ibmr.pd = new_pd;
3759 		iwmr->ibmr.device = new_pd->device;
3760 	}
3761 
3762 	if (flags & IB_MR_REREG_TRANS) {
3763 		if (iwpbl->pbl_allocated) {
3764 			irdma_free_pble(iwdev->rf->pble_rsrc,
3765 					&iwpbl->pble_alloc);
3766 			iwpbl->pbl_allocated = false;
3767 		}
3768 		if (iwmr->region) {
3769 			ib_umem_release(iwmr->region);
3770 			iwmr->region = NULL;
3771 		}
3772 
3773 		ret = irdma_rereg_mr_trans(iwmr, start, len, virt);
3774 	} else
3775 		ret = irdma_hwreg_mr(iwdev, iwmr, iwmr->access);
3776 	if (ret)
3777 		return ERR_PTR(ret);
3778 
3779 	return NULL;
3780 }
3781 
3782 /**
3783  * irdma_reg_phys_mr - register kernel physical memory
3784  * @pd: ibpd pointer
3785  * @addr: physical address of memory to register
3786  * @size: size of memory to register
3787  * @access: Access rights
3788  * @iova_start: start of virtual address for physical buffers
3789  */
irdma_reg_phys_mr(struct ib_pd * pd,u64 addr,u64 size,int access,u64 * iova_start)3790 struct ib_mr *irdma_reg_phys_mr(struct ib_pd *pd, u64 addr, u64 size, int access,
3791 				u64 *iova_start)
3792 {
3793 	struct irdma_device *iwdev = to_iwdev(pd->device);
3794 	struct irdma_pbl *iwpbl;
3795 	struct irdma_mr *iwmr;
3796 	u32 stag;
3797 	int ret;
3798 
3799 	iwmr = kzalloc(sizeof(*iwmr), GFP_KERNEL);
3800 	if (!iwmr)
3801 		return ERR_PTR(-ENOMEM);
3802 
3803 	iwmr->ibmr.pd = pd;
3804 	iwmr->ibmr.device = pd->device;
3805 	iwpbl = &iwmr->iwpbl;
3806 	iwpbl->iwmr = iwmr;
3807 	iwmr->type = IRDMA_MEMREG_TYPE_MEM;
3808 	iwpbl->user_base = *iova_start;
3809 	stag = irdma_create_stag(iwdev);
3810 	if (!stag) {
3811 		ret = -ENOMEM;
3812 		goto err;
3813 	}
3814 
3815 	iwmr->stag = stag;
3816 	iwmr->ibmr.iova = *iova_start;
3817 	iwmr->ibmr.rkey = stag;
3818 	iwmr->ibmr.lkey = stag;
3819 	iwmr->page_cnt = 1;
3820 	iwmr->pgaddrmem[0] = addr;
3821 	iwmr->len = size;
3822 	iwmr->page_size = SZ_4K;
3823 	ret = irdma_hwreg_mr(iwdev, iwmr, access);
3824 	if (ret) {
3825 		irdma_free_stag(iwdev, stag);
3826 		goto err;
3827 	}
3828 
3829 	return &iwmr->ibmr;
3830 
3831 err:
3832 	kfree(iwmr);
3833 
3834 	return ERR_PTR(ret);
3835 }
3836 
3837 /**
3838  * irdma_get_dma_mr - register physical mem
3839  * @pd: ptr of pd
3840  * @acc: access for memory
3841  */
irdma_get_dma_mr(struct ib_pd * pd,int acc)3842 static struct ib_mr *irdma_get_dma_mr(struct ib_pd *pd, int acc)
3843 {
3844 	u64 kva = 0;
3845 
3846 	return irdma_reg_phys_mr(pd, 0, 0, acc, &kva);
3847 }
3848 
3849 /**
3850  * irdma_del_memlist - Deleting pbl list entries for CQ/QP
3851  * @iwmr: iwmr for IB's user page addresses
3852  * @ucontext: ptr to user context
3853  */
irdma_del_memlist(struct irdma_mr * iwmr,struct irdma_ucontext * ucontext)3854 static void irdma_del_memlist(struct irdma_mr *iwmr,
3855 			      struct irdma_ucontext *ucontext)
3856 {
3857 	struct irdma_pbl *iwpbl = &iwmr->iwpbl;
3858 	unsigned long flags;
3859 
3860 	switch (iwmr->type) {
3861 	case IRDMA_MEMREG_TYPE_CQ:
3862 		spin_lock_irqsave(&ucontext->cq_reg_mem_list_lock, flags);
3863 		if (iwpbl->on_list) {
3864 			iwpbl->on_list = false;
3865 			list_del(&iwpbl->list);
3866 		}
3867 		spin_unlock_irqrestore(&ucontext->cq_reg_mem_list_lock, flags);
3868 		break;
3869 	case IRDMA_MEMREG_TYPE_QP:
3870 		spin_lock_irqsave(&ucontext->qp_reg_mem_list_lock, flags);
3871 		if (iwpbl->on_list) {
3872 			iwpbl->on_list = false;
3873 			list_del(&iwpbl->list);
3874 		}
3875 		spin_unlock_irqrestore(&ucontext->qp_reg_mem_list_lock, flags);
3876 		break;
3877 	case IRDMA_MEMREG_TYPE_SRQ:
3878 		spin_lock_irqsave(&ucontext->srq_reg_mem_list_lock, flags);
3879 		if (iwpbl->on_list) {
3880 			iwpbl->on_list = false;
3881 			list_del(&iwpbl->list);
3882 		}
3883 		spin_unlock_irqrestore(&ucontext->srq_reg_mem_list_lock, flags);
3884 		break;
3885 	default:
3886 		break;
3887 	}
3888 }
3889 
3890 /**
3891  * irdma_dereg_mr - deregister mr
3892  * @ib_mr: mr ptr for dereg
3893  * @udata: user data
3894  */
irdma_dereg_mr(struct ib_mr * ib_mr,struct ib_udata * udata)3895 static int irdma_dereg_mr(struct ib_mr *ib_mr, struct ib_udata *udata)
3896 {
3897 	struct irdma_mr *iwmr = to_iwmr(ib_mr);
3898 	struct irdma_device *iwdev = to_iwdev(ib_mr->device);
3899 	struct irdma_pbl *iwpbl = &iwmr->iwpbl;
3900 	int ret;
3901 
3902 	if (iwmr->type != IRDMA_MEMREG_TYPE_MEM) {
3903 		if (iwmr->region) {
3904 			struct irdma_ucontext *ucontext;
3905 
3906 			ucontext = rdma_udata_to_drv_context(udata,
3907 						struct irdma_ucontext,
3908 						ibucontext);
3909 			irdma_del_memlist(iwmr, ucontext);
3910 		}
3911 		goto done;
3912 	}
3913 
3914 	ret = irdma_hwdereg_mr(ib_mr);
3915 	if (ret)
3916 		return ret;
3917 
3918 	irdma_free_stag(iwdev, iwmr->stag);
3919 done:
3920 	if (iwpbl->pbl_allocated)
3921 		irdma_free_pble(iwdev->rf->pble_rsrc, &iwpbl->pble_alloc);
3922 
3923 	if (iwmr->region)
3924 		ib_umem_release(iwmr->region);
3925 
3926 	kfree(iwmr);
3927 
3928 	return 0;
3929 }
3930 
3931 /**
3932  * irdma_post_send -  kernel application wr
3933  * @ibqp: qp ptr for wr
3934  * @ib_wr: work request ptr
3935  * @bad_wr: return of bad wr if err
3936  */
irdma_post_send(struct ib_qp * ibqp,const struct ib_send_wr * ib_wr,const struct ib_send_wr ** bad_wr)3937 static int irdma_post_send(struct ib_qp *ibqp,
3938 			   const struct ib_send_wr *ib_wr,
3939 			   const struct ib_send_wr **bad_wr)
3940 {
3941 	struct irdma_qp *iwqp;
3942 	struct irdma_qp_uk *ukqp;
3943 	struct irdma_sc_dev *dev;
3944 	struct irdma_post_sq_info info;
3945 	int err = 0;
3946 	unsigned long flags;
3947 	bool inv_stag;
3948 	struct irdma_ah *ah;
3949 
3950 	iwqp = to_iwqp(ibqp);
3951 	ukqp = &iwqp->sc_qp.qp_uk;
3952 	dev = &iwqp->iwdev->rf->sc_dev;
3953 
3954 	spin_lock_irqsave(&iwqp->lock, flags);
3955 	while (ib_wr) {
3956 		memset(&info, 0, sizeof(info));
3957 		inv_stag = false;
3958 		info.wr_id = (ib_wr->wr_id);
3959 		if ((ib_wr->send_flags & IB_SEND_SIGNALED) || iwqp->sig_all)
3960 			info.signaled = true;
3961 		if (ib_wr->send_flags & IB_SEND_FENCE)
3962 			info.read_fence = true;
3963 		switch (ib_wr->opcode) {
3964 		case IB_WR_ATOMIC_CMP_AND_SWP:
3965 			if (unlikely(!(dev->hw_attrs.uk_attrs.feature_flags &
3966 				       IRDMA_FEATURE_ATOMIC_OPS))) {
3967 				err = -EINVAL;
3968 				break;
3969 			}
3970 			info.op_type = IRDMA_OP_TYPE_ATOMIC_COMPARE_AND_SWAP;
3971 			info.op.atomic_compare_swap.tagged_offset = ib_wr->sg_list[0].addr;
3972 			info.op.atomic_compare_swap.remote_tagged_offset =
3973 				atomic_wr(ib_wr)->remote_addr;
3974 			info.op.atomic_compare_swap.swap_data_bytes = atomic_wr(ib_wr)->swap;
3975 			info.op.atomic_compare_swap.compare_data_bytes =
3976 				atomic_wr(ib_wr)->compare_add;
3977 			info.op.atomic_compare_swap.stag = ib_wr->sg_list[0].lkey;
3978 			info.op.atomic_compare_swap.remote_stag = atomic_wr(ib_wr)->rkey;
3979 			err = irdma_uk_atomic_compare_swap(ukqp, &info, false);
3980 			break;
3981 		case IB_WR_ATOMIC_FETCH_AND_ADD:
3982 			if (unlikely(!(dev->hw_attrs.uk_attrs.feature_flags &
3983 				       IRDMA_FEATURE_ATOMIC_OPS))) {
3984 				err = -EINVAL;
3985 				break;
3986 			}
3987 			info.op_type = IRDMA_OP_TYPE_ATOMIC_FETCH_AND_ADD;
3988 			info.op.atomic_fetch_add.tagged_offset = ib_wr->sg_list[0].addr;
3989 			info.op.atomic_fetch_add.remote_tagged_offset =
3990 				atomic_wr(ib_wr)->remote_addr;
3991 			info.op.atomic_fetch_add.fetch_add_data_bytes =
3992 				atomic_wr(ib_wr)->compare_add;
3993 			info.op.atomic_fetch_add.stag = ib_wr->sg_list[0].lkey;
3994 			info.op.atomic_fetch_add.remote_stag =
3995 				atomic_wr(ib_wr)->rkey;
3996 			err = irdma_uk_atomic_fetch_add(ukqp, &info, false);
3997 			break;
3998 		case IB_WR_SEND_WITH_IMM:
3999 			if (ukqp->qp_caps & IRDMA_SEND_WITH_IMM) {
4000 				info.imm_data_valid = true;
4001 				info.imm_data = ntohl(ib_wr->ex.imm_data);
4002 			} else {
4003 				err = -EINVAL;
4004 				break;
4005 			}
4006 			fallthrough;
4007 		case IB_WR_SEND:
4008 		case IB_WR_SEND_WITH_INV:
4009 			if (ib_wr->opcode == IB_WR_SEND ||
4010 			    ib_wr->opcode == IB_WR_SEND_WITH_IMM) {
4011 				if (ib_wr->send_flags & IB_SEND_SOLICITED)
4012 					info.op_type = IRDMA_OP_TYPE_SEND_SOL;
4013 				else
4014 					info.op_type = IRDMA_OP_TYPE_SEND;
4015 			} else {
4016 				if (ib_wr->send_flags & IB_SEND_SOLICITED)
4017 					info.op_type = IRDMA_OP_TYPE_SEND_SOL_INV;
4018 				else
4019 					info.op_type = IRDMA_OP_TYPE_SEND_INV;
4020 				info.stag_to_inv = ib_wr->ex.invalidate_rkey;
4021 			}
4022 
4023 			info.op.send.num_sges = ib_wr->num_sge;
4024 			info.op.send.sg_list = ib_wr->sg_list;
4025 			if (iwqp->ibqp.qp_type == IB_QPT_UD ||
4026 			    iwqp->ibqp.qp_type == IB_QPT_GSI) {
4027 				ah = to_iwah(ud_wr(ib_wr)->ah);
4028 				info.op.send.ah_id = ah->sc_ah.ah_info.ah_idx;
4029 				info.op.send.qkey = ud_wr(ib_wr)->remote_qkey;
4030 				info.op.send.dest_qp = ud_wr(ib_wr)->remote_qpn;
4031 			}
4032 
4033 			if (ib_wr->send_flags & IB_SEND_INLINE)
4034 				err = irdma_uk_inline_send(ukqp, &info, false);
4035 			else
4036 				err = irdma_uk_send(ukqp, &info, false);
4037 			break;
4038 		case IB_WR_RDMA_WRITE_WITH_IMM:
4039 			if (ukqp->qp_caps & IRDMA_WRITE_WITH_IMM) {
4040 				info.imm_data_valid = true;
4041 				info.imm_data = ntohl(ib_wr->ex.imm_data);
4042 			} else {
4043 				err = -EINVAL;
4044 				break;
4045 			}
4046 			fallthrough;
4047 		case IB_WR_RDMA_WRITE:
4048 			if (ib_wr->send_flags & IB_SEND_SOLICITED)
4049 				info.op_type = IRDMA_OP_TYPE_RDMA_WRITE_SOL;
4050 			else
4051 				info.op_type = IRDMA_OP_TYPE_RDMA_WRITE;
4052 
4053 			info.op.rdma_write.num_lo_sges = ib_wr->num_sge;
4054 			info.op.rdma_write.lo_sg_list = ib_wr->sg_list;
4055 			info.op.rdma_write.rem_addr.addr =
4056 				rdma_wr(ib_wr)->remote_addr;
4057 			info.op.rdma_write.rem_addr.lkey = rdma_wr(ib_wr)->rkey;
4058 			if (ib_wr->send_flags & IB_SEND_INLINE)
4059 				err = irdma_uk_inline_rdma_write(ukqp, &info, false);
4060 			else
4061 				err = irdma_uk_rdma_write(ukqp, &info, false);
4062 			break;
4063 		case IB_WR_RDMA_READ_WITH_INV:
4064 			inv_stag = true;
4065 			fallthrough;
4066 		case IB_WR_RDMA_READ:
4067 			if (ib_wr->num_sge >
4068 			    dev->hw_attrs.uk_attrs.max_hw_read_sges) {
4069 				err = -EINVAL;
4070 				break;
4071 			}
4072 			info.op_type = IRDMA_OP_TYPE_RDMA_READ;
4073 			info.op.rdma_read.rem_addr.addr = rdma_wr(ib_wr)->remote_addr;
4074 			info.op.rdma_read.rem_addr.lkey = rdma_wr(ib_wr)->rkey;
4075 			info.op.rdma_read.lo_sg_list = (void *)ib_wr->sg_list;
4076 			info.op.rdma_read.num_lo_sges = ib_wr->num_sge;
4077 			err = irdma_uk_rdma_read(ukqp, &info, inv_stag, false);
4078 			break;
4079 		case IB_WR_LOCAL_INV:
4080 			info.op_type = IRDMA_OP_TYPE_INV_STAG;
4081 			info.local_fence = info.read_fence;
4082 			info.op.inv_local_stag.target_stag = ib_wr->ex.invalidate_rkey;
4083 			err = irdma_uk_stag_local_invalidate(ukqp, &info, true);
4084 			break;
4085 		case IB_WR_REG_MR: {
4086 			struct irdma_mr *iwmr = to_iwmr(reg_wr(ib_wr)->mr);
4087 			struct irdma_pble_alloc *palloc = &iwmr->iwpbl.pble_alloc;
4088 			struct irdma_fast_reg_stag_info stag_info = {};
4089 
4090 			stag_info.signaled = info.signaled;
4091 			stag_info.read_fence = info.read_fence;
4092 			stag_info.access_rights =
4093 				irdma_get_mr_access(reg_wr(ib_wr)->access,
4094 						    dev->hw_attrs.uk_attrs.hw_rev);
4095 			stag_info.stag_key = reg_wr(ib_wr)->key & 0xff;
4096 			stag_info.stag_idx = reg_wr(ib_wr)->key >> 8;
4097 			stag_info.page_size = reg_wr(ib_wr)->mr->page_size;
4098 			stag_info.wr_id = ib_wr->wr_id;
4099 			stag_info.addr_type = IRDMA_ADDR_TYPE_VA_BASED;
4100 			stag_info.va = (void *)(uintptr_t)iwmr->ibmr.iova;
4101 			stag_info.total_len = iwmr->ibmr.length;
4102 			stag_info.reg_addr_pa = *palloc->level1.addr;
4103 			stag_info.first_pm_pbl_index = palloc->level1.idx;
4104 			stag_info.local_fence = ib_wr->send_flags & IB_SEND_FENCE;
4105 			if (iwmr->npages > IRDMA_MIN_PAGES_PER_FMR)
4106 				stag_info.chunk_size = 1;
4107 			err = irdma_sc_mr_fast_register(&iwqp->sc_qp, &stag_info,
4108 							true);
4109 			break;
4110 		}
4111 		default:
4112 			err = -EINVAL;
4113 			ibdev_dbg(&iwqp->iwdev->ibdev,
4114 				  "VERBS: upost_send bad opcode = 0x%x\n",
4115 				  ib_wr->opcode);
4116 			break;
4117 		}
4118 
4119 		if (err)
4120 			break;
4121 		ib_wr = ib_wr->next;
4122 	}
4123 
4124 	if (!iwqp->flush_issued) {
4125 		if (iwqp->hw_iwarp_state <= IRDMA_QP_STATE_RTS)
4126 			irdma_uk_qp_post_wr(ukqp);
4127 		spin_unlock_irqrestore(&iwqp->lock, flags);
4128 	} else {
4129 		spin_unlock_irqrestore(&iwqp->lock, flags);
4130 		mod_delayed_work(iwqp->iwdev->cleanup_wq, &iwqp->dwork_flush,
4131 				 msecs_to_jiffies(IRDMA_FLUSH_DELAY_MS));
4132 	}
4133 
4134 	if (err)
4135 		*bad_wr = ib_wr;
4136 
4137 	return err;
4138 }
4139 
4140 /**
4141  * irdma_post_srq_recv - post receive wr for kernel application
4142  * @ibsrq: ib srq pointer
4143  * @ib_wr: work request for receive
4144  * @bad_wr: bad wr caused an error
4145  */
irdma_post_srq_recv(struct ib_srq * ibsrq,const struct ib_recv_wr * ib_wr,const struct ib_recv_wr ** bad_wr)4146 static int irdma_post_srq_recv(struct ib_srq *ibsrq,
4147 			       const struct ib_recv_wr *ib_wr,
4148 			       const struct ib_recv_wr **bad_wr)
4149 {
4150 	struct irdma_srq *iwsrq = to_iwsrq(ibsrq);
4151 	struct irdma_srq_uk *uksrq = &iwsrq->sc_srq.srq_uk;
4152 	struct irdma_post_rq_info post_recv = {};
4153 	unsigned long flags;
4154 	int err = 0;
4155 
4156 	spin_lock_irqsave(&iwsrq->lock, flags);
4157 	while (ib_wr) {
4158 		if (ib_wr->num_sge > uksrq->max_srq_frag_cnt) {
4159 			err = -EINVAL;
4160 			goto out;
4161 		}
4162 		post_recv.num_sges = ib_wr->num_sge;
4163 		post_recv.wr_id = ib_wr->wr_id;
4164 		post_recv.sg_list = ib_wr->sg_list;
4165 		err = irdma_uk_srq_post_receive(uksrq, &post_recv);
4166 		if (err)
4167 			goto out;
4168 
4169 		ib_wr = ib_wr->next;
4170 	}
4171 
4172 out:
4173 	spin_unlock_irqrestore(&iwsrq->lock, flags);
4174 
4175 	if (err)
4176 		*bad_wr = ib_wr;
4177 
4178 	return err;
4179 }
4180 
4181 /**
4182  * irdma_post_recv - post receive wr for kernel application
4183  * @ibqp: ib qp pointer
4184  * @ib_wr: work request for receive
4185  * @bad_wr: bad wr caused an error
4186  */
irdma_post_recv(struct ib_qp * ibqp,const struct ib_recv_wr * ib_wr,const struct ib_recv_wr ** bad_wr)4187 static int irdma_post_recv(struct ib_qp *ibqp,
4188 			   const struct ib_recv_wr *ib_wr,
4189 			   const struct ib_recv_wr **bad_wr)
4190 {
4191 	struct irdma_qp *iwqp;
4192 	struct irdma_qp_uk *ukqp;
4193 	struct irdma_post_rq_info post_recv = {};
4194 	unsigned long flags;
4195 	int err = 0;
4196 
4197 	iwqp = to_iwqp(ibqp);
4198 	ukqp = &iwqp->sc_qp.qp_uk;
4199 
4200 	if (ukqp->srq_uk) {
4201 		*bad_wr = ib_wr;
4202 		return -EINVAL;
4203 	}
4204 
4205 	spin_lock_irqsave(&iwqp->lock, flags);
4206 	while (ib_wr) {
4207 		post_recv.num_sges = ib_wr->num_sge;
4208 		post_recv.wr_id = ib_wr->wr_id;
4209 		post_recv.sg_list = ib_wr->sg_list;
4210 		err = irdma_uk_post_receive(ukqp, &post_recv);
4211 		if (err) {
4212 			ibdev_dbg(&iwqp->iwdev->ibdev,
4213 				  "VERBS: post_recv err %d\n", err);
4214 			goto out;
4215 		}
4216 
4217 		ib_wr = ib_wr->next;
4218 	}
4219 
4220 out:
4221 	spin_unlock_irqrestore(&iwqp->lock, flags);
4222 	if (iwqp->flush_issued)
4223 		mod_delayed_work(iwqp->iwdev->cleanup_wq, &iwqp->dwork_flush,
4224 				 msecs_to_jiffies(IRDMA_FLUSH_DELAY_MS));
4225 
4226 	if (err)
4227 		*bad_wr = ib_wr;
4228 
4229 	return err;
4230 }
4231 
4232 /**
4233  * irdma_flush_err_to_ib_wc_status - return change flush error code to IB status
4234  * @opcode: iwarp flush code
4235  */
irdma_flush_err_to_ib_wc_status(enum irdma_flush_opcode opcode)4236 static enum ib_wc_status irdma_flush_err_to_ib_wc_status(enum irdma_flush_opcode opcode)
4237 {
4238 	switch (opcode) {
4239 	case FLUSH_PROT_ERR:
4240 		return IB_WC_LOC_PROT_ERR;
4241 	case FLUSH_REM_ACCESS_ERR:
4242 		return IB_WC_REM_ACCESS_ERR;
4243 	case FLUSH_LOC_QP_OP_ERR:
4244 		return IB_WC_LOC_QP_OP_ERR;
4245 	case FLUSH_REM_OP_ERR:
4246 		return IB_WC_REM_OP_ERR;
4247 	case FLUSH_LOC_LEN_ERR:
4248 		return IB_WC_LOC_LEN_ERR;
4249 	case FLUSH_GENERAL_ERR:
4250 		return IB_WC_WR_FLUSH_ERR;
4251 	case FLUSH_RETRY_EXC_ERR:
4252 		return IB_WC_RETRY_EXC_ERR;
4253 	case FLUSH_MW_BIND_ERR:
4254 		return IB_WC_MW_BIND_ERR;
4255 	case FLUSH_REM_INV_REQ_ERR:
4256 		return IB_WC_REM_INV_REQ_ERR;
4257 	case FLUSH_RNR_RETRY_EXC_ERR:
4258 		return IB_WC_RNR_RETRY_EXC_ERR;
4259 	case FLUSH_FATAL_ERR:
4260 	default:
4261 		return IB_WC_FATAL_ERR;
4262 	}
4263 }
4264 
4265 /**
4266  * irdma_process_cqe - process cqe info
4267  * @entry: processed cqe
4268  * @cq_poll_info: cqe info
4269  */
irdma_process_cqe(struct ib_wc * entry,struct irdma_cq_poll_info * cq_poll_info)4270 static void irdma_process_cqe(struct ib_wc *entry,
4271 			      struct irdma_cq_poll_info *cq_poll_info)
4272 {
4273 	struct irdma_sc_qp *qp;
4274 
4275 	entry->wc_flags = 0;
4276 	entry->pkey_index = 0;
4277 	entry->wr_id = cq_poll_info->wr_id;
4278 
4279 	qp = cq_poll_info->qp_handle;
4280 	entry->qp = qp->qp_uk.back_qp;
4281 
4282 	if (cq_poll_info->error) {
4283 		entry->status = (cq_poll_info->comp_status == IRDMA_COMPL_STATUS_FLUSHED) ?
4284 				irdma_flush_err_to_ib_wc_status(cq_poll_info->minor_err) : IB_WC_GENERAL_ERR;
4285 
4286 		entry->vendor_err = cq_poll_info->major_err << 16 |
4287 				    cq_poll_info->minor_err;
4288 	} else {
4289 		entry->status = IB_WC_SUCCESS;
4290 		if (cq_poll_info->imm_valid) {
4291 			entry->ex.imm_data = htonl(cq_poll_info->imm_data);
4292 			entry->wc_flags |= IB_WC_WITH_IMM;
4293 		}
4294 		if (cq_poll_info->ud_smac_valid) {
4295 			ether_addr_copy(entry->smac, cq_poll_info->ud_smac);
4296 			entry->wc_flags |= IB_WC_WITH_SMAC;
4297 		}
4298 
4299 		if (cq_poll_info->ud_vlan_valid) {
4300 			u16 vlan = cq_poll_info->ud_vlan & VLAN_VID_MASK;
4301 
4302 			entry->sl = cq_poll_info->ud_vlan >> VLAN_PRIO_SHIFT;
4303 			if (vlan) {
4304 				entry->vlan_id = vlan;
4305 				entry->wc_flags |= IB_WC_WITH_VLAN;
4306 			}
4307 		} else {
4308 			entry->sl = 0;
4309 		}
4310 	}
4311 
4312 	if (cq_poll_info->q_type == IRDMA_CQE_QTYPE_SQ) {
4313 		set_ib_wc_op_sq(cq_poll_info, entry);
4314 	} else {
4315 		if (qp->dev->hw_attrs.uk_attrs.hw_rev <= IRDMA_GEN_2)
4316 			set_ib_wc_op_rq(cq_poll_info, entry,
4317 					qp->qp_uk.qp_caps & IRDMA_SEND_WITH_IMM ?
4318 					true : false);
4319 		else
4320 			set_ib_wc_op_rq_gen_3(cq_poll_info, entry);
4321 		if (qp->qp_uk.qp_type != IRDMA_QP_TYPE_ROCE_UD &&
4322 		    cq_poll_info->stag_invalid_set) {
4323 			entry->ex.invalidate_rkey = cq_poll_info->inv_stag;
4324 			entry->wc_flags |= IB_WC_WITH_INVALIDATE;
4325 		}
4326 	}
4327 
4328 	if (qp->qp_uk.qp_type == IRDMA_QP_TYPE_ROCE_UD) {
4329 		entry->src_qp = cq_poll_info->ud_src_qpn;
4330 		entry->slid = 0;
4331 		entry->wc_flags |=
4332 			(IB_WC_GRH | IB_WC_WITH_NETWORK_HDR_TYPE);
4333 		entry->network_hdr_type = cq_poll_info->ipv4 ?
4334 						  RDMA_NETWORK_IPV4 :
4335 						  RDMA_NETWORK_IPV6;
4336 	} else {
4337 		entry->src_qp = cq_poll_info->qp_id;
4338 	}
4339 
4340 	entry->byte_len = cq_poll_info->bytes_xfered;
4341 }
4342 
4343 /**
4344  * irdma_poll_one - poll one entry of the CQ
4345  * @ukcq: ukcq to poll
4346  * @cur_cqe: current CQE info to be filled in
4347  * @entry: ibv_wc object to be filled for non-extended CQ or NULL for extended CQ
4348  *
4349  * Returns the internal irdma device error code or 0 on success
4350  */
irdma_poll_one(struct irdma_cq_uk * ukcq,struct irdma_cq_poll_info * cur_cqe,struct ib_wc * entry)4351 static inline int irdma_poll_one(struct irdma_cq_uk *ukcq,
4352 				 struct irdma_cq_poll_info *cur_cqe,
4353 				 struct ib_wc *entry)
4354 {
4355 	int ret = irdma_uk_cq_poll_cmpl(ukcq, cur_cqe);
4356 
4357 	if (ret)
4358 		return ret;
4359 
4360 	irdma_process_cqe(entry, cur_cqe);
4361 
4362 	return 0;
4363 }
4364 
4365 /**
4366  * __irdma_poll_cq - poll cq for completion (kernel apps)
4367  * @iwcq: cq to poll
4368  * @num_entries: number of entries to poll
4369  * @entry: wr of a completed entry
4370  */
__irdma_poll_cq(struct irdma_cq * iwcq,int num_entries,struct ib_wc * entry)4371 static int __irdma_poll_cq(struct irdma_cq *iwcq, int num_entries, struct ib_wc *entry)
4372 {
4373 	struct list_head *tmp_node, *list_node;
4374 	struct irdma_cq_buf *last_buf = NULL;
4375 	struct irdma_cq_poll_info *cur_cqe = &iwcq->cur_cqe;
4376 	struct irdma_cq_buf *cq_buf;
4377 	int ret;
4378 	struct irdma_device *iwdev;
4379 	struct irdma_cq_uk *ukcq;
4380 	bool cq_new_cqe = false;
4381 	int resized_bufs = 0;
4382 	int npolled = 0;
4383 
4384 	iwdev = to_iwdev(iwcq->ibcq.device);
4385 	ukcq = &iwcq->sc_cq.cq_uk;
4386 
4387 	/* go through the list of previously resized CQ buffers */
4388 	list_for_each_safe(list_node, tmp_node, &iwcq->resize_list) {
4389 		cq_buf = container_of(list_node, struct irdma_cq_buf, list);
4390 		while (npolled < num_entries) {
4391 			ret = irdma_poll_one(&cq_buf->cq_uk, cur_cqe, entry + npolled);
4392 			if (!ret) {
4393 				++npolled;
4394 				cq_new_cqe = true;
4395 				continue;
4396 			}
4397 			if (ret == -ENOENT)
4398 				break;
4399 			 /* QP using the CQ is destroyed. Skip reporting this CQE */
4400 			if (ret == -EFAULT) {
4401 				cq_new_cqe = true;
4402 				continue;
4403 			}
4404 			goto error;
4405 		}
4406 
4407 		/* save the resized CQ buffer which received the last cqe */
4408 		if (cq_new_cqe)
4409 			last_buf = cq_buf;
4410 		cq_new_cqe = false;
4411 	}
4412 
4413 	/* check the current CQ for new cqes */
4414 	while (npolled < num_entries) {
4415 		ret = irdma_poll_one(ukcq, cur_cqe, entry + npolled);
4416 		if (ret == -ENOENT) {
4417 			ret = irdma_generated_cmpls(iwcq, cur_cqe);
4418 			if (!ret)
4419 				irdma_process_cqe(entry + npolled, cur_cqe);
4420 		}
4421 		if (!ret) {
4422 			++npolled;
4423 			cq_new_cqe = true;
4424 			continue;
4425 		}
4426 
4427 		if (ret == -ENOENT)
4428 			break;
4429 		/* QP using the CQ is destroyed. Skip reporting this CQE */
4430 		if (ret == -EFAULT) {
4431 			cq_new_cqe = true;
4432 			continue;
4433 		}
4434 		goto error;
4435 	}
4436 
4437 	if (cq_new_cqe)
4438 		/* all previous CQ resizes are complete */
4439 		resized_bufs = irdma_process_resize_list(iwcq, iwdev, NULL);
4440 	else if (last_buf)
4441 		/* only CQ resizes up to the last_buf are complete */
4442 		resized_bufs = irdma_process_resize_list(iwcq, iwdev, last_buf);
4443 	if (resized_bufs)
4444 		/* report to the HW the number of complete CQ resizes */
4445 		irdma_uk_cq_set_resized_cnt(ukcq, resized_bufs);
4446 
4447 	return npolled;
4448 error:
4449 	ibdev_dbg(&iwdev->ibdev, "%s: Error polling CQ, irdma_err: %d\n",
4450 		  __func__, ret);
4451 
4452 	return ret;
4453 }
4454 
4455 /**
4456  * irdma_poll_cq - poll cq for completion (kernel apps)
4457  * @ibcq: cq to poll
4458  * @num_entries: number of entries to poll
4459  * @entry: wr of a completed entry
4460  */
irdma_poll_cq(struct ib_cq * ibcq,int num_entries,struct ib_wc * entry)4461 static int irdma_poll_cq(struct ib_cq *ibcq, int num_entries,
4462 			 struct ib_wc *entry)
4463 {
4464 	struct irdma_cq *iwcq;
4465 	unsigned long flags;
4466 	int ret;
4467 
4468 	iwcq = to_iwcq(ibcq);
4469 
4470 	spin_lock_irqsave(&iwcq->lock, flags);
4471 	ret = __irdma_poll_cq(iwcq, num_entries, entry);
4472 	spin_unlock_irqrestore(&iwcq->lock, flags);
4473 
4474 	return ret;
4475 }
4476 
4477 /**
4478  * irdma_req_notify_cq - arm cq kernel application
4479  * @ibcq: cq to arm
4480  * @notify_flags: notofication flags
4481  */
irdma_req_notify_cq(struct ib_cq * ibcq,enum ib_cq_notify_flags notify_flags)4482 static int irdma_req_notify_cq(struct ib_cq *ibcq,
4483 			       enum ib_cq_notify_flags notify_flags)
4484 {
4485 	struct irdma_cq *iwcq;
4486 	struct irdma_cq_uk *ukcq;
4487 	unsigned long flags;
4488 	enum irdma_cmpl_notify cq_notify;
4489 	bool promo_event = false;
4490 	int ret = 0;
4491 
4492 	cq_notify = notify_flags == IB_CQ_SOLICITED ?
4493 		    IRDMA_CQ_COMPL_SOLICITED : IRDMA_CQ_COMPL_EVENT;
4494 	iwcq = to_iwcq(ibcq);
4495 	ukcq = &iwcq->sc_cq.cq_uk;
4496 
4497 	spin_lock_irqsave(&iwcq->lock, flags);
4498 	/* Only promote to arm the CQ for any event if the last arm event was solicited. */
4499 	if (iwcq->last_notify == IRDMA_CQ_COMPL_SOLICITED && notify_flags != IB_CQ_SOLICITED)
4500 		promo_event = true;
4501 
4502 	if (!atomic_cmpxchg(&iwcq->armed, 0, 1) || promo_event) {
4503 		iwcq->last_notify = cq_notify;
4504 		irdma_uk_cq_request_notification(ukcq, cq_notify);
4505 	}
4506 
4507 	if ((notify_flags & IB_CQ_REPORT_MISSED_EVENTS) &&
4508 	    (!irdma_cq_empty(iwcq) || !list_empty(&iwcq->cmpl_generated)))
4509 		ret = 1;
4510 	spin_unlock_irqrestore(&iwcq->lock, flags);
4511 
4512 	return ret;
4513 }
4514 
4515 static const struct rdma_stat_desc irdma_hw_stat_descs[] = {
4516 	/* gen1 - 32-bit */
4517 	[IRDMA_HW_STAT_INDEX_IP4RXDISCARD].name		= "ip4InDiscards",
4518 	[IRDMA_HW_STAT_INDEX_IP4RXTRUNC].name		= "ip4InTruncatedPkts",
4519 	[IRDMA_HW_STAT_INDEX_IP4TXNOROUTE].name		= "ip4OutNoRoutes",
4520 	[IRDMA_HW_STAT_INDEX_IP6RXDISCARD].name		= "ip6InDiscards",
4521 	[IRDMA_HW_STAT_INDEX_IP6RXTRUNC].name		= "ip6InTruncatedPkts",
4522 	[IRDMA_HW_STAT_INDEX_IP6TXNOROUTE].name		= "ip6OutNoRoutes",
4523 	[IRDMA_HW_STAT_INDEX_RXVLANERR].name		= "rxVlanErrors",
4524 	/* gen1 - 64-bit */
4525 	[IRDMA_HW_STAT_INDEX_IP4RXOCTS].name		= "ip4InOctets",
4526 	[IRDMA_HW_STAT_INDEX_IP4RXPKTS].name		= "ip4InPkts",
4527 	[IRDMA_HW_STAT_INDEX_IP4RXFRAGS].name		= "ip4InReasmRqd",
4528 	[IRDMA_HW_STAT_INDEX_IP4RXMCPKTS].name		= "ip4InMcastPkts",
4529 	[IRDMA_HW_STAT_INDEX_IP4TXOCTS].name		= "ip4OutOctets",
4530 	[IRDMA_HW_STAT_INDEX_IP4TXPKTS].name		= "ip4OutPkts",
4531 	[IRDMA_HW_STAT_INDEX_IP4TXFRAGS].name		= "ip4OutSegRqd",
4532 	[IRDMA_HW_STAT_INDEX_IP4TXMCPKTS].name		= "ip4OutMcastPkts",
4533 	[IRDMA_HW_STAT_INDEX_IP6RXOCTS].name		= "ip6InOctets",
4534 	[IRDMA_HW_STAT_INDEX_IP6RXPKTS].name		= "ip6InPkts",
4535 	[IRDMA_HW_STAT_INDEX_IP6RXFRAGS].name		= "ip6InReasmRqd",
4536 	[IRDMA_HW_STAT_INDEX_IP6RXMCPKTS].name		= "ip6InMcastPkts",
4537 	[IRDMA_HW_STAT_INDEX_IP6TXOCTS].name		= "ip6OutOctets",
4538 	[IRDMA_HW_STAT_INDEX_IP6TXPKTS].name		= "ip6OutPkts",
4539 	[IRDMA_HW_STAT_INDEX_IP6TXFRAGS].name		= "ip6OutSegRqd",
4540 	[IRDMA_HW_STAT_INDEX_IP6TXMCPKTS].name		= "ip6OutMcastPkts",
4541 	[IRDMA_HW_STAT_INDEX_RDMARXRDS].name		= "InRdmaReads",
4542 	[IRDMA_HW_STAT_INDEX_RDMARXSNDS].name		= "InRdmaSends",
4543 	[IRDMA_HW_STAT_INDEX_RDMARXWRS].name		= "InRdmaWrites",
4544 	[IRDMA_HW_STAT_INDEX_RDMATXRDS].name		= "OutRdmaReads",
4545 	[IRDMA_HW_STAT_INDEX_RDMATXSNDS].name		= "OutRdmaSends",
4546 	[IRDMA_HW_STAT_INDEX_RDMATXWRS].name		= "OutRdmaWrites",
4547 	[IRDMA_HW_STAT_INDEX_RDMAVBND].name		= "RdmaBnd",
4548 	[IRDMA_HW_STAT_INDEX_RDMAVINV].name		= "RdmaInv",
4549 
4550 	/* gen2 - 32-bit */
4551 	[IRDMA_HW_STAT_INDEX_RXRPCNPHANDLED].name	= "cnpHandled",
4552 	[IRDMA_HW_STAT_INDEX_RXRPCNPIGNORED].name	= "cnpIgnored",
4553 	[IRDMA_HW_STAT_INDEX_TXNPCNPSENT].name		= "cnpSent",
4554 	/* gen2 - 64-bit */
4555 	[IRDMA_HW_STAT_INDEX_IP4RXMCOCTS].name		= "ip4InMcastOctets",
4556 	[IRDMA_HW_STAT_INDEX_IP4TXMCOCTS].name		= "ip4OutMcastOctets",
4557 	[IRDMA_HW_STAT_INDEX_IP6RXMCOCTS].name		= "ip6InMcastOctets",
4558 	[IRDMA_HW_STAT_INDEX_IP6TXMCOCTS].name		= "ip6OutMcastOctets",
4559 	[IRDMA_HW_STAT_INDEX_UDPRXPKTS].name		= "RxUDP",
4560 	[IRDMA_HW_STAT_INDEX_UDPTXPKTS].name		= "TxUDP",
4561 	[IRDMA_HW_STAT_INDEX_RXNPECNMARKEDPKTS].name	= "RxECNMrkd",
4562 	[IRDMA_HW_STAT_INDEX_TCPRTXSEG].name		= "RetransSegs",
4563 	[IRDMA_HW_STAT_INDEX_TCPRXOPTERR].name		= "InOptErrors",
4564 	[IRDMA_HW_STAT_INDEX_TCPRXPROTOERR].name	= "InProtoErrors",
4565 	[IRDMA_HW_STAT_INDEX_TCPRXSEGS].name		= "InSegs",
4566 	[IRDMA_HW_STAT_INDEX_TCPTXSEG].name		= "OutSegs",
4567 
4568 	/* gen3 */
4569 	[IRDMA_HW_STAT_INDEX_RNR_SENT].name		= "RNR sent",
4570 	[IRDMA_HW_STAT_INDEX_RNR_RCVD].name		= "RNR received",
4571 	[IRDMA_HW_STAT_INDEX_RDMAORDLMTCNT].name	= "ord limit count",
4572 	[IRDMA_HW_STAT_INDEX_RDMAIRDLMTCNT].name	= "ird limit count",
4573 	[IRDMA_HW_STAT_INDEX_RDMARXATS].name		= "Rx atomics",
4574 	[IRDMA_HW_STAT_INDEX_RDMATXATS].name		= "Tx atomics",
4575 	[IRDMA_HW_STAT_INDEX_NAKSEQERR].name		= "Nak Sequence Error",
4576 	[IRDMA_HW_STAT_INDEX_NAKSEQERR_IMPLIED].name	= "Nak Sequence Error Implied",
4577 	[IRDMA_HW_STAT_INDEX_RTO].name			= "RTO",
4578 	[IRDMA_HW_STAT_INDEX_RXOOOPKTS].name		= "Rcvd Out of order packets",
4579 	[IRDMA_HW_STAT_INDEX_ICRCERR].name		= "CRC errors",
4580 };
4581 
irdma_roce_port_immutable(struct ib_device * ibdev,u32 port_num,struct ib_port_immutable * immutable)4582 static int irdma_roce_port_immutable(struct ib_device *ibdev, u32 port_num,
4583 				     struct ib_port_immutable *immutable)
4584 {
4585 	struct ib_port_attr attr;
4586 	int err;
4587 
4588 	immutable->core_cap_flags = RDMA_CORE_PORT_IBA_ROCE_UDP_ENCAP;
4589 	err = ib_query_port(ibdev, port_num, &attr);
4590 	if (err)
4591 		return err;
4592 
4593 	immutable->max_mad_size = IB_MGMT_MAD_SIZE;
4594 	immutable->pkey_tbl_len = attr.pkey_tbl_len;
4595 	immutable->gid_tbl_len = attr.gid_tbl_len;
4596 
4597 	return 0;
4598 }
4599 
irdma_iw_port_immutable(struct ib_device * ibdev,u32 port_num,struct ib_port_immutable * immutable)4600 static int irdma_iw_port_immutable(struct ib_device *ibdev, u32 port_num,
4601 				   struct ib_port_immutable *immutable)
4602 {
4603 	struct ib_port_attr attr;
4604 	int err;
4605 
4606 	immutable->core_cap_flags = RDMA_CORE_PORT_IWARP;
4607 	err = ib_query_port(ibdev, port_num, &attr);
4608 	if (err)
4609 		return err;
4610 	immutable->gid_tbl_len = attr.gid_tbl_len;
4611 
4612 	return 0;
4613 }
4614 
irdma_get_dev_fw_str(struct ib_device * dev,char * str)4615 static void irdma_get_dev_fw_str(struct ib_device *dev, char *str)
4616 {
4617 	struct irdma_device *iwdev = to_iwdev(dev);
4618 
4619 	snprintf(str, IB_FW_VERSION_NAME_MAX, "%u.%u",
4620 		 irdma_fw_major_ver(&iwdev->rf->sc_dev),
4621 		 irdma_fw_minor_ver(&iwdev->rf->sc_dev));
4622 }
4623 
4624 /**
4625  * irdma_alloc_hw_port_stats - Allocate a hw stats structure
4626  * @ibdev: device pointer from stack
4627  * @port_num: port number
4628  */
irdma_alloc_hw_port_stats(struct ib_device * ibdev,u32 port_num)4629 static struct rdma_hw_stats *irdma_alloc_hw_port_stats(struct ib_device *ibdev,
4630 						       u32 port_num)
4631 {
4632 	struct irdma_device *iwdev = to_iwdev(ibdev);
4633 	struct irdma_sc_dev *dev = &iwdev->rf->sc_dev;
4634 
4635 	int num_counters = dev->hw_attrs.max_stat_idx;
4636 	unsigned long lifespan = RDMA_HW_STATS_DEFAULT_LIFESPAN;
4637 
4638 	return rdma_alloc_hw_stats_struct(irdma_hw_stat_descs, num_counters,
4639 					  lifespan);
4640 }
4641 
4642 /**
4643  * irdma_get_hw_stats - Populates the rdma_hw_stats structure
4644  * @ibdev: device pointer from stack
4645  * @stats: stats pointer from stack
4646  * @port_num: port number
4647  * @index: which hw counter the stack is requesting we update
4648  */
irdma_get_hw_stats(struct ib_device * ibdev,struct rdma_hw_stats * stats,u32 port_num,int index)4649 static int irdma_get_hw_stats(struct ib_device *ibdev,
4650 			      struct rdma_hw_stats *stats, u32 port_num,
4651 			      int index)
4652 {
4653 	struct irdma_device *iwdev = to_iwdev(ibdev);
4654 	struct irdma_dev_hw_stats *hw_stats = &iwdev->vsi.pestat->hw_stats;
4655 
4656 	if (iwdev->rf->rdma_ver >= IRDMA_GEN_2)
4657 		irdma_cqp_gather_stats_cmd(&iwdev->rf->sc_dev, iwdev->vsi.pestat, true);
4658 	else
4659 		irdma_cqp_gather_stats_gen1(&iwdev->rf->sc_dev, iwdev->vsi.pestat);
4660 
4661 	memcpy(&stats->value[0], hw_stats, sizeof(u64) * stats->num_counters);
4662 
4663 	return stats->num_counters;
4664 }
4665 
4666 /**
4667  * irdma_query_gid - Query port GID
4668  * @ibdev: device pointer from stack
4669  * @port: port number
4670  * @index: Entry index
4671  * @gid: Global ID
4672  */
irdma_query_gid(struct ib_device * ibdev,u32 port,int index,union ib_gid * gid)4673 static int irdma_query_gid(struct ib_device *ibdev, u32 port, int index,
4674 			   union ib_gid *gid)
4675 {
4676 	struct irdma_device *iwdev = to_iwdev(ibdev);
4677 
4678 	memset(gid->raw, 0, sizeof(gid->raw));
4679 	ether_addr_copy(gid->raw, iwdev->netdev->dev_addr);
4680 
4681 	return 0;
4682 }
4683 
4684 /**
4685  * mcast_list_add -  Add a new mcast item to list
4686  * @rf: RDMA PCI function
4687  * @new_elem: pointer to element to add
4688  */
mcast_list_add(struct irdma_pci_f * rf,struct mc_table_list * new_elem)4689 static void mcast_list_add(struct irdma_pci_f *rf,
4690 			   struct mc_table_list *new_elem)
4691 {
4692 	list_add(&new_elem->list, &rf->mc_qht_list.list);
4693 }
4694 
4695 /**
4696  * mcast_list_del - Remove an mcast item from list
4697  * @mc_qht_elem: pointer to mcast table list element
4698  */
mcast_list_del(struct mc_table_list * mc_qht_elem)4699 static void mcast_list_del(struct mc_table_list *mc_qht_elem)
4700 {
4701 	if (mc_qht_elem)
4702 		list_del(&mc_qht_elem->list);
4703 }
4704 
4705 /**
4706  * mcast_list_lookup_ip - Search mcast list for address
4707  * @rf: RDMA PCI function
4708  * @ip_mcast: pointer to mcast IP address
4709  */
mcast_list_lookup_ip(struct irdma_pci_f * rf,u32 * ip_mcast)4710 static struct mc_table_list *mcast_list_lookup_ip(struct irdma_pci_f *rf,
4711 						  u32 *ip_mcast)
4712 {
4713 	struct mc_table_list *mc_qht_el;
4714 	struct list_head *pos, *q;
4715 
4716 	list_for_each_safe (pos, q, &rf->mc_qht_list.list) {
4717 		mc_qht_el = list_entry(pos, struct mc_table_list, list);
4718 		if (!memcmp(mc_qht_el->mc_info.dest_ip, ip_mcast,
4719 			    sizeof(mc_qht_el->mc_info.dest_ip)))
4720 			return mc_qht_el;
4721 	}
4722 
4723 	return NULL;
4724 }
4725 
4726 /**
4727  * irdma_mcast_cqp_op - perform a mcast cqp operation
4728  * @iwdev: irdma device
4729  * @mc_grp_ctx: mcast group info
4730  * @op: operation
4731  *
4732  * returns error status
4733  */
irdma_mcast_cqp_op(struct irdma_device * iwdev,struct irdma_mcast_grp_info * mc_grp_ctx,u8 op)4734 static int irdma_mcast_cqp_op(struct irdma_device *iwdev,
4735 			      struct irdma_mcast_grp_info *mc_grp_ctx, u8 op)
4736 {
4737 	struct cqp_cmds_info *cqp_info;
4738 	struct irdma_cqp_request *cqp_request;
4739 	int status;
4740 
4741 	cqp_request = irdma_alloc_and_get_cqp_request(&iwdev->rf->cqp, true);
4742 	if (!cqp_request)
4743 		return -ENOMEM;
4744 
4745 	cqp_request->info.in.u.mc_create.info = *mc_grp_ctx;
4746 	cqp_info = &cqp_request->info;
4747 	cqp_info->cqp_cmd = op;
4748 	cqp_info->post_sq = 1;
4749 	cqp_info->in.u.mc_create.scratch = (uintptr_t)cqp_request;
4750 	cqp_info->in.u.mc_create.cqp = &iwdev->rf->cqp.sc_cqp;
4751 	status = irdma_handle_cqp_op(iwdev->rf, cqp_request);
4752 	irdma_put_cqp_request(&iwdev->rf->cqp, cqp_request);
4753 
4754 	return status;
4755 }
4756 
4757 /**
4758  * irdma_mcast_mac - Get the multicast MAC for an IP address
4759  * @ip_addr: IPv4 or IPv6 address
4760  * @mac: pointer to result MAC address
4761  * @ipv4: flag indicating IPv4 or IPv6
4762  *
4763  */
irdma_mcast_mac(u32 * ip_addr,u8 * mac,bool ipv4)4764 void irdma_mcast_mac(u32 *ip_addr, u8 *mac, bool ipv4)
4765 {
4766 	u8 *ip = (u8 *)ip_addr;
4767 
4768 	if (ipv4) {
4769 		unsigned char mac4[ETH_ALEN] = {0x01, 0x00, 0x5E, 0x00,
4770 						0x00, 0x00};
4771 
4772 		mac4[3] = ip[2] & 0x7F;
4773 		mac4[4] = ip[1];
4774 		mac4[5] = ip[0];
4775 		ether_addr_copy(mac, mac4);
4776 	} else {
4777 		unsigned char mac6[ETH_ALEN] = {0x33, 0x33, 0x00, 0x00,
4778 						0x00, 0x00};
4779 
4780 		mac6[2] = ip[3];
4781 		mac6[3] = ip[2];
4782 		mac6[4] = ip[1];
4783 		mac6[5] = ip[0];
4784 		ether_addr_copy(mac, mac6);
4785 	}
4786 }
4787 
4788 /**
4789  * irdma_attach_mcast - attach a qp to a multicast group
4790  * @ibqp: ptr to qp
4791  * @ibgid: pointer to global ID
4792  * @lid: local ID
4793  *
4794  * returns error status
4795  */
irdma_attach_mcast(struct ib_qp * ibqp,union ib_gid * ibgid,u16 lid)4796 static int irdma_attach_mcast(struct ib_qp *ibqp, union ib_gid *ibgid, u16 lid)
4797 {
4798 	struct irdma_qp *iwqp = to_iwqp(ibqp);
4799 	struct irdma_device *iwdev = iwqp->iwdev;
4800 	struct irdma_pci_f *rf = iwdev->rf;
4801 	struct mc_table_list *mc_qht_elem;
4802 	struct irdma_mcast_grp_ctx_entry_info mcg_info = {};
4803 	unsigned long flags;
4804 	u32 ip_addr[4] = {};
4805 	u32 mgn;
4806 	u32 no_mgs;
4807 	int ret = 0;
4808 	bool ipv4;
4809 	u16 vlan_id;
4810 	union irdma_sockaddr sgid_addr;
4811 	unsigned char dmac[ETH_ALEN];
4812 
4813 	rdma_gid2ip((struct sockaddr *)&sgid_addr, ibgid);
4814 
4815 	if (!ipv6_addr_v4mapped((struct in6_addr *)ibgid)) {
4816 		irdma_copy_ip_ntohl(ip_addr,
4817 				    sgid_addr.saddr_in6.sin6_addr.in6_u.u6_addr32);
4818 		irdma_get_vlan_mac_ipv6(ip_addr, &vlan_id, NULL);
4819 		ipv4 = false;
4820 		ibdev_dbg(&iwdev->ibdev,
4821 			  "VERBS: qp_id=%d, IP6address=%pI6\n", ibqp->qp_num,
4822 			  ip_addr);
4823 		irdma_mcast_mac(ip_addr, dmac, false);
4824 	} else {
4825 		ip_addr[0] = ntohl(sgid_addr.saddr_in.sin_addr.s_addr);
4826 		ipv4 = true;
4827 		vlan_id = irdma_get_vlan_ipv4(ip_addr);
4828 		irdma_mcast_mac(ip_addr, dmac, true);
4829 		ibdev_dbg(&iwdev->ibdev,
4830 			  "VERBS: qp_id=%d, IP4address=%pI4, MAC=%pM\n",
4831 			  ibqp->qp_num, ip_addr, dmac);
4832 	}
4833 
4834 	spin_lock_irqsave(&rf->qh_list_lock, flags);
4835 	mc_qht_elem = mcast_list_lookup_ip(rf, ip_addr);
4836 	if (!mc_qht_elem) {
4837 		struct irdma_dma_mem *dma_mem_mc;
4838 
4839 		spin_unlock_irqrestore(&rf->qh_list_lock, flags);
4840 		mc_qht_elem = kzalloc(sizeof(*mc_qht_elem), GFP_KERNEL);
4841 		if (!mc_qht_elem)
4842 			return -ENOMEM;
4843 
4844 		mc_qht_elem->mc_info.ipv4_valid = ipv4;
4845 		memcpy(mc_qht_elem->mc_info.dest_ip, ip_addr,
4846 		       sizeof(mc_qht_elem->mc_info.dest_ip));
4847 		ret = irdma_alloc_rsrc(rf, rf->allocated_mcgs, rf->max_mcg,
4848 				       &mgn, &rf->next_mcg);
4849 		if (ret) {
4850 			kfree(mc_qht_elem);
4851 			return -ENOMEM;
4852 		}
4853 
4854 		mc_qht_elem->mc_info.mgn = mgn;
4855 		dma_mem_mc = &mc_qht_elem->mc_grp_ctx.dma_mem_mc;
4856 		dma_mem_mc->size = ALIGN(sizeof(u64) * IRDMA_MAX_MGS_PER_CTX,
4857 					 IRDMA_HW_PAGE_SIZE);
4858 		dma_mem_mc->va = dma_alloc_coherent(rf->hw.device,
4859 						    dma_mem_mc->size,
4860 						    &dma_mem_mc->pa,
4861 						    GFP_KERNEL);
4862 		if (!dma_mem_mc->va) {
4863 			irdma_free_rsrc(rf, rf->allocated_mcgs, mgn);
4864 			kfree(mc_qht_elem);
4865 			return -ENOMEM;
4866 		}
4867 
4868 		mc_qht_elem->mc_grp_ctx.mg_id = (u16)mgn;
4869 		memcpy(mc_qht_elem->mc_grp_ctx.dest_ip_addr, ip_addr,
4870 		       sizeof(mc_qht_elem->mc_grp_ctx.dest_ip_addr));
4871 		mc_qht_elem->mc_grp_ctx.ipv4_valid = ipv4;
4872 		mc_qht_elem->mc_grp_ctx.vlan_id = vlan_id;
4873 		if (vlan_id < VLAN_N_VID)
4874 			mc_qht_elem->mc_grp_ctx.vlan_valid = true;
4875 		mc_qht_elem->mc_grp_ctx.hmc_fcn_id = iwdev->rf->sc_dev.hmc_fn_id;
4876 		mc_qht_elem->mc_grp_ctx.qs_handle =
4877 			iwqp->sc_qp.vsi->qos[iwqp->sc_qp.user_pri].qs_handle;
4878 		ether_addr_copy(mc_qht_elem->mc_grp_ctx.dest_mac_addr, dmac);
4879 
4880 		spin_lock_irqsave(&rf->qh_list_lock, flags);
4881 		mcast_list_add(rf, mc_qht_elem);
4882 	} else {
4883 		if (mc_qht_elem->mc_grp_ctx.no_of_mgs ==
4884 		    IRDMA_MAX_MGS_PER_CTX) {
4885 			spin_unlock_irqrestore(&rf->qh_list_lock, flags);
4886 			return -ENOMEM;
4887 		}
4888 	}
4889 
4890 	mcg_info.qp_id = iwqp->ibqp.qp_num;
4891 	no_mgs = mc_qht_elem->mc_grp_ctx.no_of_mgs;
4892 	irdma_sc_add_mcast_grp(&mc_qht_elem->mc_grp_ctx, &mcg_info);
4893 	spin_unlock_irqrestore(&rf->qh_list_lock, flags);
4894 
4895 	/* Only if there is a change do we need to modify or create */
4896 	if (!no_mgs) {
4897 		ret = irdma_mcast_cqp_op(iwdev, &mc_qht_elem->mc_grp_ctx,
4898 					 IRDMA_OP_MC_CREATE);
4899 	} else if (no_mgs != mc_qht_elem->mc_grp_ctx.no_of_mgs) {
4900 		ret = irdma_mcast_cqp_op(iwdev, &mc_qht_elem->mc_grp_ctx,
4901 					 IRDMA_OP_MC_MODIFY);
4902 	} else {
4903 		return 0;
4904 	}
4905 
4906 	if (ret)
4907 		goto error;
4908 
4909 	return 0;
4910 
4911 error:
4912 	irdma_sc_del_mcast_grp(&mc_qht_elem->mc_grp_ctx, &mcg_info);
4913 	if (!mc_qht_elem->mc_grp_ctx.no_of_mgs) {
4914 		mcast_list_del(mc_qht_elem);
4915 		dma_free_coherent(rf->hw.device,
4916 				  mc_qht_elem->mc_grp_ctx.dma_mem_mc.size,
4917 				  mc_qht_elem->mc_grp_ctx.dma_mem_mc.va,
4918 				  mc_qht_elem->mc_grp_ctx.dma_mem_mc.pa);
4919 		mc_qht_elem->mc_grp_ctx.dma_mem_mc.va = NULL;
4920 		irdma_free_rsrc(rf, rf->allocated_mcgs,
4921 				mc_qht_elem->mc_grp_ctx.mg_id);
4922 		kfree(mc_qht_elem);
4923 	}
4924 
4925 	return ret;
4926 }
4927 
4928 /**
4929  * irdma_detach_mcast - detach a qp from a multicast group
4930  * @ibqp: ptr to qp
4931  * @ibgid: pointer to global ID
4932  * @lid: local ID
4933  *
4934  * returns error status
4935  */
irdma_detach_mcast(struct ib_qp * ibqp,union ib_gid * ibgid,u16 lid)4936 static int irdma_detach_mcast(struct ib_qp *ibqp, union ib_gid *ibgid, u16 lid)
4937 {
4938 	struct irdma_qp *iwqp = to_iwqp(ibqp);
4939 	struct irdma_device *iwdev = iwqp->iwdev;
4940 	struct irdma_pci_f *rf = iwdev->rf;
4941 	u32 ip_addr[4] = {};
4942 	struct mc_table_list *mc_qht_elem;
4943 	struct irdma_mcast_grp_ctx_entry_info mcg_info = {};
4944 	int ret;
4945 	unsigned long flags;
4946 	union irdma_sockaddr sgid_addr;
4947 
4948 	rdma_gid2ip((struct sockaddr *)&sgid_addr, ibgid);
4949 	if (!ipv6_addr_v4mapped((struct in6_addr *)ibgid))
4950 		irdma_copy_ip_ntohl(ip_addr,
4951 				    sgid_addr.saddr_in6.sin6_addr.in6_u.u6_addr32);
4952 	else
4953 		ip_addr[0] = ntohl(sgid_addr.saddr_in.sin_addr.s_addr);
4954 
4955 	spin_lock_irqsave(&rf->qh_list_lock, flags);
4956 	mc_qht_elem = mcast_list_lookup_ip(rf, ip_addr);
4957 	if (!mc_qht_elem) {
4958 		spin_unlock_irqrestore(&rf->qh_list_lock, flags);
4959 		ibdev_dbg(&iwdev->ibdev,
4960 			  "VERBS: address not found MCG\n");
4961 		return 0;
4962 	}
4963 
4964 	mcg_info.qp_id = iwqp->ibqp.qp_num;
4965 	irdma_sc_del_mcast_grp(&mc_qht_elem->mc_grp_ctx, &mcg_info);
4966 	if (!mc_qht_elem->mc_grp_ctx.no_of_mgs) {
4967 		mcast_list_del(mc_qht_elem);
4968 		spin_unlock_irqrestore(&rf->qh_list_lock, flags);
4969 		ret = irdma_mcast_cqp_op(iwdev, &mc_qht_elem->mc_grp_ctx,
4970 					 IRDMA_OP_MC_DESTROY);
4971 		if (ret) {
4972 			ibdev_dbg(&iwdev->ibdev,
4973 				  "VERBS: failed MC_DESTROY MCG\n");
4974 			spin_lock_irqsave(&rf->qh_list_lock, flags);
4975 			mcast_list_add(rf, mc_qht_elem);
4976 			spin_unlock_irqrestore(&rf->qh_list_lock, flags);
4977 			return -EAGAIN;
4978 		}
4979 
4980 		dma_free_coherent(rf->hw.device,
4981 				  mc_qht_elem->mc_grp_ctx.dma_mem_mc.size,
4982 				  mc_qht_elem->mc_grp_ctx.dma_mem_mc.va,
4983 				  mc_qht_elem->mc_grp_ctx.dma_mem_mc.pa);
4984 		mc_qht_elem->mc_grp_ctx.dma_mem_mc.va = NULL;
4985 		irdma_free_rsrc(rf, rf->allocated_mcgs,
4986 				mc_qht_elem->mc_grp_ctx.mg_id);
4987 		kfree(mc_qht_elem);
4988 	} else {
4989 		spin_unlock_irqrestore(&rf->qh_list_lock, flags);
4990 		ret = irdma_mcast_cqp_op(iwdev, &mc_qht_elem->mc_grp_ctx,
4991 					 IRDMA_OP_MC_MODIFY);
4992 		if (ret) {
4993 			ibdev_dbg(&iwdev->ibdev,
4994 				  "VERBS: failed Modify MCG\n");
4995 			return ret;
4996 		}
4997 	}
4998 
4999 	return 0;
5000 }
5001 
irdma_create_hw_ah(struct irdma_device * iwdev,struct irdma_ah * ah,bool sleep)5002 static int irdma_create_hw_ah(struct irdma_device *iwdev, struct irdma_ah *ah, bool sleep)
5003 {
5004 	struct irdma_pci_f *rf = iwdev->rf;
5005 	int err;
5006 
5007 	err = irdma_alloc_rsrc(rf, rf->allocated_ahs, rf->max_ah, &ah->sc_ah.ah_info.ah_idx,
5008 			       &rf->next_ah);
5009 	if (err)
5010 		return err;
5011 
5012 	err = irdma_ah_cqp_op(rf, &ah->sc_ah, IRDMA_OP_AH_CREATE, sleep,
5013 			      irdma_gsi_ud_qp_ah_cb, &ah->sc_ah);
5014 
5015 	if (err) {
5016 		ibdev_dbg(&iwdev->ibdev, "VERBS: CQP-OP Create AH fail");
5017 		goto err_ah_create;
5018 	}
5019 
5020 	if (!sleep) {
5021 		int cnt = CQP_COMPL_WAIT_TIME_MS * CQP_TIMEOUT_THRESHOLD;
5022 
5023 		do {
5024 			irdma_cqp_ce_handler(rf, &rf->ccq.sc_cq);
5025 			mdelay(1);
5026 		} while (!ah->sc_ah.ah_info.ah_valid && --cnt);
5027 
5028 		if (!cnt) {
5029 			ibdev_dbg(&iwdev->ibdev, "VERBS: CQP create AH timed out");
5030 			err = -ETIMEDOUT;
5031 			goto err_ah_create;
5032 		}
5033 	}
5034 	return 0;
5035 
5036 err_ah_create:
5037 	irdma_free_rsrc(iwdev->rf, iwdev->rf->allocated_ahs, ah->sc_ah.ah_info.ah_idx);
5038 
5039 	return err;
5040 }
5041 
irdma_setup_ah(struct ib_ah * ibah,struct rdma_ah_init_attr * attr)5042 static int irdma_setup_ah(struct ib_ah *ibah, struct rdma_ah_init_attr *attr)
5043 {
5044 	struct irdma_pd *pd = to_iwpd(ibah->pd);
5045 	struct irdma_ah *ah = container_of(ibah, struct irdma_ah, ibah);
5046 	struct rdma_ah_attr *ah_attr = attr->ah_attr;
5047 	const struct ib_gid_attr *sgid_attr;
5048 	struct irdma_device *iwdev = to_iwdev(ibah->pd->device);
5049 	struct irdma_pci_f *rf = iwdev->rf;
5050 	struct irdma_sc_ah *sc_ah;
5051 	struct irdma_ah_info *ah_info;
5052 	union irdma_sockaddr sgid_addr, dgid_addr;
5053 	int err;
5054 	u8 dmac[ETH_ALEN];
5055 
5056 	ah->pd = pd;
5057 	sc_ah = &ah->sc_ah;
5058 	sc_ah->ah_info.vsi = &iwdev->vsi;
5059 	irdma_sc_init_ah(&rf->sc_dev, sc_ah);
5060 	ah->sgid_index = ah_attr->grh.sgid_index;
5061 	sgid_attr = ah_attr->grh.sgid_attr;
5062 	memcpy(&ah->dgid, &ah_attr->grh.dgid, sizeof(ah->dgid));
5063 	rdma_gid2ip((struct sockaddr *)&sgid_addr, &sgid_attr->gid);
5064 	rdma_gid2ip((struct sockaddr *)&dgid_addr, &ah_attr->grh.dgid);
5065 	ah->av.attrs = *ah_attr;
5066 	ah->av.net_type = rdma_gid_attr_network_type(sgid_attr);
5067 	ah_info = &sc_ah->ah_info;
5068 	ah_info->pd_idx = pd->sc_pd.pd_id;
5069 	if (ah_attr->ah_flags & IB_AH_GRH) {
5070 		ah_info->flow_label = ah_attr->grh.flow_label;
5071 		ah_info->hop_ttl = ah_attr->grh.hop_limit;
5072 		ah_info->tc_tos = ah_attr->grh.traffic_class;
5073 	}
5074 
5075 	ether_addr_copy(dmac, ah_attr->roce.dmac);
5076 	if (ah->av.net_type == RDMA_NETWORK_IPV4) {
5077 		ah_info->ipv4_valid = true;
5078 		ah_info->dest_ip_addr[0] =
5079 			ntohl(dgid_addr.saddr_in.sin_addr.s_addr);
5080 		ah_info->src_ip_addr[0] =
5081 			ntohl(sgid_addr.saddr_in.sin_addr.s_addr);
5082 		ah_info->do_lpbk = irdma_ipv4_is_lpb(ah_info->src_ip_addr[0],
5083 						     ah_info->dest_ip_addr[0]);
5084 		if (ipv4_is_multicast(dgid_addr.saddr_in.sin_addr.s_addr)) {
5085 			ah_info->do_lpbk = true;
5086 			irdma_mcast_mac(ah_info->dest_ip_addr, dmac, true);
5087 		}
5088 	} else {
5089 		irdma_copy_ip_ntohl(ah_info->dest_ip_addr,
5090 				    dgid_addr.saddr_in6.sin6_addr.in6_u.u6_addr32);
5091 		irdma_copy_ip_ntohl(ah_info->src_ip_addr,
5092 				    sgid_addr.saddr_in6.sin6_addr.in6_u.u6_addr32);
5093 		ah_info->do_lpbk = irdma_ipv6_is_lpb(ah_info->src_ip_addr,
5094 						     ah_info->dest_ip_addr);
5095 		if (rdma_is_multicast_addr(&dgid_addr.saddr_in6.sin6_addr)) {
5096 			ah_info->do_lpbk = true;
5097 			irdma_mcast_mac(ah_info->dest_ip_addr, dmac, false);
5098 		}
5099 	}
5100 
5101 	err = rdma_read_gid_l2_fields(sgid_attr, &ah_info->vlan_tag,
5102 				      ah_info->mac_addr);
5103 	if (err)
5104 		return err;
5105 
5106 	ah_info->dst_arpindex = irdma_add_arp(iwdev->rf, ah_info->dest_ip_addr,
5107 					      ah_info->ipv4_valid, dmac);
5108 
5109 	if (ah_info->dst_arpindex == -1)
5110 		return -EINVAL;
5111 
5112 	if (ah_info->vlan_tag >= VLAN_N_VID && iwdev->dcb_vlan_mode)
5113 		ah_info->vlan_tag = 0;
5114 
5115 	if (ah_info->vlan_tag < VLAN_N_VID) {
5116 		u8 prio = rt_tos2priority(ah_info->tc_tos);
5117 
5118 		prio = irdma_roce_get_vlan_prio(sgid_attr, prio);
5119 
5120 		ah_info->vlan_tag |= (u16)prio << VLAN_PRIO_SHIFT;
5121 		ah_info->insert_vlan_tag = true;
5122 	}
5123 
5124 	return 0;
5125 }
5126 
5127 /**
5128  * irdma_ah_exists - Check for existing identical AH
5129  * @iwdev: irdma device
5130  * @new_ah: AH to check for
5131  *
5132  * returns true if AH is found, false if not found.
5133  */
irdma_ah_exists(struct irdma_device * iwdev,struct irdma_ah * new_ah)5134 static bool irdma_ah_exists(struct irdma_device *iwdev,
5135 			    struct irdma_ah *new_ah)
5136 {
5137 	struct irdma_ah *ah;
5138 	u32 key = new_ah->sc_ah.ah_info.dest_ip_addr[0] ^
5139 		  new_ah->sc_ah.ah_info.dest_ip_addr[1] ^
5140 		  new_ah->sc_ah.ah_info.dest_ip_addr[2] ^
5141 		  new_ah->sc_ah.ah_info.dest_ip_addr[3];
5142 
5143 	hash_for_each_possible(iwdev->rf->ah_hash_tbl, ah, list, key) {
5144 		/* Set ah_valid and ah_id the same so memcmp can work */
5145 		new_ah->sc_ah.ah_info.ah_idx = ah->sc_ah.ah_info.ah_idx;
5146 		new_ah->sc_ah.ah_info.ah_valid = ah->sc_ah.ah_info.ah_valid;
5147 		if (!memcmp(&ah->sc_ah.ah_info, &new_ah->sc_ah.ah_info,
5148 			    sizeof(ah->sc_ah.ah_info))) {
5149 			refcount_inc(&ah->refcnt);
5150 			new_ah->parent_ah = ah;
5151 			return true;
5152 		}
5153 	}
5154 
5155 	return false;
5156 }
5157 
5158 /**
5159  * irdma_destroy_ah - Destroy address handle
5160  * @ibah: pointer to address handle
5161  * @ah_flags: flags for sleepable
5162  */
irdma_destroy_ah(struct ib_ah * ibah,u32 ah_flags)5163 static int irdma_destroy_ah(struct ib_ah *ibah, u32 ah_flags)
5164 {
5165 	struct irdma_device *iwdev = to_iwdev(ibah->device);
5166 	struct irdma_ah *ah = to_iwah(ibah);
5167 
5168 	if ((ah_flags & RDMA_DESTROY_AH_SLEEPABLE) && ah->parent_ah) {
5169 		mutex_lock(&iwdev->rf->ah_tbl_lock);
5170 		if (!refcount_dec_and_test(&ah->parent_ah->refcnt)) {
5171 			mutex_unlock(&iwdev->rf->ah_tbl_lock);
5172 			return 0;
5173 		}
5174 		hash_del(&ah->parent_ah->list);
5175 		kfree(ah->parent_ah);
5176 		mutex_unlock(&iwdev->rf->ah_tbl_lock);
5177 	}
5178 
5179 	irdma_ah_cqp_op(iwdev->rf, &ah->sc_ah, IRDMA_OP_AH_DESTROY,
5180 			false, NULL, ah);
5181 
5182 	irdma_free_rsrc(iwdev->rf, iwdev->rf->allocated_ahs,
5183 			ah->sc_ah.ah_info.ah_idx);
5184 
5185 	return 0;
5186 }
5187 
5188 /**
5189  * irdma_create_user_ah - create user address handle
5190  * @ibah: address handle
5191  * @attr: address handle attributes
5192  * @udata: User data
5193  *
5194  * returns 0 on success, error otherwise
5195  */
irdma_create_user_ah(struct ib_ah * ibah,struct rdma_ah_init_attr * attr,struct ib_udata * udata)5196 static int irdma_create_user_ah(struct ib_ah *ibah,
5197 				struct rdma_ah_init_attr *attr,
5198 				struct ib_udata *udata)
5199 {
5200 #define IRDMA_CREATE_AH_MIN_RESP_LEN offsetofend(struct irdma_create_ah_resp, rsvd)
5201 	struct irdma_ah *ah = container_of(ibah, struct irdma_ah, ibah);
5202 	struct irdma_device *iwdev = to_iwdev(ibah->pd->device);
5203 	struct irdma_create_ah_resp uresp;
5204 	struct irdma_ah *parent_ah;
5205 	int err;
5206 
5207 	if (udata && udata->outlen < IRDMA_CREATE_AH_MIN_RESP_LEN)
5208 		return -EINVAL;
5209 
5210 	err = irdma_setup_ah(ibah, attr);
5211 	if (err)
5212 		return err;
5213 	mutex_lock(&iwdev->rf->ah_tbl_lock);
5214 	if (!irdma_ah_exists(iwdev, ah)) {
5215 		err = irdma_create_hw_ah(iwdev, ah, true);
5216 		if (err) {
5217 			mutex_unlock(&iwdev->rf->ah_tbl_lock);
5218 			return err;
5219 		}
5220 		/* Add new AH to list */
5221 		parent_ah = kmemdup(ah, sizeof(*ah), GFP_KERNEL);
5222 		if (parent_ah) {
5223 			u32 key = parent_ah->sc_ah.ah_info.dest_ip_addr[0] ^
5224 				  parent_ah->sc_ah.ah_info.dest_ip_addr[1] ^
5225 				  parent_ah->sc_ah.ah_info.dest_ip_addr[2] ^
5226 				  parent_ah->sc_ah.ah_info.dest_ip_addr[3];
5227 
5228 			ah->parent_ah = parent_ah;
5229 			hash_add(iwdev->rf->ah_hash_tbl, &parent_ah->list, key);
5230 			refcount_set(&parent_ah->refcnt, 1);
5231 		}
5232 	}
5233 	mutex_unlock(&iwdev->rf->ah_tbl_lock);
5234 
5235 	uresp.ah_id = ah->sc_ah.ah_info.ah_idx;
5236 	err = ib_copy_to_udata(udata, &uresp, min(sizeof(uresp), udata->outlen));
5237 	if (err)
5238 		irdma_destroy_ah(ibah, attr->flags);
5239 
5240 	return err;
5241 }
5242 
5243 /**
5244  * irdma_create_ah - create address handle
5245  * @ibah: address handle
5246  * @attr: address handle attributes
5247  * @udata: NULL
5248  *
5249  * returns 0 on success, error otherwise
5250  */
irdma_create_ah(struct ib_ah * ibah,struct rdma_ah_init_attr * attr,struct ib_udata * udata)5251 static int irdma_create_ah(struct ib_ah *ibah, struct rdma_ah_init_attr *attr,
5252 			   struct ib_udata *udata)
5253 {
5254 	struct irdma_ah *ah = container_of(ibah, struct irdma_ah, ibah);
5255 	struct irdma_device *iwdev = to_iwdev(ibah->pd->device);
5256 	int err;
5257 
5258 	err = irdma_setup_ah(ibah, attr);
5259 	if (err)
5260 		return err;
5261 	err = irdma_create_hw_ah(iwdev, ah, attr->flags & RDMA_CREATE_AH_SLEEPABLE);
5262 
5263 	return err;
5264 }
5265 
5266 /**
5267  * irdma_query_ah - Query address handle
5268  * @ibah: pointer to address handle
5269  * @ah_attr: address handle attributes
5270  */
irdma_query_ah(struct ib_ah * ibah,struct rdma_ah_attr * ah_attr)5271 static int irdma_query_ah(struct ib_ah *ibah, struct rdma_ah_attr *ah_attr)
5272 {
5273 	struct irdma_ah *ah = to_iwah(ibah);
5274 
5275 	memset(ah_attr, 0, sizeof(*ah_attr));
5276 	if (ah->av.attrs.ah_flags & IB_AH_GRH) {
5277 		ah_attr->ah_flags = IB_AH_GRH;
5278 		ah_attr->grh.flow_label = ah->sc_ah.ah_info.flow_label;
5279 		ah_attr->grh.traffic_class = ah->sc_ah.ah_info.tc_tos;
5280 		ah_attr->grh.hop_limit = ah->sc_ah.ah_info.hop_ttl;
5281 		ah_attr->grh.sgid_index = ah->sgid_index;
5282 		memcpy(&ah_attr->grh.dgid, &ah->dgid,
5283 		       sizeof(ah_attr->grh.dgid));
5284 	}
5285 
5286 	return 0;
5287 }
5288 
irdma_get_link_layer(struct ib_device * ibdev,u32 port_num)5289 static enum rdma_link_layer irdma_get_link_layer(struct ib_device *ibdev,
5290 						 u32 port_num)
5291 {
5292 	return IB_LINK_LAYER_ETHERNET;
5293 }
5294 
5295 static const struct ib_device_ops irdma_gen1_dev_ops = {
5296 	.dealloc_driver = irdma_ib_dealloc_device,
5297 };
5298 
5299 static const struct ib_device_ops irdma_gen3_dev_ops = {
5300 	.alloc_mw = irdma_alloc_mw,
5301 	.create_srq = irdma_create_srq,
5302 	.dealloc_mw = irdma_dealloc_mw,
5303 	.destroy_srq = irdma_destroy_srq,
5304 	.modify_srq = irdma_modify_srq,
5305 	.post_srq_recv = irdma_post_srq_recv,
5306 	.query_srq = irdma_query_srq,
5307 };
5308 
5309 static const struct ib_device_ops irdma_roce_dev_ops = {
5310 	.attach_mcast = irdma_attach_mcast,
5311 	.create_ah = irdma_create_ah,
5312 	.create_user_ah = irdma_create_user_ah,
5313 	.destroy_ah = irdma_destroy_ah,
5314 	.detach_mcast = irdma_detach_mcast,
5315 	.get_link_layer = irdma_get_link_layer,
5316 	.get_port_immutable = irdma_roce_port_immutable,
5317 	.modify_qp = irdma_modify_qp_roce,
5318 	.query_ah = irdma_query_ah,
5319 	.query_pkey = irdma_query_pkey,
5320 };
5321 
5322 static const struct ib_device_ops irdma_iw_dev_ops = {
5323 	.get_port_immutable = irdma_iw_port_immutable,
5324 	.iw_accept = irdma_accept,
5325 	.iw_add_ref = irdma_qp_add_ref,
5326 	.iw_connect = irdma_connect,
5327 	.iw_create_listen = irdma_create_listen,
5328 	.iw_destroy_listen = irdma_destroy_listen,
5329 	.iw_get_qp = irdma_get_qp,
5330 	.iw_reject = irdma_reject,
5331 	.iw_rem_ref = irdma_qp_rem_ref,
5332 	.modify_qp = irdma_modify_qp,
5333 	.query_gid = irdma_query_gid,
5334 };
5335 
5336 static const struct ib_device_ops irdma_dev_ops = {
5337 	.owner = THIS_MODULE,
5338 	.driver_id = RDMA_DRIVER_IRDMA,
5339 	.uverbs_abi_ver = IRDMA_ABI_VER,
5340 
5341 	.alloc_hw_port_stats = irdma_alloc_hw_port_stats,
5342 	.alloc_mr = irdma_alloc_mr,
5343 	.alloc_pd = irdma_alloc_pd,
5344 	.alloc_ucontext = irdma_alloc_ucontext,
5345 	.create_cq = irdma_create_cq,
5346 	.create_qp = irdma_create_qp,
5347 	.dealloc_driver = irdma_ib_dealloc_device,
5348 	.dealloc_mw = irdma_dealloc_mw,
5349 	.dealloc_pd = irdma_dealloc_pd,
5350 	.dealloc_ucontext = irdma_dealloc_ucontext,
5351 	.dereg_mr = irdma_dereg_mr,
5352 	.destroy_cq = irdma_destroy_cq,
5353 	.destroy_qp = irdma_destroy_qp,
5354 	.disassociate_ucontext = irdma_disassociate_ucontext,
5355 	.get_dev_fw_str = irdma_get_dev_fw_str,
5356 	.get_dma_mr = irdma_get_dma_mr,
5357 	.get_hw_stats = irdma_get_hw_stats,
5358 	.map_mr_sg = irdma_map_mr_sg,
5359 	.mmap = irdma_mmap,
5360 	.mmap_free = irdma_mmap_free,
5361 	.poll_cq = irdma_poll_cq,
5362 	.post_recv = irdma_post_recv,
5363 	.post_send = irdma_post_send,
5364 	.query_device = irdma_query_device,
5365 	.query_port = irdma_query_port,
5366 	.query_qp = irdma_query_qp,
5367 	.reg_user_mr = irdma_reg_user_mr,
5368 	.reg_user_mr_dmabuf = irdma_reg_user_mr_dmabuf,
5369 	.rereg_user_mr = irdma_rereg_user_mr,
5370 	.req_notify_cq = irdma_req_notify_cq,
5371 	.resize_cq = irdma_resize_cq,
5372 	INIT_RDMA_OBJ_SIZE(ib_pd, irdma_pd, ibpd),
5373 	INIT_RDMA_OBJ_SIZE(ib_ucontext, irdma_ucontext, ibucontext),
5374 	INIT_RDMA_OBJ_SIZE(ib_ah, irdma_ah, ibah),
5375 	INIT_RDMA_OBJ_SIZE(ib_cq, irdma_cq, ibcq),
5376 	INIT_RDMA_OBJ_SIZE(ib_mw, irdma_mr, ibmw),
5377 	INIT_RDMA_OBJ_SIZE(ib_qp, irdma_qp, ibqp),
5378 	INIT_RDMA_OBJ_SIZE(ib_srq, irdma_srq, ibsrq),
5379 };
5380 
5381 /**
5382  * irdma_init_roce_device - initialization of roce rdma device
5383  * @iwdev: irdma device
5384  */
irdma_init_roce_device(struct irdma_device * iwdev)5385 static void irdma_init_roce_device(struct irdma_device *iwdev)
5386 {
5387 	iwdev->ibdev.node_type = RDMA_NODE_IB_CA;
5388 	addrconf_addr_eui48((u8 *)&iwdev->ibdev.node_guid,
5389 			    iwdev->netdev->dev_addr);
5390 	ib_set_device_ops(&iwdev->ibdev, &irdma_roce_dev_ops);
5391 }
5392 
5393 /**
5394  * irdma_init_iw_device - initialization of iwarp rdma device
5395  * @iwdev: irdma device
5396  */
irdma_init_iw_device(struct irdma_device * iwdev)5397 static void irdma_init_iw_device(struct irdma_device *iwdev)
5398 {
5399 	struct net_device *netdev = iwdev->netdev;
5400 
5401 	iwdev->ibdev.node_type = RDMA_NODE_RNIC;
5402 	addrconf_addr_eui48((u8 *)&iwdev->ibdev.node_guid,
5403 			    netdev->dev_addr);
5404 	memcpy(iwdev->ibdev.iw_ifname, netdev->name,
5405 	       sizeof(iwdev->ibdev.iw_ifname));
5406 	ib_set_device_ops(&iwdev->ibdev, &irdma_iw_dev_ops);
5407 }
5408 
5409 /**
5410  * irdma_init_rdma_device - initialization of rdma device
5411  * @iwdev: irdma device
5412  */
irdma_init_rdma_device(struct irdma_device * iwdev)5413 static void irdma_init_rdma_device(struct irdma_device *iwdev)
5414 {
5415 	struct pci_dev *pcidev = iwdev->rf->pcidev;
5416 
5417 	if (iwdev->roce_mode)
5418 		irdma_init_roce_device(iwdev);
5419 	else
5420 		irdma_init_iw_device(iwdev);
5421 
5422 	iwdev->ibdev.phys_port_cnt = 1;
5423 	iwdev->ibdev.num_comp_vectors = iwdev->rf->ceqs_count;
5424 	iwdev->ibdev.dev.parent = &pcidev->dev;
5425 	ib_set_device_ops(&iwdev->ibdev, &irdma_dev_ops);
5426 	if (iwdev->rf->rdma_ver == IRDMA_GEN_1)
5427 		ib_set_device_ops(&iwdev->ibdev, &irdma_gen1_dev_ops);
5428 	if (iwdev->rf->rdma_ver >= IRDMA_GEN_3)
5429 		ib_set_device_ops(&iwdev->ibdev, &irdma_gen3_dev_ops);
5430 }
5431 
5432 /**
5433  * irdma_port_ibevent - indicate port event
5434  * @iwdev: irdma device
5435  */
irdma_port_ibevent(struct irdma_device * iwdev)5436 void irdma_port_ibevent(struct irdma_device *iwdev)
5437 {
5438 	struct ib_event event;
5439 
5440 	event.device = &iwdev->ibdev;
5441 	event.element.port_num = 1;
5442 	event.event =
5443 		iwdev->iw_status ? IB_EVENT_PORT_ACTIVE : IB_EVENT_PORT_ERR;
5444 	ib_dispatch_event(&event);
5445 }
5446 
5447 /**
5448  * irdma_ib_unregister_device - unregister rdma device from IB
5449  * core
5450  * @iwdev: irdma device
5451  */
irdma_ib_unregister_device(struct irdma_device * iwdev)5452 void irdma_ib_unregister_device(struct irdma_device *iwdev)
5453 {
5454 	iwdev->iw_status = 0;
5455 	irdma_port_ibevent(iwdev);
5456 	ib_unregister_device(&iwdev->ibdev);
5457 }
5458 
5459 /**
5460  * irdma_ib_register_device - register irdma device to IB core
5461  * @iwdev: irdma device
5462  */
irdma_ib_register_device(struct irdma_device * iwdev)5463 int irdma_ib_register_device(struct irdma_device *iwdev)
5464 {
5465 	int ret;
5466 
5467 	irdma_init_rdma_device(iwdev);
5468 
5469 	ret = ib_device_set_netdev(&iwdev->ibdev, iwdev->netdev, 1);
5470 	if (ret)
5471 		goto error;
5472 	dma_set_max_seg_size(iwdev->rf->hw.device, UINT_MAX);
5473 	ret = ib_register_device(&iwdev->ibdev, "irdma%d", iwdev->rf->hw.device);
5474 	if (ret)
5475 		goto error;
5476 
5477 	iwdev->iw_status = 1;
5478 	irdma_port_ibevent(iwdev);
5479 
5480 	return 0;
5481 
5482 error:
5483 	if (ret)
5484 		ibdev_dbg(&iwdev->ibdev, "VERBS: Register RDMA device fail\n");
5485 
5486 	return ret;
5487 }
5488 
5489 /**
5490  * irdma_ib_dealloc_device
5491  * @ibdev: ib device
5492  *
5493  * callback from ibdev dealloc_driver to deallocate resources
5494  * unber irdma device
5495  */
irdma_ib_dealloc_device(struct ib_device * ibdev)5496 void irdma_ib_dealloc_device(struct ib_device *ibdev)
5497 {
5498 	struct irdma_device *iwdev = to_iwdev(ibdev);
5499 
5500 	irdma_rt_deinit_hw(iwdev);
5501 	if (!iwdev->is_vport) {
5502 		irdma_ctrl_deinit_hw(iwdev->rf);
5503 		if (iwdev->rf->vchnl_wq)
5504 			destroy_workqueue(iwdev->rf->vchnl_wq);
5505 	}
5506 }
5507