1 // SPDX-License-Identifier: GPL-2.0 OR Linux-OpenIB 2 /* 3 * Copyright (c) 2018 Hisilicon Limited. 4 */ 5 6 #include <linux/pci.h> 7 #include <rdma/ib_umem.h> 8 #include "hns_roce_device.h" 9 #include "hns_roce_cmd.h" 10 #include "hns_roce_hem.h" 11 12 void hns_roce_srq_event(struct hns_roce_dev *hr_dev, u32 srqn, int event_type) 13 { 14 struct hns_roce_srq_table *srq_table = &hr_dev->srq_table; 15 struct hns_roce_srq *srq; 16 17 xa_lock(&srq_table->xa); 18 srq = xa_load(&srq_table->xa, srqn & (hr_dev->caps.num_srqs - 1)); 19 if (srq) 20 refcount_inc(&srq->refcount); 21 xa_unlock(&srq_table->xa); 22 23 if (!srq) { 24 dev_warn(hr_dev->dev, "Async event for bogus SRQ %08x\n", srqn); 25 return; 26 } 27 28 srq->event(srq, event_type); 29 30 if (refcount_dec_and_test(&srq->refcount)) 31 complete(&srq->free); 32 } 33 34 static void hns_roce_ib_srq_event(struct hns_roce_srq *srq, 35 enum hns_roce_event event_type) 36 { 37 struct hns_roce_dev *hr_dev = to_hr_dev(srq->ibsrq.device); 38 struct ib_srq *ibsrq = &srq->ibsrq; 39 struct ib_event event; 40 41 if (ibsrq->event_handler) { 42 event.device = ibsrq->device; 43 event.element.srq = ibsrq; 44 switch (event_type) { 45 case HNS_ROCE_EVENT_TYPE_SRQ_LIMIT_REACH: 46 event.event = IB_EVENT_SRQ_LIMIT_REACHED; 47 break; 48 case HNS_ROCE_EVENT_TYPE_SRQ_CATAS_ERROR: 49 event.event = IB_EVENT_SRQ_ERR; 50 break; 51 default: 52 dev_err(hr_dev->dev, 53 "hns_roce:Unexpected event type 0x%x on SRQ %06lx\n", 54 event_type, srq->srqn); 55 return; 56 } 57 58 ibsrq->event_handler(&event, ibsrq->srq_context); 59 } 60 } 61 62 static int hns_roce_hw_create_srq(struct hns_roce_dev *dev, 63 struct hns_roce_cmd_mailbox *mailbox, 64 unsigned long srq_num) 65 { 66 return hns_roce_cmd_mbox(dev, mailbox->dma, 0, srq_num, 0, 67 HNS_ROCE_CMD_CREATE_SRQ, 68 HNS_ROCE_CMD_TIMEOUT_MSECS); 69 } 70 71 static int hns_roce_hw_destroy_srq(struct hns_roce_dev *dev, 72 struct hns_roce_cmd_mailbox *mailbox, 73 unsigned long srq_num) 74 { 75 return hns_roce_cmd_mbox(dev, 0, mailbox ? mailbox->dma : 0, srq_num, 76 mailbox ? 0 : 1, HNS_ROCE_CMD_DESTROY_SRQ, 77 HNS_ROCE_CMD_TIMEOUT_MSECS); 78 } 79 80 static int alloc_srqc(struct hns_roce_dev *hr_dev, struct hns_roce_srq *srq) 81 { 82 struct hns_roce_srq_table *srq_table = &hr_dev->srq_table; 83 struct ib_device *ibdev = &hr_dev->ib_dev; 84 struct hns_roce_cmd_mailbox *mailbox; 85 int ret; 86 87 ret = hns_roce_bitmap_alloc(&srq_table->bitmap, &srq->srqn); 88 if (ret) { 89 ibdev_err(ibdev, "failed to alloc SRQ number.\n"); 90 return -ENOMEM; 91 } 92 93 ret = hns_roce_table_get(hr_dev, &srq_table->table, srq->srqn); 94 if (ret) { 95 ibdev_err(ibdev, "failed to get SRQC table, ret = %d.\n", ret); 96 goto err_out; 97 } 98 99 ret = xa_err(xa_store(&srq_table->xa, srq->srqn, srq, GFP_KERNEL)); 100 if (ret) { 101 ibdev_err(ibdev, "failed to store SRQC, ret = %d.\n", ret); 102 goto err_put; 103 } 104 105 mailbox = hns_roce_alloc_cmd_mailbox(hr_dev); 106 if (IS_ERR_OR_NULL(mailbox)) { 107 ibdev_err(ibdev, "failed to alloc mailbox for SRQC.\n"); 108 ret = -ENOMEM; 109 goto err_xa; 110 } 111 112 ret = hr_dev->hw->write_srqc(srq, mailbox->buf); 113 if (ret) { 114 ibdev_err(ibdev, "failed to write SRQC.\n"); 115 goto err_mbox; 116 } 117 118 ret = hns_roce_hw_create_srq(hr_dev, mailbox, srq->srqn); 119 if (ret) { 120 ibdev_err(ibdev, "failed to config SRQC, ret = %d.\n", ret); 121 goto err_mbox; 122 } 123 124 hns_roce_free_cmd_mailbox(hr_dev, mailbox); 125 126 return 0; 127 128 err_mbox: 129 hns_roce_free_cmd_mailbox(hr_dev, mailbox); 130 err_xa: 131 xa_erase(&srq_table->xa, srq->srqn); 132 err_put: 133 hns_roce_table_put(hr_dev, &srq_table->table, srq->srqn); 134 err_out: 135 hns_roce_bitmap_free(&srq_table->bitmap, srq->srqn); 136 137 return ret; 138 } 139 140 static void free_srqc(struct hns_roce_dev *hr_dev, struct hns_roce_srq *srq) 141 { 142 struct hns_roce_srq_table *srq_table = &hr_dev->srq_table; 143 int ret; 144 145 ret = hns_roce_hw_destroy_srq(hr_dev, NULL, srq->srqn); 146 if (ret) 147 dev_err(hr_dev->dev, "DESTROY_SRQ failed (%d) for SRQN %06lx\n", 148 ret, srq->srqn); 149 150 xa_erase(&srq_table->xa, srq->srqn); 151 152 if (refcount_dec_and_test(&srq->refcount)) 153 complete(&srq->free); 154 wait_for_completion(&srq->free); 155 156 hns_roce_table_put(hr_dev, &srq_table->table, srq->srqn); 157 hns_roce_bitmap_free(&srq_table->bitmap, srq->srqn); 158 } 159 160 static int alloc_srq_idx(struct hns_roce_dev *hr_dev, struct hns_roce_srq *srq, 161 struct ib_udata *udata, unsigned long addr) 162 { 163 struct hns_roce_idx_que *idx_que = &srq->idx_que; 164 struct ib_device *ibdev = &hr_dev->ib_dev; 165 struct hns_roce_buf_attr buf_attr = {}; 166 int ret; 167 168 srq->idx_que.entry_shift = ilog2(HNS_ROCE_IDX_QUE_ENTRY_SZ); 169 170 buf_attr.page_shift = hr_dev->caps.idx_buf_pg_sz + PAGE_SHIFT; 171 buf_attr.region[0].size = to_hr_hem_entries_size(srq->wqe_cnt, 172 srq->idx_que.entry_shift); 173 buf_attr.region[0].hopnum = hr_dev->caps.idx_hop_num; 174 buf_attr.region_count = 1; 175 176 ret = hns_roce_mtr_create(hr_dev, &idx_que->mtr, &buf_attr, 177 hr_dev->caps.idx_ba_pg_sz + PAGE_SHIFT, 178 udata, addr); 179 if (ret) { 180 ibdev_err(ibdev, 181 "failed to alloc SRQ idx mtr, ret = %d.\n", ret); 182 return ret; 183 } 184 185 if (!udata) { 186 idx_que->bitmap = bitmap_zalloc(srq->wqe_cnt, GFP_KERNEL); 187 if (!idx_que->bitmap) { 188 ibdev_err(ibdev, "failed to alloc SRQ idx bitmap.\n"); 189 ret = -ENOMEM; 190 goto err_idx_mtr; 191 } 192 } 193 194 idx_que->head = 0; 195 idx_que->tail = 0; 196 197 return 0; 198 err_idx_mtr: 199 hns_roce_mtr_destroy(hr_dev, &idx_que->mtr); 200 201 return ret; 202 } 203 204 static void free_srq_idx(struct hns_roce_dev *hr_dev, struct hns_roce_srq *srq) 205 { 206 struct hns_roce_idx_que *idx_que = &srq->idx_que; 207 208 bitmap_free(idx_que->bitmap); 209 idx_que->bitmap = NULL; 210 hns_roce_mtr_destroy(hr_dev, &idx_que->mtr); 211 } 212 213 static int alloc_srq_wqe_buf(struct hns_roce_dev *hr_dev, 214 struct hns_roce_srq *srq, 215 struct ib_udata *udata, unsigned long addr) 216 { 217 struct ib_device *ibdev = &hr_dev->ib_dev; 218 struct hns_roce_buf_attr buf_attr = {}; 219 int ret; 220 221 srq->wqe_shift = ilog2(roundup_pow_of_two(max(HNS_ROCE_SGE_SIZE, 222 HNS_ROCE_SGE_SIZE * 223 srq->max_gs))); 224 225 buf_attr.page_shift = hr_dev->caps.srqwqe_buf_pg_sz + PAGE_SHIFT; 226 buf_attr.region[0].size = to_hr_hem_entries_size(srq->wqe_cnt, 227 srq->wqe_shift); 228 buf_attr.region[0].hopnum = hr_dev->caps.srqwqe_hop_num; 229 buf_attr.region_count = 1; 230 231 ret = hns_roce_mtr_create(hr_dev, &srq->buf_mtr, &buf_attr, 232 hr_dev->caps.srqwqe_ba_pg_sz + PAGE_SHIFT, 233 udata, addr); 234 if (ret) 235 ibdev_err(ibdev, 236 "failed to alloc SRQ buf mtr, ret = %d.\n", ret); 237 238 return ret; 239 } 240 241 static void free_srq_wqe_buf(struct hns_roce_dev *hr_dev, 242 struct hns_roce_srq *srq) 243 { 244 hns_roce_mtr_destroy(hr_dev, &srq->buf_mtr); 245 } 246 247 static int alloc_srq_wrid(struct hns_roce_dev *hr_dev, struct hns_roce_srq *srq) 248 { 249 srq->wrid = kvmalloc_array(srq->wqe_cnt, sizeof(u64), GFP_KERNEL); 250 if (!srq->wrid) 251 return -ENOMEM; 252 253 return 0; 254 } 255 256 static void free_srq_wrid(struct hns_roce_srq *srq) 257 { 258 kfree(srq->wrid); 259 srq->wrid = NULL; 260 } 261 262 static u32 proc_srq_sge(struct hns_roce_dev *dev, struct hns_roce_srq *hr_srq, 263 bool user) 264 { 265 u32 max_sge = dev->caps.max_srq_sges; 266 267 if (dev->pci_dev->revision >= PCI_REVISION_ID_HIP09) 268 return max_sge; 269 270 /* Reserve SGEs only for HIP08 in kernel; The userspace driver will 271 * calculate number of max_sge with reserved SGEs when allocating wqe 272 * buf, so there is no need to do this again in kernel. But the number 273 * may exceed the capacity of SGEs recorded in the firmware, so the 274 * kernel driver should just adapt the value accordingly. 275 */ 276 if (user) 277 max_sge = roundup_pow_of_two(max_sge + 1); 278 else 279 hr_srq->rsv_sge = 1; 280 281 return max_sge; 282 } 283 284 static int set_srq_basic_param(struct hns_roce_srq *srq, 285 struct ib_srq_init_attr *init_attr, 286 struct ib_udata *udata) 287 { 288 struct hns_roce_dev *hr_dev = to_hr_dev(srq->ibsrq.device); 289 struct ib_srq_attr *attr = &init_attr->attr; 290 u32 max_sge; 291 292 max_sge = proc_srq_sge(hr_dev, srq, !!udata); 293 if (attr->max_wr > hr_dev->caps.max_srq_wrs || 294 attr->max_sge > max_sge) { 295 ibdev_err(&hr_dev->ib_dev, 296 "invalid SRQ attr, depth = %u, sge = %u.\n", 297 attr->max_wr, attr->max_sge); 298 return -EINVAL; 299 } 300 301 attr->max_wr = max_t(u32, attr->max_wr, HNS_ROCE_MIN_SRQ_WQE_NUM); 302 srq->wqe_cnt = roundup_pow_of_two(attr->max_wr); 303 srq->max_gs = roundup_pow_of_two(attr->max_sge + srq->rsv_sge); 304 305 attr->max_wr = srq->wqe_cnt; 306 attr->max_sge = srq->max_gs - srq->rsv_sge; 307 attr->srq_limit = 0; 308 309 return 0; 310 } 311 312 static void set_srq_ext_param(struct hns_roce_srq *srq, 313 struct ib_srq_init_attr *init_attr) 314 { 315 srq->cqn = ib_srq_has_cq(init_attr->srq_type) ? 316 to_hr_cq(init_attr->ext.cq)->cqn : 0; 317 318 srq->xrcdn = (init_attr->srq_type == IB_SRQT_XRC) ? 319 to_hr_xrcd(init_attr->ext.xrc.xrcd)->xrcdn : 0; 320 } 321 322 static int set_srq_param(struct hns_roce_srq *srq, 323 struct ib_srq_init_attr *init_attr, 324 struct ib_udata *udata) 325 { 326 int ret; 327 328 ret = set_srq_basic_param(srq, init_attr, udata); 329 if (ret) 330 return ret; 331 332 set_srq_ext_param(srq, init_attr); 333 334 return 0; 335 } 336 337 static int alloc_srq_buf(struct hns_roce_dev *hr_dev, struct hns_roce_srq *srq, 338 struct ib_udata *udata) 339 { 340 struct hns_roce_ib_create_srq ucmd = {}; 341 int ret; 342 343 if (udata) { 344 ret = ib_copy_from_udata(&ucmd, udata, 345 min(udata->inlen, sizeof(ucmd))); 346 if (ret) { 347 ibdev_err(&hr_dev->ib_dev, 348 "failed to copy SRQ udata, ret = %d.\n", 349 ret); 350 return ret; 351 } 352 } 353 354 ret = alloc_srq_idx(hr_dev, srq, udata, ucmd.que_addr); 355 if (ret) 356 return ret; 357 358 ret = alloc_srq_wqe_buf(hr_dev, srq, udata, ucmd.buf_addr); 359 if (ret) 360 goto err_idx; 361 362 if (!udata) { 363 ret = alloc_srq_wrid(hr_dev, srq); 364 if (ret) 365 goto err_wqe_buf; 366 } 367 368 return 0; 369 370 err_wqe_buf: 371 free_srq_wqe_buf(hr_dev, srq); 372 err_idx: 373 free_srq_idx(hr_dev, srq); 374 375 return ret; 376 } 377 378 static void free_srq_buf(struct hns_roce_dev *hr_dev, struct hns_roce_srq *srq) 379 { 380 free_srq_wrid(srq); 381 free_srq_wqe_buf(hr_dev, srq); 382 free_srq_idx(hr_dev, srq); 383 } 384 385 int hns_roce_create_srq(struct ib_srq *ib_srq, 386 struct ib_srq_init_attr *init_attr, 387 struct ib_udata *udata) 388 { 389 struct hns_roce_dev *hr_dev = to_hr_dev(ib_srq->device); 390 struct hns_roce_ib_create_srq_resp resp = {}; 391 struct hns_roce_srq *srq = to_hr_srq(ib_srq); 392 int ret; 393 394 mutex_init(&srq->mutex); 395 spin_lock_init(&srq->lock); 396 397 ret = set_srq_param(srq, init_attr, udata); 398 if (ret) 399 return ret; 400 401 ret = alloc_srq_buf(hr_dev, srq, udata); 402 if (ret) 403 return ret; 404 405 ret = alloc_srqc(hr_dev, srq); 406 if (ret) 407 goto err_srq_buf; 408 409 if (udata) { 410 resp.srqn = srq->srqn; 411 if (ib_copy_to_udata(udata, &resp, 412 min(udata->outlen, sizeof(resp)))) { 413 ret = -EFAULT; 414 goto err_srqc; 415 } 416 } 417 418 srq->db_reg = hr_dev->reg_base + SRQ_DB_REG; 419 srq->event = hns_roce_ib_srq_event; 420 refcount_set(&srq->refcount, 1); 421 init_completion(&srq->free); 422 423 return 0; 424 425 err_srqc: 426 free_srqc(hr_dev, srq); 427 err_srq_buf: 428 free_srq_buf(hr_dev, srq); 429 430 return ret; 431 } 432 433 int hns_roce_destroy_srq(struct ib_srq *ibsrq, struct ib_udata *udata) 434 { 435 struct hns_roce_dev *hr_dev = to_hr_dev(ibsrq->device); 436 struct hns_roce_srq *srq = to_hr_srq(ibsrq); 437 438 free_srqc(hr_dev, srq); 439 free_srq_buf(hr_dev, srq); 440 return 0; 441 } 442 443 int hns_roce_init_srq_table(struct hns_roce_dev *hr_dev) 444 { 445 struct hns_roce_srq_table *srq_table = &hr_dev->srq_table; 446 447 xa_init(&srq_table->xa); 448 449 return hns_roce_bitmap_init(&srq_table->bitmap, hr_dev->caps.num_srqs, 450 hr_dev->caps.num_srqs - 1, 451 hr_dev->caps.reserved_srqs, 0); 452 } 453 454 void hns_roce_cleanup_srq_table(struct hns_roce_dev *hr_dev) 455 { 456 hns_roce_bitmap_cleanup(&hr_dev->srq_table.bitmap); 457 } 458