1 /* 2 * Copyright (c) 2016 Hisilicon Limited. 3 * Copyright (c) 2007, 2008 Mellanox Technologies. All rights reserved. 4 * 5 * This software is available to you under a choice of one of two 6 * licenses. You may choose to be licensed under the terms of the GNU 7 * General Public License (GPL) Version 2, available from the file 8 * COPYING in the main directory of this source tree, or the 9 * OpenIB.org BSD license below: 10 * 11 * Redistribution and use in source and binary forms, with or 12 * without modification, are permitted provided that the following 13 * conditions are met: 14 * 15 * - Redistributions of source code must retain the above 16 * copyright notice, this list of conditions and the following 17 * disclaimer. 18 * 19 * - Redistributions in binary form must reproduce the above 20 * copyright notice, this list of conditions and the following 21 * disclaimer in the documentation and/or other materials 22 * provided with the distribution. 23 * 24 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, 25 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF 26 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND 27 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS 28 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN 29 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN 30 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE 31 * SOFTWARE. 32 */ 33 34 #include <linux/vmalloc.h> 35 #include <linux/count_zeros.h> 36 #include <rdma/ib_umem.h> 37 #include <linux/math.h> 38 #include "hns_roce_device.h" 39 #include "hns_roce_cmd.h" 40 #include "hns_roce_hem.h" 41 #include "hns_roce_trace.h" 42 43 static u32 hw_index_to_key(int ind) 44 { 45 return ((u32)ind >> 24) | ((u32)ind << 8); 46 } 47 48 unsigned long key_to_hw_index(u32 key) 49 { 50 return (key << 24) | (key >> 8); 51 } 52 53 static int alloc_mr_key(struct hns_roce_dev *hr_dev, struct hns_roce_mr *mr) 54 { 55 struct hns_roce_ida *mtpt_ida = &hr_dev->mr_table.mtpt_ida; 56 struct ib_device *ibdev = &hr_dev->ib_dev; 57 int err; 58 int id; 59 60 /* Allocate a key for mr from mr_table */ 61 id = ida_alloc_range(&mtpt_ida->ida, mtpt_ida->min, mtpt_ida->max, 62 GFP_KERNEL); 63 if (id < 0) { 64 ibdev_err(ibdev, "failed to alloc id for MR key, id(%d)\n", id); 65 return -ENOMEM; 66 } 67 68 mr->key = hw_index_to_key(id); /* MR key */ 69 70 err = hns_roce_table_get(hr_dev, &hr_dev->mr_table.mtpt_table, 71 (unsigned long)id); 72 if (err) { 73 ibdev_err(ibdev, "failed to alloc mtpt, ret = %d.\n", err); 74 goto err_free_bitmap; 75 } 76 77 return 0; 78 err_free_bitmap: 79 ida_free(&mtpt_ida->ida, id); 80 return err; 81 } 82 83 static void free_mr_key(struct hns_roce_dev *hr_dev, struct hns_roce_mr *mr) 84 { 85 unsigned long obj = key_to_hw_index(mr->key); 86 87 hns_roce_table_put(hr_dev, &hr_dev->mr_table.mtpt_table, obj); 88 ida_free(&hr_dev->mr_table.mtpt_ida.ida, (int)obj); 89 } 90 91 static int alloc_mr_pbl(struct hns_roce_dev *hr_dev, struct hns_roce_mr *mr, 92 struct ib_udata *udata, u64 start) 93 { 94 struct ib_device *ibdev = &hr_dev->ib_dev; 95 bool is_fast = mr->type == MR_TYPE_FRMR; 96 struct hns_roce_buf_attr buf_attr = {}; 97 int err; 98 99 mr->pbl_hop_num = is_fast ? 1 : hr_dev->caps.pbl_hop_num; 100 buf_attr.page_shift = is_fast ? PAGE_SHIFT : 101 hr_dev->caps.pbl_buf_pg_sz + PAGE_SHIFT; 102 buf_attr.region[0].size = mr->size; 103 buf_attr.region[0].hopnum = mr->pbl_hop_num; 104 buf_attr.region_count = 1; 105 buf_attr.user_access = mr->access; 106 /* fast MR's buffer is alloced before mapping, not at creation */ 107 buf_attr.mtt_only = is_fast; 108 buf_attr.iova = mr->iova; 109 /* pagesize and hopnum is fixed for fast MR */ 110 buf_attr.adaptive = !is_fast; 111 buf_attr.type = MTR_PBL; 112 113 err = hns_roce_mtr_create(hr_dev, &mr->pbl_mtr, &buf_attr, 114 hr_dev->caps.pbl_ba_pg_sz + PAGE_SHIFT, 115 udata, start); 116 if (err) { 117 ibdev_err(ibdev, "failed to alloc pbl mtr, ret = %d.\n", err); 118 return err; 119 } 120 121 mr->npages = mr->pbl_mtr.hem_cfg.buf_pg_count; 122 mr->pbl_hop_num = buf_attr.region[0].hopnum; 123 124 return err; 125 } 126 127 static void free_mr_pbl(struct hns_roce_dev *hr_dev, struct hns_roce_mr *mr) 128 { 129 hns_roce_mtr_destroy(hr_dev, &mr->pbl_mtr); 130 } 131 132 static void hns_roce_mr_free(struct hns_roce_dev *hr_dev, struct hns_roce_mr *mr) 133 { 134 struct ib_device *ibdev = &hr_dev->ib_dev; 135 int ret; 136 137 if (mr->enabled) { 138 ret = hns_roce_destroy_hw_ctx(hr_dev, HNS_ROCE_CMD_DESTROY_MPT, 139 key_to_hw_index(mr->key) & 140 (hr_dev->caps.num_mtpts - 1)); 141 if (ret) 142 ibdev_warn_ratelimited(ibdev, "failed to destroy mpt, ret = %d.\n", 143 ret); 144 } 145 146 free_mr_pbl(hr_dev, mr); 147 free_mr_key(hr_dev, mr); 148 } 149 150 static int hns_roce_mr_enable(struct hns_roce_dev *hr_dev, 151 struct hns_roce_mr *mr) 152 { 153 unsigned long mtpt_idx = key_to_hw_index(mr->key); 154 struct hns_roce_cmd_mailbox *mailbox; 155 struct device *dev = hr_dev->dev; 156 int ret; 157 158 /* Allocate mailbox memory */ 159 mailbox = hns_roce_alloc_cmd_mailbox(hr_dev); 160 if (IS_ERR(mailbox)) 161 return PTR_ERR(mailbox); 162 163 trace_hns_mr(mr); 164 if (mr->type != MR_TYPE_FRMR) 165 ret = hr_dev->hw->write_mtpt(hr_dev, mailbox->buf, mr); 166 else 167 ret = hr_dev->hw->frmr_write_mtpt(mailbox->buf, mr); 168 if (ret) { 169 dev_err(dev, "failed to write mtpt, ret = %d.\n", ret); 170 goto err_page; 171 } 172 173 ret = hns_roce_create_hw_ctx(hr_dev, mailbox, HNS_ROCE_CMD_CREATE_MPT, 174 mtpt_idx & (hr_dev->caps.num_mtpts - 1)); 175 if (ret) { 176 dev_err(dev, "failed to create mpt, ret = %d.\n", ret); 177 goto err_page; 178 } 179 180 mr->enabled = 1; 181 182 err_page: 183 hns_roce_free_cmd_mailbox(hr_dev, mailbox); 184 185 return ret; 186 } 187 188 void hns_roce_init_mr_table(struct hns_roce_dev *hr_dev) 189 { 190 struct hns_roce_ida *mtpt_ida = &hr_dev->mr_table.mtpt_ida; 191 192 ida_init(&mtpt_ida->ida); 193 mtpt_ida->max = hr_dev->caps.num_mtpts - 1; 194 mtpt_ida->min = hr_dev->caps.reserved_mrws; 195 } 196 197 struct ib_mr *hns_roce_get_dma_mr(struct ib_pd *pd, int acc) 198 { 199 struct hns_roce_dev *hr_dev = to_hr_dev(pd->device); 200 struct hns_roce_mr *mr; 201 int ret; 202 203 mr = kzalloc(sizeof(*mr), GFP_KERNEL); 204 if (!mr) 205 return ERR_PTR(-ENOMEM); 206 207 mr->type = MR_TYPE_DMA; 208 mr->pd = to_hr_pd(pd)->pdn; 209 mr->access = acc; 210 211 /* Allocate memory region key */ 212 hns_roce_hem_list_init(&mr->pbl_mtr.hem_list); 213 ret = alloc_mr_key(hr_dev, mr); 214 if (ret) 215 goto err_free; 216 217 ret = hns_roce_mr_enable(hr_dev, mr); 218 if (ret) 219 goto err_mr; 220 221 mr->ibmr.rkey = mr->ibmr.lkey = mr->key; 222 223 return &mr->ibmr; 224 err_mr: 225 free_mr_key(hr_dev, mr); 226 227 err_free: 228 kfree(mr); 229 return ERR_PTR(ret); 230 } 231 232 struct ib_mr *hns_roce_reg_user_mr(struct ib_pd *pd, u64 start, u64 length, 233 u64 virt_addr, int access_flags, 234 struct ib_udata *udata) 235 { 236 struct hns_roce_dev *hr_dev = to_hr_dev(pd->device); 237 struct hns_roce_mr *mr; 238 int ret; 239 240 mr = kzalloc(sizeof(*mr), GFP_KERNEL); 241 if (!mr) { 242 ret = -ENOMEM; 243 goto err_out; 244 } 245 246 mr->iova = virt_addr; 247 mr->size = length; 248 mr->pd = to_hr_pd(pd)->pdn; 249 mr->access = access_flags; 250 mr->type = MR_TYPE_MR; 251 252 ret = alloc_mr_key(hr_dev, mr); 253 if (ret) 254 goto err_alloc_mr; 255 256 ret = alloc_mr_pbl(hr_dev, mr, udata, start); 257 if (ret) 258 goto err_alloc_key; 259 260 ret = hns_roce_mr_enable(hr_dev, mr); 261 if (ret) 262 goto err_alloc_pbl; 263 264 mr->ibmr.rkey = mr->ibmr.lkey = mr->key; 265 266 return &mr->ibmr; 267 268 err_alloc_pbl: 269 free_mr_pbl(hr_dev, mr); 270 err_alloc_key: 271 free_mr_key(hr_dev, mr); 272 err_alloc_mr: 273 kfree(mr); 274 err_out: 275 atomic64_inc(&hr_dev->dfx_cnt[HNS_ROCE_DFX_MR_REG_ERR_CNT]); 276 277 return ERR_PTR(ret); 278 } 279 280 struct ib_mr *hns_roce_rereg_user_mr(struct ib_mr *ibmr, int flags, u64 start, 281 u64 length, u64 virt_addr, 282 int mr_access_flags, struct ib_pd *pd, 283 struct ib_udata *udata) 284 { 285 struct hns_roce_dev *hr_dev = to_hr_dev(ibmr->device); 286 struct ib_device *ib_dev = &hr_dev->ib_dev; 287 struct hns_roce_mr *mr = to_hr_mr(ibmr); 288 struct hns_roce_cmd_mailbox *mailbox; 289 unsigned long mtpt_idx; 290 int ret; 291 292 if (!mr->enabled) { 293 ret = -EINVAL; 294 goto err_out; 295 } 296 297 mailbox = hns_roce_alloc_cmd_mailbox(hr_dev); 298 ret = PTR_ERR_OR_ZERO(mailbox); 299 if (ret) 300 goto err_out; 301 302 mtpt_idx = key_to_hw_index(mr->key) & (hr_dev->caps.num_mtpts - 1); 303 304 ret = hns_roce_cmd_mbox(hr_dev, 0, mailbox->dma, HNS_ROCE_CMD_QUERY_MPT, 305 mtpt_idx); 306 if (ret) 307 goto free_cmd_mbox; 308 309 ret = hns_roce_destroy_hw_ctx(hr_dev, HNS_ROCE_CMD_DESTROY_MPT, 310 mtpt_idx); 311 if (ret) 312 ibdev_warn(ib_dev, "failed to destroy MPT, ret = %d.\n", ret); 313 314 mr->enabled = 0; 315 mr->iova = virt_addr; 316 mr->size = length; 317 318 if (flags & IB_MR_REREG_PD) 319 mr->pd = to_hr_pd(pd)->pdn; 320 321 if (flags & IB_MR_REREG_ACCESS) 322 mr->access = mr_access_flags; 323 324 if (flags & IB_MR_REREG_TRANS) { 325 free_mr_pbl(hr_dev, mr); 326 ret = alloc_mr_pbl(hr_dev, mr, udata, start); 327 if (ret) { 328 ibdev_err(ib_dev, "failed to alloc mr PBL, ret = %d.\n", 329 ret); 330 goto free_cmd_mbox; 331 } 332 } 333 334 ret = hr_dev->hw->rereg_write_mtpt(hr_dev, mr, flags, mailbox->buf); 335 if (ret) { 336 ibdev_err(ib_dev, "failed to write mtpt, ret = %d.\n", ret); 337 goto free_cmd_mbox; 338 } 339 340 ret = hns_roce_create_hw_ctx(hr_dev, mailbox, HNS_ROCE_CMD_CREATE_MPT, 341 mtpt_idx); 342 if (ret) { 343 ibdev_err(ib_dev, "failed to create MPT, ret = %d.\n", ret); 344 goto free_cmd_mbox; 345 } 346 347 mr->enabled = 1; 348 349 free_cmd_mbox: 350 hns_roce_free_cmd_mailbox(hr_dev, mailbox); 351 352 err_out: 353 if (ret) { 354 atomic64_inc(&hr_dev->dfx_cnt[HNS_ROCE_DFX_MR_REREG_ERR_CNT]); 355 return ERR_PTR(ret); 356 } 357 358 return NULL; 359 } 360 361 int hns_roce_dereg_mr(struct ib_mr *ibmr, struct ib_udata *udata) 362 { 363 struct hns_roce_dev *hr_dev = to_hr_dev(ibmr->device); 364 struct hns_roce_mr *mr = to_hr_mr(ibmr); 365 366 if (hr_dev->hw->dereg_mr) 367 hr_dev->hw->dereg_mr(hr_dev); 368 369 hns_roce_mr_free(hr_dev, mr); 370 kfree(mr); 371 372 return 0; 373 } 374 375 struct ib_mr *hns_roce_alloc_mr(struct ib_pd *pd, enum ib_mr_type mr_type, 376 u32 max_num_sg) 377 { 378 struct hns_roce_dev *hr_dev = to_hr_dev(pd->device); 379 struct device *dev = hr_dev->dev; 380 struct hns_roce_mr *mr; 381 int ret; 382 383 if (mr_type != IB_MR_TYPE_MEM_REG) 384 return ERR_PTR(-EINVAL); 385 386 if (max_num_sg > HNS_ROCE_FRMR_MAX_PA) { 387 dev_err(dev, "max_num_sg larger than %d\n", 388 HNS_ROCE_FRMR_MAX_PA); 389 return ERR_PTR(-EINVAL); 390 } 391 392 mr = kzalloc(sizeof(*mr), GFP_KERNEL); 393 if (!mr) 394 return ERR_PTR(-ENOMEM); 395 396 mr->type = MR_TYPE_FRMR; 397 mr->pd = to_hr_pd(pd)->pdn; 398 mr->size = max_num_sg * (1 << PAGE_SHIFT); 399 400 /* Allocate memory region key */ 401 ret = alloc_mr_key(hr_dev, mr); 402 if (ret) 403 goto err_free; 404 405 ret = alloc_mr_pbl(hr_dev, mr, NULL, 0); 406 if (ret) 407 goto err_key; 408 409 ret = hns_roce_mr_enable(hr_dev, mr); 410 if (ret) 411 goto err_pbl; 412 413 mr->ibmr.rkey = mr->ibmr.lkey = mr->key; 414 mr->ibmr.length = mr->size; 415 416 return &mr->ibmr; 417 418 err_pbl: 419 free_mr_pbl(hr_dev, mr); 420 err_key: 421 free_mr_key(hr_dev, mr); 422 err_free: 423 kfree(mr); 424 return ERR_PTR(ret); 425 } 426 427 static int hns_roce_set_page(struct ib_mr *ibmr, u64 addr) 428 { 429 struct hns_roce_mr *mr = to_hr_mr(ibmr); 430 431 if (likely(mr->npages < mr->pbl_mtr.hem_cfg.buf_pg_count)) { 432 mr->page_list[mr->npages++] = addr; 433 return 0; 434 } 435 436 return -ENOBUFS; 437 } 438 439 int hns_roce_map_mr_sg(struct ib_mr *ibmr, struct scatterlist *sg, int sg_nents, 440 unsigned int *sg_offset_p) 441 { 442 unsigned int sg_offset = sg_offset_p ? *sg_offset_p : 0; 443 struct hns_roce_dev *hr_dev = to_hr_dev(ibmr->device); 444 struct ib_device *ibdev = &hr_dev->ib_dev; 445 struct hns_roce_mr *mr = to_hr_mr(ibmr); 446 struct hns_roce_mtr *mtr = &mr->pbl_mtr; 447 int ret, sg_num = 0; 448 449 if (!IS_ALIGNED(sg_offset, HNS_ROCE_FRMR_ALIGN_SIZE) || 450 ibmr->page_size < HNS_HW_PAGE_SIZE || 451 ibmr->page_size > HNS_HW_MAX_PAGE_SIZE) 452 return sg_num; 453 454 mr->npages = 0; 455 mr->page_list = kvcalloc(mr->pbl_mtr.hem_cfg.buf_pg_count, 456 sizeof(dma_addr_t), GFP_KERNEL); 457 if (!mr->page_list) 458 return sg_num; 459 460 sg_num = ib_sg_to_pages(ibmr, sg, sg_nents, sg_offset_p, hns_roce_set_page); 461 if (sg_num < 1) { 462 ibdev_err(ibdev, "failed to store sg pages %u %u, cnt = %d.\n", 463 mr->npages, mr->pbl_mtr.hem_cfg.buf_pg_count, sg_num); 464 goto err_page_list; 465 } 466 467 mtr->hem_cfg.region[0].offset = 0; 468 mtr->hem_cfg.region[0].count = mr->npages; 469 mtr->hem_cfg.region[0].hopnum = mr->pbl_hop_num; 470 mtr->hem_cfg.region_count = 1; 471 ret = hns_roce_mtr_map(hr_dev, mtr, mr->page_list, mr->npages); 472 if (ret) { 473 ibdev_err(ibdev, "failed to map sg mtr, ret = %d.\n", ret); 474 sg_num = 0; 475 } else { 476 mr->pbl_mtr.hem_cfg.buf_pg_shift = (u32)ilog2(ibmr->page_size); 477 } 478 479 err_page_list: 480 kvfree(mr->page_list); 481 mr->page_list = NULL; 482 483 return sg_num; 484 } 485 486 static int mtr_map_region(struct hns_roce_dev *hr_dev, struct hns_roce_mtr *mtr, 487 struct hns_roce_buf_region *region, dma_addr_t *pages, 488 int max_count) 489 { 490 int count, npage; 491 int offset, end; 492 __le64 *mtts; 493 u64 addr; 494 int i; 495 496 offset = region->offset; 497 end = offset + region->count; 498 npage = 0; 499 while (offset < end && npage < max_count) { 500 count = 0; 501 mtts = hns_roce_hem_list_find_mtt(hr_dev, &mtr->hem_list, 502 offset, &count); 503 if (!mtts) 504 return -ENOBUFS; 505 506 for (i = 0; i < count && npage < max_count; i++) { 507 addr = pages[npage]; 508 509 mtts[i] = cpu_to_le64(addr); 510 npage++; 511 } 512 offset += count; 513 } 514 515 return npage; 516 } 517 518 static inline bool mtr_has_mtt(struct hns_roce_buf_attr *attr) 519 { 520 int i; 521 522 for (i = 0; i < attr->region_count; i++) 523 if (attr->region[i].hopnum != HNS_ROCE_HOP_NUM_0 && 524 attr->region[i].hopnum > 0) 525 return true; 526 527 /* because the mtr only one root base address, when hopnum is 0 means 528 * root base address equals the first buffer address, thus all alloced 529 * memory must in a continuous space accessed by direct mode. 530 */ 531 return false; 532 } 533 534 static inline size_t mtr_bufs_size(struct hns_roce_buf_attr *attr) 535 { 536 size_t size = 0; 537 int i; 538 539 for (i = 0; i < attr->region_count; i++) 540 size += attr->region[i].size; 541 542 return size; 543 } 544 545 /* 546 * check the given pages in continuous address space 547 * Returns 0 on success, or the error page num. 548 */ 549 static inline int mtr_check_direct_pages(dma_addr_t *pages, int page_count, 550 unsigned int page_shift) 551 { 552 size_t page_size = 1 << page_shift; 553 int i; 554 555 for (i = 1; i < page_count; i++) 556 if (pages[i] - pages[i - 1] != page_size) 557 return i; 558 559 return 0; 560 } 561 562 static void mtr_free_bufs(struct hns_roce_dev *hr_dev, struct hns_roce_mtr *mtr) 563 { 564 /* release user buffers */ 565 if (mtr->umem) { 566 ib_umem_release(mtr->umem); 567 mtr->umem = NULL; 568 } 569 570 /* release kernel buffers */ 571 if (mtr->kmem) { 572 hns_roce_buf_free(hr_dev, mtr->kmem); 573 mtr->kmem = NULL; 574 } 575 } 576 577 static int mtr_alloc_bufs(struct hns_roce_dev *hr_dev, struct hns_roce_mtr *mtr, 578 struct hns_roce_buf_attr *buf_attr, 579 struct ib_udata *udata, unsigned long user_addr) 580 { 581 struct ib_device *ibdev = &hr_dev->ib_dev; 582 size_t total_size; 583 584 total_size = mtr_bufs_size(buf_attr); 585 586 if (udata) { 587 mtr->kmem = NULL; 588 mtr->umem = ib_umem_get(ibdev, user_addr, total_size, 589 buf_attr->user_access); 590 if (IS_ERR(mtr->umem)) { 591 ibdev_err(ibdev, "failed to get umem, ret = %ld.\n", 592 PTR_ERR(mtr->umem)); 593 return -ENOMEM; 594 } 595 } else { 596 mtr->umem = NULL; 597 mtr->kmem = hns_roce_buf_alloc(hr_dev, total_size, 598 buf_attr->page_shift, 599 !mtr_has_mtt(buf_attr) ? 600 HNS_ROCE_BUF_DIRECT : 0); 601 if (IS_ERR(mtr->kmem)) { 602 ibdev_err(ibdev, "failed to alloc kmem, ret = %ld.\n", 603 PTR_ERR(mtr->kmem)); 604 return PTR_ERR(mtr->kmem); 605 } 606 } 607 608 return 0; 609 } 610 611 static int cal_mtr_pg_cnt(struct hns_roce_mtr *mtr) 612 { 613 struct hns_roce_buf_region *region; 614 int page_cnt = 0; 615 int i; 616 617 for (i = 0; i < mtr->hem_cfg.region_count; i++) { 618 region = &mtr->hem_cfg.region[i]; 619 page_cnt += region->count; 620 } 621 622 return page_cnt; 623 } 624 625 static bool need_split_huge_page(struct hns_roce_mtr *mtr) 626 { 627 /* When HEM buffer uses 0-level addressing, the page size is 628 * equal to the whole buffer size. If the current MTR has multiple 629 * regions, we split the buffer into small pages(4k, required by hns 630 * ROCEE). These pages will be used in multiple regions. 631 */ 632 return mtr->hem_cfg.is_direct && mtr->hem_cfg.region_count > 1; 633 } 634 635 static int mtr_map_bufs(struct hns_roce_dev *hr_dev, struct hns_roce_mtr *mtr) 636 { 637 struct ib_device *ibdev = &hr_dev->ib_dev; 638 int page_count = cal_mtr_pg_cnt(mtr); 639 unsigned int page_shift; 640 dma_addr_t *pages; 641 int npage; 642 int ret; 643 644 page_shift = need_split_huge_page(mtr) ? HNS_HW_PAGE_SHIFT : 645 mtr->hem_cfg.buf_pg_shift; 646 /* alloc a tmp array to store buffer's dma address */ 647 pages = kvcalloc(page_count, sizeof(dma_addr_t), GFP_KERNEL); 648 if (!pages) 649 return -ENOMEM; 650 651 if (mtr->umem) 652 npage = hns_roce_get_umem_bufs(pages, page_count, 653 mtr->umem, page_shift); 654 else 655 npage = hns_roce_get_kmem_bufs(hr_dev, pages, page_count, 656 mtr->kmem, page_shift); 657 658 if (npage != page_count) { 659 ibdev_err(ibdev, "failed to get mtr page %d != %d.\n", npage, 660 page_count); 661 ret = -ENOBUFS; 662 goto err_alloc_list; 663 } 664 665 if (need_split_huge_page(mtr) && npage > 1) { 666 ret = mtr_check_direct_pages(pages, npage, page_shift); 667 if (ret) { 668 ibdev_err(ibdev, "failed to check %s page: %d / %d.\n", 669 mtr->umem ? "umtr" : "kmtr", ret, npage); 670 ret = -ENOBUFS; 671 goto err_alloc_list; 672 } 673 } 674 675 ret = hns_roce_mtr_map(hr_dev, mtr, pages, page_count); 676 if (ret) 677 ibdev_err(ibdev, "failed to map mtr pages, ret = %d.\n", ret); 678 679 err_alloc_list: 680 kvfree(pages); 681 682 return ret; 683 } 684 685 int hns_roce_mtr_map(struct hns_roce_dev *hr_dev, struct hns_roce_mtr *mtr, 686 dma_addr_t *pages, unsigned int page_cnt) 687 { 688 struct ib_device *ibdev = &hr_dev->ib_dev; 689 struct hns_roce_buf_region *r; 690 unsigned int i, mapped_cnt; 691 int ret = 0; 692 693 /* 694 * Only use the first page address as root ba when hopnum is 0, this 695 * is because the addresses of all pages are consecutive in this case. 696 */ 697 if (mtr->hem_cfg.is_direct) { 698 mtr->hem_cfg.root_ba = pages[0]; 699 return 0; 700 } 701 702 for (i = 0, mapped_cnt = 0; i < mtr->hem_cfg.region_count && 703 mapped_cnt < page_cnt; i++) { 704 r = &mtr->hem_cfg.region[i]; 705 706 if (r->offset + r->count > page_cnt) { 707 ret = -EINVAL; 708 ibdev_err(ibdev, 709 "failed to check mtr%u count %u + %u > %u.\n", 710 i, r->offset, r->count, page_cnt); 711 return ret; 712 } 713 714 ret = mtr_map_region(hr_dev, mtr, r, &pages[r->offset], 715 page_cnt - mapped_cnt); 716 if (ret < 0) { 717 ibdev_err(ibdev, 718 "failed to map mtr%u offset %u, ret = %d.\n", 719 i, r->offset, ret); 720 return ret; 721 } 722 mapped_cnt += ret; 723 ret = 0; 724 } 725 726 if (mapped_cnt < page_cnt) { 727 ret = -ENOBUFS; 728 ibdev_err(ibdev, "failed to map mtr pages count: %u < %u.\n", 729 mapped_cnt, page_cnt); 730 } 731 732 return ret; 733 } 734 735 static int hns_roce_get_direct_addr_mtt(struct hns_roce_hem_cfg *cfg, 736 u32 start_index, u64 *mtt_buf, 737 int mtt_cnt) 738 { 739 int mtt_count; 740 int total = 0; 741 u32 npage; 742 u64 addr; 743 744 if (mtt_cnt > cfg->region_count) 745 return -EINVAL; 746 747 for (mtt_count = 0; mtt_count < cfg->region_count && total < mtt_cnt; 748 mtt_count++) { 749 npage = cfg->region[mtt_count].offset; 750 if (npage < start_index) 751 continue; 752 753 addr = cfg->root_ba + (npage << HNS_HW_PAGE_SHIFT); 754 mtt_buf[total] = addr; 755 756 total++; 757 } 758 759 if (!total) 760 return -ENOENT; 761 762 return 0; 763 } 764 765 static int hns_roce_get_mhop_mtt(struct hns_roce_dev *hr_dev, 766 struct hns_roce_mtr *mtr, u32 start_index, 767 u64 *mtt_buf, int mtt_cnt) 768 { 769 int left = mtt_cnt; 770 int total = 0; 771 int mtt_count; 772 __le64 *mtts; 773 u32 npage; 774 775 while (left > 0) { 776 mtt_count = 0; 777 mtts = hns_roce_hem_list_find_mtt(hr_dev, &mtr->hem_list, 778 start_index + total, 779 &mtt_count); 780 if (!mtts || !mtt_count) 781 break; 782 783 npage = min(mtt_count, left); 784 left -= npage; 785 for (mtt_count = 0; mtt_count < npage; mtt_count++) 786 mtt_buf[total++] = le64_to_cpu(mtts[mtt_count]); 787 } 788 789 if (!total) 790 return -ENOENT; 791 792 return 0; 793 } 794 795 int hns_roce_mtr_find(struct hns_roce_dev *hr_dev, struct hns_roce_mtr *mtr, 796 u32 offset, u64 *mtt_buf, int mtt_max) 797 { 798 struct hns_roce_hem_cfg *cfg = &mtr->hem_cfg; 799 u32 start_index; 800 int ret; 801 802 if (!mtt_buf || mtt_max < 1) 803 return -EINVAL; 804 805 /* no mtt memory in direct mode, so just return the buffer address */ 806 if (cfg->is_direct) { 807 start_index = offset >> HNS_HW_PAGE_SHIFT; 808 ret = hns_roce_get_direct_addr_mtt(cfg, start_index, 809 mtt_buf, mtt_max); 810 } else { 811 start_index = offset >> cfg->buf_pg_shift; 812 ret = hns_roce_get_mhop_mtt(hr_dev, mtr, start_index, 813 mtt_buf, mtt_max); 814 } 815 return ret; 816 } 817 818 static int get_best_page_shift(struct hns_roce_dev *hr_dev, 819 struct hns_roce_mtr *mtr, 820 struct hns_roce_buf_attr *buf_attr) 821 { 822 unsigned int page_sz; 823 824 if (!buf_attr->adaptive || buf_attr->type != MTR_PBL || !mtr->umem) 825 return 0; 826 827 page_sz = ib_umem_find_best_pgsz(mtr->umem, 828 hr_dev->caps.page_size_cap, 829 buf_attr->iova); 830 if (!page_sz) 831 return -EINVAL; 832 833 buf_attr->page_shift = order_base_2(page_sz); 834 return 0; 835 } 836 837 static int get_best_hop_num(struct hns_roce_dev *hr_dev, 838 struct hns_roce_mtr *mtr, 839 struct hns_roce_buf_attr *buf_attr, 840 unsigned int ba_pg_shift) 841 { 842 #define INVALID_HOPNUM -1 843 #define MIN_BA_CNT 1 844 size_t buf_pg_sz = 1 << buf_attr->page_shift; 845 struct ib_device *ibdev = &hr_dev->ib_dev; 846 size_t ba_pg_sz = 1 << ba_pg_shift; 847 int hop_num = INVALID_HOPNUM; 848 size_t unit = MIN_BA_CNT; 849 size_t ba_cnt; 850 int j; 851 852 if (!buf_attr->adaptive || buf_attr->type != MTR_PBL) 853 return 0; 854 855 /* Caculating the number of buf pages, each buf page need a BA */ 856 if (mtr->umem) 857 ba_cnt = ib_umem_num_dma_blocks(mtr->umem, buf_pg_sz); 858 else 859 ba_cnt = DIV_ROUND_UP(buf_attr->region[0].size, buf_pg_sz); 860 861 for (j = 0; j <= HNS_ROCE_MAX_HOP_NUM; j++) { 862 if (ba_cnt <= unit) { 863 hop_num = j; 864 break; 865 } 866 /* Number of BAs can be represented at per hop */ 867 unit *= ba_pg_sz / BA_BYTE_LEN; 868 } 869 870 if (hop_num < 0) { 871 ibdev_err(ibdev, 872 "failed to calculate a valid hopnum.\n"); 873 return -EINVAL; 874 } 875 876 buf_attr->region[0].hopnum = hop_num; 877 878 return 0; 879 } 880 881 static bool is_buf_attr_valid(struct hns_roce_dev *hr_dev, 882 struct hns_roce_buf_attr *attr) 883 { 884 struct ib_device *ibdev = &hr_dev->ib_dev; 885 886 if (attr->region_count > ARRAY_SIZE(attr->region) || 887 attr->region_count < 1 || attr->page_shift < HNS_HW_PAGE_SHIFT) { 888 ibdev_err(ibdev, 889 "invalid buf attr, region count %u, page shift %u.\n", 890 attr->region_count, attr->page_shift); 891 return false; 892 } 893 894 return true; 895 } 896 897 static int mtr_init_buf_cfg(struct hns_roce_dev *hr_dev, 898 struct hns_roce_mtr *mtr, 899 struct hns_roce_buf_attr *attr) 900 { 901 struct hns_roce_hem_cfg *cfg = &mtr->hem_cfg; 902 struct hns_roce_buf_region *r; 903 size_t buf_pg_sz; 904 size_t buf_size; 905 int page_cnt, i; 906 u64 pgoff = 0; 907 908 if (!is_buf_attr_valid(hr_dev, attr)) 909 return -EINVAL; 910 911 /* If mtt is disabled, all pages must be within a continuous range */ 912 cfg->is_direct = !mtr_has_mtt(attr); 913 cfg->region_count = attr->region_count; 914 buf_size = mtr_bufs_size(attr); 915 if (need_split_huge_page(mtr)) { 916 buf_pg_sz = HNS_HW_PAGE_SIZE; 917 cfg->buf_pg_count = 1; 918 /* The ROCEE requires the page size to be 4K * 2 ^ N. */ 919 cfg->buf_pg_shift = HNS_HW_PAGE_SHIFT + 920 order_base_2(DIV_ROUND_UP(buf_size, HNS_HW_PAGE_SIZE)); 921 } else { 922 buf_pg_sz = 1 << attr->page_shift; 923 cfg->buf_pg_count = mtr->umem ? 924 ib_umem_num_dma_blocks(mtr->umem, buf_pg_sz) : 925 DIV_ROUND_UP(buf_size, buf_pg_sz); 926 cfg->buf_pg_shift = attr->page_shift; 927 pgoff = mtr->umem ? mtr->umem->address & ~PAGE_MASK : 0; 928 } 929 930 /* Convert buffer size to page index and page count for each region and 931 * the buffer's offset needs to be appended to the first region. 932 */ 933 for (page_cnt = 0, i = 0; i < attr->region_count; i++) { 934 r = &cfg->region[i]; 935 r->offset = page_cnt; 936 buf_size = hr_hw_page_align(attr->region[i].size + pgoff); 937 if (attr->type == MTR_PBL && mtr->umem) 938 r->count = ib_umem_num_dma_blocks(mtr->umem, buf_pg_sz); 939 else 940 r->count = DIV_ROUND_UP(buf_size, buf_pg_sz); 941 942 pgoff = 0; 943 page_cnt += r->count; 944 r->hopnum = to_hr_hem_hopnum(attr->region[i].hopnum, r->count); 945 } 946 947 return 0; 948 } 949 950 static u64 cal_pages_per_l1ba(unsigned int ba_per_bt, unsigned int hopnum) 951 { 952 return int_pow(ba_per_bt, hopnum - 1); 953 } 954 955 static unsigned int cal_best_bt_pg_sz(struct hns_roce_dev *hr_dev, 956 struct hns_roce_mtr *mtr, 957 unsigned int pg_shift) 958 { 959 unsigned long cap = hr_dev->caps.page_size_cap; 960 struct hns_roce_buf_region *re; 961 unsigned int pgs_per_l1ba; 962 unsigned int ba_per_bt; 963 unsigned int ba_num; 964 int i; 965 966 for_each_set_bit_from(pg_shift, &cap, sizeof(cap) * BITS_PER_BYTE) { 967 if (!(BIT(pg_shift) & cap)) 968 continue; 969 970 ba_per_bt = BIT(pg_shift) / BA_BYTE_LEN; 971 ba_num = 0; 972 for (i = 0; i < mtr->hem_cfg.region_count; i++) { 973 re = &mtr->hem_cfg.region[i]; 974 if (re->hopnum == 0) 975 continue; 976 977 pgs_per_l1ba = cal_pages_per_l1ba(ba_per_bt, re->hopnum); 978 ba_num += DIV_ROUND_UP(re->count, pgs_per_l1ba); 979 } 980 981 if (ba_num <= ba_per_bt) 982 return pg_shift; 983 } 984 985 return 0; 986 } 987 988 static int mtr_alloc_mtt(struct hns_roce_dev *hr_dev, struct hns_roce_mtr *mtr, 989 unsigned int ba_page_shift) 990 { 991 struct hns_roce_hem_cfg *cfg = &mtr->hem_cfg; 992 int ret; 993 994 hns_roce_hem_list_init(&mtr->hem_list); 995 if (!cfg->is_direct) { 996 ba_page_shift = cal_best_bt_pg_sz(hr_dev, mtr, ba_page_shift); 997 if (!ba_page_shift) 998 return -ERANGE; 999 1000 ret = hns_roce_hem_list_request(hr_dev, &mtr->hem_list, 1001 cfg->region, cfg->region_count, 1002 ba_page_shift); 1003 if (ret) 1004 return ret; 1005 cfg->root_ba = mtr->hem_list.root_ba; 1006 cfg->ba_pg_shift = ba_page_shift; 1007 } else { 1008 cfg->ba_pg_shift = cfg->buf_pg_shift; 1009 } 1010 1011 return 0; 1012 } 1013 1014 static void mtr_free_mtt(struct hns_roce_dev *hr_dev, struct hns_roce_mtr *mtr) 1015 { 1016 hns_roce_hem_list_release(hr_dev, &mtr->hem_list); 1017 } 1018 1019 /** 1020 * hns_roce_mtr_create - Create hns memory translate region. 1021 * 1022 * @hr_dev: RoCE device struct pointer 1023 * @mtr: memory translate region 1024 * @buf_attr: buffer attribute for creating mtr 1025 * @ba_page_shift: page shift for multi-hop base address table 1026 * @udata: user space context, if it's NULL, means kernel space 1027 * @user_addr: userspace virtual address to start at 1028 */ 1029 int hns_roce_mtr_create(struct hns_roce_dev *hr_dev, struct hns_roce_mtr *mtr, 1030 struct hns_roce_buf_attr *buf_attr, 1031 unsigned int ba_page_shift, struct ib_udata *udata, 1032 unsigned long user_addr) 1033 { 1034 struct ib_device *ibdev = &hr_dev->ib_dev; 1035 int ret; 1036 1037 trace_hns_buf_attr(buf_attr); 1038 /* The caller has its own buffer list and invokes the hns_roce_mtr_map() 1039 * to finish the MTT configuration. 1040 */ 1041 if (buf_attr->mtt_only) { 1042 mtr->umem = NULL; 1043 mtr->kmem = NULL; 1044 } else { 1045 ret = mtr_alloc_bufs(hr_dev, mtr, buf_attr, udata, user_addr); 1046 if (ret) { 1047 ibdev_err(ibdev, 1048 "failed to alloc mtr bufs, ret = %d.\n", ret); 1049 return ret; 1050 } 1051 1052 ret = get_best_page_shift(hr_dev, mtr, buf_attr); 1053 if (ret) 1054 goto err_init_buf; 1055 1056 ret = get_best_hop_num(hr_dev, mtr, buf_attr, ba_page_shift); 1057 if (ret) 1058 goto err_init_buf; 1059 } 1060 1061 ret = mtr_init_buf_cfg(hr_dev, mtr, buf_attr); 1062 if (ret) 1063 goto err_init_buf; 1064 1065 ret = mtr_alloc_mtt(hr_dev, mtr, ba_page_shift); 1066 if (ret) { 1067 ibdev_err(ibdev, "failed to alloc mtr mtt, ret = %d.\n", ret); 1068 goto err_init_buf; 1069 } 1070 1071 if (buf_attr->mtt_only) 1072 return 0; 1073 1074 /* Write buffer's dma address to MTT */ 1075 ret = mtr_map_bufs(hr_dev, mtr); 1076 if (ret) { 1077 ibdev_err(ibdev, "failed to map mtr bufs, ret = %d.\n", ret); 1078 goto err_alloc_mtt; 1079 } 1080 1081 return 0; 1082 1083 err_alloc_mtt: 1084 mtr_free_mtt(hr_dev, mtr); 1085 err_init_buf: 1086 mtr_free_bufs(hr_dev, mtr); 1087 1088 return ret; 1089 } 1090 1091 void hns_roce_mtr_destroy(struct hns_roce_dev *hr_dev, struct hns_roce_mtr *mtr) 1092 { 1093 /* release multi-hop addressing resource */ 1094 hns_roce_hem_list_release(hr_dev, &mtr->hem_list); 1095 1096 /* free buffers */ 1097 mtr_free_bufs(hr_dev, mtr); 1098 } 1099