1 /* 2 * Copyright (c) 2016 Hisilicon Limited. 3 * Copyright (c) 2007, 2008 Mellanox Technologies. All rights reserved. 4 * 5 * This software is available to you under a choice of one of two 6 * licenses. You may choose to be licensed under the terms of the GNU 7 * General Public License (GPL) Version 2, available from the file 8 * COPYING in the main directory of this source tree, or the 9 * OpenIB.org BSD license below: 10 * 11 * Redistribution and use in source and binary forms, with or 12 * without modification, are permitted provided that the following 13 * conditions are met: 14 * 15 * - Redistributions of source code must retain the above 16 * copyright notice, this list of conditions and the following 17 * disclaimer. 18 * 19 * - Redistributions in binary form must reproduce the above 20 * copyright notice, this list of conditions and the following 21 * disclaimer in the documentation and/or other materials 22 * provided with the distribution. 23 * 24 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, 25 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF 26 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND 27 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS 28 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN 29 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN 30 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE 31 * SOFTWARE. 32 */ 33 34 #include <linux/vmalloc.h> 35 #include <linux/count_zeros.h> 36 #include <rdma/ib_umem.h> 37 #include <linux/math.h> 38 #include "hns_roce_device.h" 39 #include "hns_roce_cmd.h" 40 #include "hns_roce_hem.h" 41 #include "hns_roce_trace.h" 42 43 static u32 hw_index_to_key(int ind) 44 { 45 return ((u32)ind >> 24) | ((u32)ind << 8); 46 } 47 48 unsigned long key_to_hw_index(u32 key) 49 { 50 return (key << 24) | (key >> 8); 51 } 52 53 static int alloc_mr_key(struct hns_roce_dev *hr_dev, struct hns_roce_mr *mr) 54 { 55 struct hns_roce_ida *mtpt_ida = &hr_dev->mr_table.mtpt_ida; 56 struct ib_device *ibdev = &hr_dev->ib_dev; 57 int err; 58 int id; 59 60 /* Allocate a key for mr from mr_table */ 61 id = ida_alloc_range(&mtpt_ida->ida, mtpt_ida->min, mtpt_ida->max, 62 GFP_KERNEL); 63 if (id < 0) { 64 ibdev_err(ibdev, "failed to alloc id for MR key, id(%d)\n", id); 65 return -ENOMEM; 66 } 67 68 mr->key = hw_index_to_key(id); /* MR key */ 69 70 err = hns_roce_table_get(hr_dev, &hr_dev->mr_table.mtpt_table, 71 (unsigned long)id); 72 if (err) { 73 ibdev_err(ibdev, "failed to alloc mtpt, ret = %d.\n", err); 74 goto err_free_bitmap; 75 } 76 77 return 0; 78 err_free_bitmap: 79 ida_free(&mtpt_ida->ida, id); 80 return err; 81 } 82 83 static void free_mr_key(struct hns_roce_dev *hr_dev, struct hns_roce_mr *mr) 84 { 85 unsigned long obj = key_to_hw_index(mr->key); 86 87 hns_roce_table_put(hr_dev, &hr_dev->mr_table.mtpt_table, obj); 88 ida_free(&hr_dev->mr_table.mtpt_ida.ida, (int)obj); 89 } 90 91 static int alloc_mr_pbl(struct hns_roce_dev *hr_dev, struct hns_roce_mr *mr, 92 struct ib_udata *udata, u64 start) 93 { 94 struct ib_device *ibdev = &hr_dev->ib_dev; 95 bool is_fast = mr->type == MR_TYPE_FRMR; 96 struct hns_roce_buf_attr buf_attr = {}; 97 int err; 98 99 mr->pbl_hop_num = is_fast ? 1 : hr_dev->caps.pbl_hop_num; 100 buf_attr.page_shift = is_fast ? PAGE_SHIFT : 101 hr_dev->caps.pbl_buf_pg_sz + PAGE_SHIFT; 102 buf_attr.region[0].size = mr->size; 103 buf_attr.region[0].hopnum = mr->pbl_hop_num; 104 buf_attr.region_count = 1; 105 buf_attr.user_access = mr->access; 106 /* fast MR's buffer is alloced before mapping, not at creation */ 107 buf_attr.mtt_only = is_fast; 108 buf_attr.iova = mr->iova; 109 /* pagesize and hopnum is fixed for fast MR */ 110 buf_attr.adaptive = !is_fast; 111 buf_attr.type = MTR_PBL; 112 113 err = hns_roce_mtr_create(hr_dev, &mr->pbl_mtr, &buf_attr, 114 hr_dev->caps.pbl_ba_pg_sz + PAGE_SHIFT, 115 udata, start); 116 if (err) { 117 ibdev_err(ibdev, "failed to alloc pbl mtr, ret = %d.\n", err); 118 return err; 119 } 120 121 mr->npages = mr->pbl_mtr.hem_cfg.buf_pg_count; 122 mr->pbl_hop_num = buf_attr.region[0].hopnum; 123 124 return err; 125 } 126 127 static void free_mr_pbl(struct hns_roce_dev *hr_dev, struct hns_roce_mr *mr) 128 { 129 hns_roce_mtr_destroy(hr_dev, &mr->pbl_mtr); 130 } 131 132 static void hns_roce_mr_free(struct hns_roce_dev *hr_dev, struct hns_roce_mr *mr) 133 { 134 struct ib_device *ibdev = &hr_dev->ib_dev; 135 int ret; 136 137 if (mr->enabled) { 138 ret = hns_roce_destroy_hw_ctx(hr_dev, HNS_ROCE_CMD_DESTROY_MPT, 139 key_to_hw_index(mr->key) & 140 (hr_dev->caps.num_mtpts - 1)); 141 if (ret) 142 ibdev_warn_ratelimited(ibdev, "failed to destroy mpt, ret = %d.\n", 143 ret); 144 } 145 146 free_mr_pbl(hr_dev, mr); 147 free_mr_key(hr_dev, mr); 148 } 149 150 static int hns_roce_mr_enable(struct hns_roce_dev *hr_dev, 151 struct hns_roce_mr *mr) 152 { 153 unsigned long mtpt_idx = key_to_hw_index(mr->key); 154 struct hns_roce_cmd_mailbox *mailbox; 155 struct device *dev = hr_dev->dev; 156 int ret; 157 158 /* Allocate mailbox memory */ 159 mailbox = hns_roce_alloc_cmd_mailbox(hr_dev); 160 if (IS_ERR(mailbox)) 161 return PTR_ERR(mailbox); 162 163 trace_hns_mr(mr); 164 if (mr->type != MR_TYPE_FRMR) 165 ret = hr_dev->hw->write_mtpt(hr_dev, mailbox->buf, mr); 166 else 167 ret = hr_dev->hw->frmr_write_mtpt(mailbox->buf, mr); 168 if (ret) { 169 dev_err(dev, "failed to write mtpt, ret = %d.\n", ret); 170 goto err_page; 171 } 172 173 ret = hns_roce_create_hw_ctx(hr_dev, mailbox, HNS_ROCE_CMD_CREATE_MPT, 174 mtpt_idx & (hr_dev->caps.num_mtpts - 1)); 175 if (ret) { 176 dev_err(dev, "failed to create mpt, ret = %d.\n", ret); 177 goto err_page; 178 } 179 180 mr->enabled = 1; 181 182 err_page: 183 hns_roce_free_cmd_mailbox(hr_dev, mailbox); 184 185 return ret; 186 } 187 188 void hns_roce_init_mr_table(struct hns_roce_dev *hr_dev) 189 { 190 struct hns_roce_ida *mtpt_ida = &hr_dev->mr_table.mtpt_ida; 191 192 ida_init(&mtpt_ida->ida); 193 mtpt_ida->max = hr_dev->caps.num_mtpts - 1; 194 mtpt_ida->min = hr_dev->caps.reserved_mrws; 195 } 196 197 struct ib_mr *hns_roce_get_dma_mr(struct ib_pd *pd, int acc) 198 { 199 struct hns_roce_dev *hr_dev = to_hr_dev(pd->device); 200 struct hns_roce_mr *mr; 201 int ret; 202 203 mr = kzalloc(sizeof(*mr), GFP_KERNEL); 204 if (!mr) 205 return ERR_PTR(-ENOMEM); 206 207 mr->type = MR_TYPE_DMA; 208 mr->pd = to_hr_pd(pd)->pdn; 209 mr->access = acc; 210 211 /* Allocate memory region key */ 212 hns_roce_hem_list_init(&mr->pbl_mtr.hem_list); 213 ret = alloc_mr_key(hr_dev, mr); 214 if (ret) 215 goto err_free; 216 217 ret = hns_roce_mr_enable(hr_dev, mr); 218 if (ret) 219 goto err_mr; 220 221 mr->ibmr.rkey = mr->ibmr.lkey = mr->key; 222 223 return &mr->ibmr; 224 err_mr: 225 free_mr_key(hr_dev, mr); 226 227 err_free: 228 kfree(mr); 229 return ERR_PTR(ret); 230 } 231 232 struct ib_mr *hns_roce_reg_user_mr(struct ib_pd *pd, u64 start, u64 length, 233 u64 virt_addr, int access_flags, 234 struct ib_dmah *dmah, 235 struct ib_udata *udata) 236 { 237 struct hns_roce_dev *hr_dev = to_hr_dev(pd->device); 238 struct hns_roce_mr *mr; 239 int ret; 240 241 if (dmah) { 242 ret = -EOPNOTSUPP; 243 goto err_out; 244 } 245 246 mr = kzalloc(sizeof(*mr), GFP_KERNEL); 247 if (!mr) { 248 ret = -ENOMEM; 249 goto err_out; 250 } 251 252 mr->iova = virt_addr; 253 mr->size = length; 254 mr->pd = to_hr_pd(pd)->pdn; 255 mr->access = access_flags; 256 mr->type = MR_TYPE_MR; 257 258 ret = alloc_mr_key(hr_dev, mr); 259 if (ret) 260 goto err_alloc_mr; 261 262 ret = alloc_mr_pbl(hr_dev, mr, udata, start); 263 if (ret) 264 goto err_alloc_key; 265 266 ret = hns_roce_mr_enable(hr_dev, mr); 267 if (ret) 268 goto err_alloc_pbl; 269 270 mr->ibmr.rkey = mr->ibmr.lkey = mr->key; 271 272 return &mr->ibmr; 273 274 err_alloc_pbl: 275 free_mr_pbl(hr_dev, mr); 276 err_alloc_key: 277 free_mr_key(hr_dev, mr); 278 err_alloc_mr: 279 kfree(mr); 280 err_out: 281 atomic64_inc(&hr_dev->dfx_cnt[HNS_ROCE_DFX_MR_REG_ERR_CNT]); 282 283 return ERR_PTR(ret); 284 } 285 286 struct ib_mr *hns_roce_rereg_user_mr(struct ib_mr *ibmr, int flags, u64 start, 287 u64 length, u64 virt_addr, 288 int mr_access_flags, struct ib_pd *pd, 289 struct ib_udata *udata) 290 { 291 struct hns_roce_dev *hr_dev = to_hr_dev(ibmr->device); 292 struct ib_device *ib_dev = &hr_dev->ib_dev; 293 struct hns_roce_mr *mr = to_hr_mr(ibmr); 294 struct hns_roce_cmd_mailbox *mailbox; 295 unsigned long mtpt_idx; 296 int ret; 297 298 if (!mr->enabled) { 299 ret = -EINVAL; 300 goto err_out; 301 } 302 303 mailbox = hns_roce_alloc_cmd_mailbox(hr_dev); 304 ret = PTR_ERR_OR_ZERO(mailbox); 305 if (ret) 306 goto err_out; 307 308 mtpt_idx = key_to_hw_index(mr->key) & (hr_dev->caps.num_mtpts - 1); 309 310 ret = hns_roce_cmd_mbox(hr_dev, 0, mailbox->dma, HNS_ROCE_CMD_QUERY_MPT, 311 mtpt_idx); 312 if (ret) 313 goto free_cmd_mbox; 314 315 ret = hns_roce_destroy_hw_ctx(hr_dev, HNS_ROCE_CMD_DESTROY_MPT, 316 mtpt_idx); 317 if (ret) 318 ibdev_warn(ib_dev, "failed to destroy MPT, ret = %d.\n", ret); 319 320 mr->enabled = 0; 321 mr->iova = virt_addr; 322 mr->size = length; 323 324 if (flags & IB_MR_REREG_PD) 325 mr->pd = to_hr_pd(pd)->pdn; 326 327 if (flags & IB_MR_REREG_ACCESS) 328 mr->access = mr_access_flags; 329 330 if (flags & IB_MR_REREG_TRANS) { 331 free_mr_pbl(hr_dev, mr); 332 ret = alloc_mr_pbl(hr_dev, mr, udata, start); 333 if (ret) { 334 ibdev_err(ib_dev, "failed to alloc mr PBL, ret = %d.\n", 335 ret); 336 goto free_cmd_mbox; 337 } 338 } 339 340 ret = hr_dev->hw->rereg_write_mtpt(hr_dev, mr, flags, mailbox->buf); 341 if (ret) { 342 ibdev_err(ib_dev, "failed to write mtpt, ret = %d.\n", ret); 343 goto free_cmd_mbox; 344 } 345 346 ret = hns_roce_create_hw_ctx(hr_dev, mailbox, HNS_ROCE_CMD_CREATE_MPT, 347 mtpt_idx); 348 if (ret) { 349 ibdev_err(ib_dev, "failed to create MPT, ret = %d.\n", ret); 350 goto free_cmd_mbox; 351 } 352 353 mr->enabled = 1; 354 355 free_cmd_mbox: 356 hns_roce_free_cmd_mailbox(hr_dev, mailbox); 357 358 err_out: 359 if (ret) { 360 atomic64_inc(&hr_dev->dfx_cnt[HNS_ROCE_DFX_MR_REREG_ERR_CNT]); 361 return ERR_PTR(ret); 362 } 363 364 return NULL; 365 } 366 367 int hns_roce_dereg_mr(struct ib_mr *ibmr, struct ib_udata *udata) 368 { 369 struct hns_roce_dev *hr_dev = to_hr_dev(ibmr->device); 370 struct hns_roce_mr *mr = to_hr_mr(ibmr); 371 372 if (hr_dev->hw->dereg_mr) 373 hr_dev->hw->dereg_mr(hr_dev); 374 375 hns_roce_mr_free(hr_dev, mr); 376 kfree(mr); 377 378 return 0; 379 } 380 381 struct ib_mr *hns_roce_alloc_mr(struct ib_pd *pd, enum ib_mr_type mr_type, 382 u32 max_num_sg) 383 { 384 struct hns_roce_dev *hr_dev = to_hr_dev(pd->device); 385 struct device *dev = hr_dev->dev; 386 struct hns_roce_mr *mr; 387 int ret; 388 389 if (mr_type != IB_MR_TYPE_MEM_REG) 390 return ERR_PTR(-EINVAL); 391 392 if (max_num_sg > HNS_ROCE_FRMR_MAX_PA) { 393 dev_err(dev, "max_num_sg larger than %d\n", 394 HNS_ROCE_FRMR_MAX_PA); 395 return ERR_PTR(-EINVAL); 396 } 397 398 mr = kzalloc(sizeof(*mr), GFP_KERNEL); 399 if (!mr) 400 return ERR_PTR(-ENOMEM); 401 402 mr->type = MR_TYPE_FRMR; 403 mr->pd = to_hr_pd(pd)->pdn; 404 mr->size = max_num_sg * (1 << PAGE_SHIFT); 405 406 /* Allocate memory region key */ 407 ret = alloc_mr_key(hr_dev, mr); 408 if (ret) 409 goto err_free; 410 411 ret = alloc_mr_pbl(hr_dev, mr, NULL, 0); 412 if (ret) 413 goto err_key; 414 415 ret = hns_roce_mr_enable(hr_dev, mr); 416 if (ret) 417 goto err_pbl; 418 419 mr->ibmr.rkey = mr->ibmr.lkey = mr->key; 420 mr->ibmr.length = mr->size; 421 422 return &mr->ibmr; 423 424 err_pbl: 425 free_mr_pbl(hr_dev, mr); 426 err_key: 427 free_mr_key(hr_dev, mr); 428 err_free: 429 kfree(mr); 430 return ERR_PTR(ret); 431 } 432 433 static int hns_roce_set_page(struct ib_mr *ibmr, u64 addr) 434 { 435 struct hns_roce_mr *mr = to_hr_mr(ibmr); 436 437 if (likely(mr->npages < mr->pbl_mtr.hem_cfg.buf_pg_count)) { 438 mr->page_list[mr->npages++] = addr; 439 return 0; 440 } 441 442 return -ENOBUFS; 443 } 444 445 int hns_roce_map_mr_sg(struct ib_mr *ibmr, struct scatterlist *sg, int sg_nents, 446 unsigned int *sg_offset_p) 447 { 448 unsigned int sg_offset = sg_offset_p ? *sg_offset_p : 0; 449 struct hns_roce_dev *hr_dev = to_hr_dev(ibmr->device); 450 struct ib_device *ibdev = &hr_dev->ib_dev; 451 struct hns_roce_mr *mr = to_hr_mr(ibmr); 452 struct hns_roce_mtr *mtr = &mr->pbl_mtr; 453 int ret, sg_num = 0; 454 455 if (!IS_ALIGNED(sg_offset, HNS_ROCE_FRMR_ALIGN_SIZE) || 456 ibmr->page_size < HNS_HW_PAGE_SIZE || 457 ibmr->page_size > HNS_HW_MAX_PAGE_SIZE) 458 return sg_num; 459 460 mr->npages = 0; 461 mr->page_list = kvcalloc(mr->pbl_mtr.hem_cfg.buf_pg_count, 462 sizeof(dma_addr_t), GFP_KERNEL); 463 if (!mr->page_list) 464 return sg_num; 465 466 sg_num = ib_sg_to_pages(ibmr, sg, sg_nents, sg_offset_p, hns_roce_set_page); 467 if (sg_num < 1) { 468 ibdev_err(ibdev, "failed to store sg pages %u %u, cnt = %d.\n", 469 mr->npages, mr->pbl_mtr.hem_cfg.buf_pg_count, sg_num); 470 goto err_page_list; 471 } 472 473 mtr->hem_cfg.region[0].offset = 0; 474 mtr->hem_cfg.region[0].count = mr->npages; 475 mtr->hem_cfg.region[0].hopnum = mr->pbl_hop_num; 476 mtr->hem_cfg.region_count = 1; 477 ret = hns_roce_mtr_map(hr_dev, mtr, mr->page_list, mr->npages); 478 if (ret) { 479 ibdev_err(ibdev, "failed to map sg mtr, ret = %d.\n", ret); 480 sg_num = 0; 481 } else { 482 mr->pbl_mtr.hem_cfg.buf_pg_shift = (u32)ilog2(ibmr->page_size); 483 } 484 485 err_page_list: 486 kvfree(mr->page_list); 487 mr->page_list = NULL; 488 489 return sg_num; 490 } 491 492 static int mtr_map_region(struct hns_roce_dev *hr_dev, struct hns_roce_mtr *mtr, 493 struct hns_roce_buf_region *region, dma_addr_t *pages, 494 int max_count) 495 { 496 int count, npage; 497 int offset, end; 498 __le64 *mtts; 499 u64 addr; 500 int i; 501 502 offset = region->offset; 503 end = offset + region->count; 504 npage = 0; 505 while (offset < end && npage < max_count) { 506 count = 0; 507 mtts = hns_roce_hem_list_find_mtt(hr_dev, &mtr->hem_list, 508 offset, &count); 509 if (!mtts) 510 return -ENOBUFS; 511 512 for (i = 0; i < count && npage < max_count; i++) { 513 addr = pages[npage]; 514 515 mtts[i] = cpu_to_le64(addr); 516 npage++; 517 } 518 offset += count; 519 } 520 521 return npage; 522 } 523 524 static inline bool mtr_has_mtt(struct hns_roce_buf_attr *attr) 525 { 526 int i; 527 528 for (i = 0; i < attr->region_count; i++) 529 if (attr->region[i].hopnum != HNS_ROCE_HOP_NUM_0 && 530 attr->region[i].hopnum > 0) 531 return true; 532 533 /* because the mtr only one root base address, when hopnum is 0 means 534 * root base address equals the first buffer address, thus all alloced 535 * memory must in a continuous space accessed by direct mode. 536 */ 537 return false; 538 } 539 540 static inline size_t mtr_bufs_size(struct hns_roce_buf_attr *attr) 541 { 542 size_t size = 0; 543 int i; 544 545 for (i = 0; i < attr->region_count; i++) 546 size += attr->region[i].size; 547 548 return size; 549 } 550 551 /* 552 * check the given pages in continuous address space 553 * Returns 0 on success, or the error page num. 554 */ 555 static inline int mtr_check_direct_pages(dma_addr_t *pages, int page_count, 556 unsigned int page_shift) 557 { 558 size_t page_size = 1 << page_shift; 559 int i; 560 561 for (i = 1; i < page_count; i++) 562 if (pages[i] - pages[i - 1] != page_size) 563 return i; 564 565 return 0; 566 } 567 568 static void mtr_free_bufs(struct hns_roce_dev *hr_dev, struct hns_roce_mtr *mtr) 569 { 570 /* release user buffers */ 571 if (mtr->umem) { 572 ib_umem_release(mtr->umem); 573 mtr->umem = NULL; 574 } 575 576 /* release kernel buffers */ 577 if (mtr->kmem) { 578 hns_roce_buf_free(hr_dev, mtr->kmem); 579 mtr->kmem = NULL; 580 } 581 } 582 583 static int mtr_alloc_bufs(struct hns_roce_dev *hr_dev, struct hns_roce_mtr *mtr, 584 struct hns_roce_buf_attr *buf_attr, 585 struct ib_udata *udata, unsigned long user_addr) 586 { 587 struct ib_device *ibdev = &hr_dev->ib_dev; 588 size_t total_size; 589 590 total_size = mtr_bufs_size(buf_attr); 591 592 if (udata) { 593 mtr->kmem = NULL; 594 mtr->umem = ib_umem_get(ibdev, user_addr, total_size, 595 buf_attr->user_access); 596 if (IS_ERR(mtr->umem)) { 597 ibdev_err(ibdev, "failed to get umem, ret = %ld.\n", 598 PTR_ERR(mtr->umem)); 599 return -ENOMEM; 600 } 601 } else { 602 mtr->umem = NULL; 603 mtr->kmem = hns_roce_buf_alloc(hr_dev, total_size, 604 buf_attr->page_shift, 605 !mtr_has_mtt(buf_attr) ? 606 HNS_ROCE_BUF_DIRECT : 0); 607 if (IS_ERR(mtr->kmem)) { 608 ibdev_err(ibdev, "failed to alloc kmem, ret = %ld.\n", 609 PTR_ERR(mtr->kmem)); 610 return PTR_ERR(mtr->kmem); 611 } 612 } 613 614 return 0; 615 } 616 617 static int cal_mtr_pg_cnt(struct hns_roce_mtr *mtr) 618 { 619 struct hns_roce_buf_region *region; 620 int page_cnt = 0; 621 int i; 622 623 for (i = 0; i < mtr->hem_cfg.region_count; i++) { 624 region = &mtr->hem_cfg.region[i]; 625 page_cnt += region->count; 626 } 627 628 return page_cnt; 629 } 630 631 static bool need_split_huge_page(struct hns_roce_mtr *mtr) 632 { 633 /* When HEM buffer uses 0-level addressing, the page size is 634 * equal to the whole buffer size. If the current MTR has multiple 635 * regions, we split the buffer into small pages(4k, required by hns 636 * ROCEE). These pages will be used in multiple regions. 637 */ 638 return mtr->hem_cfg.is_direct && mtr->hem_cfg.region_count > 1; 639 } 640 641 static int mtr_map_bufs(struct hns_roce_dev *hr_dev, struct hns_roce_mtr *mtr) 642 { 643 struct ib_device *ibdev = &hr_dev->ib_dev; 644 int page_count = cal_mtr_pg_cnt(mtr); 645 unsigned int page_shift; 646 dma_addr_t *pages; 647 int npage; 648 int ret; 649 650 page_shift = need_split_huge_page(mtr) ? HNS_HW_PAGE_SHIFT : 651 mtr->hem_cfg.buf_pg_shift; 652 /* alloc a tmp array to store buffer's dma address */ 653 pages = kvcalloc(page_count, sizeof(dma_addr_t), GFP_KERNEL); 654 if (!pages) 655 return -ENOMEM; 656 657 if (mtr->umem) 658 npage = hns_roce_get_umem_bufs(pages, page_count, 659 mtr->umem, page_shift); 660 else 661 npage = hns_roce_get_kmem_bufs(hr_dev, pages, page_count, 662 mtr->kmem, page_shift); 663 664 if (npage != page_count) { 665 ibdev_err(ibdev, "failed to get mtr page %d != %d.\n", npage, 666 page_count); 667 ret = -ENOBUFS; 668 goto err_alloc_list; 669 } 670 671 if (need_split_huge_page(mtr) && npage > 1) { 672 ret = mtr_check_direct_pages(pages, npage, page_shift); 673 if (ret) { 674 ibdev_err(ibdev, "failed to check %s page: %d / %d.\n", 675 mtr->umem ? "umtr" : "kmtr", ret, npage); 676 ret = -ENOBUFS; 677 goto err_alloc_list; 678 } 679 } 680 681 ret = hns_roce_mtr_map(hr_dev, mtr, pages, page_count); 682 if (ret) 683 ibdev_err(ibdev, "failed to map mtr pages, ret = %d.\n", ret); 684 685 err_alloc_list: 686 kvfree(pages); 687 688 return ret; 689 } 690 691 int hns_roce_mtr_map(struct hns_roce_dev *hr_dev, struct hns_roce_mtr *mtr, 692 dma_addr_t *pages, unsigned int page_cnt) 693 { 694 struct ib_device *ibdev = &hr_dev->ib_dev; 695 struct hns_roce_buf_region *r; 696 unsigned int i, mapped_cnt; 697 int ret = 0; 698 699 /* 700 * Only use the first page address as root ba when hopnum is 0, this 701 * is because the addresses of all pages are consecutive in this case. 702 */ 703 if (mtr->hem_cfg.is_direct) { 704 mtr->hem_cfg.root_ba = pages[0]; 705 return 0; 706 } 707 708 for (i = 0, mapped_cnt = 0; i < mtr->hem_cfg.region_count && 709 mapped_cnt < page_cnt; i++) { 710 r = &mtr->hem_cfg.region[i]; 711 712 if (r->offset + r->count > page_cnt) { 713 ret = -EINVAL; 714 ibdev_err(ibdev, 715 "failed to check mtr%u count %u + %u > %u.\n", 716 i, r->offset, r->count, page_cnt); 717 return ret; 718 } 719 720 ret = mtr_map_region(hr_dev, mtr, r, &pages[r->offset], 721 page_cnt - mapped_cnt); 722 if (ret < 0) { 723 ibdev_err(ibdev, 724 "failed to map mtr%u offset %u, ret = %d.\n", 725 i, r->offset, ret); 726 return ret; 727 } 728 mapped_cnt += ret; 729 ret = 0; 730 } 731 732 if (mapped_cnt < page_cnt) { 733 ret = -ENOBUFS; 734 ibdev_err(ibdev, "failed to map mtr pages count: %u < %u.\n", 735 mapped_cnt, page_cnt); 736 } 737 738 return ret; 739 } 740 741 static int hns_roce_get_direct_addr_mtt(struct hns_roce_hem_cfg *cfg, 742 u32 start_index, u64 *mtt_buf, 743 int mtt_cnt) 744 { 745 int mtt_count; 746 int total = 0; 747 u32 npage; 748 u64 addr; 749 750 if (mtt_cnt > cfg->region_count) 751 return -EINVAL; 752 753 for (mtt_count = 0; mtt_count < cfg->region_count && total < mtt_cnt; 754 mtt_count++) { 755 npage = cfg->region[mtt_count].offset; 756 if (npage < start_index) 757 continue; 758 759 addr = cfg->root_ba + (npage << HNS_HW_PAGE_SHIFT); 760 mtt_buf[total] = addr; 761 762 total++; 763 } 764 765 if (!total) 766 return -ENOENT; 767 768 return 0; 769 } 770 771 static int hns_roce_get_mhop_mtt(struct hns_roce_dev *hr_dev, 772 struct hns_roce_mtr *mtr, u32 start_index, 773 u64 *mtt_buf, int mtt_cnt) 774 { 775 int left = mtt_cnt; 776 int total = 0; 777 int mtt_count; 778 __le64 *mtts; 779 u32 npage; 780 781 while (left > 0) { 782 mtt_count = 0; 783 mtts = hns_roce_hem_list_find_mtt(hr_dev, &mtr->hem_list, 784 start_index + total, 785 &mtt_count); 786 if (!mtts || !mtt_count) 787 break; 788 789 npage = min(mtt_count, left); 790 left -= npage; 791 for (mtt_count = 0; mtt_count < npage; mtt_count++) 792 mtt_buf[total++] = le64_to_cpu(mtts[mtt_count]); 793 } 794 795 if (!total) 796 return -ENOENT; 797 798 return 0; 799 } 800 801 int hns_roce_mtr_find(struct hns_roce_dev *hr_dev, struct hns_roce_mtr *mtr, 802 u32 offset, u64 *mtt_buf, int mtt_max) 803 { 804 struct hns_roce_hem_cfg *cfg = &mtr->hem_cfg; 805 u32 start_index; 806 int ret; 807 808 if (!mtt_buf || mtt_max < 1) 809 return -EINVAL; 810 811 /* no mtt memory in direct mode, so just return the buffer address */ 812 if (cfg->is_direct) { 813 start_index = offset >> HNS_HW_PAGE_SHIFT; 814 ret = hns_roce_get_direct_addr_mtt(cfg, start_index, 815 mtt_buf, mtt_max); 816 } else { 817 start_index = offset >> cfg->buf_pg_shift; 818 ret = hns_roce_get_mhop_mtt(hr_dev, mtr, start_index, 819 mtt_buf, mtt_max); 820 } 821 return ret; 822 } 823 824 static int get_best_page_shift(struct hns_roce_dev *hr_dev, 825 struct hns_roce_mtr *mtr, 826 struct hns_roce_buf_attr *buf_attr) 827 { 828 unsigned int page_sz; 829 830 if (!buf_attr->adaptive || buf_attr->type != MTR_PBL || !mtr->umem) 831 return 0; 832 833 page_sz = ib_umem_find_best_pgsz(mtr->umem, 834 hr_dev->caps.page_size_cap, 835 buf_attr->iova); 836 if (!page_sz) 837 return -EINVAL; 838 839 buf_attr->page_shift = order_base_2(page_sz); 840 return 0; 841 } 842 843 static int get_best_hop_num(struct hns_roce_dev *hr_dev, 844 struct hns_roce_mtr *mtr, 845 struct hns_roce_buf_attr *buf_attr, 846 unsigned int ba_pg_shift) 847 { 848 #define INVALID_HOPNUM -1 849 #define MIN_BA_CNT 1 850 size_t buf_pg_sz = 1 << buf_attr->page_shift; 851 struct ib_device *ibdev = &hr_dev->ib_dev; 852 size_t ba_pg_sz = 1 << ba_pg_shift; 853 int hop_num = INVALID_HOPNUM; 854 size_t unit = MIN_BA_CNT; 855 size_t ba_cnt; 856 int j; 857 858 if (!buf_attr->adaptive || buf_attr->type != MTR_PBL) 859 return 0; 860 861 /* Caculating the number of buf pages, each buf page need a BA */ 862 if (mtr->umem) 863 ba_cnt = ib_umem_num_dma_blocks(mtr->umem, buf_pg_sz); 864 else 865 ba_cnt = DIV_ROUND_UP(buf_attr->region[0].size, buf_pg_sz); 866 867 for (j = 0; j <= HNS_ROCE_MAX_HOP_NUM; j++) { 868 if (ba_cnt <= unit) { 869 hop_num = j; 870 break; 871 } 872 /* Number of BAs can be represented at per hop */ 873 unit *= ba_pg_sz / BA_BYTE_LEN; 874 } 875 876 if (hop_num < 0) { 877 ibdev_err(ibdev, 878 "failed to calculate a valid hopnum.\n"); 879 return -EINVAL; 880 } 881 882 buf_attr->region[0].hopnum = hop_num; 883 884 return 0; 885 } 886 887 static bool is_buf_attr_valid(struct hns_roce_dev *hr_dev, 888 struct hns_roce_buf_attr *attr) 889 { 890 struct ib_device *ibdev = &hr_dev->ib_dev; 891 892 if (attr->region_count > ARRAY_SIZE(attr->region) || 893 attr->region_count < 1 || attr->page_shift < HNS_HW_PAGE_SHIFT) { 894 ibdev_err(ibdev, 895 "invalid buf attr, region count %u, page shift %u.\n", 896 attr->region_count, attr->page_shift); 897 return false; 898 } 899 900 return true; 901 } 902 903 static int mtr_init_buf_cfg(struct hns_roce_dev *hr_dev, 904 struct hns_roce_mtr *mtr, 905 struct hns_roce_buf_attr *attr) 906 { 907 struct hns_roce_hem_cfg *cfg = &mtr->hem_cfg; 908 struct hns_roce_buf_region *r; 909 size_t buf_pg_sz; 910 size_t buf_size; 911 int page_cnt, i; 912 u64 pgoff = 0; 913 914 if (!is_buf_attr_valid(hr_dev, attr)) 915 return -EINVAL; 916 917 /* If mtt is disabled, all pages must be within a continuous range */ 918 cfg->is_direct = !mtr_has_mtt(attr); 919 cfg->region_count = attr->region_count; 920 buf_size = mtr_bufs_size(attr); 921 if (need_split_huge_page(mtr)) { 922 buf_pg_sz = HNS_HW_PAGE_SIZE; 923 cfg->buf_pg_count = 1; 924 /* The ROCEE requires the page size to be 4K * 2 ^ N. */ 925 cfg->buf_pg_shift = HNS_HW_PAGE_SHIFT + 926 order_base_2(DIV_ROUND_UP(buf_size, HNS_HW_PAGE_SIZE)); 927 } else { 928 buf_pg_sz = 1 << attr->page_shift; 929 cfg->buf_pg_count = mtr->umem ? 930 ib_umem_num_dma_blocks(mtr->umem, buf_pg_sz) : 931 DIV_ROUND_UP(buf_size, buf_pg_sz); 932 cfg->buf_pg_shift = attr->page_shift; 933 pgoff = mtr->umem ? mtr->umem->address & ~PAGE_MASK : 0; 934 } 935 936 /* Convert buffer size to page index and page count for each region and 937 * the buffer's offset needs to be appended to the first region. 938 */ 939 for (page_cnt = 0, i = 0; i < attr->region_count; i++) { 940 r = &cfg->region[i]; 941 r->offset = page_cnt; 942 buf_size = hr_hw_page_align(attr->region[i].size + pgoff); 943 if (attr->type == MTR_PBL && mtr->umem) 944 r->count = ib_umem_num_dma_blocks(mtr->umem, buf_pg_sz); 945 else 946 r->count = DIV_ROUND_UP(buf_size, buf_pg_sz); 947 948 pgoff = 0; 949 page_cnt += r->count; 950 r->hopnum = to_hr_hem_hopnum(attr->region[i].hopnum, r->count); 951 } 952 953 return 0; 954 } 955 956 static u64 cal_pages_per_l1ba(unsigned int ba_per_bt, unsigned int hopnum) 957 { 958 return int_pow(ba_per_bt, hopnum - 1); 959 } 960 961 static unsigned int cal_best_bt_pg_sz(struct hns_roce_dev *hr_dev, 962 struct hns_roce_mtr *mtr, 963 unsigned int pg_shift) 964 { 965 unsigned long cap = hr_dev->caps.page_size_cap; 966 struct hns_roce_buf_region *re; 967 unsigned int pgs_per_l1ba; 968 unsigned int ba_per_bt; 969 unsigned int ba_num; 970 int i; 971 972 for_each_set_bit_from(pg_shift, &cap, sizeof(cap) * BITS_PER_BYTE) { 973 if (!(BIT(pg_shift) & cap)) 974 continue; 975 976 ba_per_bt = BIT(pg_shift) / BA_BYTE_LEN; 977 ba_num = 0; 978 for (i = 0; i < mtr->hem_cfg.region_count; i++) { 979 re = &mtr->hem_cfg.region[i]; 980 if (re->hopnum == 0) 981 continue; 982 983 pgs_per_l1ba = cal_pages_per_l1ba(ba_per_bt, re->hopnum); 984 ba_num += DIV_ROUND_UP(re->count, pgs_per_l1ba); 985 } 986 987 if (ba_num <= ba_per_bt) 988 return pg_shift; 989 } 990 991 return 0; 992 } 993 994 static int mtr_alloc_mtt(struct hns_roce_dev *hr_dev, struct hns_roce_mtr *mtr, 995 unsigned int ba_page_shift) 996 { 997 struct hns_roce_hem_cfg *cfg = &mtr->hem_cfg; 998 int ret; 999 1000 hns_roce_hem_list_init(&mtr->hem_list); 1001 if (!cfg->is_direct) { 1002 ba_page_shift = cal_best_bt_pg_sz(hr_dev, mtr, ba_page_shift); 1003 if (!ba_page_shift) 1004 return -ERANGE; 1005 1006 ret = hns_roce_hem_list_request(hr_dev, &mtr->hem_list, 1007 cfg->region, cfg->region_count, 1008 ba_page_shift); 1009 if (ret) 1010 return ret; 1011 cfg->root_ba = mtr->hem_list.root_ba; 1012 cfg->ba_pg_shift = ba_page_shift; 1013 } else { 1014 cfg->ba_pg_shift = cfg->buf_pg_shift; 1015 } 1016 1017 return 0; 1018 } 1019 1020 static void mtr_free_mtt(struct hns_roce_dev *hr_dev, struct hns_roce_mtr *mtr) 1021 { 1022 hns_roce_hem_list_release(hr_dev, &mtr->hem_list); 1023 } 1024 1025 /** 1026 * hns_roce_mtr_create - Create hns memory translate region. 1027 * 1028 * @hr_dev: RoCE device struct pointer 1029 * @mtr: memory translate region 1030 * @buf_attr: buffer attribute for creating mtr 1031 * @ba_page_shift: page shift for multi-hop base address table 1032 * @udata: user space context, if it's NULL, means kernel space 1033 * @user_addr: userspace virtual address to start at 1034 */ 1035 int hns_roce_mtr_create(struct hns_roce_dev *hr_dev, struct hns_roce_mtr *mtr, 1036 struct hns_roce_buf_attr *buf_attr, 1037 unsigned int ba_page_shift, struct ib_udata *udata, 1038 unsigned long user_addr) 1039 { 1040 struct ib_device *ibdev = &hr_dev->ib_dev; 1041 int ret; 1042 1043 trace_hns_buf_attr(buf_attr); 1044 /* The caller has its own buffer list and invokes the hns_roce_mtr_map() 1045 * to finish the MTT configuration. 1046 */ 1047 if (buf_attr->mtt_only) { 1048 mtr->umem = NULL; 1049 mtr->kmem = NULL; 1050 } else { 1051 ret = mtr_alloc_bufs(hr_dev, mtr, buf_attr, udata, user_addr); 1052 if (ret) { 1053 ibdev_err(ibdev, 1054 "failed to alloc mtr bufs, ret = %d.\n", ret); 1055 return ret; 1056 } 1057 1058 ret = get_best_page_shift(hr_dev, mtr, buf_attr); 1059 if (ret) 1060 goto err_init_buf; 1061 1062 ret = get_best_hop_num(hr_dev, mtr, buf_attr, ba_page_shift); 1063 if (ret) 1064 goto err_init_buf; 1065 } 1066 1067 ret = mtr_init_buf_cfg(hr_dev, mtr, buf_attr); 1068 if (ret) 1069 goto err_init_buf; 1070 1071 ret = mtr_alloc_mtt(hr_dev, mtr, ba_page_shift); 1072 if (ret) { 1073 ibdev_err(ibdev, "failed to alloc mtr mtt, ret = %d.\n", ret); 1074 goto err_init_buf; 1075 } 1076 1077 if (buf_attr->mtt_only) 1078 return 0; 1079 1080 /* Write buffer's dma address to MTT */ 1081 ret = mtr_map_bufs(hr_dev, mtr); 1082 if (ret) { 1083 ibdev_err(ibdev, "failed to map mtr bufs, ret = %d.\n", ret); 1084 goto err_alloc_mtt; 1085 } 1086 1087 return 0; 1088 1089 err_alloc_mtt: 1090 mtr_free_mtt(hr_dev, mtr); 1091 err_init_buf: 1092 mtr_free_bufs(hr_dev, mtr); 1093 1094 return ret; 1095 } 1096 1097 void hns_roce_mtr_destroy(struct hns_roce_dev *hr_dev, struct hns_roce_mtr *mtr) 1098 { 1099 /* release multi-hop addressing resource */ 1100 hns_roce_hem_list_release(hr_dev, &mtr->hem_list); 1101 1102 /* free buffers */ 1103 mtr_free_bufs(hr_dev, mtr); 1104 } 1105