xref: /linux/drivers/infiniband/hw/hns/hns_roce_hw_v2.h (revision 40ccd6aa3e2e05be93394e3cd560c718dedfcc77)
1 /*
2  * Copyright (c) 2016-2017 Hisilicon Limited.
3  *
4  * This software is available to you under a choice of one of two
5  * licenses.  You may choose to be licensed under the terms of the GNU
6  * General Public License (GPL) Version 2, available from the file
7  * COPYING in the main directory of this source tree, or the
8  * OpenIB.org BSD license below:
9  *
10  *     Redistribution and use in source and binary forms, with or
11  *     without modification, are permitted provided that the following
12  *     conditions are met:
13  *
14  *      - Redistributions of source code must retain the above
15  *        copyright notice, this list of conditions and the following
16  *        disclaimer.
17  *
18  *      - Redistributions in binary form must reproduce the above
19  *        copyright notice, this list of conditions and the following
20  *        disclaimer in the documentation and/or other materials
21  *        provided with the distribution.
22  *
23  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
24  * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
25  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
26  * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
27  * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
28  * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
29  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
30  * SOFTWARE.
31  */
32 
33 #ifndef _HNS_ROCE_HW_V2_H
34 #define _HNS_ROCE_HW_V2_H
35 
36 #include <linux/bitops.h>
37 
38 #define HNS_ROCE_V2_MAX_RC_INL_INN_SZ		32
39 #define HNS_ROCE_V2_MTT_ENTRY_SZ		64
40 #define HNS_ROCE_V2_AEQE_VEC_NUM		1
41 #define HNS_ROCE_V2_ABNORMAL_VEC_NUM		1
42 #define HNS_ROCE_V2_MAX_SRQWQE_SEGS		0x1000000
43 #define HNS_ROCE_V2_MAX_IDX_SEGS		0x1000000
44 #define HNS_ROCE_V2_MAX_XRCD_NUM		0x1000000
45 
46 #define HNS_ROCE_V2_QP_ACK_TIMEOUT_OFS_HIP08    10
47 
48 #define HNS_ROCE_V3_SCCC_SZ			64
49 #define HNS_ROCE_V3_GMV_ENTRY_SZ		32
50 
51 #define HNS_ROCE_V2_EXT_LLM_ENTRY_SZ		8
52 #define HNS_ROCE_V2_EXT_LLM_MAX_DEPTH		4096
53 
54 #define HNS_ROCE_V2_QPC_TIMER_ENTRY_SZ		PAGE_SIZE
55 #define HNS_ROCE_V2_CQC_TIMER_ENTRY_SZ		PAGE_SIZE
56 #define HNS_ROCE_V2_PAGE_SIZE_SUPPORTED		0xFFFF000
57 #define HNS_ROCE_V2_MAX_INNER_MTPT_NUM		2
58 #define HNS_ROCE_INVALID_LKEY			0x0
59 #define HNS_ROCE_INVALID_SGE_LENGTH		0x80000000
60 #define HNS_ROCE_CMQ_TX_TIMEOUT			30000
61 #define HNS_ROCE_V2_RSV_QPS			8
62 
63 #define HNS_ROCE_V2_HW_RST_TIMEOUT		1000
64 #define HNS_ROCE_V2_HW_RST_UNINT_DELAY		100
65 
66 #define HNS_ROCE_V2_HW_RST_COMPLETION_WAIT	20
67 
68 #define HNS_ROCE_CONTEXT_HOP_NUM		1
69 #define HNS_ROCE_SCCC_HOP_NUM			1
70 #define HNS_ROCE_MTT_HOP_NUM			1
71 #define HNS_ROCE_CQE_HOP_NUM			1
72 #define HNS_ROCE_SRQWQE_HOP_NUM			1
73 #define HNS_ROCE_PBL_HOP_NUM			2
74 #define HNS_ROCE_IDX_HOP_NUM			1
75 #define HNS_ROCE_SQWQE_HOP_NUM			2
76 #define HNS_ROCE_EXT_SGE_HOP_NUM		1
77 #define HNS_ROCE_RQWQE_HOP_NUM			2
78 
79 #define HNS_ROCE_V2_EQE_HOP_NUM			2
80 #define HNS_ROCE_V3_EQE_HOP_NUM			1
81 
82 #define HNS_ROCE_BA_PG_SZ_SUPPORTED_256K	6
83 #define HNS_ROCE_BA_PG_SZ_SUPPORTED_16K		2
84 #define HNS_ROCE_V2_GID_INDEX_NUM		16
85 
86 #define HNS_ROCE_V2_TABLE_CHUNK_SIZE		(1 << 18)
87 
88 enum {
89 	HNS_ROCE_CMD_FLAG_IN = BIT(0),
90 	HNS_ROCE_CMD_FLAG_OUT = BIT(1),
91 	HNS_ROCE_CMD_FLAG_NEXT = BIT(2),
92 	HNS_ROCE_CMD_FLAG_WR = BIT(3),
93 	HNS_ROCE_CMD_FLAG_ERR_INTR = BIT(5),
94 };
95 
96 #define HNS_ROCE_CMQ_DESC_NUM_S		3
97 
98 #define HNS_ROCE_CMQ_SCC_CLR_DONE_CNT		5
99 
100 #define HNS_ROCE_CONG_SIZE 64
101 
102 #define check_whether_last_step(hop_num, step_idx) \
103 	((step_idx == 0 && hop_num == HNS_ROCE_HOP_NUM_0) || \
104 	(step_idx == 1 && hop_num == 1) || \
105 	(step_idx == 2 && hop_num == 2))
106 #define HNS_ICL_SWITCH_CMD_ROCEE_SEL_SHIFT	0
107 #define HNS_ICL_SWITCH_CMD_ROCEE_SEL	BIT(HNS_ICL_SWITCH_CMD_ROCEE_SEL_SHIFT)
108 
109 #define CMD_CSQ_DESC_NUM		1024
110 #define CMD_CRQ_DESC_NUM		1024
111 
112 /* Free mr used parameters */
113 #define HNS_ROCE_FREE_MR_USED_CQE_NUM		128
114 #define HNS_ROCE_FREE_MR_USED_QP_NUM		0x8
115 #define HNS_ROCE_FREE_MR_USED_PSN		0x0808
116 #define HNS_ROCE_FREE_MR_USED_QP_RETRY_CNT	0x7
117 #define HNS_ROCE_FREE_MR_USED_QP_TIMEOUT	0x12
118 #define HNS_ROCE_FREE_MR_USED_SQWQE_NUM		128
119 #define HNS_ROCE_FREE_MR_USED_SQSGE_NUM		0x2
120 #define HNS_ROCE_FREE_MR_USED_RQWQE_NUM		128
121 #define HNS_ROCE_FREE_MR_USED_RQSGE_NUM		0x2
122 #define HNS_ROCE_V2_FREE_MR_TIMEOUT		4500
123 
124 enum {
125 	NO_ARMED = 0x0,
126 	REG_NXT_CEQE = 0x2,
127 	REG_NXT_SE_CEQE = 0x3
128 };
129 
130 enum {
131 	CQE_SIZE_32B = 0x0,
132 	CQE_SIZE_64B = 0x1
133 };
134 
135 #define V2_CQ_DB_REQ_NOT_SOL			0
136 #define V2_CQ_DB_REQ_NOT			1
137 
138 #define V2_CQ_STATE_VALID			1
139 #define V2_QKEY_VAL				0x80010000
140 
141 #define	GID_LEN_V2				16
142 
143 enum {
144 	HNS_ROCE_V2_WQE_OP_SEND				= 0x0,
145 	HNS_ROCE_V2_WQE_OP_SEND_WITH_INV		= 0x1,
146 	HNS_ROCE_V2_WQE_OP_SEND_WITH_IMM		= 0x2,
147 	HNS_ROCE_V2_WQE_OP_RDMA_WRITE			= 0x3,
148 	HNS_ROCE_V2_WQE_OP_RDMA_WRITE_WITH_IMM		= 0x4,
149 	HNS_ROCE_V2_WQE_OP_RDMA_READ			= 0x5,
150 	HNS_ROCE_V2_WQE_OP_ATOM_CMP_AND_SWAP		= 0x6,
151 	HNS_ROCE_V2_WQE_OP_ATOM_FETCH_AND_ADD		= 0x7,
152 	HNS_ROCE_V2_WQE_OP_ATOM_MSK_CMP_AND_SWAP	= 0x8,
153 	HNS_ROCE_V2_WQE_OP_ATOM_MSK_FETCH_AND_ADD	= 0x9,
154 	HNS_ROCE_V2_WQE_OP_FAST_REG_PMR			= 0xa,
155 	HNS_ROCE_V2_WQE_OP_BIND_MW			= 0xc,
156 	HNS_ROCE_V2_WQE_OP_MASK				= 0x1f,
157 };
158 
159 enum {
160 	/* rq operations */
161 	HNS_ROCE_V2_OPCODE_RDMA_WRITE_IMM = 0x0,
162 	HNS_ROCE_V2_OPCODE_SEND = 0x1,
163 	HNS_ROCE_V2_OPCODE_SEND_WITH_IMM = 0x2,
164 	HNS_ROCE_V2_OPCODE_SEND_WITH_INV = 0x3,
165 };
166 
167 enum {
168 	HNS_ROCE_V2_SQ_DB,
169 	HNS_ROCE_V2_RQ_DB,
170 	HNS_ROCE_V2_SRQ_DB,
171 	HNS_ROCE_V2_CQ_DB,
172 	HNS_ROCE_V2_CQ_DB_NOTIFY
173 };
174 
175 enum {
176 	HNS_ROCE_CQE_V2_SUCCESS				= 0x00,
177 	HNS_ROCE_CQE_V2_LOCAL_LENGTH_ERR		= 0x01,
178 	HNS_ROCE_CQE_V2_LOCAL_QP_OP_ERR			= 0x02,
179 	HNS_ROCE_CQE_V2_LOCAL_PROT_ERR			= 0x04,
180 	HNS_ROCE_CQE_V2_WR_FLUSH_ERR			= 0x05,
181 	HNS_ROCE_CQE_V2_MW_BIND_ERR			= 0x06,
182 	HNS_ROCE_CQE_V2_BAD_RESP_ERR			= 0x10,
183 	HNS_ROCE_CQE_V2_LOCAL_ACCESS_ERR		= 0x11,
184 	HNS_ROCE_CQE_V2_REMOTE_INVAL_REQ_ERR		= 0x12,
185 	HNS_ROCE_CQE_V2_REMOTE_ACCESS_ERR		= 0x13,
186 	HNS_ROCE_CQE_V2_REMOTE_OP_ERR			= 0x14,
187 	HNS_ROCE_CQE_V2_TRANSPORT_RETRY_EXC_ERR		= 0x15,
188 	HNS_ROCE_CQE_V2_RNR_RETRY_EXC_ERR		= 0x16,
189 	HNS_ROCE_CQE_V2_REMOTE_ABORT_ERR		= 0x22,
190 	HNS_ROCE_CQE_V2_GENERAL_ERR			= 0x23,
191 
192 	HNS_ROCE_V2_CQE_STATUS_MASK			= 0xff,
193 };
194 
195 /* CMQ command */
196 enum hns_roce_opcode_type {
197 	HNS_QUERY_FW_VER				= 0x0001,
198 	HNS_ROCE_OPC_QUERY_HW_VER			= 0x8000,
199 	HNS_ROCE_OPC_CFG_GLOBAL_PARAM			= 0x8001,
200 	HNS_ROCE_OPC_ALLOC_PF_RES			= 0x8004,
201 	HNS_ROCE_OPC_QUERY_COUNTER			= 0x8206,
202 	HNS_ROCE_OPC_QUERY_PF_RES			= 0x8400,
203 	HNS_ROCE_OPC_ALLOC_VF_RES			= 0x8401,
204 	HNS_ROCE_OPC_CFG_EXT_LLM			= 0x8403,
205 	HNS_ROCE_OPC_QUERY_PF_TIMER_RES			= 0x8406,
206 	HNS_ROCE_OPC_QUERY_FUNC_INFO			= 0x8407,
207 	HNS_ROCE_OPC_QUERY_PF_CAPS_NUM                  = 0x8408,
208 	HNS_ROCE_OPC_CFG_ENTRY_SIZE			= 0x8409,
209 	HNS_ROCE_OPC_QUERY_VF_CAPS_NUM			= 0x8410,
210 	HNS_ROCE_OPC_CFG_SGID_TB			= 0x8500,
211 	HNS_ROCE_OPC_CFG_SMAC_TB			= 0x8501,
212 	HNS_ROCE_OPC_POST_MB				= 0x8504,
213 	HNS_ROCE_OPC_QUERY_MB_ST			= 0x8505,
214 	HNS_ROCE_OPC_CFG_BT_ATTR			= 0x8506,
215 	HNS_ROCE_OPC_FUNC_CLEAR				= 0x8508,
216 	HNS_ROCE_OPC_CLR_SCCC				= 0x8509,
217 	HNS_ROCE_OPC_QUERY_SCCC				= 0x850a,
218 	HNS_ROCE_OPC_RESET_SCCC				= 0x850b,
219 	HNS_ROCE_OPC_CLEAR_EXTDB_LIST_INFO		= 0x850d,
220 	HNS_ROCE_OPC_QUERY_VF_RES			= 0x850e,
221 	HNS_ROCE_OPC_CFG_GMV_TBL			= 0x850f,
222 	HNS_ROCE_OPC_CFG_GMV_BT				= 0x8510,
223 	HNS_ROCE_QUERY_RAM_ECC				= 0x8513,
224 	HNS_SWITCH_PARAMETER_CFG			= 0x1033,
225 };
226 
227 enum {
228 	TYPE_CRQ,
229 	TYPE_CSQ,
230 };
231 
232 enum hns_roce_cmd_return_status {
233 	CMD_EXEC_SUCCESS,
234 	CMD_NO_AUTH,
235 	CMD_NOT_EXIST,
236 	CMD_CRQ_FULL,
237 	CMD_NEXT_ERR,
238 	CMD_NOT_EXEC,
239 	CMD_PARA_ERR,
240 	CMD_RESULT_ERR,
241 	CMD_TIMEOUT,
242 	CMD_HILINK_ERR,
243 	CMD_INFO_ILLEGAL,
244 	CMD_INVALID,
245 	CMD_ROH_CHECK_FAIL,
246 	CMD_OTHER_ERR = 0xff
247 };
248 
249 struct hns_roce_cmd_errcode {
250 	enum hns_roce_cmd_return_status return_status;
251 	int errno;
252 };
253 
254 enum hns_roce_sgid_type {
255 	GID_TYPE_FLAG_ROCE_V1 = 0,
256 	GID_TYPE_FLAG_ROCE_V2_IPV4,
257 	GID_TYPE_FLAG_ROCE_V2_IPV6,
258 };
259 
260 struct hns_roce_v2_cq_context {
261 	__le32 byte_4_pg_ceqn;
262 	__le32 byte_8_cqn;
263 	__le32 cqe_cur_blk_addr;
264 	__le32 byte_16_hop_addr;
265 	__le32 cqe_nxt_blk_addr;
266 	__le32 byte_24_pgsz_addr;
267 	__le32 byte_28_cq_pi;
268 	__le32 byte_32_cq_ci;
269 	__le32 cqe_ba;
270 	__le32 byte_40_cqe_ba;
271 	__le32 byte_44_db_record;
272 	__le32 db_record_addr;
273 	__le32 byte_52_cqe_cnt;
274 	__le32 byte_56_cqe_period_maxcnt;
275 	__le32 cqe_report_timer;
276 	__le32 byte_64_se_cqe_idx;
277 };
278 
279 #define CQC_CQE_BA_L_S 3
280 #define CQC_CQE_BA_H_S (32 + CQC_CQE_BA_L_S)
281 #define CQC_CQE_DB_RECORD_ADDR_H_S 32
282 
283 #define HNS_ROCE_V2_CQ_DEFAULT_BURST_NUM 0x0
284 #define HNS_ROCE_V2_CQ_DEFAULT_INTERVAL	0x0
285 
286 #define CQC_FIELD_LOC(h, l) FIELD_LOC(struct hns_roce_v2_cq_context, h, l)
287 
288 #define CQC_CQ_ST CQC_FIELD_LOC(1, 0)
289 #define CQC_POLL CQC_FIELD_LOC(2, 2)
290 #define CQC_SE CQC_FIELD_LOC(3, 3)
291 #define CQC_OVER_IGNORE CQC_FIELD_LOC(4, 4)
292 #define CQC_ARM_ST CQC_FIELD_LOC(7, 6)
293 #define CQC_SHIFT CQC_FIELD_LOC(12, 8)
294 #define CQC_CMD_SN CQC_FIELD_LOC(14, 13)
295 #define CQC_CEQN CQC_FIELD_LOC(23, 15)
296 #define CQC_CQN CQC_FIELD_LOC(55, 32)
297 #define CQC_POE_EN CQC_FIELD_LOC(56, 56)
298 #define CQC_POE_NUM CQC_FIELD_LOC(58, 57)
299 #define CQC_CQE_SIZE CQC_FIELD_LOC(60, 59)
300 #define CQC_CQ_CNT_MODE CQC_FIELD_LOC(61, 61)
301 #define CQC_STASH CQC_FIELD_LOC(63, 63)
302 #define CQC_CQE_CUR_BLK_ADDR_L CQC_FIELD_LOC(95, 64)
303 #define CQC_CQE_CUR_BLK_ADDR_H CQC_FIELD_LOC(115, 96)
304 #define CQC_POE_QID CQC_FIELD_LOC(125, 116)
305 #define CQC_CQE_HOP_NUM CQC_FIELD_LOC(127, 126)
306 #define CQC_CQE_NEX_BLK_ADDR_L CQC_FIELD_LOC(159, 128)
307 #define CQC_CQE_NEX_BLK_ADDR_H CQC_FIELD_LOC(179, 160)
308 #define CQC_CQE_BAR_PG_SZ CQC_FIELD_LOC(187, 184)
309 #define CQC_CQE_BUF_PG_SZ CQC_FIELD_LOC(191, 188)
310 #define CQC_CQ_PRODUCER_IDX CQC_FIELD_LOC(215, 192)
311 #define CQC_CQ_CONSUMER_IDX CQC_FIELD_LOC(247, 224)
312 #define CQC_CQE_BA_L CQC_FIELD_LOC(287, 256)
313 #define CQC_CQE_BA_H CQC_FIELD_LOC(316, 288)
314 #define CQC_POE_QID_H_0 CQC_FIELD_LOC(319, 317)
315 #define CQC_DB_RECORD_EN CQC_FIELD_LOC(320, 320)
316 #define CQC_CQE_DB_RECORD_ADDR_L CQC_FIELD_LOC(351, 321)
317 #define CQC_CQE_DB_RECORD_ADDR_H CQC_FIELD_LOC(383, 352)
318 #define CQC_CQE_CNT CQC_FIELD_LOC(407, 384)
319 #define CQC_CQ_MAX_CNT CQC_FIELD_LOC(431, 416)
320 #define CQC_CQ_PERIOD CQC_FIELD_LOC(447, 432)
321 #define CQC_CQE_REPORT_TIMER CQC_FIELD_LOC(471, 448)
322 #define CQC_WR_CQE_IDX CQC_FIELD_LOC(479, 472)
323 #define CQC_SE_CQE_IDX CQC_FIELD_LOC(503, 480)
324 #define CQC_POE_QID_H_1 CQC_FIELD_LOC(511, 511)
325 
326 struct hns_roce_srq_context {
327 	__le32 data[16];
328 };
329 
330 #define SRQC_FIELD_LOC(h, l) FIELD_LOC(struct hns_roce_srq_context, h, l)
331 
332 #define SRQC_SRQ_ST SRQC_FIELD_LOC(1, 0)
333 #define SRQC_WQE_HOP_NUM SRQC_FIELD_LOC(3, 2)
334 #define SRQC_SHIFT SRQC_FIELD_LOC(7, 4)
335 #define SRQC_SRQN SRQC_FIELD_LOC(31, 8)
336 #define SRQC_LIMIT_WL SRQC_FIELD_LOC(47, 32)
337 #define SRQC_RSV0 SRQC_FIELD_LOC(63, 48)
338 #define SRQC_XRCD SRQC_FIELD_LOC(87, 64)
339 #define SRQC_RSV1 SRQC_FIELD_LOC(95, 88)
340 #define SRQC_PRODUCER_IDX SRQC_FIELD_LOC(111, 96)
341 #define SRQC_CONSUMER_IDX SRQC_FIELD_LOC(127, 112)
342 #define SRQC_WQE_BT_BA_L SRQC_FIELD_LOC(159, 128)
343 #define SRQC_WQE_BT_BA_H SRQC_FIELD_LOC(188, 160)
344 #define SRQC_RSV2 SRQC_FIELD_LOC(190, 189)
345 #define SRQC_SRQ_TYPE SRQC_FIELD_LOC(191, 191)
346 #define SRQC_PD SRQC_FIELD_LOC(215, 192)
347 #define SRQC_RQWS SRQC_FIELD_LOC(219, 216)
348 #define SRQC_RSV3 SRQC_FIELD_LOC(223, 220)
349 #define SRQC_IDX_BT_BA_L SRQC_FIELD_LOC(255, 224)
350 #define SRQC_IDX_BT_BA_H SRQC_FIELD_LOC(284, 256)
351 #define SRQC_RSV4 SRQC_FIELD_LOC(287, 285)
352 #define SRQC_IDX_CUR_BLK_ADDR_L SRQC_FIELD_LOC(319, 288)
353 #define SRQC_IDX_CUR_BLK_ADDR_H SRQC_FIELD_LOC(339, 320)
354 #define SRQC_RSV5 SRQC_FIELD_LOC(341, 340)
355 #define SRQC_IDX_HOP_NUM SRQC_FIELD_LOC(343, 342)
356 #define SRQC_IDX_BA_PG_SZ SRQC_FIELD_LOC(347, 344)
357 #define SRQC_IDX_BUF_PG_SZ SRQC_FIELD_LOC(351, 348)
358 #define SRQC_IDX_NXT_BLK_ADDR_L SRQC_FIELD_LOC(383, 352)
359 #define SRQC_IDX_NXT_BLK_ADDR_H SRQC_FIELD_LOC(403, 384)
360 #define SRQC_RSV6 SRQC_FIELD_LOC(415, 404)
361 #define SRQC_XRC_CQN SRQC_FIELD_LOC(439, 416)
362 #define SRQC_WQE_BA_PG_SZ SRQC_FIELD_LOC(443, 440)
363 #define SRQC_WQE_BUF_PG_SZ SRQC_FIELD_LOC(447, 444)
364 #define SRQC_DB_RECORD_EN SRQC_FIELD_LOC(448, 448)
365 #define SRQC_DB_RECORD_ADDR_L SRQC_FIELD_LOC(479, 449)
366 #define SRQC_DB_RECORD_ADDR_H SRQC_FIELD_LOC(511, 480)
367 
368 enum {
369 	V2_MPT_ST_VALID = 0x1,
370 	V2_MPT_ST_FREE	= 0x2,
371 };
372 
373 enum hns_roce_v2_qp_state {
374 	HNS_ROCE_QP_ST_RST,
375 	HNS_ROCE_QP_ST_INIT,
376 	HNS_ROCE_QP_ST_RTR,
377 	HNS_ROCE_QP_ST_RTS,
378 	HNS_ROCE_QP_ST_SQD,
379 	HNS_ROCE_QP_ST_SQER,
380 	HNS_ROCE_QP_ST_ERR,
381 	HNS_ROCE_QP_ST_SQ_DRAINING,
382 	HNS_ROCE_QP_NUM_ST
383 };
384 
385 struct hns_roce_v2_qp_context_ex {
386 	__le32 data[64];
387 };
388 
389 struct hns_roce_v2_qp_context {
390 	__le32 byte_4_sqpn_tst;
391 	__le32 wqe_sge_ba;
392 	__le32 byte_12_sq_hop;
393 	__le32 byte_16_buf_ba_pg_sz;
394 	__le32 byte_20_smac_sgid_idx;
395 	__le32 byte_24_mtu_tc;
396 	__le32 byte_28_at_fl;
397 	u8 dgid[GID_LEN_V2];
398 	__le32 dmac;
399 	__le32 byte_52_udpspn_dmac;
400 	__le32 byte_56_dqpn_err;
401 	__le32 byte_60_qpst_tempid;
402 	__le32 qkey_xrcd;
403 	__le32 byte_68_rq_db;
404 	__le32 rq_db_record_addr;
405 	__le32 byte_76_srqn_op_en;
406 	__le32 byte_80_rnr_rx_cqn;
407 	__le32 byte_84_rq_ci_pi;
408 	__le32 rq_cur_blk_addr;
409 	__le32 byte_92_srq_info;
410 	__le32 byte_96_rx_reqmsn;
411 	__le32 rq_nxt_blk_addr;
412 	__le32 byte_104_rq_sge;
413 	__le32 byte_108_rx_reqepsn;
414 	__le32 rq_rnr_timer;
415 	__le32 rx_msg_len;
416 	__le32 rx_rkey_pkt_info;
417 	__le64 rx_va;
418 	__le32 byte_132_trrl;
419 	__le32 trrl_ba;
420 	__le32 byte_140_raq;
421 	__le32 byte_144_raq;
422 	__le32 byte_148_raq;
423 	__le32 byte_152_raq;
424 	__le32 byte_156_raq;
425 	__le32 byte_160_sq_ci_pi;
426 	__le32 sq_cur_blk_addr;
427 	__le32 byte_168_irrl_idx;
428 	__le32 byte_172_sq_psn;
429 	__le32 byte_176_msg_pktn;
430 	__le32 sq_cur_sge_blk_addr;
431 	__le32 byte_184_irrl_idx;
432 	__le32 cur_sge_offset;
433 	__le32 byte_192_ext_sge;
434 	__le32 byte_196_sq_psn;
435 	__le32 byte_200_sq_max;
436 	__le32 irrl_ba;
437 	__le32 byte_208_irrl;
438 	__le32 byte_212_lsn;
439 	__le32 sq_timer;
440 	__le32 byte_220_retry_psn_msn;
441 	__le32 byte_224_retry_msg;
442 	__le32 rx_sq_cur_blk_addr;
443 	__le32 byte_232_irrl_sge;
444 	__le32 irrl_cur_sge_offset;
445 	__le32 byte_240_irrl_tail;
446 	__le32 byte_244_rnr_rxack;
447 	__le32 byte_248_ack_psn;
448 	__le32 byte_252_err_txcqn;
449 	__le32 byte_256_sqflush_rqcqe;
450 
451 	struct hns_roce_v2_qp_context_ex ext;
452 };
453 
454 #define QPC_TRRL_BA_L_S 4
455 #define QPC_TRRL_BA_M_S (16 + QPC_TRRL_BA_L_S)
456 #define QPC_TRRL_BA_H_S (32 + QPC_TRRL_BA_M_S)
457 #define QPC_IRRL_BA_L_S 6
458 #define QPC_IRRL_BA_H_S (32 + QPC_IRRL_BA_L_S)
459 
460 #define QPC_FIELD_LOC(h, l) FIELD_LOC(struct hns_roce_v2_qp_context, h, l)
461 
462 #define QPC_TST QPC_FIELD_LOC(2, 0)
463 #define QPC_SGE_SHIFT QPC_FIELD_LOC(7, 3)
464 #define QPC_CNP_TIMER QPC_FIELD_LOC(31, 8)
465 #define QPC_WQE_SGE_BA_L QPC_FIELD_LOC(63, 32)
466 #define QPC_WQE_SGE_BA_H QPC_FIELD_LOC(92, 64)
467 #define QPC_SQ_HOP_NUM QPC_FIELD_LOC(94, 93)
468 #define QPC_CIRE_EN QPC_FIELD_LOC(95, 95)
469 #define QPC_WQE_SGE_BA_PG_SZ QPC_FIELD_LOC(99, 96)
470 #define QPC_WQE_SGE_BUF_PG_SZ QPC_FIELD_LOC(103, 100)
471 #define QPC_PD QPC_FIELD_LOC(127, 104)
472 #define QPC_RQ_HOP_NUM QPC_FIELD_LOC(129, 128)
473 #define QPC_SGE_HOP_NUM QPC_FIELD_LOC(131, 130)
474 #define QPC_RQWS QPC_FIELD_LOC(135, 132)
475 #define QPC_SQ_SHIFT QPC_FIELD_LOC(139, 136)
476 #define QPC_RQ_SHIFT QPC_FIELD_LOC(143, 140)
477 #define QPC_GMV_IDX QPC_FIELD_LOC(159, 144)
478 #define QPC_HOPLIMIT QPC_FIELD_LOC(167, 160)
479 #define QPC_TC QPC_FIELD_LOC(175, 168)
480 #define QPC_VLAN_ID QPC_FIELD_LOC(187, 176)
481 #define QPC_MTU QPC_FIELD_LOC(191, 188)
482 #define QPC_FL QPC_FIELD_LOC(211, 192)
483 #define QPC_SL QPC_FIELD_LOC(215, 212)
484 #define QPC_CNP_TX_FLAG QPC_FIELD_LOC(216, 216)
485 #define QPC_CE_FLAG QPC_FIELD_LOC(217, 217)
486 #define QPC_LBI QPC_FIELD_LOC(218, 218)
487 #define QPC_AT QPC_FIELD_LOC(223, 219)
488 #define QPC_DGID QPC_FIELD_LOC(351, 224)
489 #define QPC_DMAC_L QPC_FIELD_LOC(383, 352)
490 #define QPC_DMAC_H QPC_FIELD_LOC(399, 384)
491 #define QPC_UDPSPN QPC_FIELD_LOC(415, 400)
492 #define QPC_DQPN QPC_FIELD_LOC(439, 416)
493 #define QPC_SQ_TX_ERR QPC_FIELD_LOC(440, 440)
494 #define QPC_SQ_RX_ERR QPC_FIELD_LOC(441, 441)
495 #define QPC_RQ_TX_ERR QPC_FIELD_LOC(442, 442)
496 #define QPC_RQ_RX_ERR QPC_FIELD_LOC(443, 443)
497 #define QPC_LP_PKTN_INI QPC_FIELD_LOC(447, 444)
498 #define QPC_CONG_ALGO_TMPL_ID QPC_FIELD_LOC(455, 448)
499 #define QPC_SCC_TOKEN QPC_FIELD_LOC(474, 456)
500 #define QPC_SQ_DB_DOING QPC_FIELD_LOC(475, 475)
501 #define QPC_RQ_DB_DOING QPC_FIELD_LOC(476, 476)
502 #define QPC_QP_ST QPC_FIELD_LOC(479, 477)
503 #define QPC_QKEY_XRCD QPC_FIELD_LOC(511, 480)
504 #define QPC_RQ_RECORD_EN QPC_FIELD_LOC(512, 512)
505 #define QPC_RQ_DB_RECORD_ADDR_L QPC_FIELD_LOC(543, 513)
506 #define QPC_RQ_DB_RECORD_ADDR_H QPC_FIELD_LOC(575, 544)
507 #define QPC_SRQN QPC_FIELD_LOC(599, 576)
508 #define QPC_SRQ_EN QPC_FIELD_LOC(600, 600)
509 #define QPC_RRE QPC_FIELD_LOC(601, 601)
510 #define QPC_RWE QPC_FIELD_LOC(602, 602)
511 #define QPC_ATE QPC_FIELD_LOC(603, 603)
512 #define QPC_RQIE QPC_FIELD_LOC(604, 604)
513 #define QPC_EXT_ATE QPC_FIELD_LOC(605, 605)
514 #define QPC_RQ_VLAN_EN QPC_FIELD_LOC(606, 606)
515 #define QPC_RQ_RTY_TX_ERR QPC_FIELD_LOC(607, 607)
516 #define QPC_RX_CQN QPC_FIELD_LOC(631, 608)
517 #define QPC_XRC_QP_TYPE QPC_FIELD_LOC(632, 632)
518 #define QPC_CQEIE QPC_FIELD_LOC(633, 633)
519 #define QPC_CQEIS QPC_FIELD_LOC(634, 634)
520 #define QPC_MIN_RNR_TIME QPC_FIELD_LOC(639, 635)
521 #define QPC_RQ_PRODUCER_IDX QPC_FIELD_LOC(655, 640)
522 #define QPC_RQ_CONSUMER_IDX QPC_FIELD_LOC(671, 656)
523 #define QPC_RQ_CUR_BLK_ADDR_L QPC_FIELD_LOC(703, 672)
524 #define QPC_RQ_CUR_BLK_ADDR_H QPC_FIELD_LOC(723, 704)
525 #define QPC_SRQ_INFO QPC_FIELD_LOC(735, 724)
526 #define QPC_RX_REQ_MSN QPC_FIELD_LOC(759, 736)
527 #define QPC_REDUCE_CODE QPC_FIELD_LOC(766, 760)
528 #define QPC_RX_XRC_PKT_CQE_FLG QPC_FIELD_LOC(767, 767)
529 #define QPC_RQ_NXT_BLK_ADDR_L QPC_FIELD_LOC(799, 768)
530 #define QPC_RQ_NXT_BLK_ADDR_H QPC_FIELD_LOC(819, 800)
531 #define QPC_REDUCE_EN QPC_FIELD_LOC(820, 820)
532 #define QPC_FLUSH_EN QPC_FIELD_LOC(821, 821)
533 #define QPC_AW_EN QPC_FIELD_LOC(822, 822)
534 #define QPC_WN_EN QPC_FIELD_LOC(823, 823)
535 #define QPC_RQ_CUR_WQE_SGE_NUM QPC_FIELD_LOC(831, 824)
536 #define QPC_INV_CREDIT QPC_FIELD_LOC(832, 832)
537 #define QPC_LAST_WRITE_TYPE QPC_FIELD_LOC(834, 833)
538 #define QPC_RX_REQ_PSN_ERR QPC_FIELD_LOC(835, 835)
539 #define QPC_RX_REQ_LAST_OPTYPE QPC_FIELD_LOC(838, 836)
540 #define QPC_RX_REQ_RNR QPC_FIELD_LOC(839, 839)
541 #define QPC_RX_REQ_EPSN QPC_FIELD_LOC(863, 840)
542 #define QPC_RQ_RNR_TIMER QPC_FIELD_LOC(895, 864)
543 #define QPC_RX_MSG_LEN QPC_FIELD_LOC(927, 896)
544 #define QPC_RX_RKEY_PKT_INFO QPC_FIELD_LOC(959, 928)
545 #define QPC_RX_VA QPC_FIELD_LOC(1023, 960)
546 #define QPC_TRRL_HEAD_MAX QPC_FIELD_LOC(1031, 1024)
547 #define QPC_TRRL_TAIL_MAX QPC_FIELD_LOC(1039, 1032)
548 #define QPC_TRRL_BA_L QPC_FIELD_LOC(1055, 1040)
549 #define QPC_TRRL_BA_M QPC_FIELD_LOC(1087, 1056)
550 #define QPC_TRRL_BA_H QPC_FIELD_LOC(1099, 1088)
551 #define QPC_RR_MAX QPC_FIELD_LOC(1102, 1100)
552 #define QPC_RQ_RTY_WAIT_DO QPC_FIELD_LOC(1103, 1103)
553 #define QPC_RAQ_TRRL_HEAD QPC_FIELD_LOC(1111, 1104)
554 #define QPC_RAQ_TRRL_TAIL QPC_FIELD_LOC(1119, 1112)
555 #define QPC_RAQ_RTY_INI_PSN QPC_FIELD_LOC(1143, 1120)
556 #define QPC_CIRE_SLV_RQ_EN QPC_FIELD_LOC(1144, 1144)
557 #define QPC_RAQ_CREDIT QPC_FIELD_LOC(1149, 1145)
558 #define QPC_RQ_DB_IN_EXT QPC_FIELD_LOC(1150, 1150)
559 #define QPC_RESP_RTY_FLG QPC_FIELD_LOC(1151, 1151)
560 #define QPC_RAQ_MSN QPC_FIELD_LOC(1175, 1152)
561 #define QPC_RAQ_SYNDROME QPC_FIELD_LOC(1183, 1176)
562 #define QPC_RAQ_PSN QPC_FIELD_LOC(1207, 1184)
563 #define QPC_RAQ_TRRL_RTY_HEAD QPC_FIELD_LOC(1215, 1208)
564 #define QPC_RAQ_USE_PKTN QPC_FIELD_LOC(1239, 1216)
565 #define QPC_RQ_SCC_TOKEN QPC_FIELD_LOC(1245, 1240)
566 #define QPC_RVD10 QPC_FIELD_LOC(1247, 1246)
567 #define QPC_SQ_PRODUCER_IDX QPC_FIELD_LOC(1263, 1248)
568 #define QPC_SQ_CONSUMER_IDX QPC_FIELD_LOC(1279, 1264)
569 #define QPC_SQ_CUR_BLK_ADDR_L QPC_FIELD_LOC(1311, 1280)
570 #define QPC_SQ_CUR_BLK_ADDR_H QPC_FIELD_LOC(1331, 1312)
571 #define QPC_MSG_RTY_LP_FLG QPC_FIELD_LOC(1332, 1332)
572 #define QPC_SQ_INVLD_FLG QPC_FIELD_LOC(1333, 1333)
573 #define QPC_LP_SGEN_INI QPC_FIELD_LOC(1335, 1334)
574 #define QPC_SQ_VLAN_EN QPC_FIELD_LOC(1336, 1336)
575 #define QPC_POLL_DB_WAIT_DO QPC_FIELD_LOC(1337, 1337)
576 #define QPC_SCC_TOKEN_FORBID_SQ_DEQ QPC_FIELD_LOC(1338, 1338)
577 #define QPC_WAIT_ACK_TIMEOUT QPC_FIELD_LOC(1339, 1339)
578 #define QPC_IRRL_IDX_LSB QPC_FIELD_LOC(1343, 1340)
579 #define QPC_ACK_REQ_FREQ QPC_FIELD_LOC(1349, 1344)
580 #define QPC_MSG_RNR_FLG QPC_FIELD_LOC(1350, 1350)
581 #define QPC_FRE QPC_FIELD_LOC(1351, 1351)
582 #define QPC_SQ_CUR_PSN QPC_FIELD_LOC(1375, 1352)
583 #define QPC_MSG_USE_PKTN QPC_FIELD_LOC(1399, 1376)
584 #define QPC_IRRL_HEAD_PRE QPC_FIELD_LOC(1407, 1400)
585 #define QPC_SQ_CUR_SGE_BLK_ADDR_L QPC_FIELD_LOC(1439, 1408)
586 #define QPC_SQ_CUR_SGE_BLK_ADDR_H QPC_FIELD_LOC(1459, 1440)
587 #define QPC_IRRL_IDX_MSB QPC_FIELD_LOC(1471, 1460)
588 #define QPC_CUR_SGE_OFFSET QPC_FIELD_LOC(1503, 1472)
589 #define QPC_CUR_SGE_IDX QPC_FIELD_LOC(1527, 1504)
590 #define QPC_EXT_SGE_NUM_LEFT QPC_FIELD_LOC(1535, 1528)
591 #define QPC_OWNER_MODE QPC_FIELD_LOC(1536, 1536)
592 #define QPC_CIRE_SLV_SQ_EN QPC_FIELD_LOC(1537, 1537)
593 #define QPC_CIRE_DOING QPC_FIELD_LOC(1538, 1538)
594 #define QPC_CIRE_RESULT QPC_FIELD_LOC(1539, 1539)
595 #define QPC_OWNER_DB_WAIT_DO QPC_FIELD_LOC(1540, 1540)
596 #define QPC_SQ_WQE_INVLD QPC_FIELD_LOC(1541, 1541)
597 #define QPC_DCA_MODE QPC_FIELD_LOC(1542, 1542)
598 #define QPC_RTY_OWNER_NOCHK QPC_FIELD_LOC(1543, 1543)
599 #define QPC_V2_IRRL_HEAD QPC_FIELD_LOC(1543, 1536)
600 #define QPC_SQ_MAX_PSN QPC_FIELD_LOC(1567, 1544)
601 #define QPC_SQ_MAX_IDX QPC_FIELD_LOC(1583, 1568)
602 #define QPC_LCL_OPERATED_CNT QPC_FIELD_LOC(1599, 1584)
603 #define QPC_IRRL_BA_L QPC_FIELD_LOC(1631, 1600)
604 #define QPC_IRRL_BA_H QPC_FIELD_LOC(1657, 1632)
605 #define QPC_PKT_RNR_FLG QPC_FIELD_LOC(1658, 1658)
606 #define QPC_PKT_RTY_FLG QPC_FIELD_LOC(1659, 1659)
607 #define QPC_RMT_E2E QPC_FIELD_LOC(1660, 1660)
608 #define QPC_SR_MAX QPC_FIELD_LOC(1663, 1661)
609 #define QPC_LSN QPC_FIELD_LOC(1687, 1664)
610 #define QPC_RETRY_NUM_INIT QPC_FIELD_LOC(1690, 1688)
611 #define QPC_CHECK_FLG QPC_FIELD_LOC(1692, 1691)
612 #define QPC_RETRY_CNT QPC_FIELD_LOC(1695, 1693)
613 #define QPC_SQ_TIMER QPC_FIELD_LOC(1727, 1696)
614 #define QPC_RETRY_MSG_MSN QPC_FIELD_LOC(1743, 1728)
615 #define QPC_RETRY_MSG_PSN_L QPC_FIELD_LOC(1759, 1744)
616 #define QPC_RETRY_MSG_PSN_H QPC_FIELD_LOC(1767, 1760)
617 #define QPC_RETRY_MSG_FPKT_PSN QPC_FIELD_LOC(1791, 1768)
618 #define QPC_RX_SQ_CUR_BLK_ADDR_L QPC_FIELD_LOC(1823, 1792)
619 #define QPC_RX_SQ_CUR_BLK_ADDR_H QPC_FIELD_LOC(1843, 1824)
620 #define QPC_IRRL_SGE_IDX QPC_FIELD_LOC(1851, 1844)
621 #define QPC_LSAN_EN QPC_FIELD_LOC(1852, 1852)
622 #define QPC_SO_LP_VLD QPC_FIELD_LOC(1853, 1853)
623 #define QPC_FENCE_LP_VLD QPC_FIELD_LOC(1854, 1854)
624 #define QPC_IRRL_LP_VLD QPC_FIELD_LOC(1855, 1855)
625 #define QPC_IRRL_CUR_SGE_OFFSET QPC_FIELD_LOC(1887, 1856)
626 #define QPC_IRRL_TAIL_REAL QPC_FIELD_LOC(1895, 1888)
627 #define QPC_IRRL_TAIL_RD QPC_FIELD_LOC(1903, 1896)
628 #define QPC_RX_ACK_MSN QPC_FIELD_LOC(1919, 1904)
629 #define QPC_RX_ACK_EPSN QPC_FIELD_LOC(1943, 1920)
630 #define QPC_RNR_NUM_INIT QPC_FIELD_LOC(1946, 1944)
631 #define QPC_RNR_CNT QPC_FIELD_LOC(1949, 1947)
632 #define QPC_LCL_OP_FLG QPC_FIELD_LOC(1950, 1950)
633 #define QPC_IRRL_RD_FLG QPC_FIELD_LOC(1951, 1951)
634 #define QPC_IRRL_PSN QPC_FIELD_LOC(1975, 1952)
635 #define QPC_ACK_PSN_ERR QPC_FIELD_LOC(1976, 1976)
636 #define QPC_ACK_LAST_OPTYPE QPC_FIELD_LOC(1978, 1977)
637 #define QPC_IRRL_PSN_VLD QPC_FIELD_LOC(1979, 1979)
638 #define QPC_RNR_RETRY_FLAG QPC_FIELD_LOC(1980, 1980)
639 #define QPC_SQ_RTY_TX_ERR QPC_FIELD_LOC(1981, 1981)
640 #define QPC_LAST_IND QPC_FIELD_LOC(1982, 1982)
641 #define QPC_CQ_ERR_IND QPC_FIELD_LOC(1983, 1983)
642 #define QPC_TX_CQN QPC_FIELD_LOC(2007, 1984)
643 #define QPC_SIG_TYPE QPC_FIELD_LOC(2008, 2008)
644 #define QPC_ERR_TYPE QPC_FIELD_LOC(2015, 2009)
645 #define QPC_RQ_CQE_IDX QPC_FIELD_LOC(2031, 2016)
646 #define QPC_SQ_FLUSH_IDX QPC_FIELD_LOC(2047, 2032)
647 
648 #define RETRY_MSG_PSN_SHIFT 16
649 
650 #define QPCEX_FIELD_LOC(h, l) FIELD_LOC(struct hns_roce_v2_qp_context_ex, h, l)
651 
652 #define QPCEX_CONG_ALG_SEL QPCEX_FIELD_LOC(0, 0)
653 #define QPCEX_CONG_ALG_SUB_SEL QPCEX_FIELD_LOC(1, 1)
654 #define QPCEX_DIP_CTX_IDX_VLD QPCEX_FIELD_LOC(2, 2)
655 #define QPCEX_DIP_CTX_IDX QPCEX_FIELD_LOC(22, 3)
656 #define QPCEX_SQ_RQ_NOT_FORBID_EN QPCEX_FIELD_LOC(23, 23)
657 #define QPCEX_STASH QPCEX_FIELD_LOC(82, 82)
658 
659 #define SCC_CONTEXT_SIZE 16
660 
661 struct hns_roce_v2_scc_context {
662 	__le32 data[SCC_CONTEXT_SIZE];
663 };
664 
665 #define	V2_QP_RWE_S 1 /* rdma write enable */
666 #define	V2_QP_RRE_S 2 /* rdma read enable */
667 #define	V2_QP_ATE_S 3 /* rdma atomic enable */
668 
669 struct hns_roce_v2_cqe {
670 	__le32	byte_4;
671 	union {
672 		__le32 rkey;
673 		__le32 immtdata;
674 	};
675 	__le32	byte_12;
676 	__le32	byte_16;
677 	__le32	byte_cnt;
678 	u8	smac[4];
679 	__le32	byte_28;
680 	__le32	byte_32;
681 	__le32	rsv[8];
682 };
683 
684 #define CQE_FIELD_LOC(h, l) FIELD_LOC(struct hns_roce_v2_cqe, h, l)
685 
686 #define CQE_OPCODE CQE_FIELD_LOC(4, 0)
687 #define CQE_RQ_INLINE CQE_FIELD_LOC(5, 5)
688 #define CQE_S_R CQE_FIELD_LOC(6, 6)
689 #define CQE_OWNER CQE_FIELD_LOC(7, 7)
690 #define CQE_STATUS CQE_FIELD_LOC(15, 8)
691 #define CQE_WQE_IDX CQE_FIELD_LOC(31, 16)
692 #define CQE_RKEY_IMMTDATA CQE_FIELD_LOC(63, 32)
693 #define CQE_XRC_SRQN CQE_FIELD_LOC(87, 64)
694 #define CQE_RSV0 CQE_FIELD_LOC(95, 88)
695 #define CQE_LCL_QPN CQE_FIELD_LOC(119, 96)
696 #define CQE_SUB_STATUS CQE_FIELD_LOC(127, 120)
697 #define CQE_BYTE_CNT CQE_FIELD_LOC(159, 128)
698 #define CQE_SMAC CQE_FIELD_LOC(207, 160)
699 #define CQE_PORT_TYPE CQE_FIELD_LOC(209, 208)
700 #define CQE_VID CQE_FIELD_LOC(221, 210)
701 #define CQE_VID_VLD CQE_FIELD_LOC(222, 222)
702 #define CQE_RSV2 CQE_FIELD_LOC(223, 223)
703 #define CQE_RMT_QPN CQE_FIELD_LOC(247, 224)
704 #define CQE_SL CQE_FIELD_LOC(250, 248)
705 #define CQE_PORTN CQE_FIELD_LOC(253, 251)
706 #define CQE_GRH CQE_FIELD_LOC(254, 254)
707 #define CQE_LPK CQE_FIELD_LOC(255, 255)
708 #define CQE_RSV3 CQE_FIELD_LOC(511, 256)
709 
710 struct hns_roce_v2_mpt_entry {
711 	__le32	byte_4_pd_hop_st;
712 	__le32	byte_8_mw_cnt_en;
713 	__le32	byte_12_mw_pa;
714 	__le32	bound_lkey;
715 	__le32	len_l;
716 	__le32	len_h;
717 	__le32	lkey;
718 	__le32	va_l;
719 	__le32	va_h;
720 	__le32	pbl_size;
721 	__le32	pbl_ba_l;
722 	__le32	byte_48_mode_ba;
723 	__le32	pa0_l;
724 	__le32	byte_56_pa0_h;
725 	__le32	pa1_l;
726 	__le32	byte_64_buf_pa1;
727 };
728 
729 #define MPT_PBL_BUF_ADDR_S 6
730 #define MPT_PBL_BA_ADDR_S 3
731 
732 #define MPT_FIELD_LOC(h, l) FIELD_LOC(struct hns_roce_v2_mpt_entry, h, l)
733 
734 #define MPT_ST MPT_FIELD_LOC(1, 0)
735 #define MPT_PBL_HOP_NUM MPT_FIELD_LOC(3, 2)
736 #define MPT_PBL_BA_PG_SZ MPT_FIELD_LOC(7, 4)
737 #define MPT_PD MPT_FIELD_LOC(31, 8)
738 #define MPT_RA_EN MPT_FIELD_LOC(32, 32)
739 #define MPT_R_INV_EN MPT_FIELD_LOC(33, 33)
740 #define MPT_L_INV_EN MPT_FIELD_LOC(34, 34)
741 #define MPT_BIND_EN MPT_FIELD_LOC(35, 35)
742 #define MPT_ATOMIC_EN MPT_FIELD_LOC(36, 36)
743 #define MPT_RR_EN MPT_FIELD_LOC(37, 37)
744 #define MPT_RW_EN MPT_FIELD_LOC(38, 38)
745 #define MPT_LW_EN MPT_FIELD_LOC(39, 39)
746 #define MPT_MW_CNT MPT_FIELD_LOC(63, 40)
747 #define MPT_FRE MPT_FIELD_LOC(64, 64)
748 #define MPT_PA MPT_FIELD_LOC(65, 65)
749 #define MPT_ZBVA MPT_FIELD_LOC(66, 66)
750 #define MPT_SHARE MPT_FIELD_LOC(67, 67)
751 #define MPT_MR_MW MPT_FIELD_LOC(68, 68)
752 #define MPT_BPD MPT_FIELD_LOC(69, 69)
753 #define MPT_BQP MPT_FIELD_LOC(70, 70)
754 #define MPT_INNER_PA_VLD MPT_FIELD_LOC(71, 71)
755 #define MPT_MW_BIND_QPN MPT_FIELD_LOC(95, 72)
756 #define MPT_BOUND_LKEY MPT_FIELD_LOC(127, 96)
757 #define MPT_LEN_L MPT_FIELD_LOC(159, 128)
758 #define MPT_LEN_H MPT_FIELD_LOC(191, 160)
759 #define MPT_LKEY MPT_FIELD_LOC(223, 192)
760 #define MPT_VA MPT_FIELD_LOC(287, 224)
761 #define MPT_PBL_SIZE MPT_FIELD_LOC(319, 288)
762 #define MPT_PBL_BA_L MPT_FIELD_LOC(351, 320)
763 #define MPT_PBL_BA_H MPT_FIELD_LOC(380, 352)
764 #define MPT_BLK_MODE MPT_FIELD_LOC(381, 381)
765 #define MPT_RSV0 MPT_FIELD_LOC(383, 382)
766 #define MPT_PA0_L MPT_FIELD_LOC(415, 384)
767 #define MPT_PA0_H MPT_FIELD_LOC(441, 416)
768 #define MPT_BOUND_VA MPT_FIELD_LOC(447, 442)
769 #define MPT_PA1_L MPT_FIELD_LOC(479, 448)
770 #define MPT_PA1_H MPT_FIELD_LOC(505, 480)
771 #define MPT_PERSIST_EN MPT_FIELD_LOC(506, 506)
772 #define MPT_RSV2 MPT_FIELD_LOC(507, 507)
773 #define MPT_PBL_BUF_PG_SZ MPT_FIELD_LOC(511, 508)
774 
775 #define V2_MPT_BYTE_4_MPT_ST_S 0
776 #define V2_MPT_BYTE_4_MPT_ST_M GENMASK(1, 0)
777 
778 #define V2_MPT_BYTE_4_PBL_HOP_NUM_S 2
779 #define V2_MPT_BYTE_4_PBL_HOP_NUM_M GENMASK(3, 2)
780 
781 #define V2_MPT_BYTE_4_PBL_BA_PG_SZ_S 4
782 #define V2_MPT_BYTE_4_PBL_BA_PG_SZ_M GENMASK(7, 4)
783 
784 #define V2_MPT_BYTE_4_PD_S 8
785 #define V2_MPT_BYTE_4_PD_M GENMASK(31, 8)
786 
787 #define V2_MPT_BYTE_8_RA_EN_S 0
788 
789 #define V2_MPT_BYTE_8_R_INV_EN_S 1
790 
791 #define V2_MPT_BYTE_8_L_INV_EN_S 2
792 
793 #define V2_MPT_BYTE_8_BIND_EN_S 3
794 
795 #define V2_MPT_BYTE_8_ATOMIC_EN_S 4
796 
797 #define V2_MPT_BYTE_8_RR_EN_S 5
798 
799 #define V2_MPT_BYTE_8_RW_EN_S 6
800 
801 #define V2_MPT_BYTE_8_LW_EN_S 7
802 
803 #define V2_MPT_BYTE_8_MW_CNT_S 8
804 #define V2_MPT_BYTE_8_MW_CNT_M GENMASK(31, 8)
805 
806 #define V2_MPT_BYTE_12_FRE_S 0
807 
808 #define V2_MPT_BYTE_12_PA_S 1
809 
810 #define V2_MPT_BYTE_12_MR_MW_S 4
811 
812 #define V2_MPT_BYTE_12_BPD_S 5
813 
814 #define V2_MPT_BYTE_12_BQP_S 6
815 
816 #define V2_MPT_BYTE_12_INNER_PA_VLD_S 7
817 
818 #define V2_MPT_BYTE_12_MW_BIND_QPN_S 8
819 #define V2_MPT_BYTE_12_MW_BIND_QPN_M GENMASK(31, 8)
820 
821 #define V2_MPT_BYTE_48_PBL_BA_H_S 0
822 #define V2_MPT_BYTE_48_PBL_BA_H_M GENMASK(28, 0)
823 
824 #define V2_MPT_BYTE_48_BLK_MODE_S 29
825 
826 #define V2_MPT_BYTE_56_PA0_H_S 0
827 #define V2_MPT_BYTE_56_PA0_H_M GENMASK(25, 0)
828 
829 #define V2_MPT_BYTE_64_PA1_H_S 0
830 #define V2_MPT_BYTE_64_PA1_H_M GENMASK(25, 0)
831 
832 #define V2_MPT_BYTE_64_PBL_BUF_PG_SZ_S 28
833 #define V2_MPT_BYTE_64_PBL_BUF_PG_SZ_M GENMASK(31, 28)
834 
835 struct hns_roce_v2_db {
836 	__le32	data[2];
837 };
838 
839 #define DB_FIELD_LOC(h, l) FIELD_LOC(struct hns_roce_v2_db, h, l)
840 
841 #define DB_TAG DB_FIELD_LOC(23, 0)
842 #define DB_CMD DB_FIELD_LOC(27, 24)
843 #define DB_FLAG DB_FIELD_LOC(31, 31)
844 #define DB_PI DB_FIELD_LOC(47, 32)
845 #define DB_SL DB_FIELD_LOC(50, 48)
846 #define DB_CQ_CI DB_FIELD_LOC(55, 32)
847 #define DB_CQ_NOTIFY DB_FIELD_LOC(56, 56)
848 #define DB_CQ_CMD_SN DB_FIELD_LOC(58, 57)
849 #define EQ_DB_TAG DB_FIELD_LOC(7, 0)
850 #define EQ_DB_CMD DB_FIELD_LOC(17, 16)
851 #define EQ_DB_CI DB_FIELD_LOC(55, 32)
852 
853 #define V2_DB_PRODUCER_IDX_S 0
854 #define V2_DB_PRODUCER_IDX_M GENMASK(15, 0)
855 
856 #define V2_CQ_DB_CONS_IDX_S 0
857 #define V2_CQ_DB_CONS_IDX_M GENMASK(23, 0)
858 
859 struct hns_roce_v2_ud_send_wqe {
860 	__le32	byte_4;
861 	__le32	msg_len;
862 	__le32	immtdata;
863 	__le32	byte_16;
864 	__le32	byte_20;
865 	__le32	byte_24;
866 	__le32	qkey;
867 	__le32	byte_32;
868 	__le32	byte_36;
869 	__le32	byte_40;
870 	u8	dmac[ETH_ALEN];
871 	u8	sgid_index;
872 	u8	smac_index;
873 	u8	dgid[GID_LEN_V2];
874 };
875 
876 #define UD_SEND_WQE_FIELD_LOC(h, l) FIELD_LOC(struct hns_roce_v2_ud_send_wqe, h, l)
877 
878 #define UD_SEND_WQE_OPCODE UD_SEND_WQE_FIELD_LOC(4, 0)
879 #define UD_SEND_WQE_OWNER UD_SEND_WQE_FIELD_LOC(7, 7)
880 #define UD_SEND_WQE_CQE UD_SEND_WQE_FIELD_LOC(8, 8)
881 #define UD_SEND_WQE_SE UD_SEND_WQE_FIELD_LOC(11, 11)
882 #define UD_SEND_WQE_PD UD_SEND_WQE_FIELD_LOC(119, 96)
883 #define UD_SEND_WQE_SGE_NUM UD_SEND_WQE_FIELD_LOC(127, 120)
884 #define UD_SEND_WQE_MSG_START_SGE_IDX UD_SEND_WQE_FIELD_LOC(151, 128)
885 #define UD_SEND_WQE_UDPSPN UD_SEND_WQE_FIELD_LOC(191, 176)
886 #define UD_SEND_WQE_DQPN UD_SEND_WQE_FIELD_LOC(247, 224)
887 #define UD_SEND_WQE_VLAN UD_SEND_WQE_FIELD_LOC(271, 256)
888 #define UD_SEND_WQE_HOPLIMIT UD_SEND_WQE_FIELD_LOC(279, 272)
889 #define UD_SEND_WQE_TCLASS UD_SEND_WQE_FIELD_LOC(287, 280)
890 #define UD_SEND_WQE_FLOW_LABEL UD_SEND_WQE_FIELD_LOC(307, 288)
891 #define UD_SEND_WQE_SL UD_SEND_WQE_FIELD_LOC(311, 308)
892 #define UD_SEND_WQE_VLAN_EN UD_SEND_WQE_FIELD_LOC(318, 318)
893 #define UD_SEND_WQE_LBI UD_SEND_WQE_FIELD_LOC(319, 319)
894 
895 struct hns_roce_v2_rc_send_wqe {
896 	__le32		byte_4;
897 	__le32		msg_len;
898 	union {
899 		__le32  inv_key;
900 		__le32  immtdata;
901 	};
902 	__le32		byte_16;
903 	__le32		byte_20;
904 	__le32		rkey;
905 	__le64		va;
906 };
907 
908 #define RC_SEND_WQE_FIELD_LOC(h, l) FIELD_LOC(struct hns_roce_v2_rc_send_wqe, h, l)
909 
910 #define RC_SEND_WQE_OPCODE RC_SEND_WQE_FIELD_LOC(4, 0)
911 #define RC_SEND_WQE_DB_SL_L RC_SEND_WQE_FIELD_LOC(6, 5)
912 #define RC_SEND_WQE_DB_SL_H RC_SEND_WQE_FIELD_LOC(14, 13)
913 #define RC_SEND_WQE_OWNER RC_SEND_WQE_FIELD_LOC(7, 7)
914 #define RC_SEND_WQE_CQE RC_SEND_WQE_FIELD_LOC(8, 8)
915 #define RC_SEND_WQE_FENCE RC_SEND_WQE_FIELD_LOC(9, 9)
916 #define RC_SEND_WQE_SE RC_SEND_WQE_FIELD_LOC(11, 11)
917 #define RC_SEND_WQE_INLINE RC_SEND_WQE_FIELD_LOC(12, 12)
918 #define RC_SEND_WQE_WQE_INDEX RC_SEND_WQE_FIELD_LOC(30, 15)
919 #define RC_SEND_WQE_FLAG RC_SEND_WQE_FIELD_LOC(31, 31)
920 #define RC_SEND_WQE_XRC_SRQN RC_SEND_WQE_FIELD_LOC(119, 96)
921 #define RC_SEND_WQE_SGE_NUM RC_SEND_WQE_FIELD_LOC(127, 120)
922 #define RC_SEND_WQE_MSG_START_SGE_IDX RC_SEND_WQE_FIELD_LOC(151, 128)
923 #define RC_SEND_WQE_INL_TYPE RC_SEND_WQE_FIELD_LOC(159, 159)
924 
925 struct hns_roce_wqe_frmr_seg {
926 	__le32	pbl_size;
927 	__le32	byte_40;
928 };
929 
930 #define FRMR_WQE_FIELD_LOC(h, l) FIELD_LOC(struct hns_roce_wqe_frmr_seg, h, l)
931 
932 #define FRMR_PBL_SIZE FRMR_WQE_FIELD_LOC(31, 0)
933 #define FRMR_BLOCK_SIZE FRMR_WQE_FIELD_LOC(35, 32)
934 #define FRMR_PBL_BUF_PG_SZ FRMR_WQE_FIELD_LOC(39, 36)
935 #define FRMR_BLK_MODE FRMR_WQE_FIELD_LOC(40, 40)
936 #define FRMR_ZBVA FRMR_WQE_FIELD_LOC(41, 41)
937 #define FRMR_BIND_EN FRMR_WQE_FIELD_LOC(42, 42)
938 #define FRMR_ATOMIC FRMR_WQE_FIELD_LOC(43, 43)
939 #define FRMR_RR FRMR_WQE_FIELD_LOC(44, 44)
940 #define FRMR_RW FRMR_WQE_FIELD_LOC(45, 45)
941 #define FRMR_LW FRMR_WQE_FIELD_LOC(46, 46)
942 
943 struct hns_roce_v2_wqe_data_seg {
944 	__le32    len;
945 	__le32    lkey;
946 	__le64    addr;
947 };
948 
949 struct hns_roce_query_version {
950 	__le16 rocee_vendor_id;
951 	__le16 rocee_hw_version;
952 	__le32 rsv[5];
953 };
954 
955 struct hns_roce_query_fw_info {
956 	__le32 fw_ver;
957 	__le32 rsv[5];
958 };
959 
960 struct hns_roce_func_clear {
961 	__le32 rst_funcid_en;
962 	__le32 func_done;
963 	__le32 rsv[4];
964 };
965 
966 #define FUNC_CLEAR_FIELD_LOC(h, l) FIELD_LOC(struct hns_roce_func_clear, h, l)
967 
968 #define FUNC_CLEAR_RST_FUN_DONE FUNC_CLEAR_FIELD_LOC(32, 32)
969 
970 /* Each physical function manages up to 248 virtual functions, it takes up to
971  * 100ms for each function to execute clear. If an abnormal reset occurs, it is
972  * executed twice at most, so it takes up to 249 * 2 * 100ms.
973  */
974 #define HNS_ROCE_V2_FUNC_CLEAR_TIMEOUT_MSECS	(249 * 2 * 100)
975 #define HNS_ROCE_V2_READ_FUNC_CLEAR_FLAG_INTERVAL	40
976 #define HNS_ROCE_V2_READ_FUNC_CLEAR_FLAG_FAIL_WAIT	20
977 
978 #define CFG_LLM_A_BA_L CMQ_REQ_FIELD_LOC(31, 0)
979 #define CFG_LLM_A_BA_H CMQ_REQ_FIELD_LOC(63, 32)
980 #define CFG_LLM_A_DEPTH CMQ_REQ_FIELD_LOC(76, 64)
981 #define CFG_LLM_A_PGSZ CMQ_REQ_FIELD_LOC(83, 80)
982 #define CFG_LLM_A_INIT_EN CMQ_REQ_FIELD_LOC(84, 84)
983 #define CFG_LLM_A_HEAD_BA_L CMQ_REQ_FIELD_LOC(127, 96)
984 #define CFG_LLM_A_HEAD_BA_H CMQ_REQ_FIELD_LOC(147, 128)
985 #define CFG_LLM_A_HEAD_NXTPTR CMQ_REQ_FIELD_LOC(159, 148)
986 #define CFG_LLM_A_HEAD_PTR CMQ_REQ_FIELD_LOC(171, 160)
987 #define CFG_LLM_B_TAIL_BA_L CMQ_REQ_FIELD_LOC(31, 0)
988 #define CFG_LLM_B_TAIL_BA_H CMQ_REQ_FIELD_LOC(63, 32)
989 #define CFG_LLM_B_TAIL_PTR CMQ_REQ_FIELD_LOC(75, 64)
990 
991 /* Fields of HNS_ROCE_OPC_CFG_GLOBAL_PARAM */
992 #define CFG_GLOBAL_PARAM_1US_CYCLES CMQ_REQ_FIELD_LOC(9, 0)
993 #define CFG_GLOBAL_PARAM_UDP_PORT CMQ_REQ_FIELD_LOC(31, 16)
994 
995 /*
996  * Fields of HNS_ROCE_OPC_QUERY_PF_RES, HNS_ROCE_OPC_QUERY_VF_RES
997  * and HNS_ROCE_OPC_ALLOC_VF_RES
998  */
999 #define FUNC_RES_A_VF_ID CMQ_REQ_FIELD_LOC(7, 0)
1000 #define FUNC_RES_A_QPC_BT_IDX CMQ_REQ_FIELD_LOC(42, 32)
1001 #define FUNC_RES_A_QPC_BT_NUM CMQ_REQ_FIELD_LOC(59, 48)
1002 #define FUNC_RES_A_SRQC_BT_IDX CMQ_REQ_FIELD_LOC(72, 64)
1003 #define FUNC_RES_A_SRQC_BT_NUM CMQ_REQ_FIELD_LOC(89, 80)
1004 #define FUNC_RES_A_CQC_BT_IDX CMQ_REQ_FIELD_LOC(104, 96)
1005 #define FUNC_RES_A_CQC_BT_NUM CMQ_REQ_FIELD_LOC(121, 112)
1006 #define FUNC_RES_A_MPT_BT_IDX CMQ_REQ_FIELD_LOC(136, 128)
1007 #define FUNC_RES_A_MPT_BT_NUM CMQ_REQ_FIELD_LOC(153, 144)
1008 #define FUNC_RES_A_EQC_BT_IDX CMQ_REQ_FIELD_LOC(168, 160)
1009 #define FUNC_RES_A_EQC_BT_NUM CMQ_REQ_FIELD_LOC(185, 176)
1010 #define FUNC_RES_B_SMAC_IDX CMQ_REQ_FIELD_LOC(39, 32)
1011 #define FUNC_RES_B_SMAC_NUM CMQ_REQ_FIELD_LOC(48, 40)
1012 #define FUNC_RES_B_SGID_IDX CMQ_REQ_FIELD_LOC(71, 64)
1013 #define FUNC_RES_B_SGID_NUM CMQ_REQ_FIELD_LOC(80, 72)
1014 #define FUNC_RES_B_QID_IDX CMQ_REQ_FIELD_LOC(105, 96)
1015 #define FUNC_RES_B_QID_NUM CMQ_REQ_FIELD_LOC(122, 112)
1016 #define FUNC_RES_V_QID_NUM CMQ_REQ_FIELD_LOC(115, 112)
1017 
1018 #define FUNC_RES_B_SCCC_BT_IDX CMQ_REQ_FIELD_LOC(136, 128)
1019 #define FUNC_RES_B_SCCC_BT_NUM CMQ_REQ_FIELD_LOC(145, 137)
1020 #define FUNC_RES_B_GMV_BT_IDX CMQ_REQ_FIELD_LOC(167, 160)
1021 #define FUNC_RES_B_GMV_BT_NUM CMQ_REQ_FIELD_LOC(176, 168)
1022 #define FUNC_RES_V_GMV_BT_NUM CMQ_REQ_FIELD_LOC(184, 176)
1023 
1024 /* Fields of HNS_ROCE_OPC_QUERY_PF_TIMER_RES */
1025 #define PF_TIMER_RES_QPC_ITEM_IDX CMQ_REQ_FIELD_LOC(43, 32)
1026 #define PF_TIMER_RES_QPC_ITEM_NUM CMQ_REQ_FIELD_LOC(60, 48)
1027 #define PF_TIMER_RES_CQC_ITEM_IDX CMQ_REQ_FIELD_LOC(74, 64)
1028 #define PF_TIMER_RES_CQC_ITEM_NUM CMQ_REQ_FIELD_LOC(91, 80)
1029 
1030 struct hns_roce_vf_switch {
1031 	__le32 rocee_sel;
1032 	__le32 fun_id;
1033 	__le32 cfg;
1034 	__le32 resv1;
1035 	__le32 resv2;
1036 	__le32 resv3;
1037 };
1038 
1039 #define VF_SWITCH_FIELD_LOC(h, l) FIELD_LOC(struct hns_roce_vf_switch, h, l)
1040 
1041 #define VF_SWITCH_VF_ID VF_SWITCH_FIELD_LOC(42, 35)
1042 #define VF_SWITCH_ALW_LPBK VF_SWITCH_FIELD_LOC(65, 65)
1043 #define VF_SWITCH_ALW_LCL_LPBK VF_SWITCH_FIELD_LOC(66, 66)
1044 #define VF_SWITCH_ALW_DST_OVRD VF_SWITCH_FIELD_LOC(67, 67)
1045 
1046 struct hns_roce_post_mbox {
1047 	__le32	in_param_l;
1048 	__le32	in_param_h;
1049 	__le32	out_param_l;
1050 	__le32	out_param_h;
1051 	__le32	cmd_tag;
1052 	__le32	token_event_en;
1053 };
1054 
1055 struct hns_roce_mbox_status {
1056 	__le32	mb_status_hw_run;
1057 	__le32	rsv[5];
1058 };
1059 
1060 #define HNS_ROCE_V2_GO_BIT_TIMEOUT_MSECS 10000
1061 
1062 #define MB_ST_HW_RUN_M BIT(31)
1063 #define MB_ST_COMPLETE_M GENMASK(7, 0)
1064 
1065 #define MB_ST_COMPLETE_SUCC 1
1066 
1067 /* Fields of HNS_ROCE_OPC_CFG_BT_ATTR */
1068 #define CFG_BT_ATTR_QPC_BA_PGSZ CMQ_REQ_FIELD_LOC(3, 0)
1069 #define CFG_BT_ATTR_QPC_BUF_PGSZ CMQ_REQ_FIELD_LOC(7, 4)
1070 #define CFG_BT_ATTR_QPC_HOPNUM CMQ_REQ_FIELD_LOC(9, 8)
1071 #define CFG_BT_ATTR_SRQC_BA_PGSZ CMQ_REQ_FIELD_LOC(35, 32)
1072 #define CFG_BT_ATTR_SRQC_BUF_PGSZ CMQ_REQ_FIELD_LOC(39, 36)
1073 #define CFG_BT_ATTR_SRQC_HOPNUM CMQ_REQ_FIELD_LOC(41, 40)
1074 #define CFG_BT_ATTR_CQC_BA_PGSZ CMQ_REQ_FIELD_LOC(67, 64)
1075 #define CFG_BT_ATTR_CQC_BUF_PGSZ CMQ_REQ_FIELD_LOC(71, 68)
1076 #define CFG_BT_ATTR_CQC_HOPNUM CMQ_REQ_FIELD_LOC(73, 72)
1077 #define CFG_BT_ATTR_MPT_BA_PGSZ CMQ_REQ_FIELD_LOC(99, 96)
1078 #define CFG_BT_ATTR_MPT_BUF_PGSZ CMQ_REQ_FIELD_LOC(103, 100)
1079 #define CFG_BT_ATTR_MPT_HOPNUM CMQ_REQ_FIELD_LOC(105, 104)
1080 #define CFG_BT_ATTR_SCCC_BA_PGSZ CMQ_REQ_FIELD_LOC(131, 128)
1081 #define CFG_BT_ATTR_SCCC_BUF_PGSZ CMQ_REQ_FIELD_LOC(135, 132)
1082 #define CFG_BT_ATTR_SCCC_HOPNUM CMQ_REQ_FIELD_LOC(137, 136)
1083 
1084 /* Fields of HNS_ROCE_OPC_CFG_ENTRY_SIZE */
1085 #define CFG_HEM_ENTRY_SIZE_TYPE CMQ_REQ_FIELD_LOC(31, 0)
1086 enum {
1087 	HNS_ROCE_CFG_QPC_SIZE = BIT(0),
1088 	HNS_ROCE_CFG_SCCC_SIZE = BIT(1),
1089 };
1090 
1091 #define CFG_HEM_ENTRY_SIZE_VALUE CMQ_REQ_FIELD_LOC(191, 160)
1092 
1093 /* Fields of HNS_ROCE_OPC_CFG_GMV_BT */
1094 #define CFG_GMV_BT_BA_L CMQ_REQ_FIELD_LOC(31, 0)
1095 #define CFG_GMV_BT_BA_H CMQ_REQ_FIELD_LOC(51, 32)
1096 #define CFG_GMV_BT_IDX CMQ_REQ_FIELD_LOC(95, 64)
1097 
1098 /* Fields of HNS_ROCE_QUERY_RAM_ECC */
1099 #define QUERY_RAM_ECC_1BIT_ERR CMQ_REQ_FIELD_LOC(31, 0)
1100 #define QUERY_RAM_ECC_RES_TYPE CMQ_REQ_FIELD_LOC(63, 32)
1101 #define QUERY_RAM_ECC_TAG CMQ_REQ_FIELD_LOC(95, 64)
1102 
1103 struct hns_roce_cfg_sgid_tb {
1104 	__le32	table_idx_rsv;
1105 	__le32	vf_sgid_l;
1106 	__le32	vf_sgid_ml;
1107 	__le32	vf_sgid_mh;
1108 	__le32	vf_sgid_h;
1109 	__le32	vf_sgid_type_rsv;
1110 };
1111 
1112 #define SGID_TB_FIELD_LOC(h, l) FIELD_LOC(struct hns_roce_cfg_sgid_tb, h, l)
1113 
1114 #define CFG_SGID_TB_TABLE_IDX SGID_TB_FIELD_LOC(7, 0)
1115 #define CFG_SGID_TB_VF_SGID_TYPE SGID_TB_FIELD_LOC(161, 160)
1116 
1117 struct hns_roce_cfg_smac_tb {
1118 	__le32	tb_idx_rsv;
1119 	__le32	vf_smac_l;
1120 	__le32	vf_smac_h_rsv;
1121 	__le32	rsv[3];
1122 };
1123 
1124 #define SMAC_TB_FIELD_LOC(h, l) FIELD_LOC(struct hns_roce_cfg_smac_tb, h, l)
1125 
1126 #define CFG_SMAC_TB_IDX SMAC_TB_FIELD_LOC(7, 0)
1127 #define CFG_SMAC_TB_VF_SMAC_H SMAC_TB_FIELD_LOC(79, 64)
1128 
1129 struct hns_roce_cfg_gmv_tb_a {
1130 	__le32 vf_sgid_l;
1131 	__le32 vf_sgid_ml;
1132 	__le32 vf_sgid_mh;
1133 	__le32 vf_sgid_h;
1134 	__le32 vf_sgid_type_vlan;
1135 	__le32 resv;
1136 };
1137 
1138 #define GMV_TB_A_FIELD_LOC(h, l) FIELD_LOC(struct hns_roce_cfg_gmv_tb_a, h, l)
1139 
1140 #define GMV_TB_A_VF_SGID_TYPE GMV_TB_A_FIELD_LOC(129, 128)
1141 #define GMV_TB_A_VF_VLAN_EN GMV_TB_A_FIELD_LOC(130, 130)
1142 #define GMV_TB_A_VF_VLAN_ID GMV_TB_A_FIELD_LOC(155, 144)
1143 
1144 struct hns_roce_cfg_gmv_tb_b {
1145 	__le32	vf_smac_l;
1146 	__le32	vf_smac_h;
1147 	__le32	table_idx_rsv;
1148 	__le32	resv[3];
1149 };
1150 
1151 #define GMV_TB_B_FIELD_LOC(h, l) FIELD_LOC(struct hns_roce_cfg_gmv_tb_b, h, l)
1152 
1153 #define GMV_TB_B_SMAC_H GMV_TB_B_FIELD_LOC(47, 32)
1154 #define GMV_TB_B_SGID_IDX GMV_TB_B_FIELD_LOC(71, 64)
1155 
1156 #define HNS_ROCE_QUERY_PF_CAPS_CMD_NUM 5
1157 struct hns_roce_query_pf_caps_a {
1158 	u8 number_ports;
1159 	u8 local_ca_ack_delay;
1160 	__le16 max_sq_sg;
1161 	__le16 max_sq_inline;
1162 	__le16 max_rq_sg;
1163 	__le32 rsv0;
1164 	__le16 num_qpc_timer;
1165 	__le16 num_cqc_timer;
1166 	__le16 max_srq_sges;
1167 	u8 num_aeq_vectors;
1168 	u8 num_other_vectors;
1169 	u8 max_sq_desc_sz;
1170 	u8 max_rq_desc_sz;
1171 	u8 rsv1;
1172 	u8 cqe_sz;
1173 };
1174 
1175 struct hns_roce_query_pf_caps_b {
1176 	u8 mtpt_entry_sz;
1177 	u8 irrl_entry_sz;
1178 	u8 trrl_entry_sz;
1179 	u8 cqc_entry_sz;
1180 	u8 srqc_entry_sz;
1181 	u8 idx_entry_sz;
1182 	u8 sccc_sz;
1183 	u8 max_mtu;
1184 	__le16 qpc_sz;
1185 	__le16 qpc_timer_entry_sz;
1186 	__le16 cqc_timer_entry_sz;
1187 	u8 min_cqes;
1188 	u8 min_wqes;
1189 	__le32 page_size_cap;
1190 	u8 pkey_table_len;
1191 	u8 phy_num_uars;
1192 	u8 ctx_hop_num;
1193 	u8 pbl_hop_num;
1194 };
1195 
1196 struct hns_roce_query_pf_caps_c {
1197 	__le32 cap_flags_num_pds;
1198 	__le32 max_gid_num_cqs;
1199 	__le32 cq_depth;
1200 	__le32 num_mrws;
1201 	__le32 ord_num_qps;
1202 	__le16 sq_depth;
1203 	__le16 rq_depth;
1204 };
1205 
1206 #define PF_CAPS_C_FIELD_LOC(h, l) \
1207 	FIELD_LOC(struct hns_roce_query_pf_caps_c, h, l)
1208 
1209 #define PF_CAPS_C_NUM_PDS PF_CAPS_C_FIELD_LOC(19, 0)
1210 #define PF_CAPS_C_CAP_FLAGS PF_CAPS_C_FIELD_LOC(31, 20)
1211 #define PF_CAPS_C_NUM_CQS PF_CAPS_C_FIELD_LOC(51, 32)
1212 #define PF_CAPS_C_MAX_GID PF_CAPS_C_FIELD_LOC(60, 52)
1213 #define PF_CAPS_C_CQ_DEPTH PF_CAPS_C_FIELD_LOC(86, 64)
1214 #define PF_CAPS_C_NUM_XRCDS PF_CAPS_C_FIELD_LOC(91, 87)
1215 #define PF_CAPS_C_NUM_MRWS PF_CAPS_C_FIELD_LOC(115, 96)
1216 #define PF_CAPS_C_NUM_QPS PF_CAPS_C_FIELD_LOC(147, 128)
1217 #define PF_CAPS_C_MAX_ORD PF_CAPS_C_FIELD_LOC(155, 148)
1218 
1219 struct hns_roce_query_pf_caps_d {
1220 	__le32 wq_hop_num_max_srqs;
1221 	__le16 srq_depth;
1222 	__le16 cap_flags_ex;
1223 	__le32 num_ceqs_ceq_depth;
1224 	__le32 arm_st_aeq_depth;
1225 	__le32 num_uars_rsv_pds;
1226 	__le32 rsv_uars_rsv_qps;
1227 };
1228 
1229 #define PF_CAPS_D_FIELD_LOC(h, l) \
1230 	FIELD_LOC(struct hns_roce_query_pf_caps_d, h, l)
1231 
1232 #define PF_CAPS_D_NUM_SRQS PF_CAPS_D_FIELD_LOC(19, 0)
1233 #define PF_CAPS_D_RQWQE_HOP_NUM PF_CAPS_D_FIELD_LOC(21, 20)
1234 #define PF_CAPS_D_EX_SGE_HOP_NUM PF_CAPS_D_FIELD_LOC(23, 22)
1235 #define PF_CAPS_D_SQWQE_HOP_NUM PF_CAPS_D_FIELD_LOC(25, 24)
1236 #define PF_CAPS_D_CONG_CAP PF_CAPS_D_FIELD_LOC(29, 26)
1237 #define PF_CAPS_D_CEQ_DEPTH PF_CAPS_D_FIELD_LOC(85, 64)
1238 #define PF_CAPS_D_NUM_CEQS PF_CAPS_D_FIELD_LOC(95, 86)
1239 #define PF_CAPS_D_AEQ_DEPTH PF_CAPS_D_FIELD_LOC(117, 96)
1240 #define PF_CAPS_D_AEQ_ARM_ST PF_CAPS_D_FIELD_LOC(119, 118)
1241 #define PF_CAPS_D_CEQ_ARM_ST PF_CAPS_D_FIELD_LOC(121, 120)
1242 #define PF_CAPS_D_DEFAULT_ALG PF_CAPS_D_FIELD_LOC(127, 122)
1243 #define PF_CAPS_D_RSV_PDS PF_CAPS_D_FIELD_LOC(147, 128)
1244 #define PF_CAPS_D_NUM_UARS PF_CAPS_D_FIELD_LOC(155, 148)
1245 #define PF_CAPS_D_RSV_QPS PF_CAPS_D_FIELD_LOC(179, 160)
1246 #define PF_CAPS_D_RSV_UARS PF_CAPS_D_FIELD_LOC(187, 180)
1247 
1248 #define HNS_ROCE_CAP_FLAGS_EX_SHIFT 12
1249 
1250 struct hns_roce_congestion_algorithm {
1251 	u8 alg_sel;
1252 	u8 alg_sub_sel;
1253 	u8 dip_vld;
1254 	u8 wnd_mode_sel;
1255 };
1256 
1257 struct hns_roce_query_pf_caps_e {
1258 	__le32 chunk_size_shift_rsv_mrws;
1259 	__le32 rsv_cqs;
1260 	__le32 rsv_srqs;
1261 	__le32 rsv_lkey;
1262 	__le16 ceq_max_cnt;
1263 	__le16 ceq_period;
1264 	__le16 aeq_max_cnt;
1265 	__le16 aeq_period;
1266 };
1267 
1268 #define PF_CAPS_E_FIELD_LOC(h, l) \
1269 	FIELD_LOC(struct hns_roce_query_pf_caps_e, h, l)
1270 
1271 #define PF_CAPS_E_RSV_MRWS PF_CAPS_E_FIELD_LOC(19, 0)
1272 #define PF_CAPS_E_CHUNK_SIZE_SHIFT PF_CAPS_E_FIELD_LOC(31, 20)
1273 #define PF_CAPS_E_RSV_CQS PF_CAPS_E_FIELD_LOC(51, 32)
1274 #define PF_CAPS_E_RSV_XRCDS PF_CAPS_E_FIELD_LOC(63, 52)
1275 #define PF_CAPS_E_RSV_SRQS PF_CAPS_E_FIELD_LOC(83, 64)
1276 #define PF_CAPS_E_RSV_LKEYS PF_CAPS_E_FIELD_LOC(115, 96)
1277 
1278 struct hns_roce_cmq_req {
1279 	__le32 data[6];
1280 };
1281 
1282 #define CMQ_REQ_FIELD_LOC(h, l) FIELD_LOC(struct hns_roce_cmq_req, h, l)
1283 
1284 struct hns_roce_cmq_desc {
1285 	__le16 opcode;
1286 	__le16 flag;
1287 	__le16 retval;
1288 	__le16 rsv;
1289 	union {
1290 		__le32 data[6];
1291 		struct {
1292 			__le32 own_func_num;
1293 			__le32 own_mac_id;
1294 			__le32 rsv[4];
1295 		} func_info;
1296 	};
1297 };
1298 
1299 struct hns_roce_v2_cmq_ring {
1300 	dma_addr_t desc_dma_addr;
1301 	struct hns_roce_cmq_desc *desc;
1302 	u32 head;
1303 	u16 buf_size;
1304 	u16 desc_num;
1305 	u8 flag;
1306 	spinlock_t lock; /* command queue lock */
1307 };
1308 
1309 struct hns_roce_v2_cmq {
1310 	struct hns_roce_v2_cmq_ring csq;
1311 	u16 tx_timeout;
1312 };
1313 
1314 struct hns_roce_link_table {
1315 	struct hns_roce_buf_list table;
1316 	struct hns_roce_buf *buf;
1317 };
1318 
1319 #define HNS_ROCE_EXT_LLM_ENTRY(addr, id) (((id) << (64 - 12)) | ((addr) >> 12))
1320 #define HNS_ROCE_EXT_LLM_MIN_PAGES(que_num) ((que_num) * 4 + 2)
1321 
1322 struct hns_roce_v2_free_mr {
1323 	struct hns_roce_qp *rsv_qp[HNS_ROCE_FREE_MR_USED_QP_NUM];
1324 	struct hns_roce_cq *rsv_cq;
1325 	struct hns_roce_pd *rsv_pd;
1326 	struct mutex mutex;
1327 };
1328 
1329 struct hns_roce_v2_priv {
1330 	struct hnae3_handle *handle;
1331 	struct hns_roce_v2_cmq cmq;
1332 	struct hns_roce_link_table ext_llm;
1333 	struct hns_roce_v2_free_mr free_mr;
1334 };
1335 
1336 struct hns_roce_dip {
1337 	u8 dgid[GID_LEN_V2];
1338 	u32 dip_idx;
1339 	struct list_head node; /* all dips are on a list */
1340 };
1341 
1342 struct fmea_ram_ecc {
1343 	u32	is_ecc_err;
1344 	u32	res_type;
1345 	u32	index;
1346 };
1347 
1348 /* only for RNR timeout issue of HIP08 */
1349 #define HNS_ROCE_CLOCK_ADJUST 1000
1350 #define HNS_ROCE_MAX_CQ_PERIOD_HIP08 65
1351 #define HNS_ROCE_MAX_EQ_PERIOD 65
1352 #define HNS_ROCE_RNR_TIMER_10NS 1
1353 #define HNS_ROCE_1US_CFG 999
1354 #define HNS_ROCE_1NS_CFG 0
1355 
1356 #define HNS_ROCE_AEQ_DEFAULT_BURST_NUM	0x0
1357 #define HNS_ROCE_AEQ_DEFAULT_INTERVAL	0x0
1358 #define HNS_ROCE_CEQ_DEFAULT_BURST_NUM	0x0
1359 #define HNS_ROCE_CEQ_DEFAULT_INTERVAL	0x0
1360 
1361 #define HNS_ROCE_V2_EQ_STATE_INVALID		0
1362 #define HNS_ROCE_V2_EQ_STATE_VALID		1
1363 #define HNS_ROCE_V2_EQ_STATE_OVERFLOW		2
1364 #define HNS_ROCE_V2_EQ_STATE_FAILURE		3
1365 
1366 #define HNS_ROCE_V2_EQ_OVER_IGNORE_0		0
1367 #define HNS_ROCE_V2_EQ_OVER_IGNORE_1		1
1368 
1369 #define HNS_ROCE_V2_EQ_COALESCE_0		0
1370 #define HNS_ROCE_V2_EQ_COALESCE_1		1
1371 
1372 #define HNS_ROCE_V2_EQ_FIRED			0
1373 #define HNS_ROCE_V2_EQ_ARMED			1
1374 #define HNS_ROCE_V2_EQ_ALWAYS_ARMED		3
1375 
1376 #define HNS_ROCE_EQ_INIT_EQE_CNT		0
1377 #define HNS_ROCE_EQ_INIT_PROD_IDX		0
1378 #define HNS_ROCE_EQ_INIT_REPORT_TIMER		0
1379 #define HNS_ROCE_EQ_INIT_MSI_IDX		0
1380 #define HNS_ROCE_EQ_INIT_CONS_IDX		0
1381 #define HNS_ROCE_EQ_INIT_NXT_EQE_BA		0
1382 
1383 #define HNS_ROCE_V2_COMP_EQE_NUM		0x1000
1384 #define HNS_ROCE_V2_ASYNC_EQE_NUM		0x1000
1385 
1386 #define HNS_ROCE_V2_VF_INT_ST_AEQ_OVERFLOW_S	0
1387 
1388 #define HNS_ROCE_EQ_DB_CMD_AEQ			0x0
1389 #define HNS_ROCE_EQ_DB_CMD_AEQ_ARMED		0x1
1390 #define HNS_ROCE_EQ_DB_CMD_CEQ			0x2
1391 #define HNS_ROCE_EQ_DB_CMD_CEQ_ARMED		0x3
1392 
1393 #define EQ_ENABLE				1
1394 #define EQ_DISABLE				0
1395 
1396 #define EQ_REG_OFFSET				0x4
1397 
1398 #define HNS_ROCE_INT_NAME_LEN			32
1399 #define HNS_ROCE_V2_EQN_M GENMASK(23, 0)
1400 
1401 #define HNS_ROCE_V2_VF_ABN_INT_EN_S 0
1402 #define HNS_ROCE_V2_VF_ABN_INT_EN_M GENMASK(0, 0)
1403 #define HNS_ROCE_V2_VF_ABN_INT_ST_M GENMASK(2, 0)
1404 #define HNS_ROCE_V2_VF_ABN_INT_CFG_M GENMASK(2, 0)
1405 #define HNS_ROCE_V2_VF_EVENT_INT_EN_M GENMASK(0, 0)
1406 
1407 struct hns_roce_eq_context {
1408 	__le32	data[16];
1409 };
1410 
1411 #define EQC_FIELD_LOC(h, l) FIELD_LOC(struct hns_roce_eq_context, h, l)
1412 
1413 #define EQC_EQ_ST EQC_FIELD_LOC(1, 0)
1414 #define EQC_EQE_HOP_NUM EQC_FIELD_LOC(3, 2)
1415 #define EQC_OVER_IGNORE EQC_FIELD_LOC(4, 4)
1416 #define EQC_COALESCE EQC_FIELD_LOC(5, 5)
1417 #define EQC_ARM_ST EQC_FIELD_LOC(7, 6)
1418 #define EQC_EQN EQC_FIELD_LOC(15, 8)
1419 #define EQC_EQE_CNT EQC_FIELD_LOC(31, 16)
1420 #define EQC_EQE_BA_PG_SZ EQC_FIELD_LOC(35, 32)
1421 #define EQC_EQE_BUF_PG_SZ EQC_FIELD_LOC(39, 36)
1422 #define EQC_EQ_PROD_INDX EQC_FIELD_LOC(63, 40)
1423 #define EQC_EQ_MAX_CNT EQC_FIELD_LOC(79, 64)
1424 #define EQC_EQ_PERIOD EQC_FIELD_LOC(95, 80)
1425 #define EQC_EQE_REPORT_TIMER EQC_FIELD_LOC(127, 96)
1426 #define EQC_EQE_BA_L EQC_FIELD_LOC(159, 128)
1427 #define EQC_EQE_BA_H EQC_FIELD_LOC(188, 160)
1428 #define EQC_SHIFT EQC_FIELD_LOC(199, 192)
1429 #define EQC_MSI_INDX EQC_FIELD_LOC(207, 200)
1430 #define EQC_CUR_EQE_BA_L EQC_FIELD_LOC(223, 208)
1431 #define EQC_CUR_EQE_BA_M EQC_FIELD_LOC(255, 224)
1432 #define EQC_CUR_EQE_BA_H EQC_FIELD_LOC(259, 256)
1433 #define EQC_EQ_CONS_INDX EQC_FIELD_LOC(287, 264)
1434 #define EQC_NEX_EQE_BA_L EQC_FIELD_LOC(319, 288)
1435 #define EQC_NEX_EQE_BA_H EQC_FIELD_LOC(339, 320)
1436 #define EQC_EQE_SIZE EQC_FIELD_LOC(341, 340)
1437 
1438 #define MAX_SERVICE_LEVEL 0x7
1439 
1440 struct hns_roce_wqe_atomic_seg {
1441 	__le64          fetchadd_swap_data;
1442 	__le64          cmp_data;
1443 };
1444 
1445 struct hns_roce_sccc_clr {
1446 	__le32 qpn;
1447 	__le32 rsv[5];
1448 };
1449 
1450 struct hns_roce_sccc_clr_done {
1451 	__le32 clr_done;
1452 	__le32 rsv[5];
1453 };
1454 
1455 int hns_roce_v2_destroy_qp(struct ib_qp *ibqp, struct ib_udata *udata);
1456 
1457 static inline void hns_roce_write64(struct hns_roce_dev *hr_dev, __le32 val[2],
1458 				    void __iomem *dest)
1459 {
1460 	struct hns_roce_v2_priv *priv = hr_dev->priv;
1461 	struct hnae3_handle *handle = priv->handle;
1462 	const struct hnae3_ae_ops *ops = handle->ae_algo->ops;
1463 
1464 	if (!hr_dev->dis_db && !ops->get_hw_reset_stat(handle))
1465 		hns_roce_write64_k(val, dest);
1466 }
1467 
1468 #endif
1469