1 /* 2 * Copyright (c) 2016 Hisilicon Limited. 3 * 4 * This software is available to you under a choice of one of two 5 * licenses. You may choose to be licensed under the terms of the GNU 6 * General Public License (GPL) Version 2, available from the file 7 * COPYING in the main directory of this source tree, or the 8 * OpenIB.org BSD license below: 9 * 10 * Redistribution and use in source and binary forms, with or 11 * without modification, are permitted provided that the following 12 * conditions are met: 13 * 14 * - Redistributions of source code must retain the above 15 * copyright notice, this list of conditions and the following 16 * disclaimer. 17 * 18 * - Redistributions in binary form must reproduce the above 19 * copyright notice, this list of conditions and the following 20 * disclaimer in the documentation and/or other materials 21 * provided with the distribution. 22 * 23 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, 24 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF 25 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND 26 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS 27 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN 28 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN 29 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE 30 * SOFTWARE. 31 */ 32 33 #include <linux/platform_device.h> 34 #include <rdma/ib_umem.h> 35 #include <rdma/uverbs_ioctl.h> 36 #include "hns_roce_device.h" 37 #include "hns_roce_cmd.h" 38 #include "hns_roce_hem.h" 39 #include "hns_roce_common.h" 40 41 static int alloc_cqc(struct hns_roce_dev *hr_dev, struct hns_roce_cq *hr_cq) 42 { 43 struct ib_device *ibdev = &hr_dev->ib_dev; 44 struct hns_roce_cmd_mailbox *mailbox; 45 struct hns_roce_cq_table *cq_table; 46 u64 mtts[MTT_MIN_COUNT] = { 0 }; 47 dma_addr_t dma_handle; 48 int ret; 49 50 ret = hns_roce_mtr_find(hr_dev, &hr_cq->mtr, 0, mtts, ARRAY_SIZE(mtts), 51 &dma_handle); 52 if (!ret) { 53 ibdev_err(ibdev, "failed to find CQ mtr, ret = %d.\n", ret); 54 return -EINVAL; 55 } 56 57 cq_table = &hr_dev->cq_table; 58 ret = hns_roce_bitmap_alloc(&cq_table->bitmap, &hr_cq->cqn); 59 if (ret) { 60 ibdev_err(ibdev, "failed to alloc CQ bitmap, ret = %d.\n", ret); 61 return ret; 62 } 63 64 /* Get CQC memory HEM(Hardware Entry Memory) table */ 65 ret = hns_roce_table_get(hr_dev, &cq_table->table, hr_cq->cqn); 66 if (ret) { 67 ibdev_err(ibdev, "failed to get CQ(0x%lx) context, ret = %d.\n", 68 hr_cq->cqn, ret); 69 goto err_out; 70 } 71 72 ret = xa_err(xa_store(&cq_table->array, hr_cq->cqn, hr_cq, GFP_KERNEL)); 73 if (ret) { 74 ibdev_err(ibdev, "failed to xa_store CQ, ret = %d.\n", ret); 75 goto err_put; 76 } 77 78 /* Allocate mailbox memory */ 79 mailbox = hns_roce_alloc_cmd_mailbox(hr_dev); 80 if (IS_ERR(mailbox)) { 81 ret = PTR_ERR(mailbox); 82 goto err_xa; 83 } 84 85 hr_dev->hw->write_cqc(hr_dev, hr_cq, mailbox->buf, mtts, dma_handle); 86 87 /* Send mailbox to hw */ 88 ret = hns_roce_cmd_mbox(hr_dev, mailbox->dma, 0, hr_cq->cqn, 0, 89 HNS_ROCE_CMD_CREATE_CQC, HNS_ROCE_CMD_TIMEOUT_MSECS); 90 hns_roce_free_cmd_mailbox(hr_dev, mailbox); 91 if (ret) { 92 ibdev_err(ibdev, 93 "failed to send create cmd for CQ(0x%lx), ret = %d.\n", 94 hr_cq->cqn, ret); 95 goto err_xa; 96 } 97 98 hr_cq->cons_index = 0; 99 hr_cq->arm_sn = 1; 100 101 atomic_set(&hr_cq->refcount, 1); 102 init_completion(&hr_cq->free); 103 104 return 0; 105 106 err_xa: 107 xa_erase(&cq_table->array, hr_cq->cqn); 108 109 err_put: 110 hns_roce_table_put(hr_dev, &cq_table->table, hr_cq->cqn); 111 112 err_out: 113 hns_roce_bitmap_free(&cq_table->bitmap, hr_cq->cqn, BITMAP_NO_RR); 114 return ret; 115 } 116 117 static void free_cqc(struct hns_roce_dev *hr_dev, struct hns_roce_cq *hr_cq) 118 { 119 struct hns_roce_cq_table *cq_table = &hr_dev->cq_table; 120 struct device *dev = hr_dev->dev; 121 int ret; 122 123 ret = hns_roce_cmd_mbox(hr_dev, 0, 0, hr_cq->cqn, 1, 124 HNS_ROCE_CMD_DESTROY_CQC, 125 HNS_ROCE_CMD_TIMEOUT_MSECS); 126 if (ret) 127 dev_err(dev, "DESTROY_CQ failed (%d) for CQN %06lx\n", ret, 128 hr_cq->cqn); 129 130 xa_erase(&cq_table->array, hr_cq->cqn); 131 132 /* Waiting interrupt process procedure carried out */ 133 synchronize_irq(hr_dev->eq_table.eq[hr_cq->vector].irq); 134 135 /* wait for all interrupt processed */ 136 if (atomic_dec_and_test(&hr_cq->refcount)) 137 complete(&hr_cq->free); 138 wait_for_completion(&hr_cq->free); 139 140 hns_roce_table_put(hr_dev, &cq_table->table, hr_cq->cqn); 141 hns_roce_bitmap_free(&cq_table->bitmap, hr_cq->cqn, BITMAP_NO_RR); 142 } 143 144 static int alloc_cq_buf(struct hns_roce_dev *hr_dev, struct hns_roce_cq *hr_cq, 145 struct ib_udata *udata, unsigned long addr) 146 { 147 struct ib_device *ibdev = &hr_dev->ib_dev; 148 struct hns_roce_buf_attr buf_attr = {}; 149 int ret; 150 151 buf_attr.page_shift = hr_dev->caps.cqe_buf_pg_sz + HNS_HW_PAGE_SHIFT; 152 buf_attr.region[0].size = hr_cq->cq_depth * hr_cq->cqe_size; 153 buf_attr.region[0].hopnum = hr_dev->caps.cqe_hop_num; 154 buf_attr.region_count = 1; 155 buf_attr.fixed_page = true; 156 157 ret = hns_roce_mtr_create(hr_dev, &hr_cq->mtr, &buf_attr, 158 hr_dev->caps.cqe_ba_pg_sz + HNS_HW_PAGE_SHIFT, 159 udata, addr); 160 if (ret) 161 ibdev_err(ibdev, "failed to alloc CQ mtr, ret = %d.\n", ret); 162 163 return ret; 164 } 165 166 static void free_cq_buf(struct hns_roce_dev *hr_dev, struct hns_roce_cq *hr_cq) 167 { 168 hns_roce_mtr_destroy(hr_dev, &hr_cq->mtr); 169 } 170 171 static int alloc_cq_db(struct hns_roce_dev *hr_dev, struct hns_roce_cq *hr_cq, 172 struct ib_udata *udata, unsigned long addr, 173 struct hns_roce_ib_create_cq_resp *resp) 174 { 175 bool has_db = hr_dev->caps.flags & HNS_ROCE_CAP_FLAG_RECORD_DB; 176 struct hns_roce_ucontext *uctx; 177 int err; 178 179 if (udata) { 180 if (has_db && 181 udata->outlen >= offsetofend(typeof(*resp), cap_flags)) { 182 uctx = rdma_udata_to_drv_context(udata, 183 struct hns_roce_ucontext, ibucontext); 184 err = hns_roce_db_map_user(uctx, udata, addr, 185 &hr_cq->db); 186 if (err) 187 return err; 188 hr_cq->flags |= HNS_ROCE_CQ_FLAG_RECORD_DB; 189 resp->cap_flags |= HNS_ROCE_CQ_FLAG_RECORD_DB; 190 } 191 } else { 192 if (has_db) { 193 err = hns_roce_alloc_db(hr_dev, &hr_cq->db, 1); 194 if (err) 195 return err; 196 hr_cq->set_ci_db = hr_cq->db.db_record; 197 *hr_cq->set_ci_db = 0; 198 hr_cq->flags |= HNS_ROCE_CQ_FLAG_RECORD_DB; 199 } 200 hr_cq->cq_db_l = hr_dev->reg_base + hr_dev->odb_offset + 201 DB_REG_OFFSET * hr_dev->priv_uar.index; 202 } 203 204 return 0; 205 } 206 207 static void free_cq_db(struct hns_roce_dev *hr_dev, struct hns_roce_cq *hr_cq, 208 struct ib_udata *udata) 209 { 210 struct hns_roce_ucontext *uctx; 211 212 if (!(hr_cq->flags & HNS_ROCE_CQ_FLAG_RECORD_DB)) 213 return; 214 215 hr_cq->flags &= ~HNS_ROCE_CQ_FLAG_RECORD_DB; 216 if (udata) { 217 uctx = rdma_udata_to_drv_context(udata, 218 struct hns_roce_ucontext, 219 ibucontext); 220 hns_roce_db_unmap_user(uctx, &hr_cq->db); 221 } else { 222 hns_roce_free_db(hr_dev, &hr_cq->db); 223 } 224 } 225 226 static void set_cqe_size(struct hns_roce_cq *hr_cq, struct ib_udata *udata, 227 struct hns_roce_ib_create_cq *ucmd) 228 { 229 struct hns_roce_dev *hr_dev = to_hr_dev(hr_cq->ib_cq.device); 230 231 if (udata) { 232 if (udata->inlen >= offsetofend(typeof(*ucmd), cqe_size)) 233 hr_cq->cqe_size = ucmd->cqe_size; 234 else 235 hr_cq->cqe_size = HNS_ROCE_V2_CQE_SIZE; 236 } else { 237 hr_cq->cqe_size = hr_dev->caps.cqe_sz; 238 } 239 } 240 241 int hns_roce_create_cq(struct ib_cq *ib_cq, const struct ib_cq_init_attr *attr, 242 struct ib_udata *udata) 243 { 244 struct hns_roce_dev *hr_dev = to_hr_dev(ib_cq->device); 245 struct hns_roce_ib_create_cq_resp resp = {}; 246 struct hns_roce_cq *hr_cq = to_hr_cq(ib_cq); 247 struct ib_device *ibdev = &hr_dev->ib_dev; 248 struct hns_roce_ib_create_cq ucmd = {}; 249 int vector = attr->comp_vector; 250 u32 cq_entries = attr->cqe; 251 int ret; 252 253 if (attr->flags) 254 return -EOPNOTSUPP; 255 256 if (cq_entries < 1 || cq_entries > hr_dev->caps.max_cqes) { 257 ibdev_err(ibdev, "failed to check CQ count %u, max = %u.\n", 258 cq_entries, hr_dev->caps.max_cqes); 259 return -EINVAL; 260 } 261 262 if (vector >= hr_dev->caps.num_comp_vectors) { 263 ibdev_err(ibdev, "failed to check CQ vector = %d, max = %d.\n", 264 vector, hr_dev->caps.num_comp_vectors); 265 return -EINVAL; 266 } 267 268 cq_entries = max(cq_entries, hr_dev->caps.min_cqes); 269 cq_entries = roundup_pow_of_two(cq_entries); 270 hr_cq->ib_cq.cqe = cq_entries - 1; /* used as cqe index */ 271 hr_cq->cq_depth = cq_entries; 272 hr_cq->vector = vector; 273 spin_lock_init(&hr_cq->lock); 274 INIT_LIST_HEAD(&hr_cq->sq_list); 275 INIT_LIST_HEAD(&hr_cq->rq_list); 276 277 if (udata) { 278 ret = ib_copy_from_udata(&ucmd, udata, 279 min(udata->inlen, sizeof(ucmd))); 280 if (ret) { 281 ibdev_err(ibdev, "failed to copy CQ udata, ret = %d.\n", 282 ret); 283 return ret; 284 } 285 } 286 287 set_cqe_size(hr_cq, udata, &ucmd); 288 289 ret = alloc_cq_buf(hr_dev, hr_cq, udata, ucmd.buf_addr); 290 if (ret) { 291 ibdev_err(ibdev, "failed to alloc CQ buf, ret = %d.\n", ret); 292 return ret; 293 } 294 295 ret = alloc_cq_db(hr_dev, hr_cq, udata, ucmd.db_addr, &resp); 296 if (ret) { 297 ibdev_err(ibdev, "failed to alloc CQ db, ret = %d.\n", ret); 298 goto err_cq_buf; 299 } 300 301 ret = alloc_cqc(hr_dev, hr_cq); 302 if (ret) { 303 ibdev_err(ibdev, 304 "failed to alloc CQ context, ret = %d.\n", ret); 305 goto err_cq_db; 306 } 307 308 /* 309 * For the QP created by kernel space, tptr value should be initialized 310 * to zero; For the QP created by user space, it will cause synchronous 311 * problems if tptr is set to zero here, so we initialize it in user 312 * space. 313 */ 314 if (!udata && hr_cq->tptr_addr) 315 *hr_cq->tptr_addr = 0; 316 317 if (udata) { 318 resp.cqn = hr_cq->cqn; 319 ret = ib_copy_to_udata(udata, &resp, 320 min(udata->outlen, sizeof(resp))); 321 if (ret) 322 goto err_cqc; 323 } 324 325 return 0; 326 327 err_cqc: 328 free_cqc(hr_dev, hr_cq); 329 err_cq_db: 330 free_cq_db(hr_dev, hr_cq, udata); 331 err_cq_buf: 332 free_cq_buf(hr_dev, hr_cq); 333 return ret; 334 } 335 336 int hns_roce_destroy_cq(struct ib_cq *ib_cq, struct ib_udata *udata) 337 { 338 struct hns_roce_dev *hr_dev = to_hr_dev(ib_cq->device); 339 struct hns_roce_cq *hr_cq = to_hr_cq(ib_cq); 340 341 if (hr_dev->hw->destroy_cq) 342 hr_dev->hw->destroy_cq(ib_cq, udata); 343 344 free_cq_buf(hr_dev, hr_cq); 345 free_cq_db(hr_dev, hr_cq, udata); 346 free_cqc(hr_dev, hr_cq); 347 return 0; 348 } 349 350 void hns_roce_cq_completion(struct hns_roce_dev *hr_dev, u32 cqn) 351 { 352 struct hns_roce_cq *hr_cq; 353 struct ib_cq *ibcq; 354 355 hr_cq = xa_load(&hr_dev->cq_table.array, 356 cqn & (hr_dev->caps.num_cqs - 1)); 357 if (!hr_cq) { 358 dev_warn(hr_dev->dev, "Completion event for bogus CQ 0x%06x\n", 359 cqn); 360 return; 361 } 362 363 ++hr_cq->arm_sn; 364 ibcq = &hr_cq->ib_cq; 365 if (ibcq->comp_handler) 366 ibcq->comp_handler(ibcq, ibcq->cq_context); 367 } 368 369 void hns_roce_cq_event(struct hns_roce_dev *hr_dev, u32 cqn, int event_type) 370 { 371 struct device *dev = hr_dev->dev; 372 struct hns_roce_cq *hr_cq; 373 struct ib_event event; 374 struct ib_cq *ibcq; 375 376 hr_cq = xa_load(&hr_dev->cq_table.array, 377 cqn & (hr_dev->caps.num_cqs - 1)); 378 if (!hr_cq) { 379 dev_warn(dev, "Async event for bogus CQ 0x%06x\n", cqn); 380 return; 381 } 382 383 if (event_type != HNS_ROCE_EVENT_TYPE_CQ_ID_INVALID && 384 event_type != HNS_ROCE_EVENT_TYPE_CQ_ACCESS_ERROR && 385 event_type != HNS_ROCE_EVENT_TYPE_CQ_OVERFLOW) { 386 dev_err(dev, "Unexpected event type 0x%x on CQ 0x%06x\n", 387 event_type, cqn); 388 return; 389 } 390 391 atomic_inc(&hr_cq->refcount); 392 393 ibcq = &hr_cq->ib_cq; 394 if (ibcq->event_handler) { 395 event.device = ibcq->device; 396 event.element.cq = ibcq; 397 event.event = IB_EVENT_CQ_ERR; 398 ibcq->event_handler(&event, ibcq->cq_context); 399 } 400 401 if (atomic_dec_and_test(&hr_cq->refcount)) 402 complete(&hr_cq->free); 403 } 404 405 int hns_roce_init_cq_table(struct hns_roce_dev *hr_dev) 406 { 407 struct hns_roce_cq_table *cq_table = &hr_dev->cq_table; 408 409 xa_init(&cq_table->array); 410 411 return hns_roce_bitmap_init(&cq_table->bitmap, hr_dev->caps.num_cqs, 412 hr_dev->caps.num_cqs - 1, 413 hr_dev->caps.reserved_cqs, 0); 414 } 415 416 void hns_roce_cleanup_cq_table(struct hns_roce_dev *hr_dev) 417 { 418 hns_roce_bitmap_cleanup(&hr_dev->cq_table.bitmap); 419 } 420