1*f48ad614SDennis Dalessandro /* 2*f48ad614SDennis Dalessandro * Copyright(c) 2015, 2016 Intel Corporation. 3*f48ad614SDennis Dalessandro * 4*f48ad614SDennis Dalessandro * This file is provided under a dual BSD/GPLv2 license. When using or 5*f48ad614SDennis Dalessandro * redistributing this file, you may do so under either license. 6*f48ad614SDennis Dalessandro * 7*f48ad614SDennis Dalessandro * GPL LICENSE SUMMARY 8*f48ad614SDennis Dalessandro * 9*f48ad614SDennis Dalessandro * This program is free software; you can redistribute it and/or modify 10*f48ad614SDennis Dalessandro * it under the terms of version 2 of the GNU General Public License as 11*f48ad614SDennis Dalessandro * published by the Free Software Foundation. 12*f48ad614SDennis Dalessandro * 13*f48ad614SDennis Dalessandro * This program is distributed in the hope that it will be useful, but 14*f48ad614SDennis Dalessandro * WITHOUT ANY WARRANTY; without even the implied warranty of 15*f48ad614SDennis Dalessandro * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU 16*f48ad614SDennis Dalessandro * General Public License for more details. 17*f48ad614SDennis Dalessandro * 18*f48ad614SDennis Dalessandro * BSD LICENSE 19*f48ad614SDennis Dalessandro * 20*f48ad614SDennis Dalessandro * Redistribution and use in source and binary forms, with or without 21*f48ad614SDennis Dalessandro * modification, are permitted provided that the following conditions 22*f48ad614SDennis Dalessandro * are met: 23*f48ad614SDennis Dalessandro * 24*f48ad614SDennis Dalessandro * - Redistributions of source code must retain the above copyright 25*f48ad614SDennis Dalessandro * notice, this list of conditions and the following disclaimer. 26*f48ad614SDennis Dalessandro * - Redistributions in binary form must reproduce the above copyright 27*f48ad614SDennis Dalessandro * notice, this list of conditions and the following disclaimer in 28*f48ad614SDennis Dalessandro * the documentation and/or other materials provided with the 29*f48ad614SDennis Dalessandro * distribution. 30*f48ad614SDennis Dalessandro * - Neither the name of Intel Corporation nor the names of its 31*f48ad614SDennis Dalessandro * contributors may be used to endorse or promote products derived 32*f48ad614SDennis Dalessandro * from this software without specific prior written permission. 33*f48ad614SDennis Dalessandro * 34*f48ad614SDennis Dalessandro * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 35*f48ad614SDennis Dalessandro * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 36*f48ad614SDennis Dalessandro * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 37*f48ad614SDennis Dalessandro * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 38*f48ad614SDennis Dalessandro * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 39*f48ad614SDennis Dalessandro * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 40*f48ad614SDennis Dalessandro * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 41*f48ad614SDennis Dalessandro * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 42*f48ad614SDennis Dalessandro * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 43*f48ad614SDennis Dalessandro * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 44*f48ad614SDennis Dalessandro * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 45*f48ad614SDennis Dalessandro * 46*f48ad614SDennis Dalessandro */ 47*f48ad614SDennis Dalessandro 48*f48ad614SDennis Dalessandro #include <linux/net.h> 49*f48ad614SDennis Dalessandro #include <rdma/ib_smi.h> 50*f48ad614SDennis Dalessandro 51*f48ad614SDennis Dalessandro #include "hfi.h" 52*f48ad614SDennis Dalessandro #include "mad.h" 53*f48ad614SDennis Dalessandro #include "verbs_txreq.h" 54*f48ad614SDennis Dalessandro #include "qp.h" 55*f48ad614SDennis Dalessandro 56*f48ad614SDennis Dalessandro /** 57*f48ad614SDennis Dalessandro * ud_loopback - handle send on loopback QPs 58*f48ad614SDennis Dalessandro * @sqp: the sending QP 59*f48ad614SDennis Dalessandro * @swqe: the send work request 60*f48ad614SDennis Dalessandro * 61*f48ad614SDennis Dalessandro * This is called from hfi1_make_ud_req() to forward a WQE addressed 62*f48ad614SDennis Dalessandro * to the same HFI. 63*f48ad614SDennis Dalessandro * Note that the receive interrupt handler may be calling hfi1_ud_rcv() 64*f48ad614SDennis Dalessandro * while this is being called. 65*f48ad614SDennis Dalessandro */ 66*f48ad614SDennis Dalessandro static void ud_loopback(struct rvt_qp *sqp, struct rvt_swqe *swqe) 67*f48ad614SDennis Dalessandro { 68*f48ad614SDennis Dalessandro struct hfi1_ibport *ibp = to_iport(sqp->ibqp.device, sqp->port_num); 69*f48ad614SDennis Dalessandro struct hfi1_pportdata *ppd; 70*f48ad614SDennis Dalessandro struct rvt_qp *qp; 71*f48ad614SDennis Dalessandro struct ib_ah_attr *ah_attr; 72*f48ad614SDennis Dalessandro unsigned long flags; 73*f48ad614SDennis Dalessandro struct rvt_sge_state ssge; 74*f48ad614SDennis Dalessandro struct rvt_sge *sge; 75*f48ad614SDennis Dalessandro struct ib_wc wc; 76*f48ad614SDennis Dalessandro u32 length; 77*f48ad614SDennis Dalessandro enum ib_qp_type sqptype, dqptype; 78*f48ad614SDennis Dalessandro 79*f48ad614SDennis Dalessandro rcu_read_lock(); 80*f48ad614SDennis Dalessandro 81*f48ad614SDennis Dalessandro qp = rvt_lookup_qpn(ib_to_rvt(sqp->ibqp.device), &ibp->rvp, 82*f48ad614SDennis Dalessandro swqe->ud_wr.remote_qpn); 83*f48ad614SDennis Dalessandro if (!qp) { 84*f48ad614SDennis Dalessandro ibp->rvp.n_pkt_drops++; 85*f48ad614SDennis Dalessandro rcu_read_unlock(); 86*f48ad614SDennis Dalessandro return; 87*f48ad614SDennis Dalessandro } 88*f48ad614SDennis Dalessandro 89*f48ad614SDennis Dalessandro sqptype = sqp->ibqp.qp_type == IB_QPT_GSI ? 90*f48ad614SDennis Dalessandro IB_QPT_UD : sqp->ibqp.qp_type; 91*f48ad614SDennis Dalessandro dqptype = qp->ibqp.qp_type == IB_QPT_GSI ? 92*f48ad614SDennis Dalessandro IB_QPT_UD : qp->ibqp.qp_type; 93*f48ad614SDennis Dalessandro 94*f48ad614SDennis Dalessandro if (dqptype != sqptype || 95*f48ad614SDennis Dalessandro !(ib_rvt_state_ops[qp->state] & RVT_PROCESS_RECV_OK)) { 96*f48ad614SDennis Dalessandro ibp->rvp.n_pkt_drops++; 97*f48ad614SDennis Dalessandro goto drop; 98*f48ad614SDennis Dalessandro } 99*f48ad614SDennis Dalessandro 100*f48ad614SDennis Dalessandro ah_attr = &ibah_to_rvtah(swqe->ud_wr.ah)->attr; 101*f48ad614SDennis Dalessandro ppd = ppd_from_ibp(ibp); 102*f48ad614SDennis Dalessandro 103*f48ad614SDennis Dalessandro if (qp->ibqp.qp_num > 1) { 104*f48ad614SDennis Dalessandro u16 pkey; 105*f48ad614SDennis Dalessandro u16 slid; 106*f48ad614SDennis Dalessandro u8 sc5 = ibp->sl_to_sc[ah_attr->sl]; 107*f48ad614SDennis Dalessandro 108*f48ad614SDennis Dalessandro pkey = hfi1_get_pkey(ibp, sqp->s_pkey_index); 109*f48ad614SDennis Dalessandro slid = ppd->lid | (ah_attr->src_path_bits & 110*f48ad614SDennis Dalessandro ((1 << ppd->lmc) - 1)); 111*f48ad614SDennis Dalessandro if (unlikely(ingress_pkey_check(ppd, pkey, sc5, 112*f48ad614SDennis Dalessandro qp->s_pkey_index, slid))) { 113*f48ad614SDennis Dalessandro hfi1_bad_pqkey(ibp, OPA_TRAP_BAD_P_KEY, pkey, 114*f48ad614SDennis Dalessandro ah_attr->sl, 115*f48ad614SDennis Dalessandro sqp->ibqp.qp_num, qp->ibqp.qp_num, 116*f48ad614SDennis Dalessandro slid, ah_attr->dlid); 117*f48ad614SDennis Dalessandro goto drop; 118*f48ad614SDennis Dalessandro } 119*f48ad614SDennis Dalessandro } 120*f48ad614SDennis Dalessandro 121*f48ad614SDennis Dalessandro /* 122*f48ad614SDennis Dalessandro * Check that the qkey matches (except for QP0, see 9.6.1.4.1). 123*f48ad614SDennis Dalessandro * Qkeys with the high order bit set mean use the 124*f48ad614SDennis Dalessandro * qkey from the QP context instead of the WR (see 10.2.5). 125*f48ad614SDennis Dalessandro */ 126*f48ad614SDennis Dalessandro if (qp->ibqp.qp_num) { 127*f48ad614SDennis Dalessandro u32 qkey; 128*f48ad614SDennis Dalessandro 129*f48ad614SDennis Dalessandro qkey = (int)swqe->ud_wr.remote_qkey < 0 ? 130*f48ad614SDennis Dalessandro sqp->qkey : swqe->ud_wr.remote_qkey; 131*f48ad614SDennis Dalessandro if (unlikely(qkey != qp->qkey)) { 132*f48ad614SDennis Dalessandro u16 lid; 133*f48ad614SDennis Dalessandro 134*f48ad614SDennis Dalessandro lid = ppd->lid | (ah_attr->src_path_bits & 135*f48ad614SDennis Dalessandro ((1 << ppd->lmc) - 1)); 136*f48ad614SDennis Dalessandro hfi1_bad_pqkey(ibp, OPA_TRAP_BAD_Q_KEY, qkey, 137*f48ad614SDennis Dalessandro ah_attr->sl, 138*f48ad614SDennis Dalessandro sqp->ibqp.qp_num, qp->ibqp.qp_num, 139*f48ad614SDennis Dalessandro lid, 140*f48ad614SDennis Dalessandro ah_attr->dlid); 141*f48ad614SDennis Dalessandro goto drop; 142*f48ad614SDennis Dalessandro } 143*f48ad614SDennis Dalessandro } 144*f48ad614SDennis Dalessandro 145*f48ad614SDennis Dalessandro /* 146*f48ad614SDennis Dalessandro * A GRH is expected to precede the data even if not 147*f48ad614SDennis Dalessandro * present on the wire. 148*f48ad614SDennis Dalessandro */ 149*f48ad614SDennis Dalessandro length = swqe->length; 150*f48ad614SDennis Dalessandro memset(&wc, 0, sizeof(wc)); 151*f48ad614SDennis Dalessandro wc.byte_len = length + sizeof(struct ib_grh); 152*f48ad614SDennis Dalessandro 153*f48ad614SDennis Dalessandro if (swqe->wr.opcode == IB_WR_SEND_WITH_IMM) { 154*f48ad614SDennis Dalessandro wc.wc_flags = IB_WC_WITH_IMM; 155*f48ad614SDennis Dalessandro wc.ex.imm_data = swqe->wr.ex.imm_data; 156*f48ad614SDennis Dalessandro } 157*f48ad614SDennis Dalessandro 158*f48ad614SDennis Dalessandro spin_lock_irqsave(&qp->r_lock, flags); 159*f48ad614SDennis Dalessandro 160*f48ad614SDennis Dalessandro /* 161*f48ad614SDennis Dalessandro * Get the next work request entry to find where to put the data. 162*f48ad614SDennis Dalessandro */ 163*f48ad614SDennis Dalessandro if (qp->r_flags & RVT_R_REUSE_SGE) { 164*f48ad614SDennis Dalessandro qp->r_flags &= ~RVT_R_REUSE_SGE; 165*f48ad614SDennis Dalessandro } else { 166*f48ad614SDennis Dalessandro int ret; 167*f48ad614SDennis Dalessandro 168*f48ad614SDennis Dalessandro ret = hfi1_rvt_get_rwqe(qp, 0); 169*f48ad614SDennis Dalessandro if (ret < 0) { 170*f48ad614SDennis Dalessandro hfi1_rc_error(qp, IB_WC_LOC_QP_OP_ERR); 171*f48ad614SDennis Dalessandro goto bail_unlock; 172*f48ad614SDennis Dalessandro } 173*f48ad614SDennis Dalessandro if (!ret) { 174*f48ad614SDennis Dalessandro if (qp->ibqp.qp_num == 0) 175*f48ad614SDennis Dalessandro ibp->rvp.n_vl15_dropped++; 176*f48ad614SDennis Dalessandro goto bail_unlock; 177*f48ad614SDennis Dalessandro } 178*f48ad614SDennis Dalessandro } 179*f48ad614SDennis Dalessandro /* Silently drop packets which are too big. */ 180*f48ad614SDennis Dalessandro if (unlikely(wc.byte_len > qp->r_len)) { 181*f48ad614SDennis Dalessandro qp->r_flags |= RVT_R_REUSE_SGE; 182*f48ad614SDennis Dalessandro ibp->rvp.n_pkt_drops++; 183*f48ad614SDennis Dalessandro goto bail_unlock; 184*f48ad614SDennis Dalessandro } 185*f48ad614SDennis Dalessandro 186*f48ad614SDennis Dalessandro if (ah_attr->ah_flags & IB_AH_GRH) { 187*f48ad614SDennis Dalessandro hfi1_copy_sge(&qp->r_sge, &ah_attr->grh, 188*f48ad614SDennis Dalessandro sizeof(struct ib_grh), 1, 0); 189*f48ad614SDennis Dalessandro wc.wc_flags |= IB_WC_GRH; 190*f48ad614SDennis Dalessandro } else { 191*f48ad614SDennis Dalessandro hfi1_skip_sge(&qp->r_sge, sizeof(struct ib_grh), 1); 192*f48ad614SDennis Dalessandro } 193*f48ad614SDennis Dalessandro ssge.sg_list = swqe->sg_list + 1; 194*f48ad614SDennis Dalessandro ssge.sge = *swqe->sg_list; 195*f48ad614SDennis Dalessandro ssge.num_sge = swqe->wr.num_sge; 196*f48ad614SDennis Dalessandro sge = &ssge.sge; 197*f48ad614SDennis Dalessandro while (length) { 198*f48ad614SDennis Dalessandro u32 len = sge->length; 199*f48ad614SDennis Dalessandro 200*f48ad614SDennis Dalessandro if (len > length) 201*f48ad614SDennis Dalessandro len = length; 202*f48ad614SDennis Dalessandro if (len > sge->sge_length) 203*f48ad614SDennis Dalessandro len = sge->sge_length; 204*f48ad614SDennis Dalessandro WARN_ON_ONCE(len == 0); 205*f48ad614SDennis Dalessandro hfi1_copy_sge(&qp->r_sge, sge->vaddr, len, 1, 0); 206*f48ad614SDennis Dalessandro sge->vaddr += len; 207*f48ad614SDennis Dalessandro sge->length -= len; 208*f48ad614SDennis Dalessandro sge->sge_length -= len; 209*f48ad614SDennis Dalessandro if (sge->sge_length == 0) { 210*f48ad614SDennis Dalessandro if (--ssge.num_sge) 211*f48ad614SDennis Dalessandro *sge = *ssge.sg_list++; 212*f48ad614SDennis Dalessandro } else if (sge->length == 0 && sge->mr->lkey) { 213*f48ad614SDennis Dalessandro if (++sge->n >= RVT_SEGSZ) { 214*f48ad614SDennis Dalessandro if (++sge->m >= sge->mr->mapsz) 215*f48ad614SDennis Dalessandro break; 216*f48ad614SDennis Dalessandro sge->n = 0; 217*f48ad614SDennis Dalessandro } 218*f48ad614SDennis Dalessandro sge->vaddr = 219*f48ad614SDennis Dalessandro sge->mr->map[sge->m]->segs[sge->n].vaddr; 220*f48ad614SDennis Dalessandro sge->length = 221*f48ad614SDennis Dalessandro sge->mr->map[sge->m]->segs[sge->n].length; 222*f48ad614SDennis Dalessandro } 223*f48ad614SDennis Dalessandro length -= len; 224*f48ad614SDennis Dalessandro } 225*f48ad614SDennis Dalessandro rvt_put_ss(&qp->r_sge); 226*f48ad614SDennis Dalessandro if (!test_and_clear_bit(RVT_R_WRID_VALID, &qp->r_aflags)) 227*f48ad614SDennis Dalessandro goto bail_unlock; 228*f48ad614SDennis Dalessandro wc.wr_id = qp->r_wr_id; 229*f48ad614SDennis Dalessandro wc.status = IB_WC_SUCCESS; 230*f48ad614SDennis Dalessandro wc.opcode = IB_WC_RECV; 231*f48ad614SDennis Dalessandro wc.qp = &qp->ibqp; 232*f48ad614SDennis Dalessandro wc.src_qp = sqp->ibqp.qp_num; 233*f48ad614SDennis Dalessandro if (qp->ibqp.qp_type == IB_QPT_GSI || qp->ibqp.qp_type == IB_QPT_SMI) { 234*f48ad614SDennis Dalessandro if (sqp->ibqp.qp_type == IB_QPT_GSI || 235*f48ad614SDennis Dalessandro sqp->ibqp.qp_type == IB_QPT_SMI) 236*f48ad614SDennis Dalessandro wc.pkey_index = swqe->ud_wr.pkey_index; 237*f48ad614SDennis Dalessandro else 238*f48ad614SDennis Dalessandro wc.pkey_index = sqp->s_pkey_index; 239*f48ad614SDennis Dalessandro } else { 240*f48ad614SDennis Dalessandro wc.pkey_index = 0; 241*f48ad614SDennis Dalessandro } 242*f48ad614SDennis Dalessandro wc.slid = ppd->lid | (ah_attr->src_path_bits & ((1 << ppd->lmc) - 1)); 243*f48ad614SDennis Dalessandro /* Check for loopback when the port lid is not set */ 244*f48ad614SDennis Dalessandro if (wc.slid == 0 && sqp->ibqp.qp_type == IB_QPT_GSI) 245*f48ad614SDennis Dalessandro wc.slid = be16_to_cpu(IB_LID_PERMISSIVE); 246*f48ad614SDennis Dalessandro wc.sl = ah_attr->sl; 247*f48ad614SDennis Dalessandro wc.dlid_path_bits = ah_attr->dlid & ((1 << ppd->lmc) - 1); 248*f48ad614SDennis Dalessandro wc.port_num = qp->port_num; 249*f48ad614SDennis Dalessandro /* Signal completion event if the solicited bit is set. */ 250*f48ad614SDennis Dalessandro rvt_cq_enter(ibcq_to_rvtcq(qp->ibqp.recv_cq), &wc, 251*f48ad614SDennis Dalessandro swqe->wr.send_flags & IB_SEND_SOLICITED); 252*f48ad614SDennis Dalessandro ibp->rvp.n_loop_pkts++; 253*f48ad614SDennis Dalessandro bail_unlock: 254*f48ad614SDennis Dalessandro spin_unlock_irqrestore(&qp->r_lock, flags); 255*f48ad614SDennis Dalessandro drop: 256*f48ad614SDennis Dalessandro rcu_read_unlock(); 257*f48ad614SDennis Dalessandro } 258*f48ad614SDennis Dalessandro 259*f48ad614SDennis Dalessandro /** 260*f48ad614SDennis Dalessandro * hfi1_make_ud_req - construct a UD request packet 261*f48ad614SDennis Dalessandro * @qp: the QP 262*f48ad614SDennis Dalessandro * 263*f48ad614SDennis Dalessandro * Assume s_lock is held. 264*f48ad614SDennis Dalessandro * 265*f48ad614SDennis Dalessandro * Return 1 if constructed; otherwise, return 0. 266*f48ad614SDennis Dalessandro */ 267*f48ad614SDennis Dalessandro int hfi1_make_ud_req(struct rvt_qp *qp, struct hfi1_pkt_state *ps) 268*f48ad614SDennis Dalessandro { 269*f48ad614SDennis Dalessandro struct hfi1_qp_priv *priv = qp->priv; 270*f48ad614SDennis Dalessandro struct hfi1_other_headers *ohdr; 271*f48ad614SDennis Dalessandro struct ib_ah_attr *ah_attr; 272*f48ad614SDennis Dalessandro struct hfi1_pportdata *ppd; 273*f48ad614SDennis Dalessandro struct hfi1_ibport *ibp; 274*f48ad614SDennis Dalessandro struct rvt_swqe *wqe; 275*f48ad614SDennis Dalessandro u32 nwords; 276*f48ad614SDennis Dalessandro u32 extra_bytes; 277*f48ad614SDennis Dalessandro u32 bth0; 278*f48ad614SDennis Dalessandro u16 lrh0; 279*f48ad614SDennis Dalessandro u16 lid; 280*f48ad614SDennis Dalessandro int next_cur; 281*f48ad614SDennis Dalessandro u8 sc5; 282*f48ad614SDennis Dalessandro 283*f48ad614SDennis Dalessandro ps->s_txreq = get_txreq(ps->dev, qp); 284*f48ad614SDennis Dalessandro if (IS_ERR(ps->s_txreq)) 285*f48ad614SDennis Dalessandro goto bail_no_tx; 286*f48ad614SDennis Dalessandro 287*f48ad614SDennis Dalessandro if (!(ib_rvt_state_ops[qp->state] & RVT_PROCESS_NEXT_SEND_OK)) { 288*f48ad614SDennis Dalessandro if (!(ib_rvt_state_ops[qp->state] & RVT_FLUSH_SEND)) 289*f48ad614SDennis Dalessandro goto bail; 290*f48ad614SDennis Dalessandro /* We are in the error state, flush the work request. */ 291*f48ad614SDennis Dalessandro smp_read_barrier_depends(); /* see post_one_send */ 292*f48ad614SDennis Dalessandro if (qp->s_last == ACCESS_ONCE(qp->s_head)) 293*f48ad614SDennis Dalessandro goto bail; 294*f48ad614SDennis Dalessandro /* If DMAs are in progress, we can't flush immediately. */ 295*f48ad614SDennis Dalessandro if (iowait_sdma_pending(&priv->s_iowait)) { 296*f48ad614SDennis Dalessandro qp->s_flags |= RVT_S_WAIT_DMA; 297*f48ad614SDennis Dalessandro goto bail; 298*f48ad614SDennis Dalessandro } 299*f48ad614SDennis Dalessandro wqe = rvt_get_swqe_ptr(qp, qp->s_last); 300*f48ad614SDennis Dalessandro hfi1_send_complete(qp, wqe, IB_WC_WR_FLUSH_ERR); 301*f48ad614SDennis Dalessandro goto done_free_tx; 302*f48ad614SDennis Dalessandro } 303*f48ad614SDennis Dalessandro 304*f48ad614SDennis Dalessandro /* see post_one_send() */ 305*f48ad614SDennis Dalessandro smp_read_barrier_depends(); 306*f48ad614SDennis Dalessandro if (qp->s_cur == ACCESS_ONCE(qp->s_head)) 307*f48ad614SDennis Dalessandro goto bail; 308*f48ad614SDennis Dalessandro 309*f48ad614SDennis Dalessandro wqe = rvt_get_swqe_ptr(qp, qp->s_cur); 310*f48ad614SDennis Dalessandro next_cur = qp->s_cur + 1; 311*f48ad614SDennis Dalessandro if (next_cur >= qp->s_size) 312*f48ad614SDennis Dalessandro next_cur = 0; 313*f48ad614SDennis Dalessandro 314*f48ad614SDennis Dalessandro /* Construct the header. */ 315*f48ad614SDennis Dalessandro ibp = to_iport(qp->ibqp.device, qp->port_num); 316*f48ad614SDennis Dalessandro ppd = ppd_from_ibp(ibp); 317*f48ad614SDennis Dalessandro ah_attr = &ibah_to_rvtah(wqe->ud_wr.ah)->attr; 318*f48ad614SDennis Dalessandro if (ah_attr->dlid < be16_to_cpu(IB_MULTICAST_LID_BASE) || 319*f48ad614SDennis Dalessandro ah_attr->dlid == be16_to_cpu(IB_LID_PERMISSIVE)) { 320*f48ad614SDennis Dalessandro lid = ah_attr->dlid & ~((1 << ppd->lmc) - 1); 321*f48ad614SDennis Dalessandro if (unlikely(!loopback && 322*f48ad614SDennis Dalessandro (lid == ppd->lid || 323*f48ad614SDennis Dalessandro (lid == be16_to_cpu(IB_LID_PERMISSIVE) && 324*f48ad614SDennis Dalessandro qp->ibqp.qp_type == IB_QPT_GSI)))) { 325*f48ad614SDennis Dalessandro unsigned long tflags = ps->flags; 326*f48ad614SDennis Dalessandro /* 327*f48ad614SDennis Dalessandro * If DMAs are in progress, we can't generate 328*f48ad614SDennis Dalessandro * a completion for the loopback packet since 329*f48ad614SDennis Dalessandro * it would be out of order. 330*f48ad614SDennis Dalessandro * Instead of waiting, we could queue a 331*f48ad614SDennis Dalessandro * zero length descriptor so we get a callback. 332*f48ad614SDennis Dalessandro */ 333*f48ad614SDennis Dalessandro if (iowait_sdma_pending(&priv->s_iowait)) { 334*f48ad614SDennis Dalessandro qp->s_flags |= RVT_S_WAIT_DMA; 335*f48ad614SDennis Dalessandro goto bail; 336*f48ad614SDennis Dalessandro } 337*f48ad614SDennis Dalessandro qp->s_cur = next_cur; 338*f48ad614SDennis Dalessandro spin_unlock_irqrestore(&qp->s_lock, tflags); 339*f48ad614SDennis Dalessandro ud_loopback(qp, wqe); 340*f48ad614SDennis Dalessandro spin_lock_irqsave(&qp->s_lock, tflags); 341*f48ad614SDennis Dalessandro ps->flags = tflags; 342*f48ad614SDennis Dalessandro hfi1_send_complete(qp, wqe, IB_WC_SUCCESS); 343*f48ad614SDennis Dalessandro goto done_free_tx; 344*f48ad614SDennis Dalessandro } 345*f48ad614SDennis Dalessandro } 346*f48ad614SDennis Dalessandro 347*f48ad614SDennis Dalessandro qp->s_cur = next_cur; 348*f48ad614SDennis Dalessandro extra_bytes = -wqe->length & 3; 349*f48ad614SDennis Dalessandro nwords = (wqe->length + extra_bytes) >> 2; 350*f48ad614SDennis Dalessandro 351*f48ad614SDennis Dalessandro /* header size in 32-bit words LRH+BTH+DETH = (8+12+8)/4. */ 352*f48ad614SDennis Dalessandro qp->s_hdrwords = 7; 353*f48ad614SDennis Dalessandro qp->s_cur_size = wqe->length; 354*f48ad614SDennis Dalessandro qp->s_cur_sge = &qp->s_sge; 355*f48ad614SDennis Dalessandro qp->s_srate = ah_attr->static_rate; 356*f48ad614SDennis Dalessandro qp->srate_mbps = ib_rate_to_mbps(qp->s_srate); 357*f48ad614SDennis Dalessandro qp->s_wqe = wqe; 358*f48ad614SDennis Dalessandro qp->s_sge.sge = wqe->sg_list[0]; 359*f48ad614SDennis Dalessandro qp->s_sge.sg_list = wqe->sg_list + 1; 360*f48ad614SDennis Dalessandro qp->s_sge.num_sge = wqe->wr.num_sge; 361*f48ad614SDennis Dalessandro qp->s_sge.total_len = wqe->length; 362*f48ad614SDennis Dalessandro 363*f48ad614SDennis Dalessandro if (ah_attr->ah_flags & IB_AH_GRH) { 364*f48ad614SDennis Dalessandro /* Header size in 32-bit words. */ 365*f48ad614SDennis Dalessandro qp->s_hdrwords += hfi1_make_grh(ibp, 366*f48ad614SDennis Dalessandro &ps->s_txreq->phdr.hdr.u.l.grh, 367*f48ad614SDennis Dalessandro &ah_attr->grh, 368*f48ad614SDennis Dalessandro qp->s_hdrwords, nwords); 369*f48ad614SDennis Dalessandro lrh0 = HFI1_LRH_GRH; 370*f48ad614SDennis Dalessandro ohdr = &ps->s_txreq->phdr.hdr.u.l.oth; 371*f48ad614SDennis Dalessandro /* 372*f48ad614SDennis Dalessandro * Don't worry about sending to locally attached multicast 373*f48ad614SDennis Dalessandro * QPs. It is unspecified by the spec. what happens. 374*f48ad614SDennis Dalessandro */ 375*f48ad614SDennis Dalessandro } else { 376*f48ad614SDennis Dalessandro /* Header size in 32-bit words. */ 377*f48ad614SDennis Dalessandro lrh0 = HFI1_LRH_BTH; 378*f48ad614SDennis Dalessandro ohdr = &ps->s_txreq->phdr.hdr.u.oth; 379*f48ad614SDennis Dalessandro } 380*f48ad614SDennis Dalessandro if (wqe->wr.opcode == IB_WR_SEND_WITH_IMM) { 381*f48ad614SDennis Dalessandro qp->s_hdrwords++; 382*f48ad614SDennis Dalessandro ohdr->u.ud.imm_data = wqe->wr.ex.imm_data; 383*f48ad614SDennis Dalessandro bth0 = IB_OPCODE_UD_SEND_ONLY_WITH_IMMEDIATE << 24; 384*f48ad614SDennis Dalessandro } else { 385*f48ad614SDennis Dalessandro bth0 = IB_OPCODE_UD_SEND_ONLY << 24; 386*f48ad614SDennis Dalessandro } 387*f48ad614SDennis Dalessandro sc5 = ibp->sl_to_sc[ah_attr->sl]; 388*f48ad614SDennis Dalessandro lrh0 |= (ah_attr->sl & 0xf) << 4; 389*f48ad614SDennis Dalessandro if (qp->ibqp.qp_type == IB_QPT_SMI) { 390*f48ad614SDennis Dalessandro lrh0 |= 0xF000; /* Set VL (see ch. 13.5.3.1) */ 391*f48ad614SDennis Dalessandro priv->s_sc = 0xf; 392*f48ad614SDennis Dalessandro } else { 393*f48ad614SDennis Dalessandro lrh0 |= (sc5 & 0xf) << 12; 394*f48ad614SDennis Dalessandro priv->s_sc = sc5; 395*f48ad614SDennis Dalessandro } 396*f48ad614SDennis Dalessandro priv->s_sde = qp_to_sdma_engine(qp, priv->s_sc); 397*f48ad614SDennis Dalessandro ps->s_txreq->sde = priv->s_sde; 398*f48ad614SDennis Dalessandro priv->s_sendcontext = qp_to_send_context(qp, priv->s_sc); 399*f48ad614SDennis Dalessandro ps->s_txreq->psc = priv->s_sendcontext; 400*f48ad614SDennis Dalessandro ps->s_txreq->phdr.hdr.lrh[0] = cpu_to_be16(lrh0); 401*f48ad614SDennis Dalessandro ps->s_txreq->phdr.hdr.lrh[1] = cpu_to_be16(ah_attr->dlid); 402*f48ad614SDennis Dalessandro ps->s_txreq->phdr.hdr.lrh[2] = 403*f48ad614SDennis Dalessandro cpu_to_be16(qp->s_hdrwords + nwords + SIZE_OF_CRC); 404*f48ad614SDennis Dalessandro if (ah_attr->dlid == be16_to_cpu(IB_LID_PERMISSIVE)) { 405*f48ad614SDennis Dalessandro ps->s_txreq->phdr.hdr.lrh[3] = IB_LID_PERMISSIVE; 406*f48ad614SDennis Dalessandro } else { 407*f48ad614SDennis Dalessandro lid = ppd->lid; 408*f48ad614SDennis Dalessandro if (lid) { 409*f48ad614SDennis Dalessandro lid |= ah_attr->src_path_bits & ((1 << ppd->lmc) - 1); 410*f48ad614SDennis Dalessandro ps->s_txreq->phdr.hdr.lrh[3] = cpu_to_be16(lid); 411*f48ad614SDennis Dalessandro } else { 412*f48ad614SDennis Dalessandro ps->s_txreq->phdr.hdr.lrh[3] = IB_LID_PERMISSIVE; 413*f48ad614SDennis Dalessandro } 414*f48ad614SDennis Dalessandro } 415*f48ad614SDennis Dalessandro if (wqe->wr.send_flags & IB_SEND_SOLICITED) 416*f48ad614SDennis Dalessandro bth0 |= IB_BTH_SOLICITED; 417*f48ad614SDennis Dalessandro bth0 |= extra_bytes << 20; 418*f48ad614SDennis Dalessandro if (qp->ibqp.qp_type == IB_QPT_GSI || qp->ibqp.qp_type == IB_QPT_SMI) 419*f48ad614SDennis Dalessandro bth0 |= hfi1_get_pkey(ibp, wqe->ud_wr.pkey_index); 420*f48ad614SDennis Dalessandro else 421*f48ad614SDennis Dalessandro bth0 |= hfi1_get_pkey(ibp, qp->s_pkey_index); 422*f48ad614SDennis Dalessandro ohdr->bth[0] = cpu_to_be32(bth0); 423*f48ad614SDennis Dalessandro ohdr->bth[1] = cpu_to_be32(wqe->ud_wr.remote_qpn); 424*f48ad614SDennis Dalessandro ohdr->bth[2] = cpu_to_be32(mask_psn(wqe->psn)); 425*f48ad614SDennis Dalessandro /* 426*f48ad614SDennis Dalessandro * Qkeys with the high order bit set mean use the 427*f48ad614SDennis Dalessandro * qkey from the QP context instead of the WR (see 10.2.5). 428*f48ad614SDennis Dalessandro */ 429*f48ad614SDennis Dalessandro ohdr->u.ud.deth[0] = cpu_to_be32((int)wqe->ud_wr.remote_qkey < 0 ? 430*f48ad614SDennis Dalessandro qp->qkey : wqe->ud_wr.remote_qkey); 431*f48ad614SDennis Dalessandro ohdr->u.ud.deth[1] = cpu_to_be32(qp->ibqp.qp_num); 432*f48ad614SDennis Dalessandro /* disarm any ahg */ 433*f48ad614SDennis Dalessandro priv->s_hdr->ahgcount = 0; 434*f48ad614SDennis Dalessandro priv->s_hdr->ahgidx = 0; 435*f48ad614SDennis Dalessandro priv->s_hdr->tx_flags = 0; 436*f48ad614SDennis Dalessandro priv->s_hdr->sde = NULL; 437*f48ad614SDennis Dalessandro /* pbc */ 438*f48ad614SDennis Dalessandro ps->s_txreq->hdr_dwords = qp->s_hdrwords + 2; 439*f48ad614SDennis Dalessandro 440*f48ad614SDennis Dalessandro return 1; 441*f48ad614SDennis Dalessandro 442*f48ad614SDennis Dalessandro done_free_tx: 443*f48ad614SDennis Dalessandro hfi1_put_txreq(ps->s_txreq); 444*f48ad614SDennis Dalessandro ps->s_txreq = NULL; 445*f48ad614SDennis Dalessandro return 1; 446*f48ad614SDennis Dalessandro 447*f48ad614SDennis Dalessandro bail: 448*f48ad614SDennis Dalessandro hfi1_put_txreq(ps->s_txreq); 449*f48ad614SDennis Dalessandro 450*f48ad614SDennis Dalessandro bail_no_tx: 451*f48ad614SDennis Dalessandro ps->s_txreq = NULL; 452*f48ad614SDennis Dalessandro qp->s_flags &= ~RVT_S_BUSY; 453*f48ad614SDennis Dalessandro qp->s_hdrwords = 0; 454*f48ad614SDennis Dalessandro return 0; 455*f48ad614SDennis Dalessandro } 456*f48ad614SDennis Dalessandro 457*f48ad614SDennis Dalessandro /* 458*f48ad614SDennis Dalessandro * Hardware can't check this so we do it here. 459*f48ad614SDennis Dalessandro * 460*f48ad614SDennis Dalessandro * This is a slightly different algorithm than the standard pkey check. It 461*f48ad614SDennis Dalessandro * special cases the management keys and allows for 0x7fff and 0xffff to be in 462*f48ad614SDennis Dalessandro * the table at the same time. 463*f48ad614SDennis Dalessandro * 464*f48ad614SDennis Dalessandro * @returns the index found or -1 if not found 465*f48ad614SDennis Dalessandro */ 466*f48ad614SDennis Dalessandro int hfi1_lookup_pkey_idx(struct hfi1_ibport *ibp, u16 pkey) 467*f48ad614SDennis Dalessandro { 468*f48ad614SDennis Dalessandro struct hfi1_pportdata *ppd = ppd_from_ibp(ibp); 469*f48ad614SDennis Dalessandro unsigned i; 470*f48ad614SDennis Dalessandro 471*f48ad614SDennis Dalessandro if (pkey == FULL_MGMT_P_KEY || pkey == LIM_MGMT_P_KEY) { 472*f48ad614SDennis Dalessandro unsigned lim_idx = -1; 473*f48ad614SDennis Dalessandro 474*f48ad614SDennis Dalessandro for (i = 0; i < ARRAY_SIZE(ppd->pkeys); ++i) { 475*f48ad614SDennis Dalessandro /* here we look for an exact match */ 476*f48ad614SDennis Dalessandro if (ppd->pkeys[i] == pkey) 477*f48ad614SDennis Dalessandro return i; 478*f48ad614SDennis Dalessandro if (ppd->pkeys[i] == LIM_MGMT_P_KEY) 479*f48ad614SDennis Dalessandro lim_idx = i; 480*f48ad614SDennis Dalessandro } 481*f48ad614SDennis Dalessandro 482*f48ad614SDennis Dalessandro /* did not find 0xffff return 0x7fff idx if found */ 483*f48ad614SDennis Dalessandro if (pkey == FULL_MGMT_P_KEY) 484*f48ad614SDennis Dalessandro return lim_idx; 485*f48ad614SDennis Dalessandro 486*f48ad614SDennis Dalessandro /* no match... */ 487*f48ad614SDennis Dalessandro return -1; 488*f48ad614SDennis Dalessandro } 489*f48ad614SDennis Dalessandro 490*f48ad614SDennis Dalessandro pkey &= 0x7fff; /* remove limited/full membership bit */ 491*f48ad614SDennis Dalessandro 492*f48ad614SDennis Dalessandro for (i = 0; i < ARRAY_SIZE(ppd->pkeys); ++i) 493*f48ad614SDennis Dalessandro if ((ppd->pkeys[i] & 0x7fff) == pkey) 494*f48ad614SDennis Dalessandro return i; 495*f48ad614SDennis Dalessandro 496*f48ad614SDennis Dalessandro /* 497*f48ad614SDennis Dalessandro * Should not get here, this means hardware failed to validate pkeys. 498*f48ad614SDennis Dalessandro */ 499*f48ad614SDennis Dalessandro return -1; 500*f48ad614SDennis Dalessandro } 501*f48ad614SDennis Dalessandro 502*f48ad614SDennis Dalessandro void return_cnp(struct hfi1_ibport *ibp, struct rvt_qp *qp, u32 remote_qpn, 503*f48ad614SDennis Dalessandro u32 pkey, u32 slid, u32 dlid, u8 sc5, 504*f48ad614SDennis Dalessandro const struct ib_grh *old_grh) 505*f48ad614SDennis Dalessandro { 506*f48ad614SDennis Dalessandro u64 pbc, pbc_flags = 0; 507*f48ad614SDennis Dalessandro u32 bth0, plen, vl, hwords = 5; 508*f48ad614SDennis Dalessandro u16 lrh0; 509*f48ad614SDennis Dalessandro u8 sl = ibp->sc_to_sl[sc5]; 510*f48ad614SDennis Dalessandro struct hfi1_ib_header hdr; 511*f48ad614SDennis Dalessandro struct hfi1_other_headers *ohdr; 512*f48ad614SDennis Dalessandro struct pio_buf *pbuf; 513*f48ad614SDennis Dalessandro struct send_context *ctxt = qp_to_send_context(qp, sc5); 514*f48ad614SDennis Dalessandro struct hfi1_pportdata *ppd = ppd_from_ibp(ibp); 515*f48ad614SDennis Dalessandro 516*f48ad614SDennis Dalessandro if (old_grh) { 517*f48ad614SDennis Dalessandro struct ib_grh *grh = &hdr.u.l.grh; 518*f48ad614SDennis Dalessandro 519*f48ad614SDennis Dalessandro grh->version_tclass_flow = old_grh->version_tclass_flow; 520*f48ad614SDennis Dalessandro grh->paylen = cpu_to_be16((hwords - 2 + SIZE_OF_CRC) << 2); 521*f48ad614SDennis Dalessandro grh->hop_limit = 0xff; 522*f48ad614SDennis Dalessandro grh->sgid = old_grh->dgid; 523*f48ad614SDennis Dalessandro grh->dgid = old_grh->sgid; 524*f48ad614SDennis Dalessandro ohdr = &hdr.u.l.oth; 525*f48ad614SDennis Dalessandro lrh0 = HFI1_LRH_GRH; 526*f48ad614SDennis Dalessandro hwords += sizeof(struct ib_grh) / sizeof(u32); 527*f48ad614SDennis Dalessandro } else { 528*f48ad614SDennis Dalessandro ohdr = &hdr.u.oth; 529*f48ad614SDennis Dalessandro lrh0 = HFI1_LRH_BTH; 530*f48ad614SDennis Dalessandro } 531*f48ad614SDennis Dalessandro 532*f48ad614SDennis Dalessandro lrh0 |= (sc5 & 0xf) << 12 | sl << 4; 533*f48ad614SDennis Dalessandro 534*f48ad614SDennis Dalessandro bth0 = pkey | (IB_OPCODE_CNP << 24); 535*f48ad614SDennis Dalessandro ohdr->bth[0] = cpu_to_be32(bth0); 536*f48ad614SDennis Dalessandro 537*f48ad614SDennis Dalessandro ohdr->bth[1] = cpu_to_be32(remote_qpn | (1 << HFI1_BECN_SHIFT)); 538*f48ad614SDennis Dalessandro ohdr->bth[2] = 0; /* PSN 0 */ 539*f48ad614SDennis Dalessandro 540*f48ad614SDennis Dalessandro hdr.lrh[0] = cpu_to_be16(lrh0); 541*f48ad614SDennis Dalessandro hdr.lrh[1] = cpu_to_be16(dlid); 542*f48ad614SDennis Dalessandro hdr.lrh[2] = cpu_to_be16(hwords + SIZE_OF_CRC); 543*f48ad614SDennis Dalessandro hdr.lrh[3] = cpu_to_be16(slid); 544*f48ad614SDennis Dalessandro 545*f48ad614SDennis Dalessandro plen = 2 /* PBC */ + hwords; 546*f48ad614SDennis Dalessandro pbc_flags |= (!!(sc5 & 0x10)) << PBC_DC_INFO_SHIFT; 547*f48ad614SDennis Dalessandro vl = sc_to_vlt(ppd->dd, sc5); 548*f48ad614SDennis Dalessandro pbc = create_pbc(ppd, pbc_flags, qp->srate_mbps, vl, plen); 549*f48ad614SDennis Dalessandro if (ctxt) { 550*f48ad614SDennis Dalessandro pbuf = sc_buffer_alloc(ctxt, plen, NULL, NULL); 551*f48ad614SDennis Dalessandro if (pbuf) 552*f48ad614SDennis Dalessandro ppd->dd->pio_inline_send(ppd->dd, pbuf, pbc, 553*f48ad614SDennis Dalessandro &hdr, hwords); 554*f48ad614SDennis Dalessandro } 555*f48ad614SDennis Dalessandro } 556*f48ad614SDennis Dalessandro 557*f48ad614SDennis Dalessandro /* 558*f48ad614SDennis Dalessandro * opa_smp_check() - Do the regular pkey checking, and the additional 559*f48ad614SDennis Dalessandro * checks for SMPs specified in OPAv1 rev 0.90, section 9.10.26 560*f48ad614SDennis Dalessandro * ("SMA Packet Checks"). 561*f48ad614SDennis Dalessandro * 562*f48ad614SDennis Dalessandro * Note that: 563*f48ad614SDennis Dalessandro * - Checks are done using the pkey directly from the packet's BTH, 564*f48ad614SDennis Dalessandro * and specifically _not_ the pkey that we attach to the completion, 565*f48ad614SDennis Dalessandro * which may be different. 566*f48ad614SDennis Dalessandro * - These checks are specifically for "non-local" SMPs (i.e., SMPs 567*f48ad614SDennis Dalessandro * which originated on another node). SMPs which are sent from, and 568*f48ad614SDennis Dalessandro * destined to this node are checked in opa_local_smp_check(). 569*f48ad614SDennis Dalessandro * 570*f48ad614SDennis Dalessandro * At the point where opa_smp_check() is called, we know: 571*f48ad614SDennis Dalessandro * - destination QP is QP0 572*f48ad614SDennis Dalessandro * 573*f48ad614SDennis Dalessandro * opa_smp_check() returns 0 if all checks succeed, 1 otherwise. 574*f48ad614SDennis Dalessandro */ 575*f48ad614SDennis Dalessandro static int opa_smp_check(struct hfi1_ibport *ibp, u16 pkey, u8 sc5, 576*f48ad614SDennis Dalessandro struct rvt_qp *qp, u16 slid, struct opa_smp *smp) 577*f48ad614SDennis Dalessandro { 578*f48ad614SDennis Dalessandro struct hfi1_pportdata *ppd = ppd_from_ibp(ibp); 579*f48ad614SDennis Dalessandro 580*f48ad614SDennis Dalessandro /* 581*f48ad614SDennis Dalessandro * I don't think it's possible for us to get here with sc != 0xf, 582*f48ad614SDennis Dalessandro * but check it to be certain. 583*f48ad614SDennis Dalessandro */ 584*f48ad614SDennis Dalessandro if (sc5 != 0xf) 585*f48ad614SDennis Dalessandro return 1; 586*f48ad614SDennis Dalessandro 587*f48ad614SDennis Dalessandro if (rcv_pkey_check(ppd, pkey, sc5, slid)) 588*f48ad614SDennis Dalessandro return 1; 589*f48ad614SDennis Dalessandro 590*f48ad614SDennis Dalessandro /* 591*f48ad614SDennis Dalessandro * At this point we know (and so don't need to check again) that 592*f48ad614SDennis Dalessandro * the pkey is either LIM_MGMT_P_KEY, or FULL_MGMT_P_KEY 593*f48ad614SDennis Dalessandro * (see ingress_pkey_check). 594*f48ad614SDennis Dalessandro */ 595*f48ad614SDennis Dalessandro if (smp->mgmt_class != IB_MGMT_CLASS_SUBN_DIRECTED_ROUTE && 596*f48ad614SDennis Dalessandro smp->mgmt_class != IB_MGMT_CLASS_SUBN_LID_ROUTED) { 597*f48ad614SDennis Dalessandro ingress_pkey_table_fail(ppd, pkey, slid); 598*f48ad614SDennis Dalessandro return 1; 599*f48ad614SDennis Dalessandro } 600*f48ad614SDennis Dalessandro 601*f48ad614SDennis Dalessandro /* 602*f48ad614SDennis Dalessandro * SMPs fall into one of four (disjoint) categories: 603*f48ad614SDennis Dalessandro * SMA request, SMA response, trap, or trap repress. 604*f48ad614SDennis Dalessandro * Our response depends, in part, on which type of 605*f48ad614SDennis Dalessandro * SMP we're processing. 606*f48ad614SDennis Dalessandro * 607*f48ad614SDennis Dalessandro * If this is not an SMA request, or trap repress: 608*f48ad614SDennis Dalessandro * - accept MAD if the port is running an SM 609*f48ad614SDennis Dalessandro * - pkey == FULL_MGMT_P_KEY => 610*f48ad614SDennis Dalessandro * reply with unsupported method (i.e., just mark 611*f48ad614SDennis Dalessandro * the smp's status field here, and let it be 612*f48ad614SDennis Dalessandro * processed normally) 613*f48ad614SDennis Dalessandro * - pkey != LIM_MGMT_P_KEY => 614*f48ad614SDennis Dalessandro * increment port recv constraint errors, drop MAD 615*f48ad614SDennis Dalessandro * If this is an SMA request or trap repress: 616*f48ad614SDennis Dalessandro * - pkey != FULL_MGMT_P_KEY => 617*f48ad614SDennis Dalessandro * increment port recv constraint errors, drop MAD 618*f48ad614SDennis Dalessandro */ 619*f48ad614SDennis Dalessandro switch (smp->method) { 620*f48ad614SDennis Dalessandro case IB_MGMT_METHOD_GET: 621*f48ad614SDennis Dalessandro case IB_MGMT_METHOD_SET: 622*f48ad614SDennis Dalessandro case IB_MGMT_METHOD_REPORT: 623*f48ad614SDennis Dalessandro case IB_MGMT_METHOD_TRAP_REPRESS: 624*f48ad614SDennis Dalessandro if (pkey != FULL_MGMT_P_KEY) { 625*f48ad614SDennis Dalessandro ingress_pkey_table_fail(ppd, pkey, slid); 626*f48ad614SDennis Dalessandro return 1; 627*f48ad614SDennis Dalessandro } 628*f48ad614SDennis Dalessandro break; 629*f48ad614SDennis Dalessandro case IB_MGMT_METHOD_SEND: 630*f48ad614SDennis Dalessandro case IB_MGMT_METHOD_TRAP: 631*f48ad614SDennis Dalessandro case IB_MGMT_METHOD_GET_RESP: 632*f48ad614SDennis Dalessandro case IB_MGMT_METHOD_REPORT_RESP: 633*f48ad614SDennis Dalessandro if (ibp->rvp.port_cap_flags & IB_PORT_SM) 634*f48ad614SDennis Dalessandro return 0; 635*f48ad614SDennis Dalessandro if (pkey == FULL_MGMT_P_KEY) { 636*f48ad614SDennis Dalessandro smp->status |= IB_SMP_UNSUP_METHOD; 637*f48ad614SDennis Dalessandro return 0; 638*f48ad614SDennis Dalessandro } 639*f48ad614SDennis Dalessandro if (pkey != LIM_MGMT_P_KEY) { 640*f48ad614SDennis Dalessandro ingress_pkey_table_fail(ppd, pkey, slid); 641*f48ad614SDennis Dalessandro return 1; 642*f48ad614SDennis Dalessandro } 643*f48ad614SDennis Dalessandro break; 644*f48ad614SDennis Dalessandro default: 645*f48ad614SDennis Dalessandro break; 646*f48ad614SDennis Dalessandro } 647*f48ad614SDennis Dalessandro return 0; 648*f48ad614SDennis Dalessandro } 649*f48ad614SDennis Dalessandro 650*f48ad614SDennis Dalessandro /** 651*f48ad614SDennis Dalessandro * hfi1_ud_rcv - receive an incoming UD packet 652*f48ad614SDennis Dalessandro * @ibp: the port the packet came in on 653*f48ad614SDennis Dalessandro * @hdr: the packet header 654*f48ad614SDennis Dalessandro * @rcv_flags: flags relevant to rcv processing 655*f48ad614SDennis Dalessandro * @data: the packet data 656*f48ad614SDennis Dalessandro * @tlen: the packet length 657*f48ad614SDennis Dalessandro * @qp: the QP the packet came on 658*f48ad614SDennis Dalessandro * 659*f48ad614SDennis Dalessandro * This is called from qp_rcv() to process an incoming UD packet 660*f48ad614SDennis Dalessandro * for the given QP. 661*f48ad614SDennis Dalessandro * Called at interrupt level. 662*f48ad614SDennis Dalessandro */ 663*f48ad614SDennis Dalessandro void hfi1_ud_rcv(struct hfi1_packet *packet) 664*f48ad614SDennis Dalessandro { 665*f48ad614SDennis Dalessandro struct hfi1_other_headers *ohdr = packet->ohdr; 666*f48ad614SDennis Dalessandro int opcode; 667*f48ad614SDennis Dalessandro u32 hdrsize = packet->hlen; 668*f48ad614SDennis Dalessandro u32 pad; 669*f48ad614SDennis Dalessandro struct ib_wc wc; 670*f48ad614SDennis Dalessandro u32 qkey; 671*f48ad614SDennis Dalessandro u32 src_qp; 672*f48ad614SDennis Dalessandro u16 dlid, pkey; 673*f48ad614SDennis Dalessandro int mgmt_pkey_idx = -1; 674*f48ad614SDennis Dalessandro struct hfi1_ibport *ibp = &packet->rcd->ppd->ibport_data; 675*f48ad614SDennis Dalessandro struct hfi1_ib_header *hdr = packet->hdr; 676*f48ad614SDennis Dalessandro u32 rcv_flags = packet->rcv_flags; 677*f48ad614SDennis Dalessandro void *data = packet->ebuf; 678*f48ad614SDennis Dalessandro u32 tlen = packet->tlen; 679*f48ad614SDennis Dalessandro struct rvt_qp *qp = packet->qp; 680*f48ad614SDennis Dalessandro bool has_grh = rcv_flags & HFI1_HAS_GRH; 681*f48ad614SDennis Dalessandro bool sc4_bit = has_sc4_bit(packet); 682*f48ad614SDennis Dalessandro u8 sc; 683*f48ad614SDennis Dalessandro u32 bth1; 684*f48ad614SDennis Dalessandro int is_mcast; 685*f48ad614SDennis Dalessandro struct ib_grh *grh = NULL; 686*f48ad614SDennis Dalessandro 687*f48ad614SDennis Dalessandro qkey = be32_to_cpu(ohdr->u.ud.deth[0]); 688*f48ad614SDennis Dalessandro src_qp = be32_to_cpu(ohdr->u.ud.deth[1]) & RVT_QPN_MASK; 689*f48ad614SDennis Dalessandro dlid = be16_to_cpu(hdr->lrh[1]); 690*f48ad614SDennis Dalessandro is_mcast = (dlid > be16_to_cpu(IB_MULTICAST_LID_BASE)) && 691*f48ad614SDennis Dalessandro (dlid != be16_to_cpu(IB_LID_PERMISSIVE)); 692*f48ad614SDennis Dalessandro bth1 = be32_to_cpu(ohdr->bth[1]); 693*f48ad614SDennis Dalessandro if (unlikely(bth1 & HFI1_BECN_SMASK)) { 694*f48ad614SDennis Dalessandro /* 695*f48ad614SDennis Dalessandro * In pre-B0 h/w the CNP_OPCODE is handled via an 696*f48ad614SDennis Dalessandro * error path. 697*f48ad614SDennis Dalessandro */ 698*f48ad614SDennis Dalessandro struct hfi1_pportdata *ppd = ppd_from_ibp(ibp); 699*f48ad614SDennis Dalessandro u32 lqpn = be32_to_cpu(ohdr->bth[1]) & RVT_QPN_MASK; 700*f48ad614SDennis Dalessandro u8 sl, sc5; 701*f48ad614SDennis Dalessandro 702*f48ad614SDennis Dalessandro sc5 = (be16_to_cpu(hdr->lrh[0]) >> 12) & 0xf; 703*f48ad614SDennis Dalessandro sc5 |= sc4_bit; 704*f48ad614SDennis Dalessandro sl = ibp->sc_to_sl[sc5]; 705*f48ad614SDennis Dalessandro 706*f48ad614SDennis Dalessandro process_becn(ppd, sl, 0, lqpn, 0, IB_CC_SVCTYPE_UD); 707*f48ad614SDennis Dalessandro } 708*f48ad614SDennis Dalessandro 709*f48ad614SDennis Dalessandro /* 710*f48ad614SDennis Dalessandro * The opcode is in the low byte when its in network order 711*f48ad614SDennis Dalessandro * (top byte when in host order). 712*f48ad614SDennis Dalessandro */ 713*f48ad614SDennis Dalessandro opcode = be32_to_cpu(ohdr->bth[0]) >> 24; 714*f48ad614SDennis Dalessandro opcode &= 0xff; 715*f48ad614SDennis Dalessandro 716*f48ad614SDennis Dalessandro pkey = (u16)be32_to_cpu(ohdr->bth[0]); 717*f48ad614SDennis Dalessandro 718*f48ad614SDennis Dalessandro if (!is_mcast && (opcode != IB_OPCODE_CNP) && bth1 & HFI1_FECN_SMASK) { 719*f48ad614SDennis Dalessandro u16 slid = be16_to_cpu(hdr->lrh[3]); 720*f48ad614SDennis Dalessandro u8 sc5; 721*f48ad614SDennis Dalessandro 722*f48ad614SDennis Dalessandro sc5 = (be16_to_cpu(hdr->lrh[0]) >> 12) & 0xf; 723*f48ad614SDennis Dalessandro sc5 |= sc4_bit; 724*f48ad614SDennis Dalessandro 725*f48ad614SDennis Dalessandro return_cnp(ibp, qp, src_qp, pkey, dlid, slid, sc5, grh); 726*f48ad614SDennis Dalessandro } 727*f48ad614SDennis Dalessandro /* 728*f48ad614SDennis Dalessandro * Get the number of bytes the message was padded by 729*f48ad614SDennis Dalessandro * and drop incomplete packets. 730*f48ad614SDennis Dalessandro */ 731*f48ad614SDennis Dalessandro pad = (be32_to_cpu(ohdr->bth[0]) >> 20) & 3; 732*f48ad614SDennis Dalessandro if (unlikely(tlen < (hdrsize + pad + 4))) 733*f48ad614SDennis Dalessandro goto drop; 734*f48ad614SDennis Dalessandro 735*f48ad614SDennis Dalessandro tlen -= hdrsize + pad + 4; 736*f48ad614SDennis Dalessandro 737*f48ad614SDennis Dalessandro /* 738*f48ad614SDennis Dalessandro * Check that the permissive LID is only used on QP0 739*f48ad614SDennis Dalessandro * and the QKEY matches (see 9.6.1.4.1 and 9.6.1.5.1). 740*f48ad614SDennis Dalessandro */ 741*f48ad614SDennis Dalessandro if (qp->ibqp.qp_num) { 742*f48ad614SDennis Dalessandro if (unlikely(hdr->lrh[1] == IB_LID_PERMISSIVE || 743*f48ad614SDennis Dalessandro hdr->lrh[3] == IB_LID_PERMISSIVE)) 744*f48ad614SDennis Dalessandro goto drop; 745*f48ad614SDennis Dalessandro if (qp->ibqp.qp_num > 1) { 746*f48ad614SDennis Dalessandro struct hfi1_pportdata *ppd = ppd_from_ibp(ibp); 747*f48ad614SDennis Dalessandro u16 slid; 748*f48ad614SDennis Dalessandro u8 sc5; 749*f48ad614SDennis Dalessandro 750*f48ad614SDennis Dalessandro sc5 = (be16_to_cpu(hdr->lrh[0]) >> 12) & 0xf; 751*f48ad614SDennis Dalessandro sc5 |= sc4_bit; 752*f48ad614SDennis Dalessandro 753*f48ad614SDennis Dalessandro slid = be16_to_cpu(hdr->lrh[3]); 754*f48ad614SDennis Dalessandro if (unlikely(rcv_pkey_check(ppd, pkey, sc5, slid))) { 755*f48ad614SDennis Dalessandro /* 756*f48ad614SDennis Dalessandro * Traps will not be sent for packets dropped 757*f48ad614SDennis Dalessandro * by the HW. This is fine, as sending trap 758*f48ad614SDennis Dalessandro * for invalid pkeys is optional according to 759*f48ad614SDennis Dalessandro * IB spec (release 1.3, section 10.9.4) 760*f48ad614SDennis Dalessandro */ 761*f48ad614SDennis Dalessandro hfi1_bad_pqkey(ibp, OPA_TRAP_BAD_P_KEY, 762*f48ad614SDennis Dalessandro pkey, 763*f48ad614SDennis Dalessandro (be16_to_cpu(hdr->lrh[0]) >> 4) & 764*f48ad614SDennis Dalessandro 0xF, 765*f48ad614SDennis Dalessandro src_qp, qp->ibqp.qp_num, 766*f48ad614SDennis Dalessandro be16_to_cpu(hdr->lrh[3]), 767*f48ad614SDennis Dalessandro be16_to_cpu(hdr->lrh[1])); 768*f48ad614SDennis Dalessandro return; 769*f48ad614SDennis Dalessandro } 770*f48ad614SDennis Dalessandro } else { 771*f48ad614SDennis Dalessandro /* GSI packet */ 772*f48ad614SDennis Dalessandro mgmt_pkey_idx = hfi1_lookup_pkey_idx(ibp, pkey); 773*f48ad614SDennis Dalessandro if (mgmt_pkey_idx < 0) 774*f48ad614SDennis Dalessandro goto drop; 775*f48ad614SDennis Dalessandro } 776*f48ad614SDennis Dalessandro if (unlikely(qkey != qp->qkey)) { 777*f48ad614SDennis Dalessandro hfi1_bad_pqkey(ibp, OPA_TRAP_BAD_Q_KEY, qkey, 778*f48ad614SDennis Dalessandro (be16_to_cpu(hdr->lrh[0]) >> 4) & 0xF, 779*f48ad614SDennis Dalessandro src_qp, qp->ibqp.qp_num, 780*f48ad614SDennis Dalessandro be16_to_cpu(hdr->lrh[3]), 781*f48ad614SDennis Dalessandro be16_to_cpu(hdr->lrh[1])); 782*f48ad614SDennis Dalessandro return; 783*f48ad614SDennis Dalessandro } 784*f48ad614SDennis Dalessandro /* Drop invalid MAD packets (see 13.5.3.1). */ 785*f48ad614SDennis Dalessandro if (unlikely(qp->ibqp.qp_num == 1 && 786*f48ad614SDennis Dalessandro (tlen > 2048 || 787*f48ad614SDennis Dalessandro (be16_to_cpu(hdr->lrh[0]) >> 12) == 15))) 788*f48ad614SDennis Dalessandro goto drop; 789*f48ad614SDennis Dalessandro } else { 790*f48ad614SDennis Dalessandro /* Received on QP0, and so by definition, this is an SMP */ 791*f48ad614SDennis Dalessandro struct opa_smp *smp = (struct opa_smp *)data; 792*f48ad614SDennis Dalessandro u16 slid = be16_to_cpu(hdr->lrh[3]); 793*f48ad614SDennis Dalessandro u8 sc5; 794*f48ad614SDennis Dalessandro 795*f48ad614SDennis Dalessandro sc5 = (be16_to_cpu(hdr->lrh[0]) >> 12) & 0xf; 796*f48ad614SDennis Dalessandro sc5 |= sc4_bit; 797*f48ad614SDennis Dalessandro 798*f48ad614SDennis Dalessandro if (opa_smp_check(ibp, pkey, sc5, qp, slid, smp)) 799*f48ad614SDennis Dalessandro goto drop; 800*f48ad614SDennis Dalessandro 801*f48ad614SDennis Dalessandro if (tlen > 2048) 802*f48ad614SDennis Dalessandro goto drop; 803*f48ad614SDennis Dalessandro if ((hdr->lrh[1] == IB_LID_PERMISSIVE || 804*f48ad614SDennis Dalessandro hdr->lrh[3] == IB_LID_PERMISSIVE) && 805*f48ad614SDennis Dalessandro smp->mgmt_class != IB_MGMT_CLASS_SUBN_DIRECTED_ROUTE) 806*f48ad614SDennis Dalessandro goto drop; 807*f48ad614SDennis Dalessandro 808*f48ad614SDennis Dalessandro /* look up SMI pkey */ 809*f48ad614SDennis Dalessandro mgmt_pkey_idx = hfi1_lookup_pkey_idx(ibp, pkey); 810*f48ad614SDennis Dalessandro if (mgmt_pkey_idx < 0) 811*f48ad614SDennis Dalessandro goto drop; 812*f48ad614SDennis Dalessandro } 813*f48ad614SDennis Dalessandro 814*f48ad614SDennis Dalessandro if (qp->ibqp.qp_num > 1 && 815*f48ad614SDennis Dalessandro opcode == IB_OPCODE_UD_SEND_ONLY_WITH_IMMEDIATE) { 816*f48ad614SDennis Dalessandro wc.ex.imm_data = ohdr->u.ud.imm_data; 817*f48ad614SDennis Dalessandro wc.wc_flags = IB_WC_WITH_IMM; 818*f48ad614SDennis Dalessandro tlen -= sizeof(u32); 819*f48ad614SDennis Dalessandro } else if (opcode == IB_OPCODE_UD_SEND_ONLY) { 820*f48ad614SDennis Dalessandro wc.ex.imm_data = 0; 821*f48ad614SDennis Dalessandro wc.wc_flags = 0; 822*f48ad614SDennis Dalessandro } else { 823*f48ad614SDennis Dalessandro goto drop; 824*f48ad614SDennis Dalessandro } 825*f48ad614SDennis Dalessandro 826*f48ad614SDennis Dalessandro /* 827*f48ad614SDennis Dalessandro * A GRH is expected to precede the data even if not 828*f48ad614SDennis Dalessandro * present on the wire. 829*f48ad614SDennis Dalessandro */ 830*f48ad614SDennis Dalessandro wc.byte_len = tlen + sizeof(struct ib_grh); 831*f48ad614SDennis Dalessandro 832*f48ad614SDennis Dalessandro /* 833*f48ad614SDennis Dalessandro * Get the next work request entry to find where to put the data. 834*f48ad614SDennis Dalessandro */ 835*f48ad614SDennis Dalessandro if (qp->r_flags & RVT_R_REUSE_SGE) { 836*f48ad614SDennis Dalessandro qp->r_flags &= ~RVT_R_REUSE_SGE; 837*f48ad614SDennis Dalessandro } else { 838*f48ad614SDennis Dalessandro int ret; 839*f48ad614SDennis Dalessandro 840*f48ad614SDennis Dalessandro ret = hfi1_rvt_get_rwqe(qp, 0); 841*f48ad614SDennis Dalessandro if (ret < 0) { 842*f48ad614SDennis Dalessandro hfi1_rc_error(qp, IB_WC_LOC_QP_OP_ERR); 843*f48ad614SDennis Dalessandro return; 844*f48ad614SDennis Dalessandro } 845*f48ad614SDennis Dalessandro if (!ret) { 846*f48ad614SDennis Dalessandro if (qp->ibqp.qp_num == 0) 847*f48ad614SDennis Dalessandro ibp->rvp.n_vl15_dropped++; 848*f48ad614SDennis Dalessandro return; 849*f48ad614SDennis Dalessandro } 850*f48ad614SDennis Dalessandro } 851*f48ad614SDennis Dalessandro /* Silently drop packets which are too big. */ 852*f48ad614SDennis Dalessandro if (unlikely(wc.byte_len > qp->r_len)) { 853*f48ad614SDennis Dalessandro qp->r_flags |= RVT_R_REUSE_SGE; 854*f48ad614SDennis Dalessandro goto drop; 855*f48ad614SDennis Dalessandro } 856*f48ad614SDennis Dalessandro if (has_grh) { 857*f48ad614SDennis Dalessandro hfi1_copy_sge(&qp->r_sge, &hdr->u.l.grh, 858*f48ad614SDennis Dalessandro sizeof(struct ib_grh), 1, 0); 859*f48ad614SDennis Dalessandro wc.wc_flags |= IB_WC_GRH; 860*f48ad614SDennis Dalessandro } else { 861*f48ad614SDennis Dalessandro hfi1_skip_sge(&qp->r_sge, sizeof(struct ib_grh), 1); 862*f48ad614SDennis Dalessandro } 863*f48ad614SDennis Dalessandro hfi1_copy_sge(&qp->r_sge, data, wc.byte_len - sizeof(struct ib_grh), 864*f48ad614SDennis Dalessandro 1, 0); 865*f48ad614SDennis Dalessandro rvt_put_ss(&qp->r_sge); 866*f48ad614SDennis Dalessandro if (!test_and_clear_bit(RVT_R_WRID_VALID, &qp->r_aflags)) 867*f48ad614SDennis Dalessandro return; 868*f48ad614SDennis Dalessandro wc.wr_id = qp->r_wr_id; 869*f48ad614SDennis Dalessandro wc.status = IB_WC_SUCCESS; 870*f48ad614SDennis Dalessandro wc.opcode = IB_WC_RECV; 871*f48ad614SDennis Dalessandro wc.vendor_err = 0; 872*f48ad614SDennis Dalessandro wc.qp = &qp->ibqp; 873*f48ad614SDennis Dalessandro wc.src_qp = src_qp; 874*f48ad614SDennis Dalessandro 875*f48ad614SDennis Dalessandro if (qp->ibqp.qp_type == IB_QPT_GSI || 876*f48ad614SDennis Dalessandro qp->ibqp.qp_type == IB_QPT_SMI) { 877*f48ad614SDennis Dalessandro if (mgmt_pkey_idx < 0) { 878*f48ad614SDennis Dalessandro if (net_ratelimit()) { 879*f48ad614SDennis Dalessandro struct hfi1_pportdata *ppd = ppd_from_ibp(ibp); 880*f48ad614SDennis Dalessandro struct hfi1_devdata *dd = ppd->dd; 881*f48ad614SDennis Dalessandro 882*f48ad614SDennis Dalessandro dd_dev_err(dd, "QP type %d mgmt_pkey_idx < 0 and packet not dropped???\n", 883*f48ad614SDennis Dalessandro qp->ibqp.qp_type); 884*f48ad614SDennis Dalessandro mgmt_pkey_idx = 0; 885*f48ad614SDennis Dalessandro } 886*f48ad614SDennis Dalessandro } 887*f48ad614SDennis Dalessandro wc.pkey_index = (unsigned)mgmt_pkey_idx; 888*f48ad614SDennis Dalessandro } else { 889*f48ad614SDennis Dalessandro wc.pkey_index = 0; 890*f48ad614SDennis Dalessandro } 891*f48ad614SDennis Dalessandro 892*f48ad614SDennis Dalessandro wc.slid = be16_to_cpu(hdr->lrh[3]); 893*f48ad614SDennis Dalessandro sc = (be16_to_cpu(hdr->lrh[0]) >> 12) & 0xf; 894*f48ad614SDennis Dalessandro sc |= sc4_bit; 895*f48ad614SDennis Dalessandro wc.sl = ibp->sc_to_sl[sc]; 896*f48ad614SDennis Dalessandro 897*f48ad614SDennis Dalessandro /* 898*f48ad614SDennis Dalessandro * Save the LMC lower bits if the destination LID is a unicast LID. 899*f48ad614SDennis Dalessandro */ 900*f48ad614SDennis Dalessandro wc.dlid_path_bits = dlid >= be16_to_cpu(IB_MULTICAST_LID_BASE) ? 0 : 901*f48ad614SDennis Dalessandro dlid & ((1 << ppd_from_ibp(ibp)->lmc) - 1); 902*f48ad614SDennis Dalessandro wc.port_num = qp->port_num; 903*f48ad614SDennis Dalessandro /* Signal completion event if the solicited bit is set. */ 904*f48ad614SDennis Dalessandro rvt_cq_enter(ibcq_to_rvtcq(qp->ibqp.recv_cq), &wc, 905*f48ad614SDennis Dalessandro (ohdr->bth[0] & 906*f48ad614SDennis Dalessandro cpu_to_be32(IB_BTH_SOLICITED)) != 0); 907*f48ad614SDennis Dalessandro return; 908*f48ad614SDennis Dalessandro 909*f48ad614SDennis Dalessandro drop: 910*f48ad614SDennis Dalessandro ibp->rvp.n_pkt_drops++; 911*f48ad614SDennis Dalessandro } 912