1 /* 2 * Copyright(c) 2015, 2016 Intel Corporation. 3 * 4 * This file is provided under a dual BSD/GPLv2 license. When using or 5 * redistributing this file, you may do so under either license. 6 * 7 * GPL LICENSE SUMMARY 8 * 9 * This program is free software; you can redistribute it and/or modify 10 * it under the terms of version 2 of the GNU General Public License as 11 * published by the Free Software Foundation. 12 * 13 * This program is distributed in the hope that it will be useful, but 14 * WITHOUT ANY WARRANTY; without even the implied warranty of 15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU 16 * General Public License for more details. 17 * 18 * BSD LICENSE 19 * 20 * Redistribution and use in source and binary forms, with or without 21 * modification, are permitted provided that the following conditions 22 * are met: 23 * 24 * - Redistributions of source code must retain the above copyright 25 * notice, this list of conditions and the following disclaimer. 26 * - Redistributions in binary form must reproduce the above copyright 27 * notice, this list of conditions and the following disclaimer in 28 * the documentation and/or other materials provided with the 29 * distribution. 30 * - Neither the name of Intel Corporation nor the names of its 31 * contributors may be used to endorse or promote products derived 32 * from this software without specific prior written permission. 33 * 34 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 35 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 36 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 37 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 38 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 39 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 40 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 41 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 42 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 43 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 44 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 45 * 46 */ 47 48 #include "hfi.h" 49 #include "verbs_txreq.h" 50 #include "qp.h" 51 52 /* cut down ridiculously long IB macro names */ 53 #define OP(x) UC_OP(x) 54 55 /** 56 * hfi1_make_uc_req - construct a request packet (SEND, RDMA write) 57 * @qp: a pointer to the QP 58 * 59 * Assume s_lock is held. 60 * 61 * Return 1 if constructed; otherwise, return 0. 62 */ 63 int hfi1_make_uc_req(struct rvt_qp *qp, struct hfi1_pkt_state *ps) 64 { 65 struct hfi1_qp_priv *priv = qp->priv; 66 struct ib_other_headers *ohdr; 67 struct rvt_swqe *wqe; 68 u32 hwords; 69 u32 bth0 = 0; 70 u32 len; 71 u32 pmtu = qp->pmtu; 72 int middle = 0; 73 74 ps->s_txreq = get_txreq(ps->dev, qp); 75 if (IS_ERR(ps->s_txreq)) 76 goto bail_no_tx; 77 78 if (!(ib_rvt_state_ops[qp->state] & RVT_PROCESS_SEND_OK)) { 79 if (!(ib_rvt_state_ops[qp->state] & RVT_FLUSH_SEND)) 80 goto bail; 81 /* We are in the error state, flush the work request. */ 82 if (qp->s_last == READ_ONCE(qp->s_head)) 83 goto bail; 84 /* If DMAs are in progress, we can't flush immediately. */ 85 if (iowait_sdma_pending(&priv->s_iowait)) { 86 qp->s_flags |= RVT_S_WAIT_DMA; 87 goto bail; 88 } 89 clear_ahg(qp); 90 wqe = rvt_get_swqe_ptr(qp, qp->s_last); 91 hfi1_send_complete(qp, wqe, IB_WC_WR_FLUSH_ERR); 92 goto done_free_tx; 93 } 94 95 if (priv->hdr_type == HFI1_PKT_TYPE_9B) { 96 /* header size in 32-bit words LRH+BTH = (8+12)/4. */ 97 hwords = 5; 98 if (rdma_ah_get_ah_flags(&qp->remote_ah_attr) & IB_AH_GRH) 99 ohdr = &ps->s_txreq->phdr.hdr.ibh.u.l.oth; 100 else 101 ohdr = &ps->s_txreq->phdr.hdr.ibh.u.oth; 102 } else { 103 /* header size in 32-bit words 16B LRH+BTH = (16+12)/4. */ 104 hwords = 7; 105 if ((rdma_ah_get_ah_flags(&qp->remote_ah_attr) & IB_AH_GRH) && 106 (hfi1_check_mcast(rdma_ah_get_dlid(&qp->remote_ah_attr)))) 107 ohdr = &ps->s_txreq->phdr.hdr.opah.u.l.oth; 108 else 109 ohdr = &ps->s_txreq->phdr.hdr.opah.u.oth; 110 } 111 112 /* Get the next send request. */ 113 wqe = rvt_get_swqe_ptr(qp, qp->s_cur); 114 qp->s_wqe = NULL; 115 switch (qp->s_state) { 116 default: 117 if (!(ib_rvt_state_ops[qp->state] & 118 RVT_PROCESS_NEXT_SEND_OK)) 119 goto bail; 120 /* Check if send work queue is empty. */ 121 if (qp->s_cur == READ_ONCE(qp->s_head)) { 122 clear_ahg(qp); 123 goto bail; 124 } 125 /* 126 * Local operations are processed immediately 127 * after all prior requests have completed. 128 */ 129 if (wqe->wr.opcode == IB_WR_REG_MR || 130 wqe->wr.opcode == IB_WR_LOCAL_INV) { 131 int local_ops = 0; 132 int err = 0; 133 134 if (qp->s_last != qp->s_cur) 135 goto bail; 136 if (++qp->s_cur == qp->s_size) 137 qp->s_cur = 0; 138 if (!(wqe->wr.send_flags & RVT_SEND_COMPLETION_ONLY)) { 139 err = rvt_invalidate_rkey( 140 qp, wqe->wr.ex.invalidate_rkey); 141 local_ops = 1; 142 } 143 hfi1_send_complete(qp, wqe, err ? IB_WC_LOC_PROT_ERR 144 : IB_WC_SUCCESS); 145 if (local_ops) 146 atomic_dec(&qp->local_ops_pending); 147 qp->s_hdrwords = 0; 148 goto done_free_tx; 149 } 150 /* 151 * Start a new request. 152 */ 153 qp->s_psn = wqe->psn; 154 qp->s_sge.sge = wqe->sg_list[0]; 155 qp->s_sge.sg_list = wqe->sg_list + 1; 156 qp->s_sge.num_sge = wqe->wr.num_sge; 157 qp->s_sge.total_len = wqe->length; 158 len = wqe->length; 159 qp->s_len = len; 160 switch (wqe->wr.opcode) { 161 case IB_WR_SEND: 162 case IB_WR_SEND_WITH_IMM: 163 if (len > pmtu) { 164 qp->s_state = OP(SEND_FIRST); 165 len = pmtu; 166 break; 167 } 168 if (wqe->wr.opcode == IB_WR_SEND) { 169 qp->s_state = OP(SEND_ONLY); 170 } else { 171 qp->s_state = 172 OP(SEND_ONLY_WITH_IMMEDIATE); 173 /* Immediate data comes after the BTH */ 174 ohdr->u.imm_data = wqe->wr.ex.imm_data; 175 hwords += 1; 176 } 177 if (wqe->wr.send_flags & IB_SEND_SOLICITED) 178 bth0 |= IB_BTH_SOLICITED; 179 qp->s_wqe = wqe; 180 if (++qp->s_cur >= qp->s_size) 181 qp->s_cur = 0; 182 break; 183 184 case IB_WR_RDMA_WRITE: 185 case IB_WR_RDMA_WRITE_WITH_IMM: 186 ohdr->u.rc.reth.vaddr = 187 cpu_to_be64(wqe->rdma_wr.remote_addr); 188 ohdr->u.rc.reth.rkey = 189 cpu_to_be32(wqe->rdma_wr.rkey); 190 ohdr->u.rc.reth.length = cpu_to_be32(len); 191 hwords += sizeof(struct ib_reth) / 4; 192 if (len > pmtu) { 193 qp->s_state = OP(RDMA_WRITE_FIRST); 194 len = pmtu; 195 break; 196 } 197 if (wqe->wr.opcode == IB_WR_RDMA_WRITE) { 198 qp->s_state = OP(RDMA_WRITE_ONLY); 199 } else { 200 qp->s_state = 201 OP(RDMA_WRITE_ONLY_WITH_IMMEDIATE); 202 /* Immediate data comes after the RETH */ 203 ohdr->u.rc.imm_data = wqe->wr.ex.imm_data; 204 hwords += 1; 205 if (wqe->wr.send_flags & IB_SEND_SOLICITED) 206 bth0 |= IB_BTH_SOLICITED; 207 } 208 qp->s_wqe = wqe; 209 if (++qp->s_cur >= qp->s_size) 210 qp->s_cur = 0; 211 break; 212 213 default: 214 goto bail; 215 } 216 break; 217 218 case OP(SEND_FIRST): 219 qp->s_state = OP(SEND_MIDDLE); 220 /* FALLTHROUGH */ 221 case OP(SEND_MIDDLE): 222 len = qp->s_len; 223 if (len > pmtu) { 224 len = pmtu; 225 middle = HFI1_CAP_IS_KSET(SDMA_AHG); 226 break; 227 } 228 if (wqe->wr.opcode == IB_WR_SEND) { 229 qp->s_state = OP(SEND_LAST); 230 } else { 231 qp->s_state = OP(SEND_LAST_WITH_IMMEDIATE); 232 /* Immediate data comes after the BTH */ 233 ohdr->u.imm_data = wqe->wr.ex.imm_data; 234 hwords += 1; 235 } 236 if (wqe->wr.send_flags & IB_SEND_SOLICITED) 237 bth0 |= IB_BTH_SOLICITED; 238 qp->s_wqe = wqe; 239 if (++qp->s_cur >= qp->s_size) 240 qp->s_cur = 0; 241 break; 242 243 case OP(RDMA_WRITE_FIRST): 244 qp->s_state = OP(RDMA_WRITE_MIDDLE); 245 /* FALLTHROUGH */ 246 case OP(RDMA_WRITE_MIDDLE): 247 len = qp->s_len; 248 if (len > pmtu) { 249 len = pmtu; 250 middle = HFI1_CAP_IS_KSET(SDMA_AHG); 251 break; 252 } 253 if (wqe->wr.opcode == IB_WR_RDMA_WRITE) { 254 qp->s_state = OP(RDMA_WRITE_LAST); 255 } else { 256 qp->s_state = 257 OP(RDMA_WRITE_LAST_WITH_IMMEDIATE); 258 /* Immediate data comes after the BTH */ 259 ohdr->u.imm_data = wqe->wr.ex.imm_data; 260 hwords += 1; 261 if (wqe->wr.send_flags & IB_SEND_SOLICITED) 262 bth0 |= IB_BTH_SOLICITED; 263 } 264 qp->s_wqe = wqe; 265 if (++qp->s_cur >= qp->s_size) 266 qp->s_cur = 0; 267 break; 268 } 269 qp->s_len -= len; 270 qp->s_hdrwords = hwords; 271 ps->s_txreq->sde = priv->s_sde; 272 ps->s_txreq->ss = &qp->s_sge; 273 ps->s_txreq->s_cur_size = len; 274 hfi1_make_ruc_header(qp, ohdr, bth0 | (qp->s_state << 24), 275 mask_psn(qp->s_psn++), middle, ps); 276 /* pbc */ 277 ps->s_txreq->hdr_dwords = qp->s_hdrwords + 2; 278 return 1; 279 280 done_free_tx: 281 hfi1_put_txreq(ps->s_txreq); 282 ps->s_txreq = NULL; 283 return 1; 284 285 bail: 286 hfi1_put_txreq(ps->s_txreq); 287 288 bail_no_tx: 289 ps->s_txreq = NULL; 290 qp->s_flags &= ~RVT_S_BUSY; 291 qp->s_hdrwords = 0; 292 return 0; 293 } 294 295 /** 296 * hfi1_uc_rcv - handle an incoming UC packet 297 * @ibp: the port the packet came in on 298 * @hdr: the header of the packet 299 * @rcv_flags: flags relevant to rcv processing 300 * @data: the packet data 301 * @tlen: the length of the packet 302 * @qp: the QP for this packet. 303 * 304 * This is called from qp_rcv() to process an incoming UC packet 305 * for the given QP. 306 * Called at interrupt level. 307 */ 308 void hfi1_uc_rcv(struct hfi1_packet *packet) 309 { 310 struct hfi1_ibport *ibp = rcd_to_iport(packet->rcd); 311 void *data = packet->payload; 312 u32 tlen = packet->tlen; 313 struct rvt_qp *qp = packet->qp; 314 struct ib_other_headers *ohdr = packet->ohdr; 315 u32 opcode = packet->opcode; 316 u32 hdrsize = packet->hlen; 317 u32 psn; 318 u32 pad = packet->pad; 319 struct ib_wc wc; 320 u32 pmtu = qp->pmtu; 321 struct ib_reth *reth; 322 int ret; 323 u8 extra_bytes = pad + packet->extra_byte + (SIZE_OF_CRC << 2); 324 325 if (hfi1_ruc_check_hdr(ibp, packet)) 326 return; 327 328 process_ecn(qp, packet, true); 329 330 psn = ib_bth_get_psn(ohdr); 331 /* Compare the PSN verses the expected PSN. */ 332 if (unlikely(cmp_psn(psn, qp->r_psn) != 0)) { 333 /* 334 * Handle a sequence error. 335 * Silently drop any current message. 336 */ 337 qp->r_psn = psn; 338 inv: 339 if (qp->r_state == OP(SEND_FIRST) || 340 qp->r_state == OP(SEND_MIDDLE)) { 341 set_bit(RVT_R_REWIND_SGE, &qp->r_aflags); 342 qp->r_sge.num_sge = 0; 343 } else { 344 rvt_put_ss(&qp->r_sge); 345 } 346 qp->r_state = OP(SEND_LAST); 347 switch (opcode) { 348 case OP(SEND_FIRST): 349 case OP(SEND_ONLY): 350 case OP(SEND_ONLY_WITH_IMMEDIATE): 351 goto send_first; 352 353 case OP(RDMA_WRITE_FIRST): 354 case OP(RDMA_WRITE_ONLY): 355 case OP(RDMA_WRITE_ONLY_WITH_IMMEDIATE): 356 goto rdma_first; 357 358 default: 359 goto drop; 360 } 361 } 362 363 /* Check for opcode sequence errors. */ 364 switch (qp->r_state) { 365 case OP(SEND_FIRST): 366 case OP(SEND_MIDDLE): 367 if (opcode == OP(SEND_MIDDLE) || 368 opcode == OP(SEND_LAST) || 369 opcode == OP(SEND_LAST_WITH_IMMEDIATE)) 370 break; 371 goto inv; 372 373 case OP(RDMA_WRITE_FIRST): 374 case OP(RDMA_WRITE_MIDDLE): 375 if (opcode == OP(RDMA_WRITE_MIDDLE) || 376 opcode == OP(RDMA_WRITE_LAST) || 377 opcode == OP(RDMA_WRITE_LAST_WITH_IMMEDIATE)) 378 break; 379 goto inv; 380 381 default: 382 if (opcode == OP(SEND_FIRST) || 383 opcode == OP(SEND_ONLY) || 384 opcode == OP(SEND_ONLY_WITH_IMMEDIATE) || 385 opcode == OP(RDMA_WRITE_FIRST) || 386 opcode == OP(RDMA_WRITE_ONLY) || 387 opcode == OP(RDMA_WRITE_ONLY_WITH_IMMEDIATE)) 388 break; 389 goto inv; 390 } 391 392 if (qp->state == IB_QPS_RTR && !(qp->r_flags & RVT_R_COMM_EST)) 393 rvt_comm_est(qp); 394 395 /* OK, process the packet. */ 396 switch (opcode) { 397 case OP(SEND_FIRST): 398 case OP(SEND_ONLY): 399 case OP(SEND_ONLY_WITH_IMMEDIATE): 400 send_first: 401 if (test_and_clear_bit(RVT_R_REWIND_SGE, &qp->r_aflags)) { 402 qp->r_sge = qp->s_rdma_read_sge; 403 } else { 404 ret = hfi1_rvt_get_rwqe(qp, 0); 405 if (ret < 0) 406 goto op_err; 407 if (!ret) 408 goto drop; 409 /* 410 * qp->s_rdma_read_sge will be the owner 411 * of the mr references. 412 */ 413 qp->s_rdma_read_sge = qp->r_sge; 414 } 415 qp->r_rcv_len = 0; 416 if (opcode == OP(SEND_ONLY)) 417 goto no_immediate_data; 418 else if (opcode == OP(SEND_ONLY_WITH_IMMEDIATE)) 419 goto send_last_imm; 420 /* FALLTHROUGH */ 421 case OP(SEND_MIDDLE): 422 /* Check for invalid length PMTU or posted rwqe len. */ 423 /* 424 * There will be no padding for 9B packet but 16B packets 425 * will come in with some padding since we always add 426 * CRC and LT bytes which will need to be flit aligned 427 */ 428 if (unlikely(tlen != (hdrsize + pmtu + extra_bytes))) 429 goto rewind; 430 qp->r_rcv_len += pmtu; 431 if (unlikely(qp->r_rcv_len > qp->r_len)) 432 goto rewind; 433 hfi1_copy_sge(&qp->r_sge, data, pmtu, false, false); 434 break; 435 436 case OP(SEND_LAST_WITH_IMMEDIATE): 437 send_last_imm: 438 wc.ex.imm_data = ohdr->u.imm_data; 439 wc.wc_flags = IB_WC_WITH_IMM; 440 goto send_last; 441 case OP(SEND_LAST): 442 no_immediate_data: 443 wc.ex.imm_data = 0; 444 wc.wc_flags = 0; 445 send_last: 446 /* Check for invalid length. */ 447 /* LAST len should be >= 1 */ 448 if (unlikely(tlen < (hdrsize + extra_bytes))) 449 goto rewind; 450 /* Don't count the CRC. */ 451 tlen -= (hdrsize + extra_bytes); 452 wc.byte_len = tlen + qp->r_rcv_len; 453 if (unlikely(wc.byte_len > qp->r_len)) 454 goto rewind; 455 wc.opcode = IB_WC_RECV; 456 hfi1_copy_sge(&qp->r_sge, data, tlen, false, false); 457 rvt_put_ss(&qp->s_rdma_read_sge); 458 last_imm: 459 wc.wr_id = qp->r_wr_id; 460 wc.status = IB_WC_SUCCESS; 461 wc.qp = &qp->ibqp; 462 wc.src_qp = qp->remote_qpn; 463 wc.slid = rdma_ah_get_dlid(&qp->remote_ah_attr) & U16_MAX; 464 /* 465 * It seems that IB mandates the presence of an SL in a 466 * work completion only for the UD transport (see section 467 * 11.4.2 of IBTA Vol. 1). 468 * 469 * However, the way the SL is chosen below is consistent 470 * with the way that IB/qib works and is trying avoid 471 * introducing incompatibilities. 472 * 473 * See also OPA Vol. 1, section 9.7.6, and table 9-17. 474 */ 475 wc.sl = rdma_ah_get_sl(&qp->remote_ah_attr); 476 /* zero fields that are N/A */ 477 wc.vendor_err = 0; 478 wc.pkey_index = 0; 479 wc.dlid_path_bits = 0; 480 wc.port_num = 0; 481 /* Signal completion event if the solicited bit is set. */ 482 rvt_cq_enter(ibcq_to_rvtcq(qp->ibqp.recv_cq), &wc, 483 (ohdr->bth[0] & 484 cpu_to_be32(IB_BTH_SOLICITED)) != 0); 485 break; 486 487 case OP(RDMA_WRITE_FIRST): 488 case OP(RDMA_WRITE_ONLY): 489 case OP(RDMA_WRITE_ONLY_WITH_IMMEDIATE): /* consume RWQE */ 490 rdma_first: 491 if (unlikely(!(qp->qp_access_flags & 492 IB_ACCESS_REMOTE_WRITE))) { 493 goto drop; 494 } 495 reth = &ohdr->u.rc.reth; 496 qp->r_len = be32_to_cpu(reth->length); 497 qp->r_rcv_len = 0; 498 qp->r_sge.sg_list = NULL; 499 if (qp->r_len != 0) { 500 u32 rkey = be32_to_cpu(reth->rkey); 501 u64 vaddr = be64_to_cpu(reth->vaddr); 502 int ok; 503 504 /* Check rkey */ 505 ok = rvt_rkey_ok(qp, &qp->r_sge.sge, qp->r_len, 506 vaddr, rkey, IB_ACCESS_REMOTE_WRITE); 507 if (unlikely(!ok)) 508 goto drop; 509 qp->r_sge.num_sge = 1; 510 } else { 511 qp->r_sge.num_sge = 0; 512 qp->r_sge.sge.mr = NULL; 513 qp->r_sge.sge.vaddr = NULL; 514 qp->r_sge.sge.length = 0; 515 qp->r_sge.sge.sge_length = 0; 516 } 517 if (opcode == OP(RDMA_WRITE_ONLY)) { 518 goto rdma_last; 519 } else if (opcode == OP(RDMA_WRITE_ONLY_WITH_IMMEDIATE)) { 520 wc.ex.imm_data = ohdr->u.rc.imm_data; 521 goto rdma_last_imm; 522 } 523 /* FALLTHROUGH */ 524 case OP(RDMA_WRITE_MIDDLE): 525 /* Check for invalid length PMTU or posted rwqe len. */ 526 if (unlikely(tlen != (hdrsize + pmtu + 4))) 527 goto drop; 528 qp->r_rcv_len += pmtu; 529 if (unlikely(qp->r_rcv_len > qp->r_len)) 530 goto drop; 531 hfi1_copy_sge(&qp->r_sge, data, pmtu, true, false); 532 break; 533 534 case OP(RDMA_WRITE_LAST_WITH_IMMEDIATE): 535 wc.ex.imm_data = ohdr->u.imm_data; 536 rdma_last_imm: 537 wc.wc_flags = IB_WC_WITH_IMM; 538 539 /* Check for invalid length. */ 540 /* LAST len should be >= 1 */ 541 if (unlikely(tlen < (hdrsize + pad + 4))) 542 goto drop; 543 /* Don't count the CRC. */ 544 tlen -= (hdrsize + extra_bytes); 545 if (unlikely(tlen + qp->r_rcv_len != qp->r_len)) 546 goto drop; 547 if (test_and_clear_bit(RVT_R_REWIND_SGE, &qp->r_aflags)) { 548 rvt_put_ss(&qp->s_rdma_read_sge); 549 } else { 550 ret = hfi1_rvt_get_rwqe(qp, 1); 551 if (ret < 0) 552 goto op_err; 553 if (!ret) 554 goto drop; 555 } 556 wc.byte_len = qp->r_len; 557 wc.opcode = IB_WC_RECV_RDMA_WITH_IMM; 558 hfi1_copy_sge(&qp->r_sge, data, tlen, true, false); 559 rvt_put_ss(&qp->r_sge); 560 goto last_imm; 561 562 case OP(RDMA_WRITE_LAST): 563 rdma_last: 564 /* Check for invalid length. */ 565 /* LAST len should be >= 1 */ 566 if (unlikely(tlen < (hdrsize + pad + 4))) 567 goto drop; 568 /* Don't count the CRC. */ 569 tlen -= (hdrsize + extra_bytes); 570 if (unlikely(tlen + qp->r_rcv_len != qp->r_len)) 571 goto drop; 572 hfi1_copy_sge(&qp->r_sge, data, tlen, true, false); 573 rvt_put_ss(&qp->r_sge); 574 break; 575 576 default: 577 /* Drop packet for unknown opcodes. */ 578 goto drop; 579 } 580 qp->r_psn++; 581 qp->r_state = opcode; 582 return; 583 584 rewind: 585 set_bit(RVT_R_REWIND_SGE, &qp->r_aflags); 586 qp->r_sge.num_sge = 0; 587 drop: 588 ibp->rvp.n_pkt_drops++; 589 return; 590 591 op_err: 592 rvt_rc_error(qp, IB_WC_LOC_QP_OP_ERR); 593 } 594