xref: /linux/drivers/infiniband/hw/hfi1/mad.h (revision 24168c5e6dfbdd5b414f048f47f75d64533296ca)
1 /* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause */
2 /*
3  * Copyright(c) 2015 - 2017 Intel Corporation.
4  */
5 
6 #ifndef _HFI1_MAD_H
7 #define _HFI1_MAD_H
8 
9 #include <rdma/ib_pma.h>
10 #include <rdma/opa_smi.h>
11 #include <rdma/opa_port_info.h>
12 #include "opa_compat.h"
13 
14 /*
15  * OPA Traps
16  */
17 #define OPA_TRAP_GID_NOW_IN_SERVICE             cpu_to_be16(64)
18 #define OPA_TRAP_GID_OUT_OF_SERVICE             cpu_to_be16(65)
19 #define OPA_TRAP_ADD_MULTICAST_GROUP            cpu_to_be16(66)
20 #define OPA_TRAL_DEL_MULTICAST_GROUP            cpu_to_be16(67)
21 #define OPA_TRAP_UNPATH                         cpu_to_be16(68)
22 #define OPA_TRAP_REPATH                         cpu_to_be16(69)
23 #define OPA_TRAP_PORT_CHANGE_STATE              cpu_to_be16(128)
24 #define OPA_TRAP_LINK_INTEGRITY                 cpu_to_be16(129)
25 #define OPA_TRAP_EXCESSIVE_BUFFER_OVERRUN       cpu_to_be16(130)
26 #define OPA_TRAP_FLOW_WATCHDOG                  cpu_to_be16(131)
27 #define OPA_TRAP_CHANGE_CAPABILITY              cpu_to_be16(144)
28 #define OPA_TRAP_CHANGE_SYSGUID                 cpu_to_be16(145)
29 #define OPA_TRAP_BAD_M_KEY                      cpu_to_be16(256)
30 #define OPA_TRAP_BAD_P_KEY                      cpu_to_be16(257)
31 #define OPA_TRAP_BAD_Q_KEY                      cpu_to_be16(258)
32 #define OPA_TRAP_SWITCH_BAD_PKEY                cpu_to_be16(259)
33 #define OPA_SMA_TRAP_DATA_LINK_WIDTH            cpu_to_be16(2048)
34 
35 /*
36  * Generic trap/notice other local changes flags (trap 144).
37  */
38 #define	OPA_NOTICE_TRAP_LWDE_CHG        0x08 /* Link Width Downgrade Enable
39 					      * changed
40 					      */
41 #define OPA_NOTICE_TRAP_LSE_CHG         0x04 /* Link Speed Enable changed */
42 #define OPA_NOTICE_TRAP_LWE_CHG         0x02 /* Link Width Enable changed */
43 #define OPA_NOTICE_TRAP_NODE_DESC_CHG   0x01
44 
45 struct opa_mad_notice_attr {
46 	u8 generic_type;
47 	u8 prod_type_msb;
48 	__be16 prod_type_lsb;
49 	__be16 trap_num;
50 	__be16 toggle_count;
51 	__be32 issuer_lid;
52 	__be32 reserved1;
53 	union ib_gid issuer_gid;
54 
55 	union {
56 		struct {
57 			u8	details[64];
58 		} raw_data;
59 
60 		struct {
61 			union ib_gid	gid;
62 		} __packed ntc_64_65_66_67;
63 
64 		struct {
65 			__be32	lid;
66 		} __packed ntc_128;
67 
68 		struct {
69 			__be32	lid;		/* where violation happened */
70 			u8	port_num;	/* where violation happened */
71 		} __packed ntc_129_130_131;
72 
73 		struct {
74 			__be32	lid;		/* LID where change occurred */
75 			__be32	new_cap_mask;	/* new capability mask */
76 			__be16	reserved2;
77 			__be16	cap_mask3;
78 			__be16	change_flags;	/* low 4 bits only */
79 		} __packed ntc_144;
80 
81 		struct {
82 			__be64	new_sys_guid;
83 			__be32	lid;		/* lid where sys guid changed */
84 		} __packed ntc_145;
85 
86 		struct {
87 			__be32	lid;
88 			__be32	dr_slid;
89 			u8	method;
90 			u8	dr_trunc_hop;
91 			__be16	attr_id;
92 			__be32	attr_mod;
93 			__be64	mkey;
94 			u8	dr_rtn_path[30];
95 		} __packed ntc_256;
96 
97 		struct {
98 			__be32		lid1;
99 			__be32		lid2;
100 			__be32		key;
101 			u8		sl;	/* SL: high 5 bits */
102 			u8		reserved3[3];
103 			union ib_gid	gid1;
104 			union ib_gid	gid2;
105 			__be32		qp1;	/* high 8 bits reserved */
106 			__be32		qp2;	/* high 8 bits reserved */
107 		} __packed ntc_257_258;
108 
109 		struct {
110 			__be16		flags;	/* low 8 bits reserved */
111 			__be16		pkey;
112 			__be32		lid1;
113 			__be32		lid2;
114 			u8		sl;	/* SL: high 5 bits */
115 			u8		reserved4[3];
116 			union ib_gid	gid1;
117 			union ib_gid	gid2;
118 			__be32		qp1;	/* high 8 bits reserved */
119 			__be32		qp2;	/* high 8 bits reserved */
120 		} __packed ntc_259;
121 
122 		struct {
123 			__be32	lid;
124 		} __packed ntc_2048;
125 
126 	};
127 	u8	class_data[];
128 };
129 
130 #define IB_VLARB_LOWPRI_0_31    1
131 #define IB_VLARB_LOWPRI_32_63   2
132 #define IB_VLARB_HIGHPRI_0_31   3
133 #define IB_VLARB_HIGHPRI_32_63  4
134 
135 #define OPA_MAX_PREEMPT_CAP         32
136 #define OPA_VLARB_LOW_ELEMENTS       0
137 #define OPA_VLARB_HIGH_ELEMENTS      1
138 #define OPA_VLARB_PREEMPT_ELEMENTS   2
139 #define OPA_VLARB_PREEMPT_MATRIX     3
140 
141 #define IB_PMA_PORT_COUNTERS_CONG       cpu_to_be16(0xFF00)
142 #define LINK_SPEED_25G		1
143 #define LINK_SPEED_12_5G	2
144 #define LINK_WIDTH_DEFAULT	4
145 #define DECIMAL_FACTORING	1000
146 /*
147  * The default link width is multiplied by 1000
148  * to get accurate value after division.
149  */
150 #define FACTOR_LINK_WIDTH	(LINK_WIDTH_DEFAULT * DECIMAL_FACTORING)
151 
152 struct ib_pma_portcounters_cong {
153 	u8 reserved;
154 	u8 reserved1;
155 	__be16 port_check_rate;
156 	__be16 symbol_error_counter;
157 	u8 link_error_recovery_counter;
158 	u8 link_downed_counter;
159 	__be16 port_rcv_errors;
160 	__be16 port_rcv_remphys_errors;
161 	__be16 port_rcv_switch_relay_errors;
162 	__be16 port_xmit_discards;
163 	u8 port_xmit_constraint_errors;
164 	u8 port_rcv_constraint_errors;
165 	u8 reserved2;
166 	u8 link_overrun_errors; /* LocalLink: 7:4, BufferOverrun: 3:0 */
167 	__be16 reserved3;
168 	__be16 vl15_dropped;
169 	__be64 port_xmit_data;
170 	__be64 port_rcv_data;
171 	__be64 port_xmit_packets;
172 	__be64 port_rcv_packets;
173 	__be64 port_xmit_wait;
174 	__be64 port_adr_events;
175 } __packed;
176 
177 #define IB_SMP_UNSUP_VERSION    cpu_to_be16(0x0004)
178 #define IB_SMP_UNSUP_METHOD     cpu_to_be16(0x0008)
179 #define IB_SMP_UNSUP_METH_ATTR  cpu_to_be16(0x000C)
180 #define IB_SMP_INVALID_FIELD    cpu_to_be16(0x001C)
181 
182 #define OPA_MAX_PREEMPT_CAP         32
183 #define OPA_VLARB_LOW_ELEMENTS       0
184 #define OPA_VLARB_HIGH_ELEMENTS      1
185 #define OPA_VLARB_PREEMPT_ELEMENTS   2
186 #define OPA_VLARB_PREEMPT_MATRIX     3
187 
188 #define HFI1_XMIT_RATE_UNSUPPORTED               0x0
189 #define HFI1_XMIT_RATE_PICO                      0x7
190 /* number of 4nsec cycles equaling 2secs */
191 #define HFI1_CONG_TIMER_PSINTERVAL               0x1DCD64EC
192 
193 #define IB_CC_SVCTYPE_RC 0x0
194 #define IB_CC_SVCTYPE_UC 0x1
195 #define IB_CC_SVCTYPE_RD 0x2
196 #define IB_CC_SVCTYPE_UD 0x3
197 
198 /*
199  * There should be an equivalent IB #define for the following, but
200  * I cannot find it.
201  */
202 #define OPA_CC_LOG_TYPE_HFI	2
203 
204 struct opa_hfi1_cong_log_event_internal {
205 	u32 lqpn;
206 	u32 rqpn;
207 	u8 sl;
208 	u8 svc_type;
209 	u32 rlid;
210 	u64 timestamp; /* wider than 32 bits to detect 32 bit rollover */
211 };
212 
213 struct opa_hfi1_cong_log_event {
214 	u8 local_qp_cn_entry[3];
215 	u8 remote_qp_number_cn_entry[3];
216 	u8 sl_svc_type_cn_entry; /* 5 bits SL, 3 bits svc type */
217 	u8 reserved;
218 	__be32 remote_lid_cn_entry;
219 	__be32 timestamp_cn_entry;
220 } __packed;
221 
222 #define OPA_CONG_LOG_ELEMS	96
223 
224 struct opa_hfi1_cong_log {
225 	u8 log_type;
226 	u8 congestion_flags;
227 	__be16 threshold_event_counter;
228 	__be32 current_time_stamp;
229 	u8 threshold_cong_event_map[OPA_MAX_SLS / 8];
230 	struct opa_hfi1_cong_log_event events[OPA_CONG_LOG_ELEMS];
231 } __packed;
232 
233 #define IB_CC_TABLE_CAP_DEFAULT 31
234 
235 /* Port control flags */
236 #define IB_CC_CCS_PC_SL_BASED 0x01
237 
238 struct opa_congestion_setting_entry {
239 	u8 ccti_increase;
240 	u8 reserved;
241 	__be16 ccti_timer;
242 	u8 trigger_threshold;
243 	u8 ccti_min; /* min CCTI for cc table */
244 } __packed;
245 
246 struct opa_congestion_setting_entry_shadow {
247 	u8 ccti_increase;
248 	u8 reserved;
249 	u16 ccti_timer;
250 	u8 trigger_threshold;
251 	u8 ccti_min; /* min CCTI for cc table */
252 } __packed;
253 
254 struct opa_congestion_setting_attr {
255 	__be32 control_map;
256 	__be16 port_control;
257 	struct opa_congestion_setting_entry entries[OPA_MAX_SLS];
258 } __packed;
259 
260 struct opa_congestion_setting_attr_shadow {
261 	u32 control_map;
262 	u16 port_control;
263 	struct opa_congestion_setting_entry_shadow entries[OPA_MAX_SLS];
264 } __packed;
265 
266 #define IB_CC_TABLE_ENTRY_INCREASE_DEFAULT 1
267 #define IB_CC_TABLE_ENTRY_TIMER_DEFAULT 1
268 
269 /* 64 Congestion Control table entries in a single MAD */
270 #define IB_CCT_ENTRIES 64
271 #define IB_CCT_MIN_ENTRIES (IB_CCT_ENTRIES * 2)
272 
273 struct ib_cc_table_entry {
274 	__be16 entry; /* shift:2, multiplier:14 */
275 };
276 
277 struct ib_cc_table_entry_shadow {
278 	u16 entry; /* shift:2, multiplier:14 */
279 };
280 
281 struct ib_cc_table_attr {
282 	__be16 ccti_limit; /* max CCTI for cc table */
283 	struct ib_cc_table_entry ccti_entries[IB_CCT_ENTRIES];
284 } __packed;
285 
286 struct ib_cc_table_attr_shadow {
287 	u16 ccti_limit; /* max CCTI for cc table */
288 	struct ib_cc_table_entry_shadow ccti_entries[IB_CCT_ENTRIES];
289 } __packed;
290 
291 #define CC_TABLE_SHADOW_MAX \
292 	(IB_CC_TABLE_CAP_DEFAULT * IB_CCT_ENTRIES)
293 
294 struct cc_table_shadow {
295 	u16 ccti_limit; /* max CCTI for cc table */
296 	struct ib_cc_table_entry_shadow entries[CC_TABLE_SHADOW_MAX];
297 } __packed;
298 
299 /*
300  * struct cc_state combines the (active) per-port congestion control
301  * table, and the (active) per-SL congestion settings. cc_state data
302  * may need to be read in code paths that we want to be fast, so it
303  * is an RCU protected structure.
304  */
305 struct cc_state {
306 	struct rcu_head rcu;
307 	struct cc_table_shadow cct;
308 	struct opa_congestion_setting_attr_shadow cong_setting;
309 };
310 
311 /*
312  * OPA BufferControl MAD
313  */
314 
315 /* attribute modifier macros */
316 #define OPA_AM_NPORT_SHIFT	24
317 #define OPA_AM_NPORT_MASK	0xff
318 #define OPA_AM_NPORT_SMASK	(OPA_AM_NPORT_MASK << OPA_AM_NPORT_SHIFT)
319 #define OPA_AM_NPORT(am)	(((am) >> OPA_AM_NPORT_SHIFT) & \
320 					OPA_AM_NPORT_MASK)
321 
322 #define OPA_AM_NBLK_SHIFT	24
323 #define OPA_AM_NBLK_MASK	0xff
324 #define OPA_AM_NBLK_SMASK	(OPA_AM_NBLK_MASK << OPA_AM_NBLK_SHIFT)
325 #define OPA_AM_NBLK(am)		(((am) >> OPA_AM_NBLK_SHIFT) & \
326 					OPA_AM_NBLK_MASK)
327 
328 #define OPA_AM_START_BLK_SHIFT	0
329 #define OPA_AM_START_BLK_MASK	0xff
330 #define OPA_AM_START_BLK_SMASK	(OPA_AM_START_BLK_MASK << \
331 					OPA_AM_START_BLK_SHIFT)
332 #define OPA_AM_START_BLK(am)	(((am) >> OPA_AM_START_BLK_SHIFT) & \
333 					OPA_AM_START_BLK_MASK)
334 
335 #define OPA_AM_PORTNUM_SHIFT	0
336 #define OPA_AM_PORTNUM_MASK	0xff
337 #define OPA_AM_PORTNUM_SMASK	(OPA_AM_PORTNUM_MASK << OPA_AM_PORTNUM_SHIFT)
338 #define OPA_AM_PORTNUM(am)	(((am) >> OPA_AM_PORTNUM_SHIFT) & \
339 					OPA_AM_PORTNUM_MASK)
340 
341 #define OPA_AM_ASYNC_SHIFT	12
342 #define OPA_AM_ASYNC_MASK	0x1
343 #define OPA_AM_ASYNC_SMASK	(OPA_AM_ASYNC_MASK << OPA_AM_ASYNC_SHIFT)
344 #define OPA_AM_ASYNC(am)	(((am) >> OPA_AM_ASYNC_SHIFT) & \
345 					OPA_AM_ASYNC_MASK)
346 
347 #define OPA_AM_START_SM_CFG_SHIFT	9
348 #define OPA_AM_START_SM_CFG_MASK	0x1
349 #define OPA_AM_START_SM_CFG_SMASK	(OPA_AM_START_SM_CFG_MASK << \
350 						OPA_AM_START_SM_CFG_SHIFT)
351 #define OPA_AM_START_SM_CFG(am)		(((am) >> OPA_AM_START_SM_CFG_SHIFT) \
352 						& OPA_AM_START_SM_CFG_MASK)
353 
354 #define OPA_AM_CI_ADDR_SHIFT	19
355 #define OPA_AM_CI_ADDR_MASK	0xfff
356 #define OPA_AM_CI_ADDR_SMASK	(OPA_AM_CI_ADDR_MASK << OPA_CI_ADDR_SHIFT)
357 #define OPA_AM_CI_ADDR(am)	(((am) >> OPA_AM_CI_ADDR_SHIFT) & \
358 					OPA_AM_CI_ADDR_MASK)
359 
360 #define OPA_AM_CI_LEN_SHIFT	13
361 #define OPA_AM_CI_LEN_MASK	0x3f
362 #define OPA_AM_CI_LEN_SMASK	(OPA_AM_CI_LEN_MASK << OPA_CI_LEN_SHIFT)
363 #define OPA_AM_CI_LEN(am)	(((am) >> OPA_AM_CI_LEN_SHIFT) & \
364 					OPA_AM_CI_LEN_MASK)
365 
366 /* error info macros */
367 #define OPA_EI_STATUS_SMASK	0x80
368 #define OPA_EI_CODE_SMASK	0x0f
369 
370 struct vl_limit {
371 	__be16 dedicated;
372 	__be16 shared;
373 };
374 
375 struct buffer_control {
376 	__be16 reserved;
377 	__be16 overall_shared_limit;
378 	struct vl_limit vl[OPA_MAX_VLS];
379 };
380 
381 struct sc2vlnt {
382 	u8 vlnt[32]; /* 5 bit VL, 3 bits reserved */
383 };
384 
385 /*
386  * The PortSamplesControl.CounterMasks field is an array of 3 bit fields
387  * which specify the N'th counter's capabilities. See ch. 16.1.3.2.
388  * We support 5 counters which only count the mandatory quantities.
389  */
390 #define COUNTER_MASK(q, n) (q << ((9 - n) * 3))
391 #define COUNTER_MASK0_9 \
392 	cpu_to_be32(COUNTER_MASK(1, 0) | \
393 		    COUNTER_MASK(1, 1) | \
394 		    COUNTER_MASK(1, 2) | \
395 		    COUNTER_MASK(1, 3) | \
396 		    COUNTER_MASK(1, 4))
397 
398 void hfi1_event_pkey_change(struct hfi1_devdata *dd, u32 port);
399 void hfi1_handle_trap_timer(struct timer_list *t);
400 u16 tx_link_width(u16 link_width);
401 u64 get_xmit_wait_counters(struct hfi1_pportdata *ppd, u16 link_width,
402 			   u16 link_speed, int vl);
403 /**
404  * get_link_speed - determine whether 12.5G or 25G speed
405  * @link_speed: the speed of active link
406  * @return: Return 2 if link speed identified as 12.5G
407  * or return 1 if link speed is 25G.
408  *
409  * The function indirectly calculate required link speed
410  * value for convert_xmit_counter function. If the link
411  * speed is 25G, the function return as 1 as it is required
412  * by xmit counter conversion formula :-( 25G / link_speed).
413  * This conversion will provide value 1 if current
414  * link speed is 25G or 2 if 12.5G.This is done to avoid
415  * 12.5 float number conversion.
416  */
417 static inline u16 get_link_speed(u16 link_speed)
418 {
419 	return (link_speed == 1) ?
420 		 LINK_SPEED_12_5G : LINK_SPEED_25G;
421 }
422 
423 /**
424  * convert_xmit_counter - calculate flit times for given xmit counter
425  * value
426  * @xmit_wait_val: current xmit counter value
427  * @link_width: width of active link
428  * @link_speed: speed of active link
429  * @return: return xmit counter value in flit times.
430  */
431 static inline u64 convert_xmit_counter(u64 xmit_wait_val, u16 link_width,
432 				       u16 link_speed)
433 {
434 	return (xmit_wait_val * 2 * (FACTOR_LINK_WIDTH / link_width)
435 		 * link_speed) / DECIMAL_FACTORING;
436 }
437 #endif				/* _HFI1_MAD_H */
438