1 /* 2 * Copyright(c) 2015-2017 Intel Corporation. 3 * 4 * This file is provided under a dual BSD/GPLv2 license. When using or 5 * redistributing this file, you may do so under either license. 6 * 7 * GPL LICENSE SUMMARY 8 * 9 * This program is free software; you can redistribute it and/or modify 10 * it under the terms of version 2 of the GNU General Public License as 11 * published by the Free Software Foundation. 12 * 13 * This program is distributed in the hope that it will be useful, but 14 * WITHOUT ANY WARRANTY; without even the implied warranty of 15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU 16 * General Public License for more details. 17 * 18 * BSD LICENSE 19 * 20 * Redistribution and use in source and binary forms, with or without 21 * modification, are permitted provided that the following conditions 22 * are met: 23 * 24 * - Redistributions of source code must retain the above copyright 25 * notice, this list of conditions and the following disclaimer. 26 * - Redistributions in binary form must reproduce the above copyright 27 * notice, this list of conditions and the following disclaimer in 28 * the documentation and/or other materials provided with the 29 * distribution. 30 * - Neither the name of Intel Corporation nor the names of its 31 * contributors may be used to endorse or promote products derived 32 * from this software without specific prior written permission. 33 * 34 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 35 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 36 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 37 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 38 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 39 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 40 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 41 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 42 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 43 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 44 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 45 * 46 */ 47 48 #include <linux/spinlock.h> 49 #include <linux/pci.h> 50 #include <linux/io.h> 51 #include <linux/delay.h> 52 #include <linux/netdevice.h> 53 #include <linux/vmalloc.h> 54 #include <linux/module.h> 55 #include <linux/prefetch.h> 56 #include <rdma/ib_verbs.h> 57 58 #include "hfi.h" 59 #include "trace.h" 60 #include "qp.h" 61 #include "sdma.h" 62 #include "debugfs.h" 63 #include "vnic.h" 64 65 #undef pr_fmt 66 #define pr_fmt(fmt) DRIVER_NAME ": " fmt 67 68 /* 69 * The size has to be longer than this string, so we can append 70 * board/chip information to it in the initialization code. 71 */ 72 const char ib_hfi1_version[] = HFI1_DRIVER_VERSION "\n"; 73 74 DEFINE_SPINLOCK(hfi1_devs_lock); 75 LIST_HEAD(hfi1_dev_list); 76 DEFINE_MUTEX(hfi1_mutex); /* general driver use */ 77 78 unsigned int hfi1_max_mtu = HFI1_DEFAULT_MAX_MTU; 79 module_param_named(max_mtu, hfi1_max_mtu, uint, S_IRUGO); 80 MODULE_PARM_DESC(max_mtu, "Set max MTU bytes, default is " __stringify( 81 HFI1_DEFAULT_MAX_MTU)); 82 83 unsigned int hfi1_cu = 1; 84 module_param_named(cu, hfi1_cu, uint, S_IRUGO); 85 MODULE_PARM_DESC(cu, "Credit return units"); 86 87 unsigned long hfi1_cap_mask = HFI1_CAP_MASK_DEFAULT; 88 static int hfi1_caps_set(const char *val, const struct kernel_param *kp); 89 static int hfi1_caps_get(char *buffer, const struct kernel_param *kp); 90 static const struct kernel_param_ops cap_ops = { 91 .set = hfi1_caps_set, 92 .get = hfi1_caps_get 93 }; 94 module_param_cb(cap_mask, &cap_ops, &hfi1_cap_mask, S_IWUSR | S_IRUGO); 95 MODULE_PARM_DESC(cap_mask, "Bit mask of enabled/disabled HW features"); 96 97 MODULE_LICENSE("Dual BSD/GPL"); 98 MODULE_DESCRIPTION("Intel Omni-Path Architecture driver"); 99 100 /* 101 * MAX_PKT_RCV is the max # if packets processed per receive interrupt. 102 */ 103 #define MAX_PKT_RECV 64 104 /* 105 * MAX_PKT_THREAD_RCV is the max # of packets processed before 106 * the qp_wait_list queue is flushed. 107 */ 108 #define MAX_PKT_RECV_THREAD (MAX_PKT_RECV * 4) 109 #define EGR_HEAD_UPDATE_THRESHOLD 16 110 111 struct hfi1_ib_stats hfi1_stats; 112 113 static int hfi1_caps_set(const char *val, const struct kernel_param *kp) 114 { 115 int ret = 0; 116 unsigned long *cap_mask_ptr = (unsigned long *)kp->arg, 117 cap_mask = *cap_mask_ptr, value, diff, 118 write_mask = ((HFI1_CAP_WRITABLE_MASK << HFI1_CAP_USER_SHIFT) | 119 HFI1_CAP_WRITABLE_MASK); 120 121 ret = kstrtoul(val, 0, &value); 122 if (ret) { 123 pr_warn("Invalid module parameter value for 'cap_mask'\n"); 124 goto done; 125 } 126 /* Get the changed bits (except the locked bit) */ 127 diff = value ^ (cap_mask & ~HFI1_CAP_LOCKED_SMASK); 128 129 /* Remove any bits that are not allowed to change after driver load */ 130 if (HFI1_CAP_LOCKED() && (diff & ~write_mask)) { 131 pr_warn("Ignoring non-writable capability bits %#lx\n", 132 diff & ~write_mask); 133 diff &= write_mask; 134 } 135 136 /* Mask off any reserved bits */ 137 diff &= ~HFI1_CAP_RESERVED_MASK; 138 /* Clear any previously set and changing bits */ 139 cap_mask &= ~diff; 140 /* Update the bits with the new capability */ 141 cap_mask |= (value & diff); 142 /* Check for any kernel/user restrictions */ 143 diff = (cap_mask & (HFI1_CAP_MUST_HAVE_KERN << HFI1_CAP_USER_SHIFT)) ^ 144 ((cap_mask & HFI1_CAP_MUST_HAVE_KERN) << HFI1_CAP_USER_SHIFT); 145 cap_mask &= ~diff; 146 /* Set the bitmask to the final set */ 147 *cap_mask_ptr = cap_mask; 148 done: 149 return ret; 150 } 151 152 static int hfi1_caps_get(char *buffer, const struct kernel_param *kp) 153 { 154 unsigned long cap_mask = *(unsigned long *)kp->arg; 155 156 cap_mask &= ~HFI1_CAP_LOCKED_SMASK; 157 cap_mask |= ((cap_mask & HFI1_CAP_K2U) << HFI1_CAP_USER_SHIFT); 158 159 return scnprintf(buffer, PAGE_SIZE, "0x%lx", cap_mask); 160 } 161 162 struct pci_dev *get_pci_dev(struct rvt_dev_info *rdi) 163 { 164 struct hfi1_ibdev *ibdev = container_of(rdi, struct hfi1_ibdev, rdi); 165 struct hfi1_devdata *dd = container_of(ibdev, 166 struct hfi1_devdata, verbs_dev); 167 return dd->pcidev; 168 } 169 170 /* 171 * Return count of units with at least one port ACTIVE. 172 */ 173 int hfi1_count_active_units(void) 174 { 175 struct hfi1_devdata *dd; 176 struct hfi1_pportdata *ppd; 177 unsigned long flags; 178 int pidx, nunits_active = 0; 179 180 spin_lock_irqsave(&hfi1_devs_lock, flags); 181 list_for_each_entry(dd, &hfi1_dev_list, list) { 182 if (!(dd->flags & HFI1_PRESENT) || !dd->kregbase1) 183 continue; 184 for (pidx = 0; pidx < dd->num_pports; ++pidx) { 185 ppd = dd->pport + pidx; 186 if (ppd->lid && ppd->linkup) { 187 nunits_active++; 188 break; 189 } 190 } 191 } 192 spin_unlock_irqrestore(&hfi1_devs_lock, flags); 193 return nunits_active; 194 } 195 196 /* 197 * Get address of eager buffer from it's index (allocated in chunks, not 198 * contiguous). 199 */ 200 static inline void *get_egrbuf(const struct hfi1_ctxtdata *rcd, u64 rhf, 201 u8 *update) 202 { 203 u32 idx = rhf_egr_index(rhf), offset = rhf_egr_buf_offset(rhf); 204 205 *update |= !(idx & (rcd->egrbufs.threshold - 1)) && !offset; 206 return (void *)(((u64)(rcd->egrbufs.rcvtids[idx].addr)) + 207 (offset * RCV_BUF_BLOCK_SIZE)); 208 } 209 210 static inline void *hfi1_get_header(struct hfi1_devdata *dd, 211 __le32 *rhf_addr) 212 { 213 u32 offset = rhf_hdrq_offset(rhf_to_cpu(rhf_addr)); 214 215 return (void *)(rhf_addr - dd->rhf_offset + offset); 216 } 217 218 static inline struct ib_header *hfi1_get_msgheader(struct hfi1_devdata *dd, 219 __le32 *rhf_addr) 220 { 221 return (struct ib_header *)hfi1_get_header(dd, rhf_addr); 222 } 223 224 static inline struct hfi1_16b_header 225 *hfi1_get_16B_header(struct hfi1_devdata *dd, 226 __le32 *rhf_addr) 227 { 228 return (struct hfi1_16b_header *)hfi1_get_header(dd, rhf_addr); 229 } 230 231 /* 232 * Validate and encode the a given RcvArray Buffer size. 233 * The function will check whether the given size falls within 234 * allowed size ranges for the respective type and, optionally, 235 * return the proper encoding. 236 */ 237 int hfi1_rcvbuf_validate(u32 size, u8 type, u16 *encoded) 238 { 239 if (unlikely(!PAGE_ALIGNED(size))) 240 return 0; 241 if (unlikely(size < MIN_EAGER_BUFFER)) 242 return 0; 243 if (size > 244 (type == PT_EAGER ? MAX_EAGER_BUFFER : MAX_EXPECTED_BUFFER)) 245 return 0; 246 if (encoded) 247 *encoded = ilog2(size / PAGE_SIZE) + 1; 248 return 1; 249 } 250 251 static void rcv_hdrerr(struct hfi1_ctxtdata *rcd, struct hfi1_pportdata *ppd, 252 struct hfi1_packet *packet) 253 { 254 struct ib_header *rhdr = packet->hdr; 255 u32 rte = rhf_rcv_type_err(packet->rhf); 256 u32 mlid_base; 257 struct hfi1_ibport *ibp = rcd_to_iport(rcd); 258 struct hfi1_devdata *dd = ppd->dd; 259 struct rvt_dev_info *rdi = &dd->verbs_dev.rdi; 260 261 if (packet->rhf & (RHF_VCRC_ERR | RHF_ICRC_ERR)) 262 return; 263 264 if (packet->etype == RHF_RCV_TYPE_BYPASS) { 265 goto drop; 266 } else { 267 u8 lnh = ib_get_lnh(rhdr); 268 269 mlid_base = be16_to_cpu(IB_MULTICAST_LID_BASE); 270 if (lnh == HFI1_LRH_BTH) { 271 packet->ohdr = &rhdr->u.oth; 272 } else if (lnh == HFI1_LRH_GRH) { 273 packet->ohdr = &rhdr->u.l.oth; 274 packet->grh = &rhdr->u.l.grh; 275 } else { 276 goto drop; 277 } 278 } 279 280 if (packet->rhf & RHF_TID_ERR) { 281 /* For TIDERR and RC QPs preemptively schedule a NAK */ 282 u32 tlen = rhf_pkt_len(packet->rhf); /* in bytes */ 283 u32 dlid = ib_get_dlid(rhdr); 284 u32 qp_num; 285 286 /* Sanity check packet */ 287 if (tlen < 24) 288 goto drop; 289 290 /* Check for GRH */ 291 if (packet->grh) { 292 u32 vtf; 293 struct ib_grh *grh = packet->grh; 294 295 if (grh->next_hdr != IB_GRH_NEXT_HDR) 296 goto drop; 297 vtf = be32_to_cpu(grh->version_tclass_flow); 298 if ((vtf >> IB_GRH_VERSION_SHIFT) != IB_GRH_VERSION) 299 goto drop; 300 } 301 302 /* Get the destination QP number. */ 303 qp_num = ib_bth_get_qpn(packet->ohdr); 304 if (dlid < mlid_base) { 305 struct rvt_qp *qp; 306 unsigned long flags; 307 308 rcu_read_lock(); 309 qp = rvt_lookup_qpn(rdi, &ibp->rvp, qp_num); 310 if (!qp) { 311 rcu_read_unlock(); 312 goto drop; 313 } 314 315 /* 316 * Handle only RC QPs - for other QP types drop error 317 * packet. 318 */ 319 spin_lock_irqsave(&qp->r_lock, flags); 320 321 /* Check for valid receive state. */ 322 if (!(ib_rvt_state_ops[qp->state] & 323 RVT_PROCESS_RECV_OK)) { 324 ibp->rvp.n_pkt_drops++; 325 } 326 327 switch (qp->ibqp.qp_type) { 328 case IB_QPT_RC: 329 hfi1_rc_hdrerr(rcd, packet, qp); 330 break; 331 default: 332 /* For now don't handle any other QP types */ 333 break; 334 } 335 336 spin_unlock_irqrestore(&qp->r_lock, flags); 337 rcu_read_unlock(); 338 } /* Unicast QP */ 339 } /* Valid packet with TIDErr */ 340 341 /* handle "RcvTypeErr" flags */ 342 switch (rte) { 343 case RHF_RTE_ERROR_OP_CODE_ERR: 344 { 345 void *ebuf = NULL; 346 u8 opcode; 347 348 if (rhf_use_egr_bfr(packet->rhf)) 349 ebuf = packet->ebuf; 350 351 if (!ebuf) 352 goto drop; /* this should never happen */ 353 354 opcode = ib_bth_get_opcode(packet->ohdr); 355 if (opcode == IB_OPCODE_CNP) { 356 /* 357 * Only in pre-B0 h/w is the CNP_OPCODE handled 358 * via this code path. 359 */ 360 struct rvt_qp *qp = NULL; 361 u32 lqpn, rqpn; 362 u16 rlid; 363 u8 svc_type, sl, sc5; 364 365 sc5 = hfi1_9B_get_sc5(rhdr, packet->rhf); 366 sl = ibp->sc_to_sl[sc5]; 367 368 lqpn = ib_bth_get_qpn(packet->ohdr); 369 rcu_read_lock(); 370 qp = rvt_lookup_qpn(rdi, &ibp->rvp, lqpn); 371 if (!qp) { 372 rcu_read_unlock(); 373 goto drop; 374 } 375 376 switch (qp->ibqp.qp_type) { 377 case IB_QPT_UD: 378 rlid = 0; 379 rqpn = 0; 380 svc_type = IB_CC_SVCTYPE_UD; 381 break; 382 case IB_QPT_UC: 383 rlid = ib_get_slid(rhdr); 384 rqpn = qp->remote_qpn; 385 svc_type = IB_CC_SVCTYPE_UC; 386 break; 387 default: 388 goto drop; 389 } 390 391 process_becn(ppd, sl, rlid, lqpn, rqpn, svc_type); 392 rcu_read_unlock(); 393 } 394 395 packet->rhf &= ~RHF_RCV_TYPE_ERR_SMASK; 396 break; 397 } 398 default: 399 break; 400 } 401 402 drop: 403 return; 404 } 405 406 static inline void init_packet(struct hfi1_ctxtdata *rcd, 407 struct hfi1_packet *packet) 408 { 409 packet->rsize = rcd->rcvhdrqentsize; /* words */ 410 packet->maxcnt = rcd->rcvhdrq_cnt * packet->rsize; /* words */ 411 packet->rcd = rcd; 412 packet->updegr = 0; 413 packet->etail = -1; 414 packet->rhf_addr = get_rhf_addr(rcd); 415 packet->rhf = rhf_to_cpu(packet->rhf_addr); 416 packet->rhqoff = rcd->head; 417 packet->numpkt = 0; 418 } 419 420 /* We support only two types - 9B and 16B for now */ 421 static const hfi1_handle_cnp hfi1_handle_cnp_tbl[2] = { 422 [HFI1_PKT_TYPE_9B] = &return_cnp, 423 [HFI1_PKT_TYPE_16B] = &return_cnp_16B 424 }; 425 426 void hfi1_process_ecn_slowpath(struct rvt_qp *qp, struct hfi1_packet *pkt, 427 bool do_cnp) 428 { 429 struct hfi1_ibport *ibp = to_iport(qp->ibqp.device, qp->port_num); 430 struct ib_other_headers *ohdr = pkt->ohdr; 431 struct ib_grh *grh = pkt->grh; 432 u32 rqpn = 0, bth1; 433 u16 pkey, rlid, dlid = ib_get_dlid(pkt->hdr); 434 u8 hdr_type, sc, svc_type; 435 bool is_mcast = false; 436 437 if (pkt->etype == RHF_RCV_TYPE_BYPASS) { 438 is_mcast = hfi1_is_16B_mcast(dlid); 439 pkey = hfi1_16B_get_pkey(pkt->hdr); 440 sc = hfi1_16B_get_sc(pkt->hdr); 441 hdr_type = HFI1_PKT_TYPE_16B; 442 } else { 443 is_mcast = (dlid > be16_to_cpu(IB_MULTICAST_LID_BASE)) && 444 (dlid != be16_to_cpu(IB_LID_PERMISSIVE)); 445 pkey = ib_bth_get_pkey(ohdr); 446 sc = hfi1_9B_get_sc5(pkt->hdr, pkt->rhf); 447 hdr_type = HFI1_PKT_TYPE_9B; 448 } 449 450 switch (qp->ibqp.qp_type) { 451 case IB_QPT_SMI: 452 case IB_QPT_GSI: 453 case IB_QPT_UD: 454 rlid = ib_get_slid(pkt->hdr); 455 rqpn = ib_get_sqpn(pkt->ohdr); 456 svc_type = IB_CC_SVCTYPE_UD; 457 break; 458 case IB_QPT_UC: 459 rlid = rdma_ah_get_dlid(&qp->remote_ah_attr); 460 rqpn = qp->remote_qpn; 461 svc_type = IB_CC_SVCTYPE_UC; 462 break; 463 case IB_QPT_RC: 464 rlid = rdma_ah_get_dlid(&qp->remote_ah_attr); 465 rqpn = qp->remote_qpn; 466 svc_type = IB_CC_SVCTYPE_RC; 467 break; 468 default: 469 return; 470 } 471 472 bth1 = be32_to_cpu(ohdr->bth[1]); 473 /* Call appropriate CNP handler */ 474 if (do_cnp && (bth1 & IB_FECN_SMASK)) 475 hfi1_handle_cnp_tbl[hdr_type](ibp, qp, rqpn, pkey, 476 dlid, rlid, sc, grh); 477 478 if (!is_mcast && (bth1 & IB_BECN_SMASK)) { 479 struct hfi1_pportdata *ppd = ppd_from_ibp(ibp); 480 u32 lqpn = bth1 & RVT_QPN_MASK; 481 u8 sl = ibp->sc_to_sl[sc]; 482 483 process_becn(ppd, sl, rlid, lqpn, rqpn, svc_type); 484 } 485 486 } 487 488 struct ps_mdata { 489 struct hfi1_ctxtdata *rcd; 490 u32 rsize; 491 u32 maxcnt; 492 u32 ps_head; 493 u32 ps_tail; 494 u32 ps_seq; 495 }; 496 497 static inline void init_ps_mdata(struct ps_mdata *mdata, 498 struct hfi1_packet *packet) 499 { 500 struct hfi1_ctxtdata *rcd = packet->rcd; 501 502 mdata->rcd = rcd; 503 mdata->rsize = packet->rsize; 504 mdata->maxcnt = packet->maxcnt; 505 mdata->ps_head = packet->rhqoff; 506 507 if (HFI1_CAP_KGET_MASK(rcd->flags, DMA_RTAIL)) { 508 mdata->ps_tail = get_rcvhdrtail(rcd); 509 if (rcd->ctxt == HFI1_CTRL_CTXT) 510 mdata->ps_seq = rcd->seq_cnt; 511 else 512 mdata->ps_seq = 0; /* not used with DMA_RTAIL */ 513 } else { 514 mdata->ps_tail = 0; /* used only with DMA_RTAIL*/ 515 mdata->ps_seq = rcd->seq_cnt; 516 } 517 } 518 519 static inline int ps_done(struct ps_mdata *mdata, u64 rhf, 520 struct hfi1_ctxtdata *rcd) 521 { 522 if (HFI1_CAP_KGET_MASK(rcd->flags, DMA_RTAIL)) 523 return mdata->ps_head == mdata->ps_tail; 524 return mdata->ps_seq != rhf_rcv_seq(rhf); 525 } 526 527 static inline int ps_skip(struct ps_mdata *mdata, u64 rhf, 528 struct hfi1_ctxtdata *rcd) 529 { 530 /* 531 * Control context can potentially receive an invalid rhf. 532 * Drop such packets. 533 */ 534 if ((rcd->ctxt == HFI1_CTRL_CTXT) && (mdata->ps_head != mdata->ps_tail)) 535 return mdata->ps_seq != rhf_rcv_seq(rhf); 536 537 return 0; 538 } 539 540 static inline void update_ps_mdata(struct ps_mdata *mdata, 541 struct hfi1_ctxtdata *rcd) 542 { 543 mdata->ps_head += mdata->rsize; 544 if (mdata->ps_head >= mdata->maxcnt) 545 mdata->ps_head = 0; 546 547 /* Control context must do seq counting */ 548 if (!HFI1_CAP_KGET_MASK(rcd->flags, DMA_RTAIL) || 549 (rcd->ctxt == HFI1_CTRL_CTXT)) { 550 if (++mdata->ps_seq > 13) 551 mdata->ps_seq = 1; 552 } 553 } 554 555 /* 556 * prescan_rxq - search through the receive queue looking for packets 557 * containing Excplicit Congestion Notifications (FECNs, or BECNs). 558 * When an ECN is found, process the Congestion Notification, and toggle 559 * it off. 560 * This is declared as a macro to allow quick checking of the port to avoid 561 * the overhead of a function call if not enabled. 562 */ 563 #define prescan_rxq(rcd, packet) \ 564 do { \ 565 if (rcd->ppd->cc_prescan) \ 566 __prescan_rxq(packet); \ 567 } while (0) 568 static void __prescan_rxq(struct hfi1_packet *packet) 569 { 570 struct hfi1_ctxtdata *rcd = packet->rcd; 571 struct ps_mdata mdata; 572 573 init_ps_mdata(&mdata, packet); 574 575 while (1) { 576 struct hfi1_devdata *dd = rcd->dd; 577 struct hfi1_ibport *ibp = rcd_to_iport(rcd); 578 __le32 *rhf_addr = (__le32 *)rcd->rcvhdrq + mdata.ps_head + 579 dd->rhf_offset; 580 struct rvt_qp *qp; 581 struct ib_header *hdr; 582 struct rvt_dev_info *rdi = &dd->verbs_dev.rdi; 583 u64 rhf = rhf_to_cpu(rhf_addr); 584 u32 etype = rhf_rcv_type(rhf), qpn, bth1; 585 int is_ecn = 0; 586 u8 lnh; 587 588 if (ps_done(&mdata, rhf, rcd)) 589 break; 590 591 if (ps_skip(&mdata, rhf, rcd)) 592 goto next; 593 594 if (etype != RHF_RCV_TYPE_IB) 595 goto next; 596 597 packet->hdr = hfi1_get_msgheader(dd, rhf_addr); 598 hdr = packet->hdr; 599 lnh = ib_get_lnh(hdr); 600 601 if (lnh == HFI1_LRH_BTH) { 602 packet->ohdr = &hdr->u.oth; 603 packet->grh = NULL; 604 } else if (lnh == HFI1_LRH_GRH) { 605 packet->ohdr = &hdr->u.l.oth; 606 packet->grh = &hdr->u.l.grh; 607 } else { 608 goto next; /* just in case */ 609 } 610 611 bth1 = be32_to_cpu(packet->ohdr->bth[1]); 612 is_ecn = !!(bth1 & (IB_FECN_SMASK | IB_BECN_SMASK)); 613 614 if (!is_ecn) 615 goto next; 616 617 qpn = bth1 & RVT_QPN_MASK; 618 rcu_read_lock(); 619 qp = rvt_lookup_qpn(rdi, &ibp->rvp, qpn); 620 621 if (!qp) { 622 rcu_read_unlock(); 623 goto next; 624 } 625 626 process_ecn(qp, packet, true); 627 rcu_read_unlock(); 628 629 /* turn off BECN, FECN */ 630 bth1 &= ~(IB_FECN_SMASK | IB_BECN_SMASK); 631 packet->ohdr->bth[1] = cpu_to_be32(bth1); 632 next: 633 update_ps_mdata(&mdata, rcd); 634 } 635 } 636 637 static void process_rcv_qp_work(struct hfi1_ctxtdata *rcd) 638 { 639 struct rvt_qp *qp, *nqp; 640 641 /* 642 * Iterate over all QPs waiting to respond. 643 * The list won't change since the IRQ is only run on one CPU. 644 */ 645 list_for_each_entry_safe(qp, nqp, &rcd->qp_wait_list, rspwait) { 646 list_del_init(&qp->rspwait); 647 if (qp->r_flags & RVT_R_RSP_NAK) { 648 qp->r_flags &= ~RVT_R_RSP_NAK; 649 hfi1_send_rc_ack(rcd, qp, 0); 650 } 651 if (qp->r_flags & RVT_R_RSP_SEND) { 652 unsigned long flags; 653 654 qp->r_flags &= ~RVT_R_RSP_SEND; 655 spin_lock_irqsave(&qp->s_lock, flags); 656 if (ib_rvt_state_ops[qp->state] & 657 RVT_PROCESS_OR_FLUSH_SEND) 658 hfi1_schedule_send(qp); 659 spin_unlock_irqrestore(&qp->s_lock, flags); 660 } 661 rvt_put_qp(qp); 662 } 663 } 664 665 static noinline int max_packet_exceeded(struct hfi1_packet *packet, int thread) 666 { 667 if (thread) { 668 if ((packet->numpkt & (MAX_PKT_RECV_THREAD - 1)) == 0) 669 /* allow defered processing */ 670 process_rcv_qp_work(packet->rcd); 671 cond_resched(); 672 return RCV_PKT_OK; 673 } else { 674 this_cpu_inc(*packet->rcd->dd->rcv_limit); 675 return RCV_PKT_LIMIT; 676 } 677 } 678 679 static inline int check_max_packet(struct hfi1_packet *packet, int thread) 680 { 681 int ret = RCV_PKT_OK; 682 683 if (unlikely((packet->numpkt & (MAX_PKT_RECV - 1)) == 0)) 684 ret = max_packet_exceeded(packet, thread); 685 return ret; 686 } 687 688 static noinline int skip_rcv_packet(struct hfi1_packet *packet, int thread) 689 { 690 int ret; 691 692 /* Set up for the next packet */ 693 packet->rhqoff += packet->rsize; 694 if (packet->rhqoff >= packet->maxcnt) 695 packet->rhqoff = 0; 696 697 packet->numpkt++; 698 ret = check_max_packet(packet, thread); 699 700 packet->rhf_addr = (__le32 *)packet->rcd->rcvhdrq + packet->rhqoff + 701 packet->rcd->dd->rhf_offset; 702 packet->rhf = rhf_to_cpu(packet->rhf_addr); 703 704 return ret; 705 } 706 707 static inline int process_rcv_packet(struct hfi1_packet *packet, int thread) 708 { 709 int ret; 710 711 packet->etype = rhf_rcv_type(packet->rhf); 712 713 /* total length */ 714 packet->tlen = rhf_pkt_len(packet->rhf); /* in bytes */ 715 /* retrieve eager buffer details */ 716 packet->ebuf = NULL; 717 if (rhf_use_egr_bfr(packet->rhf)) { 718 packet->etail = rhf_egr_index(packet->rhf); 719 packet->ebuf = get_egrbuf(packet->rcd, packet->rhf, 720 &packet->updegr); 721 /* 722 * Prefetch the contents of the eager buffer. It is 723 * OK to send a negative length to prefetch_range(). 724 * The +2 is the size of the RHF. 725 */ 726 prefetch_range(packet->ebuf, 727 packet->tlen - ((packet->rcd->rcvhdrqentsize - 728 (rhf_hdrq_offset(packet->rhf) 729 + 2)) * 4)); 730 } 731 732 /* 733 * Call a type specific handler for the packet. We 734 * should be able to trust that etype won't be beyond 735 * the range of valid indexes. If so something is really 736 * wrong and we can probably just let things come 737 * crashing down. There is no need to eat another 738 * comparison in this performance critical code. 739 */ 740 packet->rcd->dd->rhf_rcv_function_map[packet->etype](packet); 741 packet->numpkt++; 742 743 /* Set up for the next packet */ 744 packet->rhqoff += packet->rsize; 745 if (packet->rhqoff >= packet->maxcnt) 746 packet->rhqoff = 0; 747 748 ret = check_max_packet(packet, thread); 749 750 packet->rhf_addr = (__le32 *)packet->rcd->rcvhdrq + packet->rhqoff + 751 packet->rcd->dd->rhf_offset; 752 packet->rhf = rhf_to_cpu(packet->rhf_addr); 753 754 return ret; 755 } 756 757 static inline void process_rcv_update(int last, struct hfi1_packet *packet) 758 { 759 /* 760 * Update head regs etc., every 16 packets, if not last pkt, 761 * to help prevent rcvhdrq overflows, when many packets 762 * are processed and queue is nearly full. 763 * Don't request an interrupt for intermediate updates. 764 */ 765 if (!last && !(packet->numpkt & 0xf)) { 766 update_usrhead(packet->rcd, packet->rhqoff, packet->updegr, 767 packet->etail, 0, 0); 768 packet->updegr = 0; 769 } 770 packet->grh = NULL; 771 } 772 773 static inline void finish_packet(struct hfi1_packet *packet) 774 { 775 /* 776 * Nothing we need to free for the packet. 777 * 778 * The only thing we need to do is a final update and call for an 779 * interrupt 780 */ 781 update_usrhead(packet->rcd, packet->rcd->head, packet->updegr, 782 packet->etail, rcv_intr_dynamic, packet->numpkt); 783 } 784 785 /* 786 * Handle receive interrupts when using the no dma rtail option. 787 */ 788 int handle_receive_interrupt_nodma_rtail(struct hfi1_ctxtdata *rcd, int thread) 789 { 790 u32 seq; 791 int last = RCV_PKT_OK; 792 struct hfi1_packet packet; 793 794 init_packet(rcd, &packet); 795 seq = rhf_rcv_seq(packet.rhf); 796 if (seq != rcd->seq_cnt) { 797 last = RCV_PKT_DONE; 798 goto bail; 799 } 800 801 prescan_rxq(rcd, &packet); 802 803 while (last == RCV_PKT_OK) { 804 last = process_rcv_packet(&packet, thread); 805 seq = rhf_rcv_seq(packet.rhf); 806 if (++rcd->seq_cnt > 13) 807 rcd->seq_cnt = 1; 808 if (seq != rcd->seq_cnt) 809 last = RCV_PKT_DONE; 810 process_rcv_update(last, &packet); 811 } 812 process_rcv_qp_work(rcd); 813 rcd->head = packet.rhqoff; 814 bail: 815 finish_packet(&packet); 816 return last; 817 } 818 819 int handle_receive_interrupt_dma_rtail(struct hfi1_ctxtdata *rcd, int thread) 820 { 821 u32 hdrqtail; 822 int last = RCV_PKT_OK; 823 struct hfi1_packet packet; 824 825 init_packet(rcd, &packet); 826 hdrqtail = get_rcvhdrtail(rcd); 827 if (packet.rhqoff == hdrqtail) { 828 last = RCV_PKT_DONE; 829 goto bail; 830 } 831 smp_rmb(); /* prevent speculative reads of dma'ed hdrq */ 832 833 prescan_rxq(rcd, &packet); 834 835 while (last == RCV_PKT_OK) { 836 last = process_rcv_packet(&packet, thread); 837 if (packet.rhqoff == hdrqtail) 838 last = RCV_PKT_DONE; 839 process_rcv_update(last, &packet); 840 } 841 process_rcv_qp_work(rcd); 842 rcd->head = packet.rhqoff; 843 bail: 844 finish_packet(&packet); 845 return last; 846 } 847 848 static inline void set_nodma_rtail(struct hfi1_devdata *dd, u16 ctxt) 849 { 850 struct hfi1_ctxtdata *rcd; 851 u16 i; 852 853 /* 854 * For dynamically allocated kernel contexts (like vnic) switch 855 * interrupt handler only for that context. Otherwise, switch 856 * interrupt handler for all statically allocated kernel contexts. 857 */ 858 if (ctxt >= dd->first_dyn_alloc_ctxt) { 859 rcd = hfi1_rcd_get_by_index_safe(dd, ctxt); 860 if (rcd) { 861 rcd->do_interrupt = 862 &handle_receive_interrupt_nodma_rtail; 863 hfi1_rcd_put(rcd); 864 } 865 return; 866 } 867 868 for (i = HFI1_CTRL_CTXT + 1; i < dd->first_dyn_alloc_ctxt; i++) { 869 rcd = hfi1_rcd_get_by_index(dd, i); 870 if (rcd) 871 rcd->do_interrupt = 872 &handle_receive_interrupt_nodma_rtail; 873 hfi1_rcd_put(rcd); 874 } 875 } 876 877 static inline void set_dma_rtail(struct hfi1_devdata *dd, u16 ctxt) 878 { 879 struct hfi1_ctxtdata *rcd; 880 u16 i; 881 882 /* 883 * For dynamically allocated kernel contexts (like vnic) switch 884 * interrupt handler only for that context. Otherwise, switch 885 * interrupt handler for all statically allocated kernel contexts. 886 */ 887 if (ctxt >= dd->first_dyn_alloc_ctxt) { 888 rcd = hfi1_rcd_get_by_index_safe(dd, ctxt); 889 if (rcd) { 890 rcd->do_interrupt = 891 &handle_receive_interrupt_dma_rtail; 892 hfi1_rcd_put(rcd); 893 } 894 return; 895 } 896 897 for (i = HFI1_CTRL_CTXT + 1; i < dd->first_dyn_alloc_ctxt; i++) { 898 rcd = hfi1_rcd_get_by_index(dd, i); 899 if (rcd) 900 rcd->do_interrupt = 901 &handle_receive_interrupt_dma_rtail; 902 hfi1_rcd_put(rcd); 903 } 904 } 905 906 void set_all_slowpath(struct hfi1_devdata *dd) 907 { 908 struct hfi1_ctxtdata *rcd; 909 u16 i; 910 911 /* HFI1_CTRL_CTXT must always use the slow path interrupt handler */ 912 for (i = HFI1_CTRL_CTXT + 1; i < dd->num_rcv_contexts; i++) { 913 rcd = hfi1_rcd_get_by_index(dd, i); 914 if (!rcd) 915 continue; 916 if (i < dd->first_dyn_alloc_ctxt || rcd->is_vnic) 917 rcd->do_interrupt = &handle_receive_interrupt; 918 919 hfi1_rcd_put(rcd); 920 } 921 } 922 923 static inline int set_armed_to_active(struct hfi1_ctxtdata *rcd, 924 struct hfi1_packet *packet, 925 struct hfi1_devdata *dd) 926 { 927 struct work_struct *lsaw = &rcd->ppd->linkstate_active_work; 928 u8 etype = rhf_rcv_type(packet->rhf); 929 u8 sc = SC15_PACKET; 930 931 if (etype == RHF_RCV_TYPE_IB) { 932 struct ib_header *hdr = hfi1_get_msgheader(packet->rcd->dd, 933 packet->rhf_addr); 934 sc = hfi1_9B_get_sc5(hdr, packet->rhf); 935 } else if (etype == RHF_RCV_TYPE_BYPASS) { 936 struct hfi1_16b_header *hdr = hfi1_get_16B_header( 937 packet->rcd->dd, 938 packet->rhf_addr); 939 sc = hfi1_16B_get_sc(hdr); 940 } 941 if (sc != SC15_PACKET) { 942 int hwstate = driver_lstate(rcd->ppd); 943 944 if (hwstate != IB_PORT_ACTIVE) { 945 dd_dev_info(dd, 946 "Unexpected link state %s\n", 947 opa_lstate_name(hwstate)); 948 return 0; 949 } 950 951 queue_work(rcd->ppd->link_wq, lsaw); 952 return 1; 953 } 954 return 0; 955 } 956 957 /* 958 * handle_receive_interrupt - receive a packet 959 * @rcd: the context 960 * 961 * Called from interrupt handler for errors or receive interrupt. 962 * This is the slow path interrupt handler. 963 */ 964 int handle_receive_interrupt(struct hfi1_ctxtdata *rcd, int thread) 965 { 966 struct hfi1_devdata *dd = rcd->dd; 967 u32 hdrqtail; 968 int needset, last = RCV_PKT_OK; 969 struct hfi1_packet packet; 970 int skip_pkt = 0; 971 972 /* Control context will always use the slow path interrupt handler */ 973 needset = (rcd->ctxt == HFI1_CTRL_CTXT) ? 0 : 1; 974 975 init_packet(rcd, &packet); 976 977 if (!HFI1_CAP_KGET_MASK(rcd->flags, DMA_RTAIL)) { 978 u32 seq = rhf_rcv_seq(packet.rhf); 979 980 if (seq != rcd->seq_cnt) { 981 last = RCV_PKT_DONE; 982 goto bail; 983 } 984 hdrqtail = 0; 985 } else { 986 hdrqtail = get_rcvhdrtail(rcd); 987 if (packet.rhqoff == hdrqtail) { 988 last = RCV_PKT_DONE; 989 goto bail; 990 } 991 smp_rmb(); /* prevent speculative reads of dma'ed hdrq */ 992 993 /* 994 * Control context can potentially receive an invalid 995 * rhf. Drop such packets. 996 */ 997 if (rcd->ctxt == HFI1_CTRL_CTXT) { 998 u32 seq = rhf_rcv_seq(packet.rhf); 999 1000 if (seq != rcd->seq_cnt) 1001 skip_pkt = 1; 1002 } 1003 } 1004 1005 prescan_rxq(rcd, &packet); 1006 1007 while (last == RCV_PKT_OK) { 1008 if (unlikely(dd->do_drop && 1009 atomic_xchg(&dd->drop_packet, DROP_PACKET_OFF) == 1010 DROP_PACKET_ON)) { 1011 dd->do_drop = 0; 1012 1013 /* On to the next packet */ 1014 packet.rhqoff += packet.rsize; 1015 packet.rhf_addr = (__le32 *)rcd->rcvhdrq + 1016 packet.rhqoff + 1017 dd->rhf_offset; 1018 packet.rhf = rhf_to_cpu(packet.rhf_addr); 1019 1020 } else if (skip_pkt) { 1021 last = skip_rcv_packet(&packet, thread); 1022 skip_pkt = 0; 1023 } else { 1024 /* Auto activate link on non-SC15 packet receive */ 1025 if (unlikely(rcd->ppd->host_link_state == 1026 HLS_UP_ARMED) && 1027 set_armed_to_active(rcd, &packet, dd)) 1028 goto bail; 1029 last = process_rcv_packet(&packet, thread); 1030 } 1031 1032 if (!HFI1_CAP_KGET_MASK(rcd->flags, DMA_RTAIL)) { 1033 u32 seq = rhf_rcv_seq(packet.rhf); 1034 1035 if (++rcd->seq_cnt > 13) 1036 rcd->seq_cnt = 1; 1037 if (seq != rcd->seq_cnt) 1038 last = RCV_PKT_DONE; 1039 if (needset) { 1040 dd_dev_info(dd, "Switching to NO_DMA_RTAIL\n"); 1041 set_nodma_rtail(dd, rcd->ctxt); 1042 needset = 0; 1043 } 1044 } else { 1045 if (packet.rhqoff == hdrqtail) 1046 last = RCV_PKT_DONE; 1047 /* 1048 * Control context can potentially receive an invalid 1049 * rhf. Drop such packets. 1050 */ 1051 if (rcd->ctxt == HFI1_CTRL_CTXT) { 1052 u32 seq = rhf_rcv_seq(packet.rhf); 1053 1054 if (++rcd->seq_cnt > 13) 1055 rcd->seq_cnt = 1; 1056 if (!last && (seq != rcd->seq_cnt)) 1057 skip_pkt = 1; 1058 } 1059 1060 if (needset) { 1061 dd_dev_info(dd, 1062 "Switching to DMA_RTAIL\n"); 1063 set_dma_rtail(dd, rcd->ctxt); 1064 needset = 0; 1065 } 1066 } 1067 1068 process_rcv_update(last, &packet); 1069 } 1070 1071 process_rcv_qp_work(rcd); 1072 rcd->head = packet.rhqoff; 1073 1074 bail: 1075 /* 1076 * Always write head at end, and setup rcv interrupt, even 1077 * if no packets were processed. 1078 */ 1079 finish_packet(&packet); 1080 return last; 1081 } 1082 1083 /* 1084 * We may discover in the interrupt that the hardware link state has 1085 * changed from ARMED to ACTIVE (due to the arrival of a non-SC15 packet), 1086 * and we need to update the driver's notion of the link state. We cannot 1087 * run set_link_state from interrupt context, so we queue this function on 1088 * a workqueue. 1089 * 1090 * We delay the regular interrupt processing until after the state changes 1091 * so that the link will be in the correct state by the time any application 1092 * we wake up attempts to send a reply to any message it received. 1093 * (Subsequent receive interrupts may possibly force the wakeup before we 1094 * update the link state.) 1095 * 1096 * The rcd is freed in hfi1_free_ctxtdata after hfi1_postinit_cleanup invokes 1097 * dd->f_cleanup(dd) to disable the interrupt handler and flush workqueues, 1098 * so we're safe from use-after-free of the rcd. 1099 */ 1100 void receive_interrupt_work(struct work_struct *work) 1101 { 1102 struct hfi1_pportdata *ppd = container_of(work, struct hfi1_pportdata, 1103 linkstate_active_work); 1104 struct hfi1_devdata *dd = ppd->dd; 1105 struct hfi1_ctxtdata *rcd; 1106 u16 i; 1107 1108 /* Received non-SC15 packet implies neighbor_normal */ 1109 ppd->neighbor_normal = 1; 1110 set_link_state(ppd, HLS_UP_ACTIVE); 1111 1112 /* 1113 * Interrupt all statically allocated kernel contexts that could 1114 * have had an interrupt during auto activation. 1115 */ 1116 for (i = HFI1_CTRL_CTXT; i < dd->first_dyn_alloc_ctxt; i++) { 1117 rcd = hfi1_rcd_get_by_index(dd, i); 1118 if (rcd) 1119 force_recv_intr(rcd); 1120 hfi1_rcd_put(rcd); 1121 } 1122 } 1123 1124 /* 1125 * Convert a given MTU size to the on-wire MAD packet enumeration. 1126 * Return -1 if the size is invalid. 1127 */ 1128 int mtu_to_enum(u32 mtu, int default_if_bad) 1129 { 1130 switch (mtu) { 1131 case 0: return OPA_MTU_0; 1132 case 256: return OPA_MTU_256; 1133 case 512: return OPA_MTU_512; 1134 case 1024: return OPA_MTU_1024; 1135 case 2048: return OPA_MTU_2048; 1136 case 4096: return OPA_MTU_4096; 1137 case 8192: return OPA_MTU_8192; 1138 case 10240: return OPA_MTU_10240; 1139 } 1140 return default_if_bad; 1141 } 1142 1143 u16 enum_to_mtu(int mtu) 1144 { 1145 switch (mtu) { 1146 case OPA_MTU_0: return 0; 1147 case OPA_MTU_256: return 256; 1148 case OPA_MTU_512: return 512; 1149 case OPA_MTU_1024: return 1024; 1150 case OPA_MTU_2048: return 2048; 1151 case OPA_MTU_4096: return 4096; 1152 case OPA_MTU_8192: return 8192; 1153 case OPA_MTU_10240: return 10240; 1154 default: return 0xffff; 1155 } 1156 } 1157 1158 /* 1159 * set_mtu - set the MTU 1160 * @ppd: the per port data 1161 * 1162 * We can handle "any" incoming size, the issue here is whether we 1163 * need to restrict our outgoing size. We do not deal with what happens 1164 * to programs that are already running when the size changes. 1165 */ 1166 int set_mtu(struct hfi1_pportdata *ppd) 1167 { 1168 struct hfi1_devdata *dd = ppd->dd; 1169 int i, drain, ret = 0, is_up = 0; 1170 1171 ppd->ibmtu = 0; 1172 for (i = 0; i < ppd->vls_supported; i++) 1173 if (ppd->ibmtu < dd->vld[i].mtu) 1174 ppd->ibmtu = dd->vld[i].mtu; 1175 ppd->ibmaxlen = ppd->ibmtu + lrh_max_header_bytes(ppd->dd); 1176 1177 mutex_lock(&ppd->hls_lock); 1178 if (ppd->host_link_state == HLS_UP_INIT || 1179 ppd->host_link_state == HLS_UP_ARMED || 1180 ppd->host_link_state == HLS_UP_ACTIVE) 1181 is_up = 1; 1182 1183 drain = !is_ax(dd) && is_up; 1184 1185 if (drain) 1186 /* 1187 * MTU is specified per-VL. To ensure that no packet gets 1188 * stuck (due, e.g., to the MTU for the packet's VL being 1189 * reduced), empty the per-VL FIFOs before adjusting MTU. 1190 */ 1191 ret = stop_drain_data_vls(dd); 1192 1193 if (ret) { 1194 dd_dev_err(dd, "%s: cannot stop/drain VLs - refusing to change per-VL MTUs\n", 1195 __func__); 1196 goto err; 1197 } 1198 1199 hfi1_set_ib_cfg(ppd, HFI1_IB_CFG_MTU, 0); 1200 1201 if (drain) 1202 open_fill_data_vls(dd); /* reopen all VLs */ 1203 1204 err: 1205 mutex_unlock(&ppd->hls_lock); 1206 1207 return ret; 1208 } 1209 1210 int hfi1_set_lid(struct hfi1_pportdata *ppd, u32 lid, u8 lmc) 1211 { 1212 struct hfi1_devdata *dd = ppd->dd; 1213 1214 ppd->lid = lid; 1215 ppd->lmc = lmc; 1216 hfi1_set_ib_cfg(ppd, HFI1_IB_CFG_LIDLMC, 0); 1217 1218 dd_dev_info(dd, "port %u: got a lid: 0x%x\n", ppd->port, lid); 1219 1220 return 0; 1221 } 1222 1223 void shutdown_led_override(struct hfi1_pportdata *ppd) 1224 { 1225 struct hfi1_devdata *dd = ppd->dd; 1226 1227 /* 1228 * This pairs with the memory barrier in hfi1_start_led_override to 1229 * ensure that we read the correct state of LED beaconing represented 1230 * by led_override_timer_active 1231 */ 1232 smp_rmb(); 1233 if (atomic_read(&ppd->led_override_timer_active)) { 1234 del_timer_sync(&ppd->led_override_timer); 1235 atomic_set(&ppd->led_override_timer_active, 0); 1236 /* Ensure the atomic_set is visible to all CPUs */ 1237 smp_wmb(); 1238 } 1239 1240 /* Hand control of the LED to the DC for normal operation */ 1241 write_csr(dd, DCC_CFG_LED_CNTRL, 0); 1242 } 1243 1244 static void run_led_override(struct timer_list *t) 1245 { 1246 struct hfi1_pportdata *ppd = from_timer(ppd, t, led_override_timer); 1247 struct hfi1_devdata *dd = ppd->dd; 1248 unsigned long timeout; 1249 int phase_idx; 1250 1251 if (!(dd->flags & HFI1_INITTED)) 1252 return; 1253 1254 phase_idx = ppd->led_override_phase & 1; 1255 1256 setextled(dd, phase_idx); 1257 1258 timeout = ppd->led_override_vals[phase_idx]; 1259 1260 /* Set up for next phase */ 1261 ppd->led_override_phase = !ppd->led_override_phase; 1262 1263 mod_timer(&ppd->led_override_timer, jiffies + timeout); 1264 } 1265 1266 /* 1267 * To have the LED blink in a particular pattern, provide timeon and timeoff 1268 * in milliseconds. 1269 * To turn off custom blinking and return to normal operation, use 1270 * shutdown_led_override() 1271 */ 1272 void hfi1_start_led_override(struct hfi1_pportdata *ppd, unsigned int timeon, 1273 unsigned int timeoff) 1274 { 1275 if (!(ppd->dd->flags & HFI1_INITTED)) 1276 return; 1277 1278 /* Convert to jiffies for direct use in timer */ 1279 ppd->led_override_vals[0] = msecs_to_jiffies(timeoff); 1280 ppd->led_override_vals[1] = msecs_to_jiffies(timeon); 1281 1282 /* Arbitrarily start from LED on phase */ 1283 ppd->led_override_phase = 1; 1284 1285 /* 1286 * If the timer has not already been started, do so. Use a "quick" 1287 * timeout so the handler will be called soon to look at our request. 1288 */ 1289 if (!timer_pending(&ppd->led_override_timer)) { 1290 timer_setup(&ppd->led_override_timer, run_led_override, 0); 1291 ppd->led_override_timer.expires = jiffies + 1; 1292 add_timer(&ppd->led_override_timer); 1293 atomic_set(&ppd->led_override_timer_active, 1); 1294 /* Ensure the atomic_set is visible to all CPUs */ 1295 smp_wmb(); 1296 } 1297 } 1298 1299 /** 1300 * hfi1_reset_device - reset the chip if possible 1301 * @unit: the device to reset 1302 * 1303 * Whether or not reset is successful, we attempt to re-initialize the chip 1304 * (that is, much like a driver unload/reload). We clear the INITTED flag 1305 * so that the various entry points will fail until we reinitialize. For 1306 * now, we only allow this if no user contexts are open that use chip resources 1307 */ 1308 int hfi1_reset_device(int unit) 1309 { 1310 int ret; 1311 struct hfi1_devdata *dd = hfi1_lookup(unit); 1312 struct hfi1_pportdata *ppd; 1313 int pidx; 1314 1315 if (!dd) { 1316 ret = -ENODEV; 1317 goto bail; 1318 } 1319 1320 dd_dev_info(dd, "Reset on unit %u requested\n", unit); 1321 1322 if (!dd->kregbase1 || !(dd->flags & HFI1_PRESENT)) { 1323 dd_dev_info(dd, 1324 "Invalid unit number %u or not initialized or not present\n", 1325 unit); 1326 ret = -ENXIO; 1327 goto bail; 1328 } 1329 1330 /* If there are any user/vnic contexts, we cannot reset */ 1331 mutex_lock(&hfi1_mutex); 1332 if (dd->rcd) 1333 if (hfi1_stats.sps_ctxts) { 1334 mutex_unlock(&hfi1_mutex); 1335 ret = -EBUSY; 1336 goto bail; 1337 } 1338 mutex_unlock(&hfi1_mutex); 1339 1340 for (pidx = 0; pidx < dd->num_pports; ++pidx) { 1341 ppd = dd->pport + pidx; 1342 1343 shutdown_led_override(ppd); 1344 } 1345 if (dd->flags & HFI1_HAS_SEND_DMA) 1346 sdma_exit(dd); 1347 1348 hfi1_reset_cpu_counters(dd); 1349 1350 ret = hfi1_init(dd, 1); 1351 1352 if (ret) 1353 dd_dev_err(dd, 1354 "Reinitialize unit %u after reset failed with %d\n", 1355 unit, ret); 1356 else 1357 dd_dev_info(dd, "Reinitialized unit %u after resetting\n", 1358 unit); 1359 1360 bail: 1361 return ret; 1362 } 1363 1364 static inline void hfi1_setup_ib_header(struct hfi1_packet *packet) 1365 { 1366 packet->hdr = (struct hfi1_ib_message_header *) 1367 hfi1_get_msgheader(packet->rcd->dd, 1368 packet->rhf_addr); 1369 packet->hlen = (u8 *)packet->rhf_addr - (u8 *)packet->hdr; 1370 } 1371 1372 static int hfi1_bypass_ingress_pkt_check(struct hfi1_packet *packet) 1373 { 1374 struct hfi1_pportdata *ppd = packet->rcd->ppd; 1375 1376 /* slid and dlid cannot be 0 */ 1377 if ((!packet->slid) || (!packet->dlid)) 1378 return -EINVAL; 1379 1380 /* Compare port lid with incoming packet dlid */ 1381 if ((!(hfi1_is_16B_mcast(packet->dlid))) && 1382 (packet->dlid != 1383 opa_get_lid(be32_to_cpu(OPA_LID_PERMISSIVE), 16B))) { 1384 if (packet->dlid != ppd->lid) 1385 return -EINVAL; 1386 } 1387 1388 /* No multicast packets with SC15 */ 1389 if ((hfi1_is_16B_mcast(packet->dlid)) && (packet->sc == 0xF)) 1390 return -EINVAL; 1391 1392 /* Packets with permissive DLID always on SC15 */ 1393 if ((packet->dlid == opa_get_lid(be32_to_cpu(OPA_LID_PERMISSIVE), 1394 16B)) && 1395 (packet->sc != 0xF)) 1396 return -EINVAL; 1397 1398 return 0; 1399 } 1400 1401 static int hfi1_setup_9B_packet(struct hfi1_packet *packet) 1402 { 1403 struct hfi1_ibport *ibp = rcd_to_iport(packet->rcd); 1404 struct ib_header *hdr; 1405 u8 lnh; 1406 1407 hfi1_setup_ib_header(packet); 1408 hdr = packet->hdr; 1409 1410 lnh = ib_get_lnh(hdr); 1411 if (lnh == HFI1_LRH_BTH) { 1412 packet->ohdr = &hdr->u.oth; 1413 packet->grh = NULL; 1414 } else if (lnh == HFI1_LRH_GRH) { 1415 u32 vtf; 1416 1417 packet->ohdr = &hdr->u.l.oth; 1418 packet->grh = &hdr->u.l.grh; 1419 if (packet->grh->next_hdr != IB_GRH_NEXT_HDR) 1420 goto drop; 1421 vtf = be32_to_cpu(packet->grh->version_tclass_flow); 1422 if ((vtf >> IB_GRH_VERSION_SHIFT) != IB_GRH_VERSION) 1423 goto drop; 1424 } else { 1425 goto drop; 1426 } 1427 1428 /* Query commonly used fields from packet header */ 1429 packet->payload = packet->ebuf; 1430 packet->opcode = ib_bth_get_opcode(packet->ohdr); 1431 packet->slid = ib_get_slid(hdr); 1432 packet->dlid = ib_get_dlid(hdr); 1433 if (unlikely((packet->dlid >= be16_to_cpu(IB_MULTICAST_LID_BASE)) && 1434 (packet->dlid != be16_to_cpu(IB_LID_PERMISSIVE)))) 1435 packet->dlid += opa_get_mcast_base(OPA_MCAST_NR) - 1436 be16_to_cpu(IB_MULTICAST_LID_BASE); 1437 packet->sl = ib_get_sl(hdr); 1438 packet->sc = hfi1_9B_get_sc5(hdr, packet->rhf); 1439 packet->pad = ib_bth_get_pad(packet->ohdr); 1440 packet->extra_byte = 0; 1441 packet->fecn = ib_bth_get_fecn(packet->ohdr); 1442 packet->becn = ib_bth_get_becn(packet->ohdr); 1443 1444 return 0; 1445 drop: 1446 ibp->rvp.n_pkt_drops++; 1447 return -EINVAL; 1448 } 1449 1450 static int hfi1_setup_bypass_packet(struct hfi1_packet *packet) 1451 { 1452 /* 1453 * Bypass packets have a different header/payload split 1454 * compared to an IB packet. 1455 * Current split is set such that 16 bytes of the actual 1456 * header is in the header buffer and the remining is in 1457 * the eager buffer. We chose 16 since hfi1 driver only 1458 * supports 16B bypass packets and we will be able to 1459 * receive the entire LRH with such a split. 1460 */ 1461 1462 struct hfi1_ctxtdata *rcd = packet->rcd; 1463 struct hfi1_pportdata *ppd = rcd->ppd; 1464 struct hfi1_ibport *ibp = &ppd->ibport_data; 1465 u8 l4; 1466 u8 grh_len; 1467 1468 packet->hdr = (struct hfi1_16b_header *) 1469 hfi1_get_16B_header(packet->rcd->dd, 1470 packet->rhf_addr); 1471 packet->hlen = (u8 *)packet->rhf_addr - (u8 *)packet->hdr; 1472 1473 l4 = hfi1_16B_get_l4(packet->hdr); 1474 if (l4 == OPA_16B_L4_IB_LOCAL) { 1475 grh_len = 0; 1476 packet->ohdr = packet->ebuf; 1477 packet->grh = NULL; 1478 } else if (l4 == OPA_16B_L4_IB_GLOBAL) { 1479 u32 vtf; 1480 1481 grh_len = sizeof(struct ib_grh); 1482 packet->ohdr = packet->ebuf + grh_len; 1483 packet->grh = packet->ebuf; 1484 if (packet->grh->next_hdr != IB_GRH_NEXT_HDR) 1485 goto drop; 1486 vtf = be32_to_cpu(packet->grh->version_tclass_flow); 1487 if ((vtf >> IB_GRH_VERSION_SHIFT) != IB_GRH_VERSION) 1488 goto drop; 1489 } else { 1490 goto drop; 1491 } 1492 1493 /* Query commonly used fields from packet header */ 1494 packet->opcode = ib_bth_get_opcode(packet->ohdr); 1495 packet->hlen = hdr_len_by_opcode[packet->opcode] + 8 + grh_len; 1496 packet->payload = packet->ebuf + packet->hlen - (4 * sizeof(u32)); 1497 packet->slid = hfi1_16B_get_slid(packet->hdr); 1498 packet->dlid = hfi1_16B_get_dlid(packet->hdr); 1499 if (unlikely(hfi1_is_16B_mcast(packet->dlid))) 1500 packet->dlid += opa_get_mcast_base(OPA_MCAST_NR) - 1501 opa_get_lid(opa_get_mcast_base(OPA_MCAST_NR), 1502 16B); 1503 packet->sc = hfi1_16B_get_sc(packet->hdr); 1504 packet->sl = ibp->sc_to_sl[packet->sc]; 1505 packet->pad = hfi1_16B_bth_get_pad(packet->ohdr); 1506 packet->extra_byte = SIZE_OF_LT; 1507 packet->fecn = hfi1_16B_get_fecn(packet->hdr); 1508 packet->becn = hfi1_16B_get_becn(packet->hdr); 1509 1510 if (hfi1_bypass_ingress_pkt_check(packet)) 1511 goto drop; 1512 1513 return 0; 1514 drop: 1515 hfi1_cdbg(PKT, "%s: packet dropped\n", __func__); 1516 ibp->rvp.n_pkt_drops++; 1517 return -EINVAL; 1518 } 1519 1520 void handle_eflags(struct hfi1_packet *packet) 1521 { 1522 struct hfi1_ctxtdata *rcd = packet->rcd; 1523 u32 rte = rhf_rcv_type_err(packet->rhf); 1524 1525 rcv_hdrerr(rcd, rcd->ppd, packet); 1526 if (rhf_err_flags(packet->rhf)) 1527 dd_dev_err(rcd->dd, 1528 "receive context %d: rhf 0x%016llx, errs [ %s%s%s%s%s%s%s%s] rte 0x%x\n", 1529 rcd->ctxt, packet->rhf, 1530 packet->rhf & RHF_K_HDR_LEN_ERR ? "k_hdr_len " : "", 1531 packet->rhf & RHF_DC_UNC_ERR ? "dc_unc " : "", 1532 packet->rhf & RHF_DC_ERR ? "dc " : "", 1533 packet->rhf & RHF_TID_ERR ? "tid " : "", 1534 packet->rhf & RHF_LEN_ERR ? "len " : "", 1535 packet->rhf & RHF_ECC_ERR ? "ecc " : "", 1536 packet->rhf & RHF_VCRC_ERR ? "vcrc " : "", 1537 packet->rhf & RHF_ICRC_ERR ? "icrc " : "", 1538 rte); 1539 } 1540 1541 /* 1542 * The following functions are called by the interrupt handler. They are type 1543 * specific handlers for each packet type. 1544 */ 1545 int process_receive_ib(struct hfi1_packet *packet) 1546 { 1547 if (unlikely(hfi1_dbg_fault_packet(packet))) 1548 return RHF_RCV_CONTINUE; 1549 1550 if (hfi1_setup_9B_packet(packet)) 1551 return RHF_RCV_CONTINUE; 1552 1553 trace_hfi1_rcvhdr(packet->rcd->ppd->dd, 1554 packet->rcd->ctxt, 1555 rhf_err_flags(packet->rhf), 1556 RHF_RCV_TYPE_IB, 1557 packet->hlen, 1558 packet->tlen, 1559 packet->updegr, 1560 rhf_egr_index(packet->rhf)); 1561 1562 if (unlikely( 1563 (hfi1_dbg_fault_suppress_err(&packet->rcd->dd->verbs_dev) && 1564 (packet->rhf & RHF_DC_ERR)))) 1565 return RHF_RCV_CONTINUE; 1566 1567 if (unlikely(rhf_err_flags(packet->rhf))) { 1568 handle_eflags(packet); 1569 return RHF_RCV_CONTINUE; 1570 } 1571 1572 hfi1_ib_rcv(packet); 1573 return RHF_RCV_CONTINUE; 1574 } 1575 1576 static inline bool hfi1_is_vnic_packet(struct hfi1_packet *packet) 1577 { 1578 /* Packet received in VNIC context via RSM */ 1579 if (packet->rcd->is_vnic) 1580 return true; 1581 1582 if ((hfi1_16B_get_l2(packet->ebuf) == OPA_16B_L2_TYPE) && 1583 (hfi1_16B_get_l4(packet->ebuf) == OPA_16B_L4_ETHR)) 1584 return true; 1585 1586 return false; 1587 } 1588 1589 int process_receive_bypass(struct hfi1_packet *packet) 1590 { 1591 struct hfi1_devdata *dd = packet->rcd->dd; 1592 1593 if (hfi1_is_vnic_packet(packet)) { 1594 hfi1_vnic_bypass_rcv(packet); 1595 return RHF_RCV_CONTINUE; 1596 } 1597 1598 if (hfi1_setup_bypass_packet(packet)) 1599 return RHF_RCV_CONTINUE; 1600 1601 if (unlikely(rhf_err_flags(packet->rhf))) { 1602 handle_eflags(packet); 1603 return RHF_RCV_CONTINUE; 1604 } 1605 1606 if (hfi1_16B_get_l2(packet->hdr) == 0x2) { 1607 hfi1_16B_rcv(packet); 1608 } else { 1609 dd_dev_err(dd, 1610 "Bypass packets other than 16B are not supported in normal operation. Dropping\n"); 1611 incr_cntr64(&dd->sw_rcv_bypass_packet_errors); 1612 if (!(dd->err_info_rcvport.status_and_code & 1613 OPA_EI_STATUS_SMASK)) { 1614 u64 *flits = packet->ebuf; 1615 1616 if (flits && !(packet->rhf & RHF_LEN_ERR)) { 1617 dd->err_info_rcvport.packet_flit1 = flits[0]; 1618 dd->err_info_rcvport.packet_flit2 = 1619 packet->tlen > sizeof(flits[0]) ? 1620 flits[1] : 0; 1621 } 1622 dd->err_info_rcvport.status_and_code |= 1623 (OPA_EI_STATUS_SMASK | BAD_L2_ERR); 1624 } 1625 } 1626 return RHF_RCV_CONTINUE; 1627 } 1628 1629 int process_receive_error(struct hfi1_packet *packet) 1630 { 1631 /* KHdrHCRCErr -- KDETH packet with a bad HCRC */ 1632 if (unlikely( 1633 hfi1_dbg_fault_suppress_err(&packet->rcd->dd->verbs_dev) && 1634 rhf_rcv_type_err(packet->rhf) == 3)) 1635 return RHF_RCV_CONTINUE; 1636 1637 hfi1_setup_ib_header(packet); 1638 handle_eflags(packet); 1639 1640 if (unlikely(rhf_err_flags(packet->rhf))) 1641 dd_dev_err(packet->rcd->dd, 1642 "Unhandled error packet received. Dropping.\n"); 1643 1644 return RHF_RCV_CONTINUE; 1645 } 1646 1647 int kdeth_process_expected(struct hfi1_packet *packet) 1648 { 1649 if (unlikely(hfi1_dbg_fault_packet(packet))) 1650 return RHF_RCV_CONTINUE; 1651 1652 hfi1_setup_ib_header(packet); 1653 if (unlikely(rhf_err_flags(packet->rhf))) 1654 handle_eflags(packet); 1655 1656 dd_dev_err(packet->rcd->dd, 1657 "Unhandled expected packet received. Dropping.\n"); 1658 return RHF_RCV_CONTINUE; 1659 } 1660 1661 int kdeth_process_eager(struct hfi1_packet *packet) 1662 { 1663 hfi1_setup_ib_header(packet); 1664 if (unlikely(rhf_err_flags(packet->rhf))) 1665 handle_eflags(packet); 1666 if (unlikely(hfi1_dbg_fault_packet(packet))) 1667 return RHF_RCV_CONTINUE; 1668 1669 dd_dev_err(packet->rcd->dd, 1670 "Unhandled eager packet received. Dropping.\n"); 1671 return RHF_RCV_CONTINUE; 1672 } 1673 1674 int process_receive_invalid(struct hfi1_packet *packet) 1675 { 1676 dd_dev_err(packet->rcd->dd, "Invalid packet type %d. Dropping\n", 1677 rhf_rcv_type(packet->rhf)); 1678 return RHF_RCV_CONTINUE; 1679 } 1680 1681 void seqfile_dump_rcd(struct seq_file *s, struct hfi1_ctxtdata *rcd) 1682 { 1683 struct hfi1_packet packet; 1684 struct ps_mdata mdata; 1685 1686 seq_printf(s, "Rcd %u: RcvHdr cnt %u entsize %u %s head %llu tail %llu\n", 1687 rcd->ctxt, rcd->rcvhdrq_cnt, rcd->rcvhdrqentsize, 1688 HFI1_CAP_KGET_MASK(rcd->flags, DMA_RTAIL) ? 1689 "dma_rtail" : "nodma_rtail", 1690 read_uctxt_csr(rcd->dd, rcd->ctxt, RCV_HDR_HEAD) & 1691 RCV_HDR_HEAD_HEAD_MASK, 1692 read_uctxt_csr(rcd->dd, rcd->ctxt, RCV_HDR_TAIL)); 1693 1694 init_packet(rcd, &packet); 1695 init_ps_mdata(&mdata, &packet); 1696 1697 while (1) { 1698 struct hfi1_devdata *dd = rcd->dd; 1699 __le32 *rhf_addr = (__le32 *)rcd->rcvhdrq + mdata.ps_head + 1700 dd->rhf_offset; 1701 struct ib_header *hdr; 1702 u64 rhf = rhf_to_cpu(rhf_addr); 1703 u32 etype = rhf_rcv_type(rhf), qpn; 1704 u8 opcode; 1705 u32 psn; 1706 u8 lnh; 1707 1708 if (ps_done(&mdata, rhf, rcd)) 1709 break; 1710 1711 if (ps_skip(&mdata, rhf, rcd)) 1712 goto next; 1713 1714 if (etype > RHF_RCV_TYPE_IB) 1715 goto next; 1716 1717 packet.hdr = hfi1_get_msgheader(dd, rhf_addr); 1718 hdr = packet.hdr; 1719 1720 lnh = be16_to_cpu(hdr->lrh[0]) & 3; 1721 1722 if (lnh == HFI1_LRH_BTH) 1723 packet.ohdr = &hdr->u.oth; 1724 else if (lnh == HFI1_LRH_GRH) 1725 packet.ohdr = &hdr->u.l.oth; 1726 else 1727 goto next; /* just in case */ 1728 1729 opcode = (be32_to_cpu(packet.ohdr->bth[0]) >> 24); 1730 qpn = be32_to_cpu(packet.ohdr->bth[1]) & RVT_QPN_MASK; 1731 psn = mask_psn(be32_to_cpu(packet.ohdr->bth[2])); 1732 1733 seq_printf(s, "\tEnt %u: opcode 0x%x, qpn 0x%x, psn 0x%x\n", 1734 mdata.ps_head, opcode, qpn, psn); 1735 next: 1736 update_ps_mdata(&mdata, rcd); 1737 } 1738 } 1739