1 /* SPDX-License-Identifier: GPL-2.0 OR BSD-2-Clause */ 2 /* 3 * Copyright 2018-2021 Amazon.com, Inc. or its affiliates. All rights reserved. 4 */ 5 6 #ifndef _EFA_COM_H_ 7 #define _EFA_COM_H_ 8 9 #include <linux/delay.h> 10 #include <linux/device.h> 11 #include <linux/dma-mapping.h> 12 #include <linux/semaphore.h> 13 #include <linux/sched.h> 14 15 #include <rdma/ib_verbs.h> 16 17 #include "efa_common_defs.h" 18 #include "efa_admin_defs.h" 19 #include "efa_admin_cmds_defs.h" 20 #include "efa_regs_defs.h" 21 22 #define EFA_MAX_HANDLERS 256 23 24 struct efa_com_admin_cq { 25 struct efa_admin_acq_entry *entries; 26 dma_addr_t dma_addr; 27 spinlock_t lock; /* Protects ACQ */ 28 29 u16 cc; /* consumer counter */ 30 u8 phase; 31 }; 32 33 struct efa_com_admin_sq { 34 struct efa_admin_aq_entry *entries; 35 dma_addr_t dma_addr; 36 spinlock_t lock; /* Protects ASQ */ 37 38 u32 __iomem *db_addr; 39 40 u16 cc; /* consumer counter */ 41 u16 pc; /* producer counter */ 42 u8 phase; 43 44 }; 45 46 /* Don't use anything other than atomic64 */ 47 struct efa_com_stats_admin { 48 atomic64_t submitted_cmd; 49 atomic64_t completed_cmd; 50 atomic64_t cmd_err; 51 atomic64_t no_completion; 52 }; 53 54 enum { 55 EFA_AQ_STATE_RUNNING_BIT = 0, 56 EFA_AQ_STATE_POLLING_BIT = 1, 57 }; 58 59 struct efa_com_admin_queue { 60 void *dmadev; 61 void *efa_dev; 62 struct efa_comp_ctx *comp_ctx; 63 u32 completion_timeout; /* usecs */ 64 u16 poll_interval; /* msecs */ 65 u16 depth; 66 struct efa_com_admin_cq cq; 67 struct efa_com_admin_sq sq; 68 u16 msix_vector_idx; 69 70 unsigned long state; 71 72 /* Count the number of available admin commands */ 73 struct semaphore avail_cmds; 74 75 struct efa_com_stats_admin stats; 76 77 spinlock_t comp_ctx_lock; /* Protects completion context pool */ 78 u32 *comp_ctx_pool; 79 u16 comp_ctx_pool_next; 80 }; 81 82 struct efa_aenq_handlers; 83 struct efa_com_eq; 84 typedef void (*efa_eqe_handler)(struct efa_com_eq *eeq, 85 struct efa_admin_eqe *eqe); 86 87 struct efa_com_aenq { 88 struct efa_admin_aenq_entry *entries; 89 struct efa_aenq_handlers *aenq_handlers; 90 dma_addr_t dma_addr; 91 u32 cc; /* consumer counter */ 92 u16 msix_vector_idx; 93 u16 depth; 94 u8 phase; 95 }; 96 97 struct efa_com_mmio_read { 98 struct efa_admin_mmio_req_read_less_resp *read_resp; 99 dma_addr_t read_resp_dma_addr; 100 u16 seq_num; 101 u16 mmio_read_timeout; /* usecs */ 102 /* serializes mmio reads */ 103 spinlock_t lock; 104 }; 105 106 struct efa_com_dev { 107 struct efa_com_admin_queue aq; 108 struct efa_com_aenq aenq; 109 u8 __iomem *reg_bar; 110 void *dmadev; 111 void *efa_dev; 112 u32 supported_features; 113 u32 dma_addr_bits; 114 115 struct efa_com_mmio_read mmio_read; 116 }; 117 118 struct efa_com_eq { 119 struct efa_com_dev *edev; 120 struct efa_admin_eqe *eqes; 121 dma_addr_t dma_addr; 122 u32 cc; /* Consumer counter */ 123 u16 eqn; 124 u16 depth; 125 u8 phase; 126 efa_eqe_handler cb; 127 }; 128 129 struct efa_com_create_eq_params { 130 dma_addr_t dma_addr; 131 u32 event_bitmask; 132 u16 depth; 133 u8 entry_size_in_bytes; 134 u8 msix_vec; 135 }; 136 137 struct efa_com_create_eq_result { 138 u16 eqn; 139 }; 140 141 struct efa_com_destroy_eq_params { 142 u16 eqn; 143 }; 144 145 typedef void (*efa_aenq_handler)(void *data, 146 struct efa_admin_aenq_entry *aenq_e); 147 148 /* Holds aenq handlers. Indexed by AENQ event group */ 149 struct efa_aenq_handlers { 150 efa_aenq_handler handlers[EFA_MAX_HANDLERS]; 151 efa_aenq_handler unimplemented_handler; 152 }; 153 154 void efa_com_set_dma_addr(dma_addr_t addr, u32 *addr_high, u32 *addr_low); 155 int efa_com_admin_init(struct efa_com_dev *edev, 156 struct efa_aenq_handlers *aenq_handlers); 157 void efa_com_admin_destroy(struct efa_com_dev *edev); 158 int efa_com_eq_init(struct efa_com_dev *edev, struct efa_com_eq *eeq, 159 efa_eqe_handler cb, u16 depth, u8 msix_vec); 160 void efa_com_eq_destroy(struct efa_com_dev *edev, struct efa_com_eq *eeq); 161 int efa_com_dev_reset(struct efa_com_dev *edev, 162 enum efa_regs_reset_reason_types reset_reason); 163 void efa_com_set_admin_polling_mode(struct efa_com_dev *edev, bool polling); 164 void efa_com_admin_q_comp_intr_handler(struct efa_com_dev *edev); 165 int efa_com_mmio_reg_read_init(struct efa_com_dev *edev); 166 void efa_com_mmio_reg_read_destroy(struct efa_com_dev *edev); 167 168 int efa_com_validate_version(struct efa_com_dev *edev); 169 int efa_com_get_dma_width(struct efa_com_dev *edev); 170 171 int efa_com_cmd_exec(struct efa_com_admin_queue *aq, 172 struct efa_admin_aq_entry *cmd, 173 size_t cmd_size, 174 struct efa_admin_acq_entry *comp, 175 size_t comp_size); 176 void efa_com_aenq_intr_handler(struct efa_com_dev *edev, void *data); 177 void efa_com_eq_comp_intr_handler(struct efa_com_dev *edev, 178 struct efa_com_eq *eeq); 179 180 #endif /* _EFA_COM_H_ */ 181