1 /* SPDX-License-Identifier: GPL-2.0 OR BSD-2-Clause */ 2 /* 3 * Copyright 2018-2026 Amazon.com, Inc. or its affiliates. All rights reserved. 4 */ 5 6 #ifndef _EFA_COM_H_ 7 #define _EFA_COM_H_ 8 9 #include <linux/delay.h> 10 #include <linux/device.h> 11 #include <linux/dma-mapping.h> 12 #include <linux/semaphore.h> 13 #include <linux/sched.h> 14 15 #include <rdma/ib_verbs.h> 16 17 #include "efa_common_defs.h" 18 #include "efa_admin_defs.h" 19 #include "efa_admin_cmds_defs.h" 20 #include "efa_regs_defs.h" 21 22 #define EFA_MAX_HANDLERS 256 23 24 struct efa_com_admin_cq { 25 struct efa_admin_acq_entry *entries; 26 dma_addr_t dma_addr; 27 spinlock_t lock; /* Protects ACQ */ 28 bool validate_checksum; 29 30 u16 cc; /* consumer counter */ 31 u8 phase; 32 }; 33 34 struct efa_com_admin_sq { 35 struct efa_admin_aq_entry *entries; 36 dma_addr_t dma_addr; 37 spinlock_t lock; /* Protects ASQ */ 38 39 u32 __iomem *db_addr; 40 41 u16 cc; /* consumer counter */ 42 u16 pc; /* producer counter */ 43 u8 phase; 44 45 }; 46 47 /* Don't use anything other than atomic64 */ 48 struct efa_com_stats_admin { 49 atomic64_t submitted_cmd; 50 atomic64_t completed_cmd; 51 atomic64_t cmd_err; 52 atomic64_t no_completion; 53 }; 54 55 enum { 56 EFA_AQ_STATE_RUNNING_BIT = 0, 57 EFA_AQ_STATE_POLLING_BIT = 1, 58 }; 59 60 struct efa_com_admin_queue { 61 void *dmadev; 62 void *efa_dev; 63 struct efa_comp_ctx *comp_ctx; 64 u32 completion_timeout; /* usecs */ 65 u16 poll_interval; /* msecs */ 66 u16 depth; 67 struct efa_com_admin_cq cq; 68 struct efa_com_admin_sq sq; 69 u32 msix_vector_idx; 70 71 unsigned long state; 72 73 /* Count the number of available admin commands */ 74 struct semaphore avail_cmds; 75 76 struct efa_com_stats_admin stats; 77 78 spinlock_t comp_ctx_lock; /* Protects completion context pool */ 79 u32 *comp_ctx_pool; 80 u16 comp_ctx_pool_next; 81 }; 82 83 struct efa_aenq_handlers; 84 struct efa_com_eq; 85 typedef void (*efa_eqe_handler)(struct efa_com_eq *eeq, 86 struct efa_admin_eqe *eqe); 87 88 struct efa_com_aenq { 89 struct efa_admin_aenq_entry *entries; 90 struct efa_aenq_handlers *aenq_handlers; 91 dma_addr_t dma_addr; 92 u32 cc; /* consumer counter */ 93 u32 msix_vector_idx; 94 u16 depth; 95 u8 phase; 96 }; 97 98 struct efa_com_mmio_read { 99 struct efa_admin_mmio_req_read_less_resp *read_resp; 100 dma_addr_t read_resp_dma_addr; 101 u16 seq_num; 102 u16 mmio_read_timeout; /* usecs */ 103 /* serializes mmio reads */ 104 spinlock_t lock; 105 }; 106 107 struct efa_com_dev { 108 struct efa_com_admin_queue aq; 109 struct efa_com_aenq aenq; 110 u8 __iomem *reg_bar; 111 void *dmadev; 112 void *efa_dev; 113 u32 supported_features; 114 u32 dma_addr_bits; 115 116 u32 dev_api_ver; 117 struct efa_com_mmio_read mmio_read; 118 }; 119 120 struct efa_com_eq { 121 struct efa_com_dev *edev; 122 struct efa_admin_eqe *eqes; 123 dma_addr_t dma_addr; 124 u32 cc; /* Consumer counter */ 125 u16 eqn; 126 u16 depth; 127 u8 phase; 128 efa_eqe_handler cb; 129 }; 130 131 struct efa_com_create_eq_params { 132 dma_addr_t dma_addr; 133 u32 event_bitmask; 134 u16 depth; 135 u8 entry_size_in_bytes; 136 u8 msix_vec; 137 }; 138 139 struct efa_com_create_eq_result { 140 u16 eqn; 141 }; 142 143 struct efa_com_destroy_eq_params { 144 u16 eqn; 145 }; 146 147 typedef void (*efa_aenq_handler)(void *data, 148 struct efa_admin_aenq_entry *aenq_e); 149 150 /* Holds aenq handlers. Indexed by AENQ event group */ 151 struct efa_aenq_handlers { 152 efa_aenq_handler handlers[EFA_MAX_HANDLERS]; 153 efa_aenq_handler unimplemented_handler; 154 }; 155 156 void efa_com_set_dma_addr(dma_addr_t addr, u32 *addr_high, u32 *addr_low); 157 int efa_com_admin_init(struct efa_com_dev *edev, 158 struct efa_aenq_handlers *aenq_handlers); 159 void efa_com_admin_destroy(struct efa_com_dev *edev); 160 int efa_com_eq_init(struct efa_com_dev *edev, struct efa_com_eq *eeq, 161 efa_eqe_handler cb, u16 depth, u8 msix_vec); 162 void efa_com_eq_destroy(struct efa_com_dev *edev, struct efa_com_eq *eeq); 163 int efa_com_dev_reset(struct efa_com_dev *edev, 164 enum efa_regs_reset_reason_types reset_reason); 165 void efa_com_set_admin_polling_mode(struct efa_com_dev *edev, bool polling); 166 void efa_com_admin_q_comp_intr_handler(struct efa_com_dev *edev); 167 int efa_com_mmio_reg_read_init(struct efa_com_dev *edev); 168 void efa_com_mmio_reg_read_destroy(struct efa_com_dev *edev); 169 170 int efa_com_validate_version(struct efa_com_dev *edev); 171 int efa_com_get_dma_width(struct efa_com_dev *edev); 172 173 int efa_com_cmd_exec(struct efa_com_admin_queue *aq, 174 struct efa_admin_aq_entry *cmd, 175 size_t cmd_size, 176 struct efa_admin_acq_entry *comp, 177 size_t comp_size); 178 void efa_com_aenq_intr_handler(struct efa_com_dev *edev, void *data); 179 void efa_com_eq_comp_intr_handler(struct efa_com_dev *edev, 180 struct efa_com_eq *eeq); 181 182 #endif /* _EFA_COM_H_ */ 183