1 /* 2 * Broadcom NetXtreme-E RoCE driver. 3 * 4 * Copyright (c) 2016 - 2017, Broadcom. All rights reserved. The term 5 * Broadcom refers to Broadcom Limited and/or its subsidiaries. 6 * 7 * This software is available to you under a choice of one of two 8 * licenses. You may choose to be licensed under the terms of the GNU 9 * General Public License (GPL) Version 2, available from the file 10 * COPYING in the main directory of this source tree, or the 11 * BSD license below: 12 * 13 * Redistribution and use in source and binary forms, with or without 14 * modification, are permitted provided that the following conditions 15 * are met: 16 * 17 * 1. Redistributions of source code must retain the above copyright 18 * notice, this list of conditions and the following disclaimer. 19 * 2. Redistributions in binary form must reproduce the above copyright 20 * notice, this list of conditions and the following disclaimer in 21 * the documentation and/or other materials provided with the 22 * distribution. 23 * 24 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' 25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, 26 * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 27 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS 28 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 29 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 30 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR 31 * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, 32 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE 33 * OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN 34 * IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 35 * 36 * Description: Fast Path Operators 37 */ 38 39 #include <linux/interrupt.h> 40 #include <linux/spinlock.h> 41 #include <linux/sched.h> 42 #include <linux/slab.h> 43 #include <linux/pci.h> 44 #include <linux/prefetch.h> 45 46 #include "roce_hsi.h" 47 48 #include "qplib_res.h" 49 #include "qplib_rcfw.h" 50 #include "qplib_sp.h" 51 #include "qplib_fp.h" 52 53 static void bnxt_qplib_arm_cq_enable(struct bnxt_qplib_cq *cq); 54 static void __clean_cq(struct bnxt_qplib_cq *cq, u64 qp); 55 static void bnxt_qplib_arm_srq(struct bnxt_qplib_srq *srq, u32 arm_type); 56 57 static void bnxt_qplib_cancel_phantom_processing(struct bnxt_qplib_qp *qp) 58 { 59 qp->sq.condition = false; 60 qp->sq.send_phantom = false; 61 qp->sq.single = false; 62 } 63 64 /* Flush list */ 65 static void __bnxt_qplib_add_flush_qp(struct bnxt_qplib_qp *qp) 66 { 67 struct bnxt_qplib_cq *scq, *rcq; 68 69 scq = qp->scq; 70 rcq = qp->rcq; 71 72 if (!qp->sq.flushed) { 73 dev_dbg(&scq->hwq.pdev->dev, 74 "QPLIB: FP: Adding to SQ Flush list = %p", 75 qp); 76 bnxt_qplib_cancel_phantom_processing(qp); 77 list_add_tail(&qp->sq_flush, &scq->sqf_head); 78 qp->sq.flushed = true; 79 } 80 if (!qp->srq) { 81 if (!qp->rq.flushed) { 82 dev_dbg(&rcq->hwq.pdev->dev, 83 "QPLIB: FP: Adding to RQ Flush list = %p", 84 qp); 85 list_add_tail(&qp->rq_flush, &rcq->rqf_head); 86 qp->rq.flushed = true; 87 } 88 } 89 } 90 91 void bnxt_qplib_acquire_cq_locks(struct bnxt_qplib_qp *qp, 92 unsigned long *flags) 93 __acquires(&qp->scq->hwq.lock) __acquires(&qp->rcq->hwq.lock) 94 { 95 spin_lock_irqsave(&qp->scq->hwq.lock, *flags); 96 if (qp->scq == qp->rcq) 97 __acquire(&qp->rcq->hwq.lock); 98 else 99 spin_lock(&qp->rcq->hwq.lock); 100 } 101 102 void bnxt_qplib_release_cq_locks(struct bnxt_qplib_qp *qp, 103 unsigned long *flags) 104 __releases(&qp->scq->hwq.lock) __releases(&qp->rcq->hwq.lock) 105 { 106 if (qp->scq == qp->rcq) 107 __release(&qp->rcq->hwq.lock); 108 else 109 spin_unlock(&qp->rcq->hwq.lock); 110 spin_unlock_irqrestore(&qp->scq->hwq.lock, *flags); 111 } 112 113 static struct bnxt_qplib_cq *bnxt_qplib_find_buddy_cq(struct bnxt_qplib_qp *qp, 114 struct bnxt_qplib_cq *cq) 115 { 116 struct bnxt_qplib_cq *buddy_cq = NULL; 117 118 if (qp->scq == qp->rcq) 119 buddy_cq = NULL; 120 else if (qp->scq == cq) 121 buddy_cq = qp->rcq; 122 else 123 buddy_cq = qp->scq; 124 return buddy_cq; 125 } 126 127 static void bnxt_qplib_lock_buddy_cq(struct bnxt_qplib_qp *qp, 128 struct bnxt_qplib_cq *cq) 129 __acquires(&buddy_cq->hwq.lock) 130 { 131 struct bnxt_qplib_cq *buddy_cq = NULL; 132 133 buddy_cq = bnxt_qplib_find_buddy_cq(qp, cq); 134 if (!buddy_cq) 135 __acquire(&cq->hwq.lock); 136 else 137 spin_lock(&buddy_cq->hwq.lock); 138 } 139 140 static void bnxt_qplib_unlock_buddy_cq(struct bnxt_qplib_qp *qp, 141 struct bnxt_qplib_cq *cq) 142 __releases(&buddy_cq->hwq.lock) 143 { 144 struct bnxt_qplib_cq *buddy_cq = NULL; 145 146 buddy_cq = bnxt_qplib_find_buddy_cq(qp, cq); 147 if (!buddy_cq) 148 __release(&cq->hwq.lock); 149 else 150 spin_unlock(&buddy_cq->hwq.lock); 151 } 152 153 void bnxt_qplib_add_flush_qp(struct bnxt_qplib_qp *qp) 154 { 155 unsigned long flags; 156 157 bnxt_qplib_acquire_cq_locks(qp, &flags); 158 __bnxt_qplib_add_flush_qp(qp); 159 bnxt_qplib_release_cq_locks(qp, &flags); 160 } 161 162 static void __bnxt_qplib_del_flush_qp(struct bnxt_qplib_qp *qp) 163 { 164 if (qp->sq.flushed) { 165 qp->sq.flushed = false; 166 list_del(&qp->sq_flush); 167 } 168 if (!qp->srq) { 169 if (qp->rq.flushed) { 170 qp->rq.flushed = false; 171 list_del(&qp->rq_flush); 172 } 173 } 174 } 175 176 void bnxt_qplib_del_flush_qp(struct bnxt_qplib_qp *qp) 177 { 178 unsigned long flags; 179 180 bnxt_qplib_acquire_cq_locks(qp, &flags); 181 __clean_cq(qp->scq, (u64)(unsigned long)qp); 182 qp->sq.hwq.prod = 0; 183 qp->sq.hwq.cons = 0; 184 __clean_cq(qp->rcq, (u64)(unsigned long)qp); 185 qp->rq.hwq.prod = 0; 186 qp->rq.hwq.cons = 0; 187 188 __bnxt_qplib_del_flush_qp(qp); 189 bnxt_qplib_release_cq_locks(qp, &flags); 190 } 191 192 static void bnxt_qpn_cqn_sched_task(struct work_struct *work) 193 { 194 struct bnxt_qplib_nq_work *nq_work = 195 container_of(work, struct bnxt_qplib_nq_work, work); 196 197 struct bnxt_qplib_cq *cq = nq_work->cq; 198 struct bnxt_qplib_nq *nq = nq_work->nq; 199 200 if (cq && nq) { 201 spin_lock_bh(&cq->compl_lock); 202 if (atomic_read(&cq->arm_state) && nq->cqn_handler) { 203 dev_dbg(&nq->pdev->dev, 204 "%s:Trigger cq = %p event nq = %p\n", 205 __func__, cq, nq); 206 nq->cqn_handler(nq, cq); 207 } 208 spin_unlock_bh(&cq->compl_lock); 209 } 210 kfree(nq_work); 211 } 212 213 static void bnxt_qplib_free_qp_hdr_buf(struct bnxt_qplib_res *res, 214 struct bnxt_qplib_qp *qp) 215 { 216 struct bnxt_qplib_q *rq = &qp->rq; 217 struct bnxt_qplib_q *sq = &qp->sq; 218 219 if (qp->rq_hdr_buf) 220 dma_free_coherent(&res->pdev->dev, 221 rq->hwq.max_elements * qp->rq_hdr_buf_size, 222 qp->rq_hdr_buf, qp->rq_hdr_buf_map); 223 if (qp->sq_hdr_buf) 224 dma_free_coherent(&res->pdev->dev, 225 sq->hwq.max_elements * qp->sq_hdr_buf_size, 226 qp->sq_hdr_buf, qp->sq_hdr_buf_map); 227 qp->rq_hdr_buf = NULL; 228 qp->sq_hdr_buf = NULL; 229 qp->rq_hdr_buf_map = 0; 230 qp->sq_hdr_buf_map = 0; 231 qp->sq_hdr_buf_size = 0; 232 qp->rq_hdr_buf_size = 0; 233 } 234 235 static int bnxt_qplib_alloc_qp_hdr_buf(struct bnxt_qplib_res *res, 236 struct bnxt_qplib_qp *qp) 237 { 238 struct bnxt_qplib_q *rq = &qp->rq; 239 struct bnxt_qplib_q *sq = &qp->rq; 240 int rc = 0; 241 242 if (qp->sq_hdr_buf_size && sq->hwq.max_elements) { 243 qp->sq_hdr_buf = dma_alloc_coherent(&res->pdev->dev, 244 sq->hwq.max_elements * 245 qp->sq_hdr_buf_size, 246 &qp->sq_hdr_buf_map, GFP_KERNEL); 247 if (!qp->sq_hdr_buf) { 248 rc = -ENOMEM; 249 dev_err(&res->pdev->dev, 250 "QPLIB: Failed to create sq_hdr_buf"); 251 goto fail; 252 } 253 } 254 255 if (qp->rq_hdr_buf_size && rq->hwq.max_elements) { 256 qp->rq_hdr_buf = dma_alloc_coherent(&res->pdev->dev, 257 rq->hwq.max_elements * 258 qp->rq_hdr_buf_size, 259 &qp->rq_hdr_buf_map, 260 GFP_KERNEL); 261 if (!qp->rq_hdr_buf) { 262 rc = -ENOMEM; 263 dev_err(&res->pdev->dev, 264 "QPLIB: Failed to create rq_hdr_buf"); 265 goto fail; 266 } 267 } 268 return 0; 269 270 fail: 271 bnxt_qplib_free_qp_hdr_buf(res, qp); 272 return rc; 273 } 274 275 static void bnxt_qplib_service_nq(unsigned long data) 276 { 277 struct bnxt_qplib_nq *nq = (struct bnxt_qplib_nq *)data; 278 struct bnxt_qplib_hwq *hwq = &nq->hwq; 279 struct nq_base *nqe, **nq_ptr; 280 struct bnxt_qplib_cq *cq; 281 int num_cqne_processed = 0; 282 int num_srqne_processed = 0; 283 u32 sw_cons, raw_cons; 284 u16 type; 285 int budget = nq->budget; 286 u64 q_handle; 287 288 /* Service the NQ until empty */ 289 raw_cons = hwq->cons; 290 while (budget--) { 291 sw_cons = HWQ_CMP(raw_cons, hwq); 292 nq_ptr = (struct nq_base **)hwq->pbl_ptr; 293 nqe = &nq_ptr[NQE_PG(sw_cons)][NQE_IDX(sw_cons)]; 294 if (!NQE_CMP_VALID(nqe, raw_cons, hwq->max_elements)) 295 break; 296 297 /* 298 * The valid test of the entry must be done first before 299 * reading any further. 300 */ 301 dma_rmb(); 302 303 type = le16_to_cpu(nqe->info10_type) & NQ_BASE_TYPE_MASK; 304 switch (type) { 305 case NQ_BASE_TYPE_CQ_NOTIFICATION: 306 { 307 struct nq_cn *nqcne = (struct nq_cn *)nqe; 308 309 q_handle = le32_to_cpu(nqcne->cq_handle_low); 310 q_handle |= (u64)le32_to_cpu(nqcne->cq_handle_high) 311 << 32; 312 cq = (struct bnxt_qplib_cq *)(unsigned long)q_handle; 313 bnxt_qplib_arm_cq_enable(cq); 314 spin_lock_bh(&cq->compl_lock); 315 atomic_set(&cq->arm_state, 0); 316 if (!nq->cqn_handler(nq, (cq))) 317 num_cqne_processed++; 318 else 319 dev_warn(&nq->pdev->dev, 320 "QPLIB: cqn - type 0x%x not handled", 321 type); 322 spin_unlock_bh(&cq->compl_lock); 323 break; 324 } 325 case NQ_BASE_TYPE_SRQ_EVENT: 326 { 327 struct nq_srq_event *nqsrqe = 328 (struct nq_srq_event *)nqe; 329 330 q_handle = le32_to_cpu(nqsrqe->srq_handle_low); 331 q_handle |= (u64)le32_to_cpu(nqsrqe->srq_handle_high) 332 << 32; 333 bnxt_qplib_arm_srq((struct bnxt_qplib_srq *)q_handle, 334 DBR_DBR_TYPE_SRQ_ARMENA); 335 if (!nq->srqn_handler(nq, 336 (struct bnxt_qplib_srq *)q_handle, 337 nqsrqe->event)) 338 num_srqne_processed++; 339 else 340 dev_warn(&nq->pdev->dev, 341 "QPLIB: SRQ event 0x%x not handled", 342 nqsrqe->event); 343 break; 344 } 345 case NQ_BASE_TYPE_DBQ_EVENT: 346 break; 347 default: 348 dev_warn(&nq->pdev->dev, 349 "QPLIB: nqe with type = 0x%x not handled", 350 type); 351 break; 352 } 353 raw_cons++; 354 } 355 if (hwq->cons != raw_cons) { 356 hwq->cons = raw_cons; 357 NQ_DB_REARM(nq->bar_reg_iomem, hwq->cons, hwq->max_elements); 358 } 359 } 360 361 static irqreturn_t bnxt_qplib_nq_irq(int irq, void *dev_instance) 362 { 363 struct bnxt_qplib_nq *nq = dev_instance; 364 struct bnxt_qplib_hwq *hwq = &nq->hwq; 365 struct nq_base **nq_ptr; 366 u32 sw_cons; 367 368 /* Prefetch the NQ element */ 369 sw_cons = HWQ_CMP(hwq->cons, hwq); 370 nq_ptr = (struct nq_base **)nq->hwq.pbl_ptr; 371 prefetch(&nq_ptr[NQE_PG(sw_cons)][NQE_IDX(sw_cons)]); 372 373 /* Fan out to CPU affinitized kthreads? */ 374 tasklet_schedule(&nq->worker); 375 376 return IRQ_HANDLED; 377 } 378 379 void bnxt_qplib_disable_nq(struct bnxt_qplib_nq *nq) 380 { 381 if (nq->cqn_wq) { 382 destroy_workqueue(nq->cqn_wq); 383 nq->cqn_wq = NULL; 384 } 385 /* Make sure the HW is stopped! */ 386 synchronize_irq(nq->vector); 387 tasklet_disable(&nq->worker); 388 tasklet_kill(&nq->worker); 389 390 if (nq->requested) { 391 irq_set_affinity_hint(nq->vector, NULL); 392 free_irq(nq->vector, nq); 393 nq->requested = false; 394 } 395 if (nq->bar_reg_iomem) 396 iounmap(nq->bar_reg_iomem); 397 nq->bar_reg_iomem = NULL; 398 399 nq->cqn_handler = NULL; 400 nq->srqn_handler = NULL; 401 nq->vector = 0; 402 } 403 404 int bnxt_qplib_enable_nq(struct pci_dev *pdev, struct bnxt_qplib_nq *nq, 405 int nq_idx, int msix_vector, int bar_reg_offset, 406 int (*cqn_handler)(struct bnxt_qplib_nq *nq, 407 struct bnxt_qplib_cq *), 408 int (*srqn_handler)(struct bnxt_qplib_nq *nq, 409 struct bnxt_qplib_srq *, 410 u8 event)) 411 { 412 resource_size_t nq_base; 413 int rc = -1; 414 415 nq->pdev = pdev; 416 nq->vector = msix_vector; 417 if (cqn_handler) 418 nq->cqn_handler = cqn_handler; 419 420 if (srqn_handler) 421 nq->srqn_handler = srqn_handler; 422 423 tasklet_init(&nq->worker, bnxt_qplib_service_nq, (unsigned long)nq); 424 425 /* Have a task to schedule CQ notifiers in post send case */ 426 nq->cqn_wq = create_singlethread_workqueue("bnxt_qplib_nq"); 427 if (!nq->cqn_wq) 428 goto fail; 429 430 nq->requested = false; 431 memset(nq->name, 0, 32); 432 sprintf(nq->name, "bnxt_qplib_nq-%d", nq_idx); 433 rc = request_irq(nq->vector, bnxt_qplib_nq_irq, 0, nq->name, nq); 434 if (rc) { 435 dev_err(&nq->pdev->dev, 436 "Failed to request IRQ for NQ: %#x", rc); 437 goto fail; 438 } 439 440 cpumask_clear(&nq->mask); 441 cpumask_set_cpu(nq_idx, &nq->mask); 442 rc = irq_set_affinity_hint(nq->vector, &nq->mask); 443 if (rc) { 444 dev_warn(&nq->pdev->dev, 445 "QPLIB: set affinity failed; vector: %d nq_idx: %d\n", 446 nq->vector, nq_idx); 447 } 448 449 nq->requested = true; 450 nq->bar_reg = NQ_CONS_PCI_BAR_REGION; 451 nq->bar_reg_off = bar_reg_offset; 452 nq_base = pci_resource_start(pdev, nq->bar_reg); 453 if (!nq_base) { 454 rc = -ENOMEM; 455 goto fail; 456 } 457 nq->bar_reg_iomem = ioremap_nocache(nq_base + nq->bar_reg_off, 4); 458 if (!nq->bar_reg_iomem) { 459 rc = -ENOMEM; 460 goto fail; 461 } 462 NQ_DB_REARM(nq->bar_reg_iomem, nq->hwq.cons, nq->hwq.max_elements); 463 464 return 0; 465 fail: 466 bnxt_qplib_disable_nq(nq); 467 return rc; 468 } 469 470 void bnxt_qplib_free_nq(struct bnxt_qplib_nq *nq) 471 { 472 if (nq->hwq.max_elements) { 473 bnxt_qplib_free_hwq(nq->pdev, &nq->hwq); 474 nq->hwq.max_elements = 0; 475 } 476 } 477 478 int bnxt_qplib_alloc_nq(struct pci_dev *pdev, struct bnxt_qplib_nq *nq) 479 { 480 nq->pdev = pdev; 481 if (!nq->hwq.max_elements || 482 nq->hwq.max_elements > BNXT_QPLIB_NQE_MAX_CNT) 483 nq->hwq.max_elements = BNXT_QPLIB_NQE_MAX_CNT; 484 485 if (bnxt_qplib_alloc_init_hwq(nq->pdev, &nq->hwq, NULL, 0, 486 &nq->hwq.max_elements, 487 BNXT_QPLIB_MAX_NQE_ENTRY_SIZE, 0, 488 PAGE_SIZE, HWQ_TYPE_L2_CMPL)) 489 return -ENOMEM; 490 491 nq->budget = 8; 492 return 0; 493 } 494 495 /* SRQ */ 496 static void bnxt_qplib_arm_srq(struct bnxt_qplib_srq *srq, u32 arm_type) 497 { 498 struct bnxt_qplib_hwq *srq_hwq = &srq->hwq; 499 struct dbr_dbr db_msg = { 0 }; 500 void __iomem *db; 501 u32 sw_prod = 0; 502 503 /* Ring DB */ 504 sw_prod = (arm_type == DBR_DBR_TYPE_SRQ_ARM) ? srq->threshold : 505 HWQ_CMP(srq_hwq->prod, srq_hwq); 506 db_msg.index = cpu_to_le32((sw_prod << DBR_DBR_INDEX_SFT) & 507 DBR_DBR_INDEX_MASK); 508 db_msg.type_xid = cpu_to_le32(((srq->id << DBR_DBR_XID_SFT) & 509 DBR_DBR_XID_MASK) | arm_type); 510 db = (arm_type == DBR_DBR_TYPE_SRQ_ARMENA) ? 511 srq->dbr_base : srq->dpi->dbr; 512 wmb(); /* barrier before db ring */ 513 __iowrite64_copy(db, &db_msg, sizeof(db_msg) / sizeof(u64)); 514 } 515 516 int bnxt_qplib_destroy_srq(struct bnxt_qplib_res *res, 517 struct bnxt_qplib_srq *srq) 518 { 519 struct bnxt_qplib_rcfw *rcfw = res->rcfw; 520 struct cmdq_destroy_srq req; 521 struct creq_destroy_srq_resp resp; 522 u16 cmd_flags = 0; 523 int rc; 524 525 RCFW_CMD_PREP(req, DESTROY_SRQ, cmd_flags); 526 527 /* Configure the request */ 528 req.srq_cid = cpu_to_le32(srq->id); 529 530 rc = bnxt_qplib_rcfw_send_message(rcfw, (void *)&req, 531 (void *)&resp, NULL, 0); 532 if (rc) 533 return rc; 534 535 bnxt_qplib_free_hwq(res->pdev, &srq->hwq); 536 kfree(srq->swq); 537 return 0; 538 } 539 540 int bnxt_qplib_create_srq(struct bnxt_qplib_res *res, 541 struct bnxt_qplib_srq *srq) 542 { 543 struct bnxt_qplib_rcfw *rcfw = res->rcfw; 544 struct cmdq_create_srq req; 545 struct creq_create_srq_resp resp; 546 struct bnxt_qplib_pbl *pbl; 547 u16 cmd_flags = 0; 548 int rc, idx; 549 550 srq->hwq.max_elements = srq->max_wqe; 551 rc = bnxt_qplib_alloc_init_hwq(res->pdev, &srq->hwq, srq->sglist, 552 srq->nmap, &srq->hwq.max_elements, 553 BNXT_QPLIB_MAX_RQE_ENTRY_SIZE, 0, 554 PAGE_SIZE, HWQ_TYPE_QUEUE); 555 if (rc) 556 goto exit; 557 558 srq->swq = kcalloc(srq->hwq.max_elements, sizeof(*srq->swq), 559 GFP_KERNEL); 560 if (!srq->swq) 561 goto fail; 562 563 RCFW_CMD_PREP(req, CREATE_SRQ, cmd_flags); 564 565 /* Configure the request */ 566 req.dpi = cpu_to_le32(srq->dpi->dpi); 567 req.srq_handle = cpu_to_le64(srq); 568 569 req.srq_size = cpu_to_le16((u16)srq->hwq.max_elements); 570 pbl = &srq->hwq.pbl[PBL_LVL_0]; 571 req.pg_size_lvl = cpu_to_le16((((u16)srq->hwq.level & 572 CMDQ_CREATE_SRQ_LVL_MASK) << 573 CMDQ_CREATE_SRQ_LVL_SFT) | 574 (pbl->pg_size == ROCE_PG_SIZE_4K ? 575 CMDQ_CREATE_SRQ_PG_SIZE_PG_4K : 576 pbl->pg_size == ROCE_PG_SIZE_8K ? 577 CMDQ_CREATE_SRQ_PG_SIZE_PG_8K : 578 pbl->pg_size == ROCE_PG_SIZE_64K ? 579 CMDQ_CREATE_SRQ_PG_SIZE_PG_64K : 580 pbl->pg_size == ROCE_PG_SIZE_2M ? 581 CMDQ_CREATE_SRQ_PG_SIZE_PG_2M : 582 pbl->pg_size == ROCE_PG_SIZE_8M ? 583 CMDQ_CREATE_SRQ_PG_SIZE_PG_8M : 584 pbl->pg_size == ROCE_PG_SIZE_1G ? 585 CMDQ_CREATE_SRQ_PG_SIZE_PG_1G : 586 CMDQ_CREATE_SRQ_PG_SIZE_PG_4K)); 587 req.pbl = cpu_to_le64(pbl->pg_map_arr[0]); 588 req.pd_id = cpu_to_le32(srq->pd->id); 589 req.eventq_id = cpu_to_le16(srq->eventq_hw_ring_id); 590 591 rc = bnxt_qplib_rcfw_send_message(rcfw, (void *)&req, 592 (void *)&resp, NULL, 0); 593 if (rc) 594 goto fail; 595 596 spin_lock_init(&srq->lock); 597 srq->start_idx = 0; 598 srq->last_idx = srq->hwq.max_elements - 1; 599 for (idx = 0; idx < srq->hwq.max_elements; idx++) 600 srq->swq[idx].next_idx = idx + 1; 601 srq->swq[srq->last_idx].next_idx = -1; 602 603 srq->id = le32_to_cpu(resp.xid); 604 srq->dbr_base = res->dpi_tbl.dbr_bar_reg_iomem; 605 if (srq->threshold) 606 bnxt_qplib_arm_srq(srq, DBR_DBR_TYPE_SRQ_ARMENA); 607 srq->arm_req = false; 608 609 return 0; 610 fail: 611 bnxt_qplib_free_hwq(res->pdev, &srq->hwq); 612 kfree(srq->swq); 613 exit: 614 return rc; 615 } 616 617 int bnxt_qplib_modify_srq(struct bnxt_qplib_res *res, 618 struct bnxt_qplib_srq *srq) 619 { 620 struct bnxt_qplib_hwq *srq_hwq = &srq->hwq; 621 u32 sw_prod, sw_cons, count = 0; 622 623 sw_prod = HWQ_CMP(srq_hwq->prod, srq_hwq); 624 sw_cons = HWQ_CMP(srq_hwq->cons, srq_hwq); 625 626 count = sw_prod > sw_cons ? sw_prod - sw_cons : 627 srq_hwq->max_elements - sw_cons + sw_prod; 628 if (count > srq->threshold) { 629 srq->arm_req = false; 630 bnxt_qplib_arm_srq(srq, DBR_DBR_TYPE_SRQ_ARM); 631 } else { 632 /* Deferred arming */ 633 srq->arm_req = true; 634 } 635 636 return 0; 637 } 638 639 int bnxt_qplib_query_srq(struct bnxt_qplib_res *res, 640 struct bnxt_qplib_srq *srq) 641 { 642 struct bnxt_qplib_rcfw *rcfw = res->rcfw; 643 struct cmdq_query_srq req; 644 struct creq_query_srq_resp resp; 645 struct bnxt_qplib_rcfw_sbuf *sbuf; 646 struct creq_query_srq_resp_sb *sb; 647 u16 cmd_flags = 0; 648 int rc = 0; 649 650 RCFW_CMD_PREP(req, QUERY_SRQ, cmd_flags); 651 req.srq_cid = cpu_to_le32(srq->id); 652 653 /* Configure the request */ 654 sbuf = bnxt_qplib_rcfw_alloc_sbuf(rcfw, sizeof(*sb)); 655 if (!sbuf) 656 return -ENOMEM; 657 sb = sbuf->sb; 658 rc = bnxt_qplib_rcfw_send_message(rcfw, (void *)&req, (void *)&resp, 659 (void *)sbuf, 0); 660 srq->threshold = le16_to_cpu(sb->srq_limit); 661 bnxt_qplib_rcfw_free_sbuf(rcfw, sbuf); 662 663 return rc; 664 } 665 666 int bnxt_qplib_post_srq_recv(struct bnxt_qplib_srq *srq, 667 struct bnxt_qplib_swqe *wqe) 668 { 669 struct bnxt_qplib_hwq *srq_hwq = &srq->hwq; 670 struct rq_wqe *srqe, **srqe_ptr; 671 struct sq_sge *hw_sge; 672 u32 sw_prod, sw_cons, count = 0; 673 int i, rc = 0, next; 674 675 spin_lock(&srq_hwq->lock); 676 if (srq->start_idx == srq->last_idx) { 677 dev_err(&srq_hwq->pdev->dev, "QPLIB: FP: SRQ (0x%x) is full!", 678 srq->id); 679 rc = -EINVAL; 680 spin_unlock(&srq_hwq->lock); 681 goto done; 682 } 683 next = srq->start_idx; 684 srq->start_idx = srq->swq[next].next_idx; 685 spin_unlock(&srq_hwq->lock); 686 687 sw_prod = HWQ_CMP(srq_hwq->prod, srq_hwq); 688 srqe_ptr = (struct rq_wqe **)srq_hwq->pbl_ptr; 689 srqe = &srqe_ptr[RQE_PG(sw_prod)][RQE_IDX(sw_prod)]; 690 memset(srqe, 0, BNXT_QPLIB_MAX_RQE_ENTRY_SIZE); 691 /* Calculate wqe_size16 and data_len */ 692 for (i = 0, hw_sge = (struct sq_sge *)srqe->data; 693 i < wqe->num_sge; i++, hw_sge++) { 694 hw_sge->va_or_pa = cpu_to_le64(wqe->sg_list[i].addr); 695 hw_sge->l_key = cpu_to_le32(wqe->sg_list[i].lkey); 696 hw_sge->size = cpu_to_le32(wqe->sg_list[i].size); 697 } 698 srqe->wqe_type = wqe->type; 699 srqe->flags = wqe->flags; 700 srqe->wqe_size = wqe->num_sge + 701 ((offsetof(typeof(*srqe), data) + 15) >> 4); 702 srqe->wr_id[0] = cpu_to_le32((u32)next); 703 srq->swq[next].wr_id = wqe->wr_id; 704 705 srq_hwq->prod++; 706 707 spin_lock(&srq_hwq->lock); 708 sw_prod = HWQ_CMP(srq_hwq->prod, srq_hwq); 709 /* retaining srq_hwq->cons for this logic 710 * actually the lock is only required to 711 * read srq_hwq->cons. 712 */ 713 sw_cons = HWQ_CMP(srq_hwq->cons, srq_hwq); 714 count = sw_prod > sw_cons ? sw_prod - sw_cons : 715 srq_hwq->max_elements - sw_cons + sw_prod; 716 spin_unlock(&srq_hwq->lock); 717 /* Ring DB */ 718 bnxt_qplib_arm_srq(srq, DBR_DBR_TYPE_SRQ); 719 if (srq->arm_req == true && count > srq->threshold) { 720 srq->arm_req = false; 721 bnxt_qplib_arm_srq(srq, DBR_DBR_TYPE_SRQ_ARM); 722 } 723 done: 724 return rc; 725 } 726 727 /* QP */ 728 int bnxt_qplib_create_qp1(struct bnxt_qplib_res *res, struct bnxt_qplib_qp *qp) 729 { 730 struct bnxt_qplib_rcfw *rcfw = res->rcfw; 731 struct cmdq_create_qp1 req; 732 struct creq_create_qp1_resp resp; 733 struct bnxt_qplib_pbl *pbl; 734 struct bnxt_qplib_q *sq = &qp->sq; 735 struct bnxt_qplib_q *rq = &qp->rq; 736 int rc; 737 u16 cmd_flags = 0; 738 u32 qp_flags = 0; 739 740 RCFW_CMD_PREP(req, CREATE_QP1, cmd_flags); 741 742 /* General */ 743 req.type = qp->type; 744 req.dpi = cpu_to_le32(qp->dpi->dpi); 745 req.qp_handle = cpu_to_le64(qp->qp_handle); 746 747 /* SQ */ 748 sq->hwq.max_elements = sq->max_wqe; 749 rc = bnxt_qplib_alloc_init_hwq(res->pdev, &sq->hwq, NULL, 0, 750 &sq->hwq.max_elements, 751 BNXT_QPLIB_MAX_SQE_ENTRY_SIZE, 0, 752 PAGE_SIZE, HWQ_TYPE_QUEUE); 753 if (rc) 754 goto exit; 755 756 sq->swq = kcalloc(sq->hwq.max_elements, sizeof(*sq->swq), GFP_KERNEL); 757 if (!sq->swq) { 758 rc = -ENOMEM; 759 goto fail_sq; 760 } 761 pbl = &sq->hwq.pbl[PBL_LVL_0]; 762 req.sq_pbl = cpu_to_le64(pbl->pg_map_arr[0]); 763 req.sq_pg_size_sq_lvl = 764 ((sq->hwq.level & CMDQ_CREATE_QP1_SQ_LVL_MASK) 765 << CMDQ_CREATE_QP1_SQ_LVL_SFT) | 766 (pbl->pg_size == ROCE_PG_SIZE_4K ? 767 CMDQ_CREATE_QP1_SQ_PG_SIZE_PG_4K : 768 pbl->pg_size == ROCE_PG_SIZE_8K ? 769 CMDQ_CREATE_QP1_SQ_PG_SIZE_PG_8K : 770 pbl->pg_size == ROCE_PG_SIZE_64K ? 771 CMDQ_CREATE_QP1_SQ_PG_SIZE_PG_64K : 772 pbl->pg_size == ROCE_PG_SIZE_2M ? 773 CMDQ_CREATE_QP1_SQ_PG_SIZE_PG_2M : 774 pbl->pg_size == ROCE_PG_SIZE_8M ? 775 CMDQ_CREATE_QP1_SQ_PG_SIZE_PG_8M : 776 pbl->pg_size == ROCE_PG_SIZE_1G ? 777 CMDQ_CREATE_QP1_SQ_PG_SIZE_PG_1G : 778 CMDQ_CREATE_QP1_SQ_PG_SIZE_PG_4K); 779 780 if (qp->scq) 781 req.scq_cid = cpu_to_le32(qp->scq->id); 782 783 qp_flags |= CMDQ_CREATE_QP1_QP_FLAGS_RESERVED_LKEY_ENABLE; 784 785 /* RQ */ 786 if (rq->max_wqe) { 787 rq->hwq.max_elements = qp->rq.max_wqe; 788 rc = bnxt_qplib_alloc_init_hwq(res->pdev, &rq->hwq, NULL, 0, 789 &rq->hwq.max_elements, 790 BNXT_QPLIB_MAX_RQE_ENTRY_SIZE, 0, 791 PAGE_SIZE, HWQ_TYPE_QUEUE); 792 if (rc) 793 goto fail_sq; 794 795 rq->swq = kcalloc(rq->hwq.max_elements, sizeof(*rq->swq), 796 GFP_KERNEL); 797 if (!rq->swq) { 798 rc = -ENOMEM; 799 goto fail_rq; 800 } 801 pbl = &rq->hwq.pbl[PBL_LVL_0]; 802 req.rq_pbl = cpu_to_le64(pbl->pg_map_arr[0]); 803 req.rq_pg_size_rq_lvl = 804 ((rq->hwq.level & CMDQ_CREATE_QP1_RQ_LVL_MASK) << 805 CMDQ_CREATE_QP1_RQ_LVL_SFT) | 806 (pbl->pg_size == ROCE_PG_SIZE_4K ? 807 CMDQ_CREATE_QP1_RQ_PG_SIZE_PG_4K : 808 pbl->pg_size == ROCE_PG_SIZE_8K ? 809 CMDQ_CREATE_QP1_RQ_PG_SIZE_PG_8K : 810 pbl->pg_size == ROCE_PG_SIZE_64K ? 811 CMDQ_CREATE_QP1_RQ_PG_SIZE_PG_64K : 812 pbl->pg_size == ROCE_PG_SIZE_2M ? 813 CMDQ_CREATE_QP1_RQ_PG_SIZE_PG_2M : 814 pbl->pg_size == ROCE_PG_SIZE_8M ? 815 CMDQ_CREATE_QP1_RQ_PG_SIZE_PG_8M : 816 pbl->pg_size == ROCE_PG_SIZE_1G ? 817 CMDQ_CREATE_QP1_RQ_PG_SIZE_PG_1G : 818 CMDQ_CREATE_QP1_RQ_PG_SIZE_PG_4K); 819 if (qp->rcq) 820 req.rcq_cid = cpu_to_le32(qp->rcq->id); 821 } 822 823 /* Header buffer - allow hdr_buf pass in */ 824 rc = bnxt_qplib_alloc_qp_hdr_buf(res, qp); 825 if (rc) { 826 rc = -ENOMEM; 827 goto fail; 828 } 829 req.qp_flags = cpu_to_le32(qp_flags); 830 req.sq_size = cpu_to_le32(sq->hwq.max_elements); 831 req.rq_size = cpu_to_le32(rq->hwq.max_elements); 832 833 req.sq_fwo_sq_sge = 834 cpu_to_le16((sq->max_sge & CMDQ_CREATE_QP1_SQ_SGE_MASK) << 835 CMDQ_CREATE_QP1_SQ_SGE_SFT); 836 req.rq_fwo_rq_sge = 837 cpu_to_le16((rq->max_sge & CMDQ_CREATE_QP1_RQ_SGE_MASK) << 838 CMDQ_CREATE_QP1_RQ_SGE_SFT); 839 840 req.pd_id = cpu_to_le32(qp->pd->id); 841 842 rc = bnxt_qplib_rcfw_send_message(rcfw, (void *)&req, 843 (void *)&resp, NULL, 0); 844 if (rc) 845 goto fail; 846 847 qp->id = le32_to_cpu(resp.xid); 848 qp->cur_qp_state = CMDQ_MODIFY_QP_NEW_STATE_RESET; 849 rcfw->qp_tbl[qp->id].qp_id = qp->id; 850 rcfw->qp_tbl[qp->id].qp_handle = (void *)qp; 851 852 return 0; 853 854 fail: 855 bnxt_qplib_free_qp_hdr_buf(res, qp); 856 fail_rq: 857 bnxt_qplib_free_hwq(res->pdev, &rq->hwq); 858 kfree(rq->swq); 859 fail_sq: 860 bnxt_qplib_free_hwq(res->pdev, &sq->hwq); 861 kfree(sq->swq); 862 exit: 863 return rc; 864 } 865 866 int bnxt_qplib_create_qp(struct bnxt_qplib_res *res, struct bnxt_qplib_qp *qp) 867 { 868 struct bnxt_qplib_rcfw *rcfw = res->rcfw; 869 struct sq_send *hw_sq_send_hdr, **hw_sq_send_ptr; 870 struct cmdq_create_qp req; 871 struct creq_create_qp_resp resp; 872 struct bnxt_qplib_pbl *pbl; 873 struct sq_psn_search **psn_search_ptr; 874 unsigned long int psn_search, poff = 0; 875 struct bnxt_qplib_q *sq = &qp->sq; 876 struct bnxt_qplib_q *rq = &qp->rq; 877 struct bnxt_qplib_hwq *xrrq; 878 int i, rc, req_size, psn_sz; 879 u16 cmd_flags = 0, max_ssge; 880 u32 sw_prod, qp_flags = 0; 881 882 RCFW_CMD_PREP(req, CREATE_QP, cmd_flags); 883 884 /* General */ 885 req.type = qp->type; 886 req.dpi = cpu_to_le32(qp->dpi->dpi); 887 req.qp_handle = cpu_to_le64(qp->qp_handle); 888 889 /* SQ */ 890 psn_sz = (qp->type == CMDQ_CREATE_QP_TYPE_RC) ? 891 sizeof(struct sq_psn_search) : 0; 892 sq->hwq.max_elements = sq->max_wqe; 893 rc = bnxt_qplib_alloc_init_hwq(res->pdev, &sq->hwq, sq->sglist, 894 sq->nmap, &sq->hwq.max_elements, 895 BNXT_QPLIB_MAX_SQE_ENTRY_SIZE, 896 psn_sz, 897 PAGE_SIZE, HWQ_TYPE_QUEUE); 898 if (rc) 899 goto exit; 900 901 sq->swq = kcalloc(sq->hwq.max_elements, sizeof(*sq->swq), GFP_KERNEL); 902 if (!sq->swq) { 903 rc = -ENOMEM; 904 goto fail_sq; 905 } 906 hw_sq_send_ptr = (struct sq_send **)sq->hwq.pbl_ptr; 907 if (psn_sz) { 908 psn_search_ptr = (struct sq_psn_search **) 909 &hw_sq_send_ptr[get_sqe_pg 910 (sq->hwq.max_elements)]; 911 psn_search = (unsigned long int) 912 &hw_sq_send_ptr[get_sqe_pg(sq->hwq.max_elements)] 913 [get_sqe_idx(sq->hwq.max_elements)]; 914 if (psn_search & ~PAGE_MASK) { 915 /* If the psn_search does not start on a page boundary, 916 * then calculate the offset 917 */ 918 poff = (psn_search & ~PAGE_MASK) / 919 BNXT_QPLIB_MAX_PSNE_ENTRY_SIZE; 920 } 921 for (i = 0; i < sq->hwq.max_elements; i++) 922 sq->swq[i].psn_search = 923 &psn_search_ptr[get_psne_pg(i + poff)] 924 [get_psne_idx(i + poff)]; 925 } 926 pbl = &sq->hwq.pbl[PBL_LVL_0]; 927 req.sq_pbl = cpu_to_le64(pbl->pg_map_arr[0]); 928 req.sq_pg_size_sq_lvl = 929 ((sq->hwq.level & CMDQ_CREATE_QP_SQ_LVL_MASK) 930 << CMDQ_CREATE_QP_SQ_LVL_SFT) | 931 (pbl->pg_size == ROCE_PG_SIZE_4K ? 932 CMDQ_CREATE_QP_SQ_PG_SIZE_PG_4K : 933 pbl->pg_size == ROCE_PG_SIZE_8K ? 934 CMDQ_CREATE_QP_SQ_PG_SIZE_PG_8K : 935 pbl->pg_size == ROCE_PG_SIZE_64K ? 936 CMDQ_CREATE_QP_SQ_PG_SIZE_PG_64K : 937 pbl->pg_size == ROCE_PG_SIZE_2M ? 938 CMDQ_CREATE_QP_SQ_PG_SIZE_PG_2M : 939 pbl->pg_size == ROCE_PG_SIZE_8M ? 940 CMDQ_CREATE_QP_SQ_PG_SIZE_PG_8M : 941 pbl->pg_size == ROCE_PG_SIZE_1G ? 942 CMDQ_CREATE_QP_SQ_PG_SIZE_PG_1G : 943 CMDQ_CREATE_QP_SQ_PG_SIZE_PG_4K); 944 945 /* initialize all SQ WQEs to LOCAL_INVALID (sq prep for hw fetch) */ 946 hw_sq_send_ptr = (struct sq_send **)sq->hwq.pbl_ptr; 947 for (sw_prod = 0; sw_prod < sq->hwq.max_elements; sw_prod++) { 948 hw_sq_send_hdr = &hw_sq_send_ptr[get_sqe_pg(sw_prod)] 949 [get_sqe_idx(sw_prod)]; 950 hw_sq_send_hdr->wqe_type = SQ_BASE_WQE_TYPE_LOCAL_INVALID; 951 } 952 953 if (qp->scq) 954 req.scq_cid = cpu_to_le32(qp->scq->id); 955 956 qp_flags |= CMDQ_CREATE_QP_QP_FLAGS_RESERVED_LKEY_ENABLE; 957 qp_flags |= CMDQ_CREATE_QP_QP_FLAGS_FR_PMR_ENABLED; 958 if (qp->sig_type) 959 qp_flags |= CMDQ_CREATE_QP_QP_FLAGS_FORCE_COMPLETION; 960 961 /* RQ */ 962 if (rq->max_wqe) { 963 rq->hwq.max_elements = rq->max_wqe; 964 rc = bnxt_qplib_alloc_init_hwq(res->pdev, &rq->hwq, rq->sglist, 965 rq->nmap, &rq->hwq.max_elements, 966 BNXT_QPLIB_MAX_RQE_ENTRY_SIZE, 0, 967 PAGE_SIZE, HWQ_TYPE_QUEUE); 968 if (rc) 969 goto fail_sq; 970 971 rq->swq = kcalloc(rq->hwq.max_elements, sizeof(*rq->swq), 972 GFP_KERNEL); 973 if (!rq->swq) { 974 rc = -ENOMEM; 975 goto fail_rq; 976 } 977 pbl = &rq->hwq.pbl[PBL_LVL_0]; 978 req.rq_pbl = cpu_to_le64(pbl->pg_map_arr[0]); 979 req.rq_pg_size_rq_lvl = 980 ((rq->hwq.level & CMDQ_CREATE_QP_RQ_LVL_MASK) << 981 CMDQ_CREATE_QP_RQ_LVL_SFT) | 982 (pbl->pg_size == ROCE_PG_SIZE_4K ? 983 CMDQ_CREATE_QP_RQ_PG_SIZE_PG_4K : 984 pbl->pg_size == ROCE_PG_SIZE_8K ? 985 CMDQ_CREATE_QP_RQ_PG_SIZE_PG_8K : 986 pbl->pg_size == ROCE_PG_SIZE_64K ? 987 CMDQ_CREATE_QP_RQ_PG_SIZE_PG_64K : 988 pbl->pg_size == ROCE_PG_SIZE_2M ? 989 CMDQ_CREATE_QP_RQ_PG_SIZE_PG_2M : 990 pbl->pg_size == ROCE_PG_SIZE_8M ? 991 CMDQ_CREATE_QP_RQ_PG_SIZE_PG_8M : 992 pbl->pg_size == ROCE_PG_SIZE_1G ? 993 CMDQ_CREATE_QP_RQ_PG_SIZE_PG_1G : 994 CMDQ_CREATE_QP_RQ_PG_SIZE_PG_4K); 995 } else { 996 /* SRQ */ 997 if (qp->srq) { 998 qp_flags |= CMDQ_CREATE_QP_QP_FLAGS_SRQ_USED; 999 req.srq_cid = cpu_to_le32(qp->srq->id); 1000 } 1001 } 1002 1003 if (qp->rcq) 1004 req.rcq_cid = cpu_to_le32(qp->rcq->id); 1005 req.qp_flags = cpu_to_le32(qp_flags); 1006 req.sq_size = cpu_to_le32(sq->hwq.max_elements); 1007 req.rq_size = cpu_to_le32(rq->hwq.max_elements); 1008 qp->sq_hdr_buf = NULL; 1009 qp->rq_hdr_buf = NULL; 1010 1011 rc = bnxt_qplib_alloc_qp_hdr_buf(res, qp); 1012 if (rc) 1013 goto fail_rq; 1014 1015 /* CTRL-22434: Irrespective of the requested SGE count on the SQ 1016 * always create the QP with max send sges possible if the requested 1017 * inline size is greater than 0. 1018 */ 1019 max_ssge = qp->max_inline_data ? 6 : sq->max_sge; 1020 req.sq_fwo_sq_sge = cpu_to_le16( 1021 ((max_ssge & CMDQ_CREATE_QP_SQ_SGE_MASK) 1022 << CMDQ_CREATE_QP_SQ_SGE_SFT) | 0); 1023 req.rq_fwo_rq_sge = cpu_to_le16( 1024 ((rq->max_sge & CMDQ_CREATE_QP_RQ_SGE_MASK) 1025 << CMDQ_CREATE_QP_RQ_SGE_SFT) | 0); 1026 /* ORRQ and IRRQ */ 1027 if (psn_sz) { 1028 xrrq = &qp->orrq; 1029 xrrq->max_elements = 1030 ORD_LIMIT_TO_ORRQ_SLOTS(qp->max_rd_atomic); 1031 req_size = xrrq->max_elements * 1032 BNXT_QPLIB_MAX_ORRQE_ENTRY_SIZE + PAGE_SIZE - 1; 1033 req_size &= ~(PAGE_SIZE - 1); 1034 rc = bnxt_qplib_alloc_init_hwq(res->pdev, xrrq, NULL, 0, 1035 &xrrq->max_elements, 1036 BNXT_QPLIB_MAX_ORRQE_ENTRY_SIZE, 1037 0, req_size, HWQ_TYPE_CTX); 1038 if (rc) 1039 goto fail_buf_free; 1040 pbl = &xrrq->pbl[PBL_LVL_0]; 1041 req.orrq_addr = cpu_to_le64(pbl->pg_map_arr[0]); 1042 1043 xrrq = &qp->irrq; 1044 xrrq->max_elements = IRD_LIMIT_TO_IRRQ_SLOTS( 1045 qp->max_dest_rd_atomic); 1046 req_size = xrrq->max_elements * 1047 BNXT_QPLIB_MAX_IRRQE_ENTRY_SIZE + PAGE_SIZE - 1; 1048 req_size &= ~(PAGE_SIZE - 1); 1049 1050 rc = bnxt_qplib_alloc_init_hwq(res->pdev, xrrq, NULL, 0, 1051 &xrrq->max_elements, 1052 BNXT_QPLIB_MAX_IRRQE_ENTRY_SIZE, 1053 0, req_size, HWQ_TYPE_CTX); 1054 if (rc) 1055 goto fail_orrq; 1056 1057 pbl = &xrrq->pbl[PBL_LVL_0]; 1058 req.irrq_addr = cpu_to_le64(pbl->pg_map_arr[0]); 1059 } 1060 req.pd_id = cpu_to_le32(qp->pd->id); 1061 1062 rc = bnxt_qplib_rcfw_send_message(rcfw, (void *)&req, 1063 (void *)&resp, NULL, 0); 1064 if (rc) 1065 goto fail; 1066 1067 qp->id = le32_to_cpu(resp.xid); 1068 qp->cur_qp_state = CMDQ_MODIFY_QP_NEW_STATE_RESET; 1069 INIT_LIST_HEAD(&qp->sq_flush); 1070 INIT_LIST_HEAD(&qp->rq_flush); 1071 rcfw->qp_tbl[qp->id].qp_id = qp->id; 1072 rcfw->qp_tbl[qp->id].qp_handle = (void *)qp; 1073 1074 return 0; 1075 1076 fail: 1077 if (qp->irrq.max_elements) 1078 bnxt_qplib_free_hwq(res->pdev, &qp->irrq); 1079 fail_orrq: 1080 if (qp->orrq.max_elements) 1081 bnxt_qplib_free_hwq(res->pdev, &qp->orrq); 1082 fail_buf_free: 1083 bnxt_qplib_free_qp_hdr_buf(res, qp); 1084 fail_rq: 1085 bnxt_qplib_free_hwq(res->pdev, &rq->hwq); 1086 kfree(rq->swq); 1087 fail_sq: 1088 bnxt_qplib_free_hwq(res->pdev, &sq->hwq); 1089 kfree(sq->swq); 1090 exit: 1091 return rc; 1092 } 1093 1094 static void __modify_flags_from_init_state(struct bnxt_qplib_qp *qp) 1095 { 1096 switch (qp->state) { 1097 case CMDQ_MODIFY_QP_NEW_STATE_RTR: 1098 /* INIT->RTR, configure the path_mtu to the default 1099 * 2048 if not being requested 1100 */ 1101 if (!(qp->modify_flags & 1102 CMDQ_MODIFY_QP_MODIFY_MASK_PATH_MTU)) { 1103 qp->modify_flags |= 1104 CMDQ_MODIFY_QP_MODIFY_MASK_PATH_MTU; 1105 qp->path_mtu = 1106 CMDQ_MODIFY_QP_PATH_MTU_MTU_2048; 1107 } 1108 qp->modify_flags &= 1109 ~CMDQ_MODIFY_QP_MODIFY_MASK_VLAN_ID; 1110 /* Bono FW require the max_dest_rd_atomic to be >= 1 */ 1111 if (qp->max_dest_rd_atomic < 1) 1112 qp->max_dest_rd_atomic = 1; 1113 qp->modify_flags &= ~CMDQ_MODIFY_QP_MODIFY_MASK_SRC_MAC; 1114 /* Bono FW 20.6.5 requires SGID_INDEX configuration */ 1115 if (!(qp->modify_flags & 1116 CMDQ_MODIFY_QP_MODIFY_MASK_SGID_INDEX)) { 1117 qp->modify_flags |= 1118 CMDQ_MODIFY_QP_MODIFY_MASK_SGID_INDEX; 1119 qp->ah.sgid_index = 0; 1120 } 1121 break; 1122 default: 1123 break; 1124 } 1125 } 1126 1127 static void __modify_flags_from_rtr_state(struct bnxt_qplib_qp *qp) 1128 { 1129 switch (qp->state) { 1130 case CMDQ_MODIFY_QP_NEW_STATE_RTS: 1131 /* Bono FW requires the max_rd_atomic to be >= 1 */ 1132 if (qp->max_rd_atomic < 1) 1133 qp->max_rd_atomic = 1; 1134 /* Bono FW does not allow PKEY_INDEX, 1135 * DGID, FLOW_LABEL, SGID_INDEX, HOP_LIMIT, 1136 * TRAFFIC_CLASS, DEST_MAC, PATH_MTU, RQ_PSN, 1137 * MIN_RNR_TIMER, MAX_DEST_RD_ATOMIC, DEST_QP_ID 1138 * modification 1139 */ 1140 qp->modify_flags &= 1141 ~(CMDQ_MODIFY_QP_MODIFY_MASK_PKEY | 1142 CMDQ_MODIFY_QP_MODIFY_MASK_DGID | 1143 CMDQ_MODIFY_QP_MODIFY_MASK_FLOW_LABEL | 1144 CMDQ_MODIFY_QP_MODIFY_MASK_SGID_INDEX | 1145 CMDQ_MODIFY_QP_MODIFY_MASK_HOP_LIMIT | 1146 CMDQ_MODIFY_QP_MODIFY_MASK_TRAFFIC_CLASS | 1147 CMDQ_MODIFY_QP_MODIFY_MASK_DEST_MAC | 1148 CMDQ_MODIFY_QP_MODIFY_MASK_PATH_MTU | 1149 CMDQ_MODIFY_QP_MODIFY_MASK_RQ_PSN | 1150 CMDQ_MODIFY_QP_MODIFY_MASK_MIN_RNR_TIMER | 1151 CMDQ_MODIFY_QP_MODIFY_MASK_MAX_DEST_RD_ATOMIC | 1152 CMDQ_MODIFY_QP_MODIFY_MASK_DEST_QP_ID); 1153 break; 1154 default: 1155 break; 1156 } 1157 } 1158 1159 static void __filter_modify_flags(struct bnxt_qplib_qp *qp) 1160 { 1161 switch (qp->cur_qp_state) { 1162 case CMDQ_MODIFY_QP_NEW_STATE_RESET: 1163 break; 1164 case CMDQ_MODIFY_QP_NEW_STATE_INIT: 1165 __modify_flags_from_init_state(qp); 1166 break; 1167 case CMDQ_MODIFY_QP_NEW_STATE_RTR: 1168 __modify_flags_from_rtr_state(qp); 1169 break; 1170 case CMDQ_MODIFY_QP_NEW_STATE_RTS: 1171 break; 1172 case CMDQ_MODIFY_QP_NEW_STATE_SQD: 1173 break; 1174 case CMDQ_MODIFY_QP_NEW_STATE_SQE: 1175 break; 1176 case CMDQ_MODIFY_QP_NEW_STATE_ERR: 1177 break; 1178 default: 1179 break; 1180 } 1181 } 1182 1183 int bnxt_qplib_modify_qp(struct bnxt_qplib_res *res, struct bnxt_qplib_qp *qp) 1184 { 1185 struct bnxt_qplib_rcfw *rcfw = res->rcfw; 1186 struct cmdq_modify_qp req; 1187 struct creq_modify_qp_resp resp; 1188 u16 cmd_flags = 0, pkey; 1189 u32 temp32[4]; 1190 u32 bmask; 1191 int rc; 1192 1193 RCFW_CMD_PREP(req, MODIFY_QP, cmd_flags); 1194 1195 /* Filter out the qp_attr_mask based on the state->new transition */ 1196 __filter_modify_flags(qp); 1197 bmask = qp->modify_flags; 1198 req.modify_mask = cpu_to_le32(qp->modify_flags); 1199 req.qp_cid = cpu_to_le32(qp->id); 1200 if (bmask & CMDQ_MODIFY_QP_MODIFY_MASK_STATE) { 1201 req.network_type_en_sqd_async_notify_new_state = 1202 (qp->state & CMDQ_MODIFY_QP_NEW_STATE_MASK) | 1203 (qp->en_sqd_async_notify ? 1204 CMDQ_MODIFY_QP_EN_SQD_ASYNC_NOTIFY : 0); 1205 } 1206 req.network_type_en_sqd_async_notify_new_state |= qp->nw_type; 1207 1208 if (bmask & CMDQ_MODIFY_QP_MODIFY_MASK_ACCESS) 1209 req.access = qp->access; 1210 1211 if (bmask & CMDQ_MODIFY_QP_MODIFY_MASK_PKEY) { 1212 if (!bnxt_qplib_get_pkey(res, &res->pkey_tbl, 1213 qp->pkey_index, &pkey)) 1214 req.pkey = cpu_to_le16(pkey); 1215 } 1216 if (bmask & CMDQ_MODIFY_QP_MODIFY_MASK_QKEY) 1217 req.qkey = cpu_to_le32(qp->qkey); 1218 1219 if (bmask & CMDQ_MODIFY_QP_MODIFY_MASK_DGID) { 1220 memcpy(temp32, qp->ah.dgid.data, sizeof(struct bnxt_qplib_gid)); 1221 req.dgid[0] = cpu_to_le32(temp32[0]); 1222 req.dgid[1] = cpu_to_le32(temp32[1]); 1223 req.dgid[2] = cpu_to_le32(temp32[2]); 1224 req.dgid[3] = cpu_to_le32(temp32[3]); 1225 } 1226 if (bmask & CMDQ_MODIFY_QP_MODIFY_MASK_FLOW_LABEL) 1227 req.flow_label = cpu_to_le32(qp->ah.flow_label); 1228 1229 if (bmask & CMDQ_MODIFY_QP_MODIFY_MASK_SGID_INDEX) 1230 req.sgid_index = cpu_to_le16(res->sgid_tbl.hw_id 1231 [qp->ah.sgid_index]); 1232 1233 if (bmask & CMDQ_MODIFY_QP_MODIFY_MASK_HOP_LIMIT) 1234 req.hop_limit = qp->ah.hop_limit; 1235 1236 if (bmask & CMDQ_MODIFY_QP_MODIFY_MASK_TRAFFIC_CLASS) 1237 req.traffic_class = qp->ah.traffic_class; 1238 1239 if (bmask & CMDQ_MODIFY_QP_MODIFY_MASK_DEST_MAC) 1240 memcpy(req.dest_mac, qp->ah.dmac, 6); 1241 1242 if (bmask & CMDQ_MODIFY_QP_MODIFY_MASK_PATH_MTU) 1243 req.path_mtu = qp->path_mtu; 1244 1245 if (bmask & CMDQ_MODIFY_QP_MODIFY_MASK_TIMEOUT) 1246 req.timeout = qp->timeout; 1247 1248 if (bmask & CMDQ_MODIFY_QP_MODIFY_MASK_RETRY_CNT) 1249 req.retry_cnt = qp->retry_cnt; 1250 1251 if (bmask & CMDQ_MODIFY_QP_MODIFY_MASK_RNR_RETRY) 1252 req.rnr_retry = qp->rnr_retry; 1253 1254 if (bmask & CMDQ_MODIFY_QP_MODIFY_MASK_MIN_RNR_TIMER) 1255 req.min_rnr_timer = qp->min_rnr_timer; 1256 1257 if (bmask & CMDQ_MODIFY_QP_MODIFY_MASK_RQ_PSN) 1258 req.rq_psn = cpu_to_le32(qp->rq.psn); 1259 1260 if (bmask & CMDQ_MODIFY_QP_MODIFY_MASK_SQ_PSN) 1261 req.sq_psn = cpu_to_le32(qp->sq.psn); 1262 1263 if (bmask & CMDQ_MODIFY_QP_MODIFY_MASK_MAX_RD_ATOMIC) 1264 req.max_rd_atomic = 1265 ORD_LIMIT_TO_ORRQ_SLOTS(qp->max_rd_atomic); 1266 1267 if (bmask & CMDQ_MODIFY_QP_MODIFY_MASK_MAX_DEST_RD_ATOMIC) 1268 req.max_dest_rd_atomic = 1269 IRD_LIMIT_TO_IRRQ_SLOTS(qp->max_dest_rd_atomic); 1270 1271 req.sq_size = cpu_to_le32(qp->sq.hwq.max_elements); 1272 req.rq_size = cpu_to_le32(qp->rq.hwq.max_elements); 1273 req.sq_sge = cpu_to_le16(qp->sq.max_sge); 1274 req.rq_sge = cpu_to_le16(qp->rq.max_sge); 1275 req.max_inline_data = cpu_to_le32(qp->max_inline_data); 1276 if (bmask & CMDQ_MODIFY_QP_MODIFY_MASK_DEST_QP_ID) 1277 req.dest_qp_id = cpu_to_le32(qp->dest_qpn); 1278 1279 req.vlan_pcp_vlan_dei_vlan_id = cpu_to_le16(qp->vlan_id); 1280 1281 rc = bnxt_qplib_rcfw_send_message(rcfw, (void *)&req, 1282 (void *)&resp, NULL, 0); 1283 if (rc) 1284 return rc; 1285 qp->cur_qp_state = qp->state; 1286 return 0; 1287 } 1288 1289 int bnxt_qplib_query_qp(struct bnxt_qplib_res *res, struct bnxt_qplib_qp *qp) 1290 { 1291 struct bnxt_qplib_rcfw *rcfw = res->rcfw; 1292 struct cmdq_query_qp req; 1293 struct creq_query_qp_resp resp; 1294 struct bnxt_qplib_rcfw_sbuf *sbuf; 1295 struct creq_query_qp_resp_sb *sb; 1296 u16 cmd_flags = 0; 1297 u32 temp32[4]; 1298 int i, rc = 0; 1299 1300 RCFW_CMD_PREP(req, QUERY_QP, cmd_flags); 1301 1302 sbuf = bnxt_qplib_rcfw_alloc_sbuf(rcfw, sizeof(*sb)); 1303 if (!sbuf) 1304 return -ENOMEM; 1305 sb = sbuf->sb; 1306 1307 req.qp_cid = cpu_to_le32(qp->id); 1308 req.resp_size = sizeof(*sb) / BNXT_QPLIB_CMDQE_UNITS; 1309 rc = bnxt_qplib_rcfw_send_message(rcfw, (void *)&req, (void *)&resp, 1310 (void *)sbuf, 0); 1311 if (rc) 1312 goto bail; 1313 /* Extract the context from the side buffer */ 1314 qp->state = sb->en_sqd_async_notify_state & 1315 CREQ_QUERY_QP_RESP_SB_STATE_MASK; 1316 qp->en_sqd_async_notify = sb->en_sqd_async_notify_state & 1317 CREQ_QUERY_QP_RESP_SB_EN_SQD_ASYNC_NOTIFY ? 1318 true : false; 1319 qp->access = sb->access; 1320 qp->pkey_index = le16_to_cpu(sb->pkey); 1321 qp->qkey = le32_to_cpu(sb->qkey); 1322 1323 temp32[0] = le32_to_cpu(sb->dgid[0]); 1324 temp32[1] = le32_to_cpu(sb->dgid[1]); 1325 temp32[2] = le32_to_cpu(sb->dgid[2]); 1326 temp32[3] = le32_to_cpu(sb->dgid[3]); 1327 memcpy(qp->ah.dgid.data, temp32, sizeof(qp->ah.dgid.data)); 1328 1329 qp->ah.flow_label = le32_to_cpu(sb->flow_label); 1330 1331 qp->ah.sgid_index = 0; 1332 for (i = 0; i < res->sgid_tbl.max; i++) { 1333 if (res->sgid_tbl.hw_id[i] == le16_to_cpu(sb->sgid_index)) { 1334 qp->ah.sgid_index = i; 1335 break; 1336 } 1337 } 1338 if (i == res->sgid_tbl.max) 1339 dev_warn(&res->pdev->dev, "QPLIB: SGID not found??"); 1340 1341 qp->ah.hop_limit = sb->hop_limit; 1342 qp->ah.traffic_class = sb->traffic_class; 1343 memcpy(qp->ah.dmac, sb->dest_mac, 6); 1344 qp->ah.vlan_id = (le16_to_cpu(sb->path_mtu_dest_vlan_id) & 1345 CREQ_QUERY_QP_RESP_SB_VLAN_ID_MASK) >> 1346 CREQ_QUERY_QP_RESP_SB_VLAN_ID_SFT; 1347 qp->path_mtu = (le16_to_cpu(sb->path_mtu_dest_vlan_id) & 1348 CREQ_QUERY_QP_RESP_SB_PATH_MTU_MASK) >> 1349 CREQ_QUERY_QP_RESP_SB_PATH_MTU_SFT; 1350 qp->timeout = sb->timeout; 1351 qp->retry_cnt = sb->retry_cnt; 1352 qp->rnr_retry = sb->rnr_retry; 1353 qp->min_rnr_timer = sb->min_rnr_timer; 1354 qp->rq.psn = le32_to_cpu(sb->rq_psn); 1355 qp->max_rd_atomic = ORRQ_SLOTS_TO_ORD_LIMIT(sb->max_rd_atomic); 1356 qp->sq.psn = le32_to_cpu(sb->sq_psn); 1357 qp->max_dest_rd_atomic = 1358 IRRQ_SLOTS_TO_IRD_LIMIT(sb->max_dest_rd_atomic); 1359 qp->sq.max_wqe = qp->sq.hwq.max_elements; 1360 qp->rq.max_wqe = qp->rq.hwq.max_elements; 1361 qp->sq.max_sge = le16_to_cpu(sb->sq_sge); 1362 qp->rq.max_sge = le16_to_cpu(sb->rq_sge); 1363 qp->max_inline_data = le32_to_cpu(sb->max_inline_data); 1364 qp->dest_qpn = le32_to_cpu(sb->dest_qp_id); 1365 memcpy(qp->smac, sb->src_mac, 6); 1366 qp->vlan_id = le16_to_cpu(sb->vlan_pcp_vlan_dei_vlan_id); 1367 bail: 1368 bnxt_qplib_rcfw_free_sbuf(rcfw, sbuf); 1369 return rc; 1370 } 1371 1372 static void __clean_cq(struct bnxt_qplib_cq *cq, u64 qp) 1373 { 1374 struct bnxt_qplib_hwq *cq_hwq = &cq->hwq; 1375 struct cq_base *hw_cqe, **hw_cqe_ptr; 1376 int i; 1377 1378 for (i = 0; i < cq_hwq->max_elements; i++) { 1379 hw_cqe_ptr = (struct cq_base **)cq_hwq->pbl_ptr; 1380 hw_cqe = &hw_cqe_ptr[CQE_PG(i)][CQE_IDX(i)]; 1381 if (!CQE_CMP_VALID(hw_cqe, i, cq_hwq->max_elements)) 1382 continue; 1383 /* 1384 * The valid test of the entry must be done first before 1385 * reading any further. 1386 */ 1387 dma_rmb(); 1388 switch (hw_cqe->cqe_type_toggle & CQ_BASE_CQE_TYPE_MASK) { 1389 case CQ_BASE_CQE_TYPE_REQ: 1390 case CQ_BASE_CQE_TYPE_TERMINAL: 1391 { 1392 struct cq_req *cqe = (struct cq_req *)hw_cqe; 1393 1394 if (qp == le64_to_cpu(cqe->qp_handle)) 1395 cqe->qp_handle = 0; 1396 break; 1397 } 1398 case CQ_BASE_CQE_TYPE_RES_RC: 1399 case CQ_BASE_CQE_TYPE_RES_UD: 1400 case CQ_BASE_CQE_TYPE_RES_RAWETH_QP1: 1401 { 1402 struct cq_res_rc *cqe = (struct cq_res_rc *)hw_cqe; 1403 1404 if (qp == le64_to_cpu(cqe->qp_handle)) 1405 cqe->qp_handle = 0; 1406 break; 1407 } 1408 default: 1409 break; 1410 } 1411 } 1412 } 1413 1414 int bnxt_qplib_destroy_qp(struct bnxt_qplib_res *res, 1415 struct bnxt_qplib_qp *qp) 1416 { 1417 struct bnxt_qplib_rcfw *rcfw = res->rcfw; 1418 struct cmdq_destroy_qp req; 1419 struct creq_destroy_qp_resp resp; 1420 unsigned long flags; 1421 u16 cmd_flags = 0; 1422 int rc; 1423 1424 rcfw->qp_tbl[qp->id].qp_id = BNXT_QPLIB_QP_ID_INVALID; 1425 rcfw->qp_tbl[qp->id].qp_handle = NULL; 1426 1427 RCFW_CMD_PREP(req, DESTROY_QP, cmd_flags); 1428 1429 req.qp_cid = cpu_to_le32(qp->id); 1430 rc = bnxt_qplib_rcfw_send_message(rcfw, (void *)&req, 1431 (void *)&resp, NULL, 0); 1432 if (rc) { 1433 rcfw->qp_tbl[qp->id].qp_id = qp->id; 1434 rcfw->qp_tbl[qp->id].qp_handle = qp; 1435 return rc; 1436 } 1437 1438 /* Must walk the associated CQs to nullified the QP ptr */ 1439 spin_lock_irqsave(&qp->scq->hwq.lock, flags); 1440 1441 __clean_cq(qp->scq, (u64)(unsigned long)qp); 1442 1443 if (qp->rcq && qp->rcq != qp->scq) { 1444 spin_lock(&qp->rcq->hwq.lock); 1445 __clean_cq(qp->rcq, (u64)(unsigned long)qp); 1446 spin_unlock(&qp->rcq->hwq.lock); 1447 } 1448 1449 spin_unlock_irqrestore(&qp->scq->hwq.lock, flags); 1450 1451 bnxt_qplib_free_qp_hdr_buf(res, qp); 1452 bnxt_qplib_free_hwq(res->pdev, &qp->sq.hwq); 1453 kfree(qp->sq.swq); 1454 1455 bnxt_qplib_free_hwq(res->pdev, &qp->rq.hwq); 1456 kfree(qp->rq.swq); 1457 1458 if (qp->irrq.max_elements) 1459 bnxt_qplib_free_hwq(res->pdev, &qp->irrq); 1460 if (qp->orrq.max_elements) 1461 bnxt_qplib_free_hwq(res->pdev, &qp->orrq); 1462 1463 return 0; 1464 } 1465 1466 void *bnxt_qplib_get_qp1_sq_buf(struct bnxt_qplib_qp *qp, 1467 struct bnxt_qplib_sge *sge) 1468 { 1469 struct bnxt_qplib_q *sq = &qp->sq; 1470 u32 sw_prod; 1471 1472 memset(sge, 0, sizeof(*sge)); 1473 1474 if (qp->sq_hdr_buf) { 1475 sw_prod = HWQ_CMP(sq->hwq.prod, &sq->hwq); 1476 sge->addr = (dma_addr_t)(qp->sq_hdr_buf_map + 1477 sw_prod * qp->sq_hdr_buf_size); 1478 sge->lkey = 0xFFFFFFFF; 1479 sge->size = qp->sq_hdr_buf_size; 1480 return qp->sq_hdr_buf + sw_prod * sge->size; 1481 } 1482 return NULL; 1483 } 1484 1485 u32 bnxt_qplib_get_rq_prod_index(struct bnxt_qplib_qp *qp) 1486 { 1487 struct bnxt_qplib_q *rq = &qp->rq; 1488 1489 return HWQ_CMP(rq->hwq.prod, &rq->hwq); 1490 } 1491 1492 dma_addr_t bnxt_qplib_get_qp_buf_from_index(struct bnxt_qplib_qp *qp, u32 index) 1493 { 1494 return (qp->rq_hdr_buf_map + index * qp->rq_hdr_buf_size); 1495 } 1496 1497 void *bnxt_qplib_get_qp1_rq_buf(struct bnxt_qplib_qp *qp, 1498 struct bnxt_qplib_sge *sge) 1499 { 1500 struct bnxt_qplib_q *rq = &qp->rq; 1501 u32 sw_prod; 1502 1503 memset(sge, 0, sizeof(*sge)); 1504 1505 if (qp->rq_hdr_buf) { 1506 sw_prod = HWQ_CMP(rq->hwq.prod, &rq->hwq); 1507 sge->addr = (dma_addr_t)(qp->rq_hdr_buf_map + 1508 sw_prod * qp->rq_hdr_buf_size); 1509 sge->lkey = 0xFFFFFFFF; 1510 sge->size = qp->rq_hdr_buf_size; 1511 return qp->rq_hdr_buf + sw_prod * sge->size; 1512 } 1513 return NULL; 1514 } 1515 1516 void bnxt_qplib_post_send_db(struct bnxt_qplib_qp *qp) 1517 { 1518 struct bnxt_qplib_q *sq = &qp->sq; 1519 struct dbr_dbr db_msg = { 0 }; 1520 u32 sw_prod; 1521 1522 sw_prod = HWQ_CMP(sq->hwq.prod, &sq->hwq); 1523 1524 db_msg.index = cpu_to_le32((sw_prod << DBR_DBR_INDEX_SFT) & 1525 DBR_DBR_INDEX_MASK); 1526 db_msg.type_xid = 1527 cpu_to_le32(((qp->id << DBR_DBR_XID_SFT) & DBR_DBR_XID_MASK) | 1528 DBR_DBR_TYPE_SQ); 1529 /* Flush all the WQE writes to HW */ 1530 wmb(); 1531 __iowrite64_copy(qp->dpi->dbr, &db_msg, sizeof(db_msg) / sizeof(u64)); 1532 } 1533 1534 int bnxt_qplib_post_send(struct bnxt_qplib_qp *qp, 1535 struct bnxt_qplib_swqe *wqe) 1536 { 1537 struct bnxt_qplib_q *sq = &qp->sq; 1538 struct bnxt_qplib_swq *swq; 1539 struct sq_send *hw_sq_send_hdr, **hw_sq_send_ptr; 1540 struct sq_sge *hw_sge; 1541 struct bnxt_qplib_nq_work *nq_work = NULL; 1542 bool sch_handler = false; 1543 u32 sw_prod; 1544 u8 wqe_size16; 1545 int i, rc = 0, data_len = 0, pkt_num = 0; 1546 __le32 temp32; 1547 1548 if (qp->state != CMDQ_MODIFY_QP_NEW_STATE_RTS) { 1549 if (qp->state == CMDQ_MODIFY_QP_NEW_STATE_ERR) { 1550 sch_handler = true; 1551 dev_dbg(&sq->hwq.pdev->dev, 1552 "%s Error QP. Scheduling for poll_cq\n", 1553 __func__); 1554 goto queue_err; 1555 } 1556 } 1557 1558 if (bnxt_qplib_queue_full(sq)) { 1559 dev_err(&sq->hwq.pdev->dev, 1560 "QPLIB: prod = %#x cons = %#x qdepth = %#x delta = %#x", 1561 sq->hwq.prod, sq->hwq.cons, sq->hwq.max_elements, 1562 sq->q_full_delta); 1563 rc = -ENOMEM; 1564 goto done; 1565 } 1566 sw_prod = HWQ_CMP(sq->hwq.prod, &sq->hwq); 1567 swq = &sq->swq[sw_prod]; 1568 swq->wr_id = wqe->wr_id; 1569 swq->type = wqe->type; 1570 swq->flags = wqe->flags; 1571 if (qp->sig_type) 1572 swq->flags |= SQ_SEND_FLAGS_SIGNAL_COMP; 1573 swq->start_psn = sq->psn & BTH_PSN_MASK; 1574 1575 hw_sq_send_ptr = (struct sq_send **)sq->hwq.pbl_ptr; 1576 hw_sq_send_hdr = &hw_sq_send_ptr[get_sqe_pg(sw_prod)] 1577 [get_sqe_idx(sw_prod)]; 1578 1579 memset(hw_sq_send_hdr, 0, BNXT_QPLIB_MAX_SQE_ENTRY_SIZE); 1580 1581 if (wqe->flags & BNXT_QPLIB_SWQE_FLAGS_INLINE) { 1582 /* Copy the inline data */ 1583 if (wqe->inline_len > BNXT_QPLIB_SWQE_MAX_INLINE_LENGTH) { 1584 dev_warn(&sq->hwq.pdev->dev, 1585 "QPLIB: Inline data length > 96 detected"); 1586 data_len = BNXT_QPLIB_SWQE_MAX_INLINE_LENGTH; 1587 } else { 1588 data_len = wqe->inline_len; 1589 } 1590 memcpy(hw_sq_send_hdr->data, wqe->inline_data, data_len); 1591 wqe_size16 = (data_len + 15) >> 4; 1592 } else { 1593 for (i = 0, hw_sge = (struct sq_sge *)hw_sq_send_hdr->data; 1594 i < wqe->num_sge; i++, hw_sge++) { 1595 hw_sge->va_or_pa = cpu_to_le64(wqe->sg_list[i].addr); 1596 hw_sge->l_key = cpu_to_le32(wqe->sg_list[i].lkey); 1597 hw_sge->size = cpu_to_le32(wqe->sg_list[i].size); 1598 data_len += wqe->sg_list[i].size; 1599 } 1600 /* Each SGE entry = 1 WQE size16 */ 1601 wqe_size16 = wqe->num_sge; 1602 /* HW requires wqe size has room for atleast one SGE even if 1603 * none was supplied by ULP 1604 */ 1605 if (!wqe->num_sge) 1606 wqe_size16++; 1607 } 1608 1609 /* Specifics */ 1610 switch (wqe->type) { 1611 case BNXT_QPLIB_SWQE_TYPE_SEND: 1612 if (qp->type == CMDQ_CREATE_QP1_TYPE_GSI) { 1613 /* Assemble info for Raw Ethertype QPs */ 1614 struct sq_send_raweth_qp1 *sqe = 1615 (struct sq_send_raweth_qp1 *)hw_sq_send_hdr; 1616 1617 sqe->wqe_type = wqe->type; 1618 sqe->flags = wqe->flags; 1619 sqe->wqe_size = wqe_size16 + 1620 ((offsetof(typeof(*sqe), data) + 15) >> 4); 1621 sqe->cfa_action = cpu_to_le16(wqe->rawqp1.cfa_action); 1622 sqe->lflags = cpu_to_le16(wqe->rawqp1.lflags); 1623 sqe->length = cpu_to_le32(data_len); 1624 sqe->cfa_meta = cpu_to_le32((wqe->rawqp1.cfa_meta & 1625 SQ_SEND_RAWETH_QP1_CFA_META_VLAN_VID_MASK) << 1626 SQ_SEND_RAWETH_QP1_CFA_META_VLAN_VID_SFT); 1627 1628 break; 1629 } 1630 /* fall thru */ 1631 case BNXT_QPLIB_SWQE_TYPE_SEND_WITH_IMM: 1632 case BNXT_QPLIB_SWQE_TYPE_SEND_WITH_INV: 1633 { 1634 struct sq_send *sqe = (struct sq_send *)hw_sq_send_hdr; 1635 1636 sqe->wqe_type = wqe->type; 1637 sqe->flags = wqe->flags; 1638 sqe->wqe_size = wqe_size16 + 1639 ((offsetof(typeof(*sqe), data) + 15) >> 4); 1640 sqe->inv_key_or_imm_data = cpu_to_le32( 1641 wqe->send.inv_key); 1642 if (qp->type == CMDQ_CREATE_QP_TYPE_UD) { 1643 sqe->q_key = cpu_to_le32(wqe->send.q_key); 1644 sqe->dst_qp = cpu_to_le32( 1645 wqe->send.dst_qp & SQ_SEND_DST_QP_MASK); 1646 sqe->length = cpu_to_le32(data_len); 1647 sqe->avid = cpu_to_le32(wqe->send.avid & 1648 SQ_SEND_AVID_MASK); 1649 sq->psn = (sq->psn + 1) & BTH_PSN_MASK; 1650 } else { 1651 sqe->length = cpu_to_le32(data_len); 1652 sqe->dst_qp = 0; 1653 sqe->avid = 0; 1654 if (qp->mtu) 1655 pkt_num = (data_len + qp->mtu - 1) / qp->mtu; 1656 if (!pkt_num) 1657 pkt_num = 1; 1658 sq->psn = (sq->psn + pkt_num) & BTH_PSN_MASK; 1659 } 1660 break; 1661 } 1662 case BNXT_QPLIB_SWQE_TYPE_RDMA_WRITE: 1663 case BNXT_QPLIB_SWQE_TYPE_RDMA_WRITE_WITH_IMM: 1664 case BNXT_QPLIB_SWQE_TYPE_RDMA_READ: 1665 { 1666 struct sq_rdma *sqe = (struct sq_rdma *)hw_sq_send_hdr; 1667 1668 sqe->wqe_type = wqe->type; 1669 sqe->flags = wqe->flags; 1670 sqe->wqe_size = wqe_size16 + 1671 ((offsetof(typeof(*sqe), data) + 15) >> 4); 1672 sqe->imm_data = cpu_to_le32(wqe->rdma.inv_key); 1673 sqe->length = cpu_to_le32((u32)data_len); 1674 sqe->remote_va = cpu_to_le64(wqe->rdma.remote_va); 1675 sqe->remote_key = cpu_to_le32(wqe->rdma.r_key); 1676 if (qp->mtu) 1677 pkt_num = (data_len + qp->mtu - 1) / qp->mtu; 1678 if (!pkt_num) 1679 pkt_num = 1; 1680 sq->psn = (sq->psn + pkt_num) & BTH_PSN_MASK; 1681 break; 1682 } 1683 case BNXT_QPLIB_SWQE_TYPE_ATOMIC_CMP_AND_SWP: 1684 case BNXT_QPLIB_SWQE_TYPE_ATOMIC_FETCH_AND_ADD: 1685 { 1686 struct sq_atomic *sqe = (struct sq_atomic *)hw_sq_send_hdr; 1687 1688 sqe->wqe_type = wqe->type; 1689 sqe->flags = wqe->flags; 1690 sqe->remote_key = cpu_to_le32(wqe->atomic.r_key); 1691 sqe->remote_va = cpu_to_le64(wqe->atomic.remote_va); 1692 sqe->swap_data = cpu_to_le64(wqe->atomic.swap_data); 1693 sqe->cmp_data = cpu_to_le64(wqe->atomic.cmp_data); 1694 if (qp->mtu) 1695 pkt_num = (data_len + qp->mtu - 1) / qp->mtu; 1696 if (!pkt_num) 1697 pkt_num = 1; 1698 sq->psn = (sq->psn + pkt_num) & BTH_PSN_MASK; 1699 break; 1700 } 1701 case BNXT_QPLIB_SWQE_TYPE_LOCAL_INV: 1702 { 1703 struct sq_localinvalidate *sqe = 1704 (struct sq_localinvalidate *)hw_sq_send_hdr; 1705 1706 sqe->wqe_type = wqe->type; 1707 sqe->flags = wqe->flags; 1708 sqe->inv_l_key = cpu_to_le32(wqe->local_inv.inv_l_key); 1709 1710 break; 1711 } 1712 case BNXT_QPLIB_SWQE_TYPE_FAST_REG_MR: 1713 { 1714 struct sq_fr_pmr *sqe = (struct sq_fr_pmr *)hw_sq_send_hdr; 1715 1716 sqe->wqe_type = wqe->type; 1717 sqe->flags = wqe->flags; 1718 sqe->access_cntl = wqe->frmr.access_cntl | 1719 SQ_FR_PMR_ACCESS_CNTL_LOCAL_WRITE; 1720 sqe->zero_based_page_size_log = 1721 (wqe->frmr.pg_sz_log & SQ_FR_PMR_PAGE_SIZE_LOG_MASK) << 1722 SQ_FR_PMR_PAGE_SIZE_LOG_SFT | 1723 (wqe->frmr.zero_based ? SQ_FR_PMR_ZERO_BASED : 0); 1724 sqe->l_key = cpu_to_le32(wqe->frmr.l_key); 1725 temp32 = cpu_to_le32(wqe->frmr.length); 1726 memcpy(sqe->length, &temp32, sizeof(wqe->frmr.length)); 1727 sqe->numlevels_pbl_page_size_log = 1728 ((wqe->frmr.pbl_pg_sz_log << 1729 SQ_FR_PMR_PBL_PAGE_SIZE_LOG_SFT) & 1730 SQ_FR_PMR_PBL_PAGE_SIZE_LOG_MASK) | 1731 ((wqe->frmr.levels << SQ_FR_PMR_NUMLEVELS_SFT) & 1732 SQ_FR_PMR_NUMLEVELS_MASK); 1733 1734 for (i = 0; i < wqe->frmr.page_list_len; i++) 1735 wqe->frmr.pbl_ptr[i] = cpu_to_le64( 1736 wqe->frmr.page_list[i] | 1737 PTU_PTE_VALID); 1738 sqe->pblptr = cpu_to_le64(wqe->frmr.pbl_dma_ptr); 1739 sqe->va = cpu_to_le64(wqe->frmr.va); 1740 1741 break; 1742 } 1743 case BNXT_QPLIB_SWQE_TYPE_BIND_MW: 1744 { 1745 struct sq_bind *sqe = (struct sq_bind *)hw_sq_send_hdr; 1746 1747 sqe->wqe_type = wqe->type; 1748 sqe->flags = wqe->flags; 1749 sqe->access_cntl = wqe->bind.access_cntl; 1750 sqe->mw_type_zero_based = wqe->bind.mw_type | 1751 (wqe->bind.zero_based ? SQ_BIND_ZERO_BASED : 0); 1752 sqe->parent_l_key = cpu_to_le32(wqe->bind.parent_l_key); 1753 sqe->l_key = cpu_to_le32(wqe->bind.r_key); 1754 sqe->va = cpu_to_le64(wqe->bind.va); 1755 temp32 = cpu_to_le32(wqe->bind.length); 1756 memcpy(&sqe->length, &temp32, sizeof(wqe->bind.length)); 1757 break; 1758 } 1759 default: 1760 /* Bad wqe, return error */ 1761 rc = -EINVAL; 1762 goto done; 1763 } 1764 swq->next_psn = sq->psn & BTH_PSN_MASK; 1765 if (swq->psn_search) { 1766 swq->psn_search->opcode_start_psn = cpu_to_le32( 1767 ((swq->start_psn << SQ_PSN_SEARCH_START_PSN_SFT) & 1768 SQ_PSN_SEARCH_START_PSN_MASK) | 1769 ((wqe->type << SQ_PSN_SEARCH_OPCODE_SFT) & 1770 SQ_PSN_SEARCH_OPCODE_MASK)); 1771 swq->psn_search->flags_next_psn = cpu_to_le32( 1772 ((swq->next_psn << SQ_PSN_SEARCH_NEXT_PSN_SFT) & 1773 SQ_PSN_SEARCH_NEXT_PSN_MASK)); 1774 } 1775 queue_err: 1776 if (sch_handler) { 1777 /* Store the ULP info in the software structures */ 1778 sw_prod = HWQ_CMP(sq->hwq.prod, &sq->hwq); 1779 swq = &sq->swq[sw_prod]; 1780 swq->wr_id = wqe->wr_id; 1781 swq->type = wqe->type; 1782 swq->flags = wqe->flags; 1783 if (qp->sig_type) 1784 swq->flags |= SQ_SEND_FLAGS_SIGNAL_COMP; 1785 swq->start_psn = sq->psn & BTH_PSN_MASK; 1786 } 1787 sq->hwq.prod++; 1788 qp->wqe_cnt++; 1789 1790 done: 1791 if (sch_handler) { 1792 nq_work = kzalloc(sizeof(*nq_work), GFP_ATOMIC); 1793 if (nq_work) { 1794 nq_work->cq = qp->scq; 1795 nq_work->nq = qp->scq->nq; 1796 INIT_WORK(&nq_work->work, bnxt_qpn_cqn_sched_task); 1797 queue_work(qp->scq->nq->cqn_wq, &nq_work->work); 1798 } else { 1799 dev_err(&sq->hwq.pdev->dev, 1800 "QPLIB: FP: Failed to allocate SQ nq_work!"); 1801 rc = -ENOMEM; 1802 } 1803 } 1804 return rc; 1805 } 1806 1807 void bnxt_qplib_post_recv_db(struct bnxt_qplib_qp *qp) 1808 { 1809 struct bnxt_qplib_q *rq = &qp->rq; 1810 struct dbr_dbr db_msg = { 0 }; 1811 u32 sw_prod; 1812 1813 sw_prod = HWQ_CMP(rq->hwq.prod, &rq->hwq); 1814 db_msg.index = cpu_to_le32((sw_prod << DBR_DBR_INDEX_SFT) & 1815 DBR_DBR_INDEX_MASK); 1816 db_msg.type_xid = 1817 cpu_to_le32(((qp->id << DBR_DBR_XID_SFT) & DBR_DBR_XID_MASK) | 1818 DBR_DBR_TYPE_RQ); 1819 1820 /* Flush the writes to HW Rx WQE before the ringing Rx DB */ 1821 wmb(); 1822 __iowrite64_copy(qp->dpi->dbr, &db_msg, sizeof(db_msg) / sizeof(u64)); 1823 } 1824 1825 int bnxt_qplib_post_recv(struct bnxt_qplib_qp *qp, 1826 struct bnxt_qplib_swqe *wqe) 1827 { 1828 struct bnxt_qplib_q *rq = &qp->rq; 1829 struct rq_wqe *rqe, **rqe_ptr; 1830 struct sq_sge *hw_sge; 1831 struct bnxt_qplib_nq_work *nq_work = NULL; 1832 bool sch_handler = false; 1833 u32 sw_prod; 1834 int i, rc = 0; 1835 1836 if (qp->state == CMDQ_MODIFY_QP_NEW_STATE_ERR) { 1837 sch_handler = true; 1838 dev_dbg(&rq->hwq.pdev->dev, 1839 "%s Error QP. Scheduling for poll_cq\n", 1840 __func__); 1841 goto queue_err; 1842 } 1843 if (bnxt_qplib_queue_full(rq)) { 1844 dev_err(&rq->hwq.pdev->dev, 1845 "QPLIB: FP: QP (0x%x) RQ is full!", qp->id); 1846 rc = -EINVAL; 1847 goto done; 1848 } 1849 sw_prod = HWQ_CMP(rq->hwq.prod, &rq->hwq); 1850 rq->swq[sw_prod].wr_id = wqe->wr_id; 1851 1852 rqe_ptr = (struct rq_wqe **)rq->hwq.pbl_ptr; 1853 rqe = &rqe_ptr[RQE_PG(sw_prod)][RQE_IDX(sw_prod)]; 1854 1855 memset(rqe, 0, BNXT_QPLIB_MAX_RQE_ENTRY_SIZE); 1856 1857 /* Calculate wqe_size16 and data_len */ 1858 for (i = 0, hw_sge = (struct sq_sge *)rqe->data; 1859 i < wqe->num_sge; i++, hw_sge++) { 1860 hw_sge->va_or_pa = cpu_to_le64(wqe->sg_list[i].addr); 1861 hw_sge->l_key = cpu_to_le32(wqe->sg_list[i].lkey); 1862 hw_sge->size = cpu_to_le32(wqe->sg_list[i].size); 1863 } 1864 rqe->wqe_type = wqe->type; 1865 rqe->flags = wqe->flags; 1866 rqe->wqe_size = wqe->num_sge + 1867 ((offsetof(typeof(*rqe), data) + 15) >> 4); 1868 /* HW requires wqe size has room for atleast one SGE even if none 1869 * was supplied by ULP 1870 */ 1871 if (!wqe->num_sge) 1872 rqe->wqe_size++; 1873 1874 /* Supply the rqe->wr_id index to the wr_id_tbl for now */ 1875 rqe->wr_id[0] = cpu_to_le32(sw_prod); 1876 1877 queue_err: 1878 if (sch_handler) { 1879 /* Store the ULP info in the software structures */ 1880 sw_prod = HWQ_CMP(rq->hwq.prod, &rq->hwq); 1881 rq->swq[sw_prod].wr_id = wqe->wr_id; 1882 } 1883 1884 rq->hwq.prod++; 1885 if (sch_handler) { 1886 nq_work = kzalloc(sizeof(*nq_work), GFP_ATOMIC); 1887 if (nq_work) { 1888 nq_work->cq = qp->rcq; 1889 nq_work->nq = qp->rcq->nq; 1890 INIT_WORK(&nq_work->work, bnxt_qpn_cqn_sched_task); 1891 queue_work(qp->rcq->nq->cqn_wq, &nq_work->work); 1892 } else { 1893 dev_err(&rq->hwq.pdev->dev, 1894 "QPLIB: FP: Failed to allocate RQ nq_work!"); 1895 rc = -ENOMEM; 1896 } 1897 } 1898 done: 1899 return rc; 1900 } 1901 1902 /* CQ */ 1903 1904 /* Spinlock must be held */ 1905 static void bnxt_qplib_arm_cq_enable(struct bnxt_qplib_cq *cq) 1906 { 1907 struct dbr_dbr db_msg = { 0 }; 1908 1909 db_msg.type_xid = 1910 cpu_to_le32(((cq->id << DBR_DBR_XID_SFT) & DBR_DBR_XID_MASK) | 1911 DBR_DBR_TYPE_CQ_ARMENA); 1912 /* Flush memory writes before enabling the CQ */ 1913 wmb(); 1914 __iowrite64_copy(cq->dbr_base, &db_msg, sizeof(db_msg) / sizeof(u64)); 1915 } 1916 1917 static void bnxt_qplib_arm_cq(struct bnxt_qplib_cq *cq, u32 arm_type) 1918 { 1919 struct bnxt_qplib_hwq *cq_hwq = &cq->hwq; 1920 struct dbr_dbr db_msg = { 0 }; 1921 u32 sw_cons; 1922 1923 /* Ring DB */ 1924 sw_cons = HWQ_CMP(cq_hwq->cons, cq_hwq); 1925 db_msg.index = cpu_to_le32((sw_cons << DBR_DBR_INDEX_SFT) & 1926 DBR_DBR_INDEX_MASK); 1927 db_msg.type_xid = 1928 cpu_to_le32(((cq->id << DBR_DBR_XID_SFT) & DBR_DBR_XID_MASK) | 1929 arm_type); 1930 /* flush memory writes before arming the CQ */ 1931 wmb(); 1932 __iowrite64_copy(cq->dpi->dbr, &db_msg, sizeof(db_msg) / sizeof(u64)); 1933 } 1934 1935 int bnxt_qplib_create_cq(struct bnxt_qplib_res *res, struct bnxt_qplib_cq *cq) 1936 { 1937 struct bnxt_qplib_rcfw *rcfw = res->rcfw; 1938 struct cmdq_create_cq req; 1939 struct creq_create_cq_resp resp; 1940 struct bnxt_qplib_pbl *pbl; 1941 u16 cmd_flags = 0; 1942 int rc; 1943 1944 cq->hwq.max_elements = cq->max_wqe; 1945 rc = bnxt_qplib_alloc_init_hwq(res->pdev, &cq->hwq, cq->sghead, 1946 cq->nmap, &cq->hwq.max_elements, 1947 BNXT_QPLIB_MAX_CQE_ENTRY_SIZE, 0, 1948 PAGE_SIZE, HWQ_TYPE_QUEUE); 1949 if (rc) 1950 goto exit; 1951 1952 RCFW_CMD_PREP(req, CREATE_CQ, cmd_flags); 1953 1954 if (!cq->dpi) { 1955 dev_err(&rcfw->pdev->dev, 1956 "QPLIB: FP: CREATE_CQ failed due to NULL DPI"); 1957 return -EINVAL; 1958 } 1959 req.dpi = cpu_to_le32(cq->dpi->dpi); 1960 req.cq_handle = cpu_to_le64(cq->cq_handle); 1961 1962 req.cq_size = cpu_to_le32(cq->hwq.max_elements); 1963 pbl = &cq->hwq.pbl[PBL_LVL_0]; 1964 req.pg_size_lvl = cpu_to_le32( 1965 ((cq->hwq.level & CMDQ_CREATE_CQ_LVL_MASK) << 1966 CMDQ_CREATE_CQ_LVL_SFT) | 1967 (pbl->pg_size == ROCE_PG_SIZE_4K ? CMDQ_CREATE_CQ_PG_SIZE_PG_4K : 1968 pbl->pg_size == ROCE_PG_SIZE_8K ? CMDQ_CREATE_CQ_PG_SIZE_PG_8K : 1969 pbl->pg_size == ROCE_PG_SIZE_64K ? CMDQ_CREATE_CQ_PG_SIZE_PG_64K : 1970 pbl->pg_size == ROCE_PG_SIZE_2M ? CMDQ_CREATE_CQ_PG_SIZE_PG_2M : 1971 pbl->pg_size == ROCE_PG_SIZE_8M ? CMDQ_CREATE_CQ_PG_SIZE_PG_8M : 1972 pbl->pg_size == ROCE_PG_SIZE_1G ? CMDQ_CREATE_CQ_PG_SIZE_PG_1G : 1973 CMDQ_CREATE_CQ_PG_SIZE_PG_4K)); 1974 1975 req.pbl = cpu_to_le64(pbl->pg_map_arr[0]); 1976 1977 req.cq_fco_cnq_id = cpu_to_le32( 1978 (cq->cnq_hw_ring_id & CMDQ_CREATE_CQ_CNQ_ID_MASK) << 1979 CMDQ_CREATE_CQ_CNQ_ID_SFT); 1980 1981 rc = bnxt_qplib_rcfw_send_message(rcfw, (void *)&req, 1982 (void *)&resp, NULL, 0); 1983 if (rc) 1984 goto fail; 1985 1986 cq->id = le32_to_cpu(resp.xid); 1987 cq->dbr_base = res->dpi_tbl.dbr_bar_reg_iomem; 1988 cq->period = BNXT_QPLIB_QUEUE_START_PERIOD; 1989 init_waitqueue_head(&cq->waitq); 1990 INIT_LIST_HEAD(&cq->sqf_head); 1991 INIT_LIST_HEAD(&cq->rqf_head); 1992 spin_lock_init(&cq->compl_lock); 1993 1994 bnxt_qplib_arm_cq_enable(cq); 1995 return 0; 1996 1997 fail: 1998 bnxt_qplib_free_hwq(res->pdev, &cq->hwq); 1999 exit: 2000 return rc; 2001 } 2002 2003 int bnxt_qplib_destroy_cq(struct bnxt_qplib_res *res, struct bnxt_qplib_cq *cq) 2004 { 2005 struct bnxt_qplib_rcfw *rcfw = res->rcfw; 2006 struct cmdq_destroy_cq req; 2007 struct creq_destroy_cq_resp resp; 2008 u16 cmd_flags = 0; 2009 int rc; 2010 2011 RCFW_CMD_PREP(req, DESTROY_CQ, cmd_flags); 2012 2013 req.cq_cid = cpu_to_le32(cq->id); 2014 rc = bnxt_qplib_rcfw_send_message(rcfw, (void *)&req, 2015 (void *)&resp, NULL, 0); 2016 if (rc) 2017 return rc; 2018 bnxt_qplib_free_hwq(res->pdev, &cq->hwq); 2019 return 0; 2020 } 2021 2022 static int __flush_sq(struct bnxt_qplib_q *sq, struct bnxt_qplib_qp *qp, 2023 struct bnxt_qplib_cqe **pcqe, int *budget) 2024 { 2025 u32 sw_prod, sw_cons; 2026 struct bnxt_qplib_cqe *cqe; 2027 int rc = 0; 2028 2029 /* Now complete all outstanding SQEs with FLUSHED_ERR */ 2030 sw_prod = HWQ_CMP(sq->hwq.prod, &sq->hwq); 2031 cqe = *pcqe; 2032 while (*budget) { 2033 sw_cons = HWQ_CMP(sq->hwq.cons, &sq->hwq); 2034 if (sw_cons == sw_prod) { 2035 break; 2036 } 2037 /* Skip the FENCE WQE completions */ 2038 if (sq->swq[sw_cons].wr_id == BNXT_QPLIB_FENCE_WRID) { 2039 bnxt_qplib_cancel_phantom_processing(qp); 2040 goto skip_compl; 2041 } 2042 memset(cqe, 0, sizeof(*cqe)); 2043 cqe->status = CQ_REQ_STATUS_WORK_REQUEST_FLUSHED_ERR; 2044 cqe->opcode = CQ_BASE_CQE_TYPE_REQ; 2045 cqe->qp_handle = (u64)(unsigned long)qp; 2046 cqe->wr_id = sq->swq[sw_cons].wr_id; 2047 cqe->src_qp = qp->id; 2048 cqe->type = sq->swq[sw_cons].type; 2049 cqe++; 2050 (*budget)--; 2051 skip_compl: 2052 sq->hwq.cons++; 2053 } 2054 *pcqe = cqe; 2055 if (!(*budget) && HWQ_CMP(sq->hwq.cons, &sq->hwq) != sw_prod) 2056 /* Out of budget */ 2057 rc = -EAGAIN; 2058 2059 return rc; 2060 } 2061 2062 static int __flush_rq(struct bnxt_qplib_q *rq, struct bnxt_qplib_qp *qp, 2063 struct bnxt_qplib_cqe **pcqe, int *budget) 2064 { 2065 struct bnxt_qplib_cqe *cqe; 2066 u32 sw_prod, sw_cons; 2067 int rc = 0; 2068 int opcode = 0; 2069 2070 switch (qp->type) { 2071 case CMDQ_CREATE_QP1_TYPE_GSI: 2072 opcode = CQ_BASE_CQE_TYPE_RES_RAWETH_QP1; 2073 break; 2074 case CMDQ_CREATE_QP_TYPE_RC: 2075 opcode = CQ_BASE_CQE_TYPE_RES_RC; 2076 break; 2077 case CMDQ_CREATE_QP_TYPE_UD: 2078 opcode = CQ_BASE_CQE_TYPE_RES_UD; 2079 break; 2080 } 2081 2082 /* Flush the rest of the RQ */ 2083 sw_prod = HWQ_CMP(rq->hwq.prod, &rq->hwq); 2084 cqe = *pcqe; 2085 while (*budget) { 2086 sw_cons = HWQ_CMP(rq->hwq.cons, &rq->hwq); 2087 if (sw_cons == sw_prod) 2088 break; 2089 memset(cqe, 0, sizeof(*cqe)); 2090 cqe->status = 2091 CQ_RES_RC_STATUS_WORK_REQUEST_FLUSHED_ERR; 2092 cqe->opcode = opcode; 2093 cqe->qp_handle = (unsigned long)qp; 2094 cqe->wr_id = rq->swq[sw_cons].wr_id; 2095 cqe++; 2096 (*budget)--; 2097 rq->hwq.cons++; 2098 } 2099 *pcqe = cqe; 2100 if (!*budget && HWQ_CMP(rq->hwq.cons, &rq->hwq) != sw_prod) 2101 /* Out of budget */ 2102 rc = -EAGAIN; 2103 2104 return rc; 2105 } 2106 2107 void bnxt_qplib_mark_qp_error(void *qp_handle) 2108 { 2109 struct bnxt_qplib_qp *qp = qp_handle; 2110 2111 if (!qp) 2112 return; 2113 2114 /* Must block new posting of SQ and RQ */ 2115 qp->state = CMDQ_MODIFY_QP_NEW_STATE_ERR; 2116 bnxt_qplib_cancel_phantom_processing(qp); 2117 2118 /* Add qp to flush list of the CQ */ 2119 __bnxt_qplib_add_flush_qp(qp); 2120 } 2121 2122 /* Note: SQE is valid from sw_sq_cons up to cqe_sq_cons (exclusive) 2123 * CQE is track from sw_cq_cons to max_element but valid only if VALID=1 2124 */ 2125 static int do_wa9060(struct bnxt_qplib_qp *qp, struct bnxt_qplib_cq *cq, 2126 u32 cq_cons, u32 sw_sq_cons, u32 cqe_sq_cons) 2127 { 2128 struct bnxt_qplib_q *sq = &qp->sq; 2129 struct bnxt_qplib_swq *swq; 2130 u32 peek_sw_cq_cons, peek_raw_cq_cons, peek_sq_cons_idx; 2131 struct cq_base *peek_hwcqe, **peek_hw_cqe_ptr; 2132 struct cq_req *peek_req_hwcqe; 2133 struct bnxt_qplib_qp *peek_qp; 2134 struct bnxt_qplib_q *peek_sq; 2135 int i, rc = 0; 2136 2137 /* Normal mode */ 2138 /* Check for the psn_search marking before completing */ 2139 swq = &sq->swq[sw_sq_cons]; 2140 if (swq->psn_search && 2141 le32_to_cpu(swq->psn_search->flags_next_psn) & 0x80000000) { 2142 /* Unmark */ 2143 swq->psn_search->flags_next_psn = cpu_to_le32 2144 (le32_to_cpu(swq->psn_search->flags_next_psn) 2145 & ~0x80000000); 2146 dev_dbg(&cq->hwq.pdev->dev, 2147 "FP: Process Req cq_cons=0x%x qp=0x%x sq cons sw=0x%x cqe=0x%x marked!\n", 2148 cq_cons, qp->id, sw_sq_cons, cqe_sq_cons); 2149 sq->condition = true; 2150 sq->send_phantom = true; 2151 2152 /* TODO: Only ARM if the previous SQE is ARMALL */ 2153 bnxt_qplib_arm_cq(cq, DBR_DBR_TYPE_CQ_ARMALL); 2154 2155 rc = -EAGAIN; 2156 goto out; 2157 } 2158 if (sq->condition) { 2159 /* Peek at the completions */ 2160 peek_raw_cq_cons = cq->hwq.cons; 2161 peek_sw_cq_cons = cq_cons; 2162 i = cq->hwq.max_elements; 2163 while (i--) { 2164 peek_sw_cq_cons = HWQ_CMP((peek_sw_cq_cons), &cq->hwq); 2165 peek_hw_cqe_ptr = (struct cq_base **)cq->hwq.pbl_ptr; 2166 peek_hwcqe = &peek_hw_cqe_ptr[CQE_PG(peek_sw_cq_cons)] 2167 [CQE_IDX(peek_sw_cq_cons)]; 2168 /* If the next hwcqe is VALID */ 2169 if (CQE_CMP_VALID(peek_hwcqe, peek_raw_cq_cons, 2170 cq->hwq.max_elements)) { 2171 /* 2172 * The valid test of the entry must be done first before 2173 * reading any further. 2174 */ 2175 dma_rmb(); 2176 /* If the next hwcqe is a REQ */ 2177 if ((peek_hwcqe->cqe_type_toggle & 2178 CQ_BASE_CQE_TYPE_MASK) == 2179 CQ_BASE_CQE_TYPE_REQ) { 2180 peek_req_hwcqe = (struct cq_req *) 2181 peek_hwcqe; 2182 peek_qp = (struct bnxt_qplib_qp *) 2183 ((unsigned long) 2184 le64_to_cpu 2185 (peek_req_hwcqe->qp_handle)); 2186 peek_sq = &peek_qp->sq; 2187 peek_sq_cons_idx = HWQ_CMP(le16_to_cpu( 2188 peek_req_hwcqe->sq_cons_idx) - 1 2189 , &sq->hwq); 2190 /* If the hwcqe's sq's wr_id matches */ 2191 if (peek_sq == sq && 2192 sq->swq[peek_sq_cons_idx].wr_id == 2193 BNXT_QPLIB_FENCE_WRID) { 2194 /* 2195 * Unbreak only if the phantom 2196 * comes back 2197 */ 2198 dev_dbg(&cq->hwq.pdev->dev, 2199 "FP:Got Phantom CQE"); 2200 sq->condition = false; 2201 sq->single = true; 2202 rc = 0; 2203 goto out; 2204 } 2205 } 2206 /* Valid but not the phantom, so keep looping */ 2207 } else { 2208 /* Not valid yet, just exit and wait */ 2209 rc = -EINVAL; 2210 goto out; 2211 } 2212 peek_sw_cq_cons++; 2213 peek_raw_cq_cons++; 2214 } 2215 dev_err(&cq->hwq.pdev->dev, 2216 "Should not have come here! cq_cons=0x%x qp=0x%x sq cons sw=0x%x hw=0x%x", 2217 cq_cons, qp->id, sw_sq_cons, cqe_sq_cons); 2218 rc = -EINVAL; 2219 } 2220 out: 2221 return rc; 2222 } 2223 2224 static int bnxt_qplib_cq_process_req(struct bnxt_qplib_cq *cq, 2225 struct cq_req *hwcqe, 2226 struct bnxt_qplib_cqe **pcqe, int *budget, 2227 u32 cq_cons, struct bnxt_qplib_qp **lib_qp) 2228 { 2229 struct bnxt_qplib_qp *qp; 2230 struct bnxt_qplib_q *sq; 2231 struct bnxt_qplib_cqe *cqe; 2232 u32 sw_sq_cons, cqe_sq_cons; 2233 struct bnxt_qplib_swq *swq; 2234 int rc = 0; 2235 2236 qp = (struct bnxt_qplib_qp *)((unsigned long) 2237 le64_to_cpu(hwcqe->qp_handle)); 2238 if (!qp) { 2239 dev_err(&cq->hwq.pdev->dev, 2240 "QPLIB: FP: Process Req qp is NULL"); 2241 return -EINVAL; 2242 } 2243 sq = &qp->sq; 2244 2245 cqe_sq_cons = HWQ_CMP(le16_to_cpu(hwcqe->sq_cons_idx), &sq->hwq); 2246 if (cqe_sq_cons > sq->hwq.max_elements) { 2247 dev_err(&cq->hwq.pdev->dev, 2248 "QPLIB: FP: CQ Process req reported "); 2249 dev_err(&cq->hwq.pdev->dev, 2250 "QPLIB: sq_cons_idx 0x%x which exceeded max 0x%x", 2251 cqe_sq_cons, sq->hwq.max_elements); 2252 return -EINVAL; 2253 } 2254 2255 if (qp->sq.flushed) { 2256 dev_dbg(&cq->hwq.pdev->dev, 2257 "%s: QPLIB: QP in Flush QP = %p\n", __func__, qp); 2258 goto done; 2259 } 2260 /* Require to walk the sq's swq to fabricate CQEs for all previously 2261 * signaled SWQEs due to CQE aggregation from the current sq cons 2262 * to the cqe_sq_cons 2263 */ 2264 cqe = *pcqe; 2265 while (*budget) { 2266 sw_sq_cons = HWQ_CMP(sq->hwq.cons, &sq->hwq); 2267 if (sw_sq_cons == cqe_sq_cons) 2268 /* Done */ 2269 break; 2270 2271 swq = &sq->swq[sw_sq_cons]; 2272 memset(cqe, 0, sizeof(*cqe)); 2273 cqe->opcode = CQ_BASE_CQE_TYPE_REQ; 2274 cqe->qp_handle = (u64)(unsigned long)qp; 2275 cqe->src_qp = qp->id; 2276 cqe->wr_id = swq->wr_id; 2277 if (cqe->wr_id == BNXT_QPLIB_FENCE_WRID) 2278 goto skip; 2279 cqe->type = swq->type; 2280 2281 /* For the last CQE, check for status. For errors, regardless 2282 * of the request being signaled or not, it must complete with 2283 * the hwcqe error status 2284 */ 2285 if (HWQ_CMP((sw_sq_cons + 1), &sq->hwq) == cqe_sq_cons && 2286 hwcqe->status != CQ_REQ_STATUS_OK) { 2287 cqe->status = hwcqe->status; 2288 dev_err(&cq->hwq.pdev->dev, 2289 "QPLIB: FP: CQ Processed Req "); 2290 dev_err(&cq->hwq.pdev->dev, 2291 "QPLIB: wr_id[%d] = 0x%llx with status 0x%x", 2292 sw_sq_cons, cqe->wr_id, cqe->status); 2293 cqe++; 2294 (*budget)--; 2295 bnxt_qplib_lock_buddy_cq(qp, cq); 2296 bnxt_qplib_mark_qp_error(qp); 2297 bnxt_qplib_unlock_buddy_cq(qp, cq); 2298 } else { 2299 if (swq->flags & SQ_SEND_FLAGS_SIGNAL_COMP) { 2300 /* Before we complete, do WA 9060 */ 2301 if (do_wa9060(qp, cq, cq_cons, sw_sq_cons, 2302 cqe_sq_cons)) { 2303 *lib_qp = qp; 2304 goto out; 2305 } 2306 cqe->status = CQ_REQ_STATUS_OK; 2307 cqe++; 2308 (*budget)--; 2309 } 2310 } 2311 skip: 2312 sq->hwq.cons++; 2313 if (sq->single) 2314 break; 2315 } 2316 out: 2317 *pcqe = cqe; 2318 if (HWQ_CMP(sq->hwq.cons, &sq->hwq) != cqe_sq_cons) { 2319 /* Out of budget */ 2320 rc = -EAGAIN; 2321 goto done; 2322 } 2323 /* 2324 * Back to normal completion mode only after it has completed all of 2325 * the WC for this CQE 2326 */ 2327 sq->single = false; 2328 done: 2329 return rc; 2330 } 2331 2332 static void bnxt_qplib_release_srqe(struct bnxt_qplib_srq *srq, u32 tag) 2333 { 2334 spin_lock(&srq->hwq.lock); 2335 srq->swq[srq->last_idx].next_idx = (int)tag; 2336 srq->last_idx = (int)tag; 2337 srq->swq[srq->last_idx].next_idx = -1; 2338 srq->hwq.cons++; /* Support for SRQE counter */ 2339 spin_unlock(&srq->hwq.lock); 2340 } 2341 2342 static int bnxt_qplib_cq_process_res_rc(struct bnxt_qplib_cq *cq, 2343 struct cq_res_rc *hwcqe, 2344 struct bnxt_qplib_cqe **pcqe, 2345 int *budget) 2346 { 2347 struct bnxt_qplib_qp *qp; 2348 struct bnxt_qplib_q *rq; 2349 struct bnxt_qplib_srq *srq; 2350 struct bnxt_qplib_cqe *cqe; 2351 u32 wr_id_idx; 2352 int rc = 0; 2353 2354 qp = (struct bnxt_qplib_qp *)((unsigned long) 2355 le64_to_cpu(hwcqe->qp_handle)); 2356 if (!qp) { 2357 dev_err(&cq->hwq.pdev->dev, "QPLIB: process_cq RC qp is NULL"); 2358 return -EINVAL; 2359 } 2360 if (qp->rq.flushed) { 2361 dev_dbg(&cq->hwq.pdev->dev, 2362 "%s: QPLIB: QP in Flush QP = %p\n", __func__, qp); 2363 goto done; 2364 } 2365 2366 cqe = *pcqe; 2367 cqe->opcode = hwcqe->cqe_type_toggle & CQ_BASE_CQE_TYPE_MASK; 2368 cqe->length = le32_to_cpu(hwcqe->length); 2369 cqe->invrkey = le32_to_cpu(hwcqe->imm_data_or_inv_r_key); 2370 cqe->mr_handle = le64_to_cpu(hwcqe->mr_handle); 2371 cqe->flags = le16_to_cpu(hwcqe->flags); 2372 cqe->status = hwcqe->status; 2373 cqe->qp_handle = (u64)(unsigned long)qp; 2374 2375 wr_id_idx = le32_to_cpu(hwcqe->srq_or_rq_wr_id) & 2376 CQ_RES_RC_SRQ_OR_RQ_WR_ID_MASK; 2377 if (cqe->flags & CQ_RES_RC_FLAGS_SRQ_SRQ) { 2378 srq = qp->srq; 2379 if (!srq) 2380 return -EINVAL; 2381 if (wr_id_idx > srq->hwq.max_elements) { 2382 dev_err(&cq->hwq.pdev->dev, 2383 "QPLIB: FP: CQ Process RC "); 2384 dev_err(&cq->hwq.pdev->dev, 2385 "QPLIB: wr_id idx 0x%x exceeded SRQ max 0x%x", 2386 wr_id_idx, srq->hwq.max_elements); 2387 return -EINVAL; 2388 } 2389 cqe->wr_id = srq->swq[wr_id_idx].wr_id; 2390 bnxt_qplib_release_srqe(srq, wr_id_idx); 2391 cqe++; 2392 (*budget)--; 2393 *pcqe = cqe; 2394 } else { 2395 rq = &qp->rq; 2396 if (wr_id_idx > rq->hwq.max_elements) { 2397 dev_err(&cq->hwq.pdev->dev, 2398 "QPLIB: FP: CQ Process RC "); 2399 dev_err(&cq->hwq.pdev->dev, 2400 "QPLIB: wr_id idx 0x%x exceeded RQ max 0x%x", 2401 wr_id_idx, rq->hwq.max_elements); 2402 return -EINVAL; 2403 } 2404 cqe->wr_id = rq->swq[wr_id_idx].wr_id; 2405 cqe++; 2406 (*budget)--; 2407 rq->hwq.cons++; 2408 *pcqe = cqe; 2409 2410 if (hwcqe->status != CQ_RES_RC_STATUS_OK) { 2411 qp->state = CMDQ_MODIFY_QP_NEW_STATE_ERR; 2412 /* Add qp to flush list of the CQ */ 2413 bnxt_qplib_lock_buddy_cq(qp, cq); 2414 __bnxt_qplib_add_flush_qp(qp); 2415 bnxt_qplib_unlock_buddy_cq(qp, cq); 2416 } 2417 } 2418 2419 done: 2420 return rc; 2421 } 2422 2423 static int bnxt_qplib_cq_process_res_ud(struct bnxt_qplib_cq *cq, 2424 struct cq_res_ud *hwcqe, 2425 struct bnxt_qplib_cqe **pcqe, 2426 int *budget) 2427 { 2428 struct bnxt_qplib_qp *qp; 2429 struct bnxt_qplib_q *rq; 2430 struct bnxt_qplib_srq *srq; 2431 struct bnxt_qplib_cqe *cqe; 2432 u32 wr_id_idx; 2433 int rc = 0; 2434 2435 qp = (struct bnxt_qplib_qp *)((unsigned long) 2436 le64_to_cpu(hwcqe->qp_handle)); 2437 if (!qp) { 2438 dev_err(&cq->hwq.pdev->dev, "QPLIB: process_cq UD qp is NULL"); 2439 return -EINVAL; 2440 } 2441 if (qp->rq.flushed) { 2442 dev_dbg(&cq->hwq.pdev->dev, 2443 "%s: QPLIB: QP in Flush QP = %p\n", __func__, qp); 2444 goto done; 2445 } 2446 cqe = *pcqe; 2447 cqe->opcode = hwcqe->cqe_type_toggle & CQ_BASE_CQE_TYPE_MASK; 2448 cqe->length = le32_to_cpu(hwcqe->length); 2449 cqe->invrkey = le32_to_cpu(hwcqe->imm_data); 2450 cqe->flags = le16_to_cpu(hwcqe->flags); 2451 cqe->status = hwcqe->status; 2452 cqe->qp_handle = (u64)(unsigned long)qp; 2453 memcpy(cqe->smac, hwcqe->src_mac, 6); 2454 wr_id_idx = le32_to_cpu(hwcqe->src_qp_high_srq_or_rq_wr_id) 2455 & CQ_RES_UD_SRQ_OR_RQ_WR_ID_MASK; 2456 cqe->src_qp = le16_to_cpu(hwcqe->src_qp_low) | 2457 ((le32_to_cpu( 2458 hwcqe->src_qp_high_srq_or_rq_wr_id) & 2459 CQ_RES_UD_SRC_QP_HIGH_MASK) >> 8); 2460 2461 if (cqe->flags & CQ_RES_RC_FLAGS_SRQ_SRQ) { 2462 srq = qp->srq; 2463 if (!srq) 2464 return -EINVAL; 2465 2466 if (wr_id_idx > srq->hwq.max_elements) { 2467 dev_err(&cq->hwq.pdev->dev, 2468 "QPLIB: FP: CQ Process UD "); 2469 dev_err(&cq->hwq.pdev->dev, 2470 "QPLIB: wr_id idx 0x%x exceeded SRQ max 0x%x", 2471 wr_id_idx, srq->hwq.max_elements); 2472 return -EINVAL; 2473 } 2474 cqe->wr_id = srq->swq[wr_id_idx].wr_id; 2475 bnxt_qplib_release_srqe(srq, wr_id_idx); 2476 cqe++; 2477 (*budget)--; 2478 *pcqe = cqe; 2479 } else { 2480 rq = &qp->rq; 2481 if (wr_id_idx > rq->hwq.max_elements) { 2482 dev_err(&cq->hwq.pdev->dev, 2483 "QPLIB: FP: CQ Process UD "); 2484 dev_err(&cq->hwq.pdev->dev, 2485 "QPLIB: wr_id idx 0x%x exceeded RQ max 0x%x", 2486 wr_id_idx, rq->hwq.max_elements); 2487 return -EINVAL; 2488 } 2489 2490 cqe->wr_id = rq->swq[wr_id_idx].wr_id; 2491 cqe++; 2492 (*budget)--; 2493 rq->hwq.cons++; 2494 *pcqe = cqe; 2495 2496 if (hwcqe->status != CQ_RES_RC_STATUS_OK) { 2497 qp->state = CMDQ_MODIFY_QP_NEW_STATE_ERR; 2498 /* Add qp to flush list of the CQ */ 2499 bnxt_qplib_lock_buddy_cq(qp, cq); 2500 __bnxt_qplib_add_flush_qp(qp); 2501 bnxt_qplib_unlock_buddy_cq(qp, cq); 2502 } 2503 } 2504 done: 2505 return rc; 2506 } 2507 2508 bool bnxt_qplib_is_cq_empty(struct bnxt_qplib_cq *cq) 2509 { 2510 struct cq_base *hw_cqe, **hw_cqe_ptr; 2511 unsigned long flags; 2512 u32 sw_cons, raw_cons; 2513 bool rc = true; 2514 2515 spin_lock_irqsave(&cq->hwq.lock, flags); 2516 raw_cons = cq->hwq.cons; 2517 sw_cons = HWQ_CMP(raw_cons, &cq->hwq); 2518 hw_cqe_ptr = (struct cq_base **)cq->hwq.pbl_ptr; 2519 hw_cqe = &hw_cqe_ptr[CQE_PG(sw_cons)][CQE_IDX(sw_cons)]; 2520 2521 /* Check for Valid bit. If the CQE is valid, return false */ 2522 rc = !CQE_CMP_VALID(hw_cqe, raw_cons, cq->hwq.max_elements); 2523 spin_unlock_irqrestore(&cq->hwq.lock, flags); 2524 return rc; 2525 } 2526 2527 static int bnxt_qplib_cq_process_res_raweth_qp1(struct bnxt_qplib_cq *cq, 2528 struct cq_res_raweth_qp1 *hwcqe, 2529 struct bnxt_qplib_cqe **pcqe, 2530 int *budget) 2531 { 2532 struct bnxt_qplib_qp *qp; 2533 struct bnxt_qplib_q *rq; 2534 struct bnxt_qplib_srq *srq; 2535 struct bnxt_qplib_cqe *cqe; 2536 u32 wr_id_idx; 2537 int rc = 0; 2538 2539 qp = (struct bnxt_qplib_qp *)((unsigned long) 2540 le64_to_cpu(hwcqe->qp_handle)); 2541 if (!qp) { 2542 dev_err(&cq->hwq.pdev->dev, 2543 "QPLIB: process_cq Raw/QP1 qp is NULL"); 2544 return -EINVAL; 2545 } 2546 if (qp->rq.flushed) { 2547 dev_dbg(&cq->hwq.pdev->dev, 2548 "%s: QPLIB: QP in Flush QP = %p\n", __func__, qp); 2549 goto done; 2550 } 2551 cqe = *pcqe; 2552 cqe->opcode = hwcqe->cqe_type_toggle & CQ_BASE_CQE_TYPE_MASK; 2553 cqe->flags = le16_to_cpu(hwcqe->flags); 2554 cqe->qp_handle = (u64)(unsigned long)qp; 2555 2556 wr_id_idx = 2557 le32_to_cpu(hwcqe->raweth_qp1_payload_offset_srq_or_rq_wr_id) 2558 & CQ_RES_RAWETH_QP1_SRQ_OR_RQ_WR_ID_MASK; 2559 cqe->src_qp = qp->id; 2560 if (qp->id == 1 && !cqe->length) { 2561 /* Add workaround for the length misdetection */ 2562 cqe->length = 296; 2563 } else { 2564 cqe->length = le16_to_cpu(hwcqe->length); 2565 } 2566 cqe->pkey_index = qp->pkey_index; 2567 memcpy(cqe->smac, qp->smac, 6); 2568 2569 cqe->raweth_qp1_flags = le16_to_cpu(hwcqe->raweth_qp1_flags); 2570 cqe->raweth_qp1_flags2 = le32_to_cpu(hwcqe->raweth_qp1_flags2); 2571 cqe->raweth_qp1_metadata = le32_to_cpu(hwcqe->raweth_qp1_metadata); 2572 2573 if (cqe->flags & CQ_RES_RAWETH_QP1_FLAGS_SRQ_SRQ) { 2574 srq = qp->srq; 2575 if (!srq) { 2576 dev_err(&cq->hwq.pdev->dev, 2577 "QPLIB: FP: SRQ used but not defined??"); 2578 return -EINVAL; 2579 } 2580 if (wr_id_idx > srq->hwq.max_elements) { 2581 dev_err(&cq->hwq.pdev->dev, 2582 "QPLIB: FP: CQ Process Raw/QP1 "); 2583 dev_err(&cq->hwq.pdev->dev, 2584 "QPLIB: wr_id idx 0x%x exceeded SRQ max 0x%x", 2585 wr_id_idx, srq->hwq.max_elements); 2586 return -EINVAL; 2587 } 2588 cqe->wr_id = srq->swq[wr_id_idx].wr_id; 2589 bnxt_qplib_release_srqe(srq, wr_id_idx); 2590 cqe++; 2591 (*budget)--; 2592 *pcqe = cqe; 2593 } else { 2594 rq = &qp->rq; 2595 if (wr_id_idx > rq->hwq.max_elements) { 2596 dev_err(&cq->hwq.pdev->dev, 2597 "QPLIB: FP: CQ Process Raw/QP1 RQ wr_id "); 2598 dev_err(&cq->hwq.pdev->dev, 2599 "QPLIB: ix 0x%x exceeded RQ max 0x%x", 2600 wr_id_idx, rq->hwq.max_elements); 2601 return -EINVAL; 2602 } 2603 cqe->wr_id = rq->swq[wr_id_idx].wr_id; 2604 cqe++; 2605 (*budget)--; 2606 rq->hwq.cons++; 2607 *pcqe = cqe; 2608 2609 if (hwcqe->status != CQ_RES_RC_STATUS_OK) { 2610 qp->state = CMDQ_MODIFY_QP_NEW_STATE_ERR; 2611 /* Add qp to flush list of the CQ */ 2612 bnxt_qplib_lock_buddy_cq(qp, cq); 2613 __bnxt_qplib_add_flush_qp(qp); 2614 bnxt_qplib_unlock_buddy_cq(qp, cq); 2615 } 2616 } 2617 2618 done: 2619 return rc; 2620 } 2621 2622 static int bnxt_qplib_cq_process_terminal(struct bnxt_qplib_cq *cq, 2623 struct cq_terminal *hwcqe, 2624 struct bnxt_qplib_cqe **pcqe, 2625 int *budget) 2626 { 2627 struct bnxt_qplib_qp *qp; 2628 struct bnxt_qplib_q *sq, *rq; 2629 struct bnxt_qplib_cqe *cqe; 2630 u32 sw_cons = 0, cqe_cons; 2631 int rc = 0; 2632 2633 /* Check the Status */ 2634 if (hwcqe->status != CQ_TERMINAL_STATUS_OK) 2635 dev_warn(&cq->hwq.pdev->dev, 2636 "QPLIB: FP: CQ Process Terminal Error status = 0x%x", 2637 hwcqe->status); 2638 2639 qp = (struct bnxt_qplib_qp *)((unsigned long) 2640 le64_to_cpu(hwcqe->qp_handle)); 2641 if (!qp) { 2642 dev_err(&cq->hwq.pdev->dev, 2643 "QPLIB: FP: CQ Process terminal qp is NULL"); 2644 return -EINVAL; 2645 } 2646 2647 /* Must block new posting of SQ and RQ */ 2648 qp->state = CMDQ_MODIFY_QP_NEW_STATE_ERR; 2649 2650 sq = &qp->sq; 2651 rq = &qp->rq; 2652 2653 cqe_cons = le16_to_cpu(hwcqe->sq_cons_idx); 2654 if (cqe_cons == 0xFFFF) 2655 goto do_rq; 2656 2657 if (cqe_cons > sq->hwq.max_elements) { 2658 dev_err(&cq->hwq.pdev->dev, 2659 "QPLIB: FP: CQ Process terminal reported "); 2660 dev_err(&cq->hwq.pdev->dev, 2661 "QPLIB: sq_cons_idx 0x%x which exceeded max 0x%x", 2662 cqe_cons, sq->hwq.max_elements); 2663 goto do_rq; 2664 } 2665 2666 if (qp->sq.flushed) { 2667 dev_dbg(&cq->hwq.pdev->dev, 2668 "%s: QPLIB: QP in Flush QP = %p\n", __func__, qp); 2669 goto sq_done; 2670 } 2671 2672 /* Terminal CQE can also include aggregated successful CQEs prior. 2673 * So we must complete all CQEs from the current sq's cons to the 2674 * cq_cons with status OK 2675 */ 2676 cqe = *pcqe; 2677 while (*budget) { 2678 sw_cons = HWQ_CMP(sq->hwq.cons, &sq->hwq); 2679 if (sw_cons == cqe_cons) 2680 break; 2681 if (sq->swq[sw_cons].flags & SQ_SEND_FLAGS_SIGNAL_COMP) { 2682 memset(cqe, 0, sizeof(*cqe)); 2683 cqe->status = CQ_REQ_STATUS_OK; 2684 cqe->opcode = CQ_BASE_CQE_TYPE_REQ; 2685 cqe->qp_handle = (u64)(unsigned long)qp; 2686 cqe->src_qp = qp->id; 2687 cqe->wr_id = sq->swq[sw_cons].wr_id; 2688 cqe->type = sq->swq[sw_cons].type; 2689 cqe++; 2690 (*budget)--; 2691 } 2692 sq->hwq.cons++; 2693 } 2694 *pcqe = cqe; 2695 if (!(*budget) && sw_cons != cqe_cons) { 2696 /* Out of budget */ 2697 rc = -EAGAIN; 2698 goto sq_done; 2699 } 2700 sq_done: 2701 if (rc) 2702 return rc; 2703 do_rq: 2704 cqe_cons = le16_to_cpu(hwcqe->rq_cons_idx); 2705 if (cqe_cons == 0xFFFF) { 2706 goto done; 2707 } else if (cqe_cons > rq->hwq.max_elements) { 2708 dev_err(&cq->hwq.pdev->dev, 2709 "QPLIB: FP: CQ Processed terminal "); 2710 dev_err(&cq->hwq.pdev->dev, 2711 "QPLIB: reported rq_cons_idx 0x%x exceeds max 0x%x", 2712 cqe_cons, rq->hwq.max_elements); 2713 goto done; 2714 } 2715 2716 if (qp->rq.flushed) { 2717 dev_dbg(&cq->hwq.pdev->dev, 2718 "%s: QPLIB: QP in Flush QP = %p\n", __func__, qp); 2719 rc = 0; 2720 goto done; 2721 } 2722 2723 /* Terminal CQE requires all posted RQEs to complete with FLUSHED_ERR 2724 * from the current rq->cons to the rq->prod regardless what the 2725 * rq->cons the terminal CQE indicates 2726 */ 2727 2728 /* Add qp to flush list of the CQ */ 2729 bnxt_qplib_lock_buddy_cq(qp, cq); 2730 __bnxt_qplib_add_flush_qp(qp); 2731 bnxt_qplib_unlock_buddy_cq(qp, cq); 2732 done: 2733 return rc; 2734 } 2735 2736 static int bnxt_qplib_cq_process_cutoff(struct bnxt_qplib_cq *cq, 2737 struct cq_cutoff *hwcqe) 2738 { 2739 /* Check the Status */ 2740 if (hwcqe->status != CQ_CUTOFF_STATUS_OK) { 2741 dev_err(&cq->hwq.pdev->dev, 2742 "QPLIB: FP: CQ Process Cutoff Error status = 0x%x", 2743 hwcqe->status); 2744 return -EINVAL; 2745 } 2746 clear_bit(CQ_FLAGS_RESIZE_IN_PROG, &cq->flags); 2747 wake_up_interruptible(&cq->waitq); 2748 2749 return 0; 2750 } 2751 2752 int bnxt_qplib_process_flush_list(struct bnxt_qplib_cq *cq, 2753 struct bnxt_qplib_cqe *cqe, 2754 int num_cqes) 2755 { 2756 struct bnxt_qplib_qp *qp = NULL; 2757 u32 budget = num_cqes; 2758 unsigned long flags; 2759 2760 spin_lock_irqsave(&cq->hwq.lock, flags); 2761 list_for_each_entry(qp, &cq->sqf_head, sq_flush) { 2762 dev_dbg(&cq->hwq.pdev->dev, 2763 "QPLIB: FP: Flushing SQ QP= %p", 2764 qp); 2765 __flush_sq(&qp->sq, qp, &cqe, &budget); 2766 } 2767 2768 list_for_each_entry(qp, &cq->rqf_head, rq_flush) { 2769 dev_dbg(&cq->hwq.pdev->dev, 2770 "QPLIB: FP: Flushing RQ QP= %p", 2771 qp); 2772 __flush_rq(&qp->rq, qp, &cqe, &budget); 2773 } 2774 spin_unlock_irqrestore(&cq->hwq.lock, flags); 2775 2776 return num_cqes - budget; 2777 } 2778 2779 int bnxt_qplib_poll_cq(struct bnxt_qplib_cq *cq, struct bnxt_qplib_cqe *cqe, 2780 int num_cqes, struct bnxt_qplib_qp **lib_qp) 2781 { 2782 struct cq_base *hw_cqe, **hw_cqe_ptr; 2783 unsigned long flags; 2784 u32 sw_cons, raw_cons; 2785 int budget, rc = 0; 2786 2787 spin_lock_irqsave(&cq->hwq.lock, flags); 2788 raw_cons = cq->hwq.cons; 2789 budget = num_cqes; 2790 2791 while (budget) { 2792 sw_cons = HWQ_CMP(raw_cons, &cq->hwq); 2793 hw_cqe_ptr = (struct cq_base **)cq->hwq.pbl_ptr; 2794 hw_cqe = &hw_cqe_ptr[CQE_PG(sw_cons)][CQE_IDX(sw_cons)]; 2795 2796 /* Check for Valid bit */ 2797 if (!CQE_CMP_VALID(hw_cqe, raw_cons, cq->hwq.max_elements)) 2798 break; 2799 2800 /* 2801 * The valid test of the entry must be done first before 2802 * reading any further. 2803 */ 2804 dma_rmb(); 2805 /* From the device's respective CQE format to qplib_wc*/ 2806 switch (hw_cqe->cqe_type_toggle & CQ_BASE_CQE_TYPE_MASK) { 2807 case CQ_BASE_CQE_TYPE_REQ: 2808 rc = bnxt_qplib_cq_process_req(cq, 2809 (struct cq_req *)hw_cqe, 2810 &cqe, &budget, 2811 sw_cons, lib_qp); 2812 break; 2813 case CQ_BASE_CQE_TYPE_RES_RC: 2814 rc = bnxt_qplib_cq_process_res_rc(cq, 2815 (struct cq_res_rc *) 2816 hw_cqe, &cqe, 2817 &budget); 2818 break; 2819 case CQ_BASE_CQE_TYPE_RES_UD: 2820 rc = bnxt_qplib_cq_process_res_ud 2821 (cq, (struct cq_res_ud *)hw_cqe, &cqe, 2822 &budget); 2823 break; 2824 case CQ_BASE_CQE_TYPE_RES_RAWETH_QP1: 2825 rc = bnxt_qplib_cq_process_res_raweth_qp1 2826 (cq, (struct cq_res_raweth_qp1 *) 2827 hw_cqe, &cqe, &budget); 2828 break; 2829 case CQ_BASE_CQE_TYPE_TERMINAL: 2830 rc = bnxt_qplib_cq_process_terminal 2831 (cq, (struct cq_terminal *)hw_cqe, 2832 &cqe, &budget); 2833 break; 2834 case CQ_BASE_CQE_TYPE_CUT_OFF: 2835 bnxt_qplib_cq_process_cutoff 2836 (cq, (struct cq_cutoff *)hw_cqe); 2837 /* Done processing this CQ */ 2838 goto exit; 2839 default: 2840 dev_err(&cq->hwq.pdev->dev, 2841 "QPLIB: process_cq unknown type 0x%lx", 2842 hw_cqe->cqe_type_toggle & 2843 CQ_BASE_CQE_TYPE_MASK); 2844 rc = -EINVAL; 2845 break; 2846 } 2847 if (rc < 0) { 2848 if (rc == -EAGAIN) 2849 break; 2850 /* Error while processing the CQE, just skip to the 2851 * next one 2852 */ 2853 dev_err(&cq->hwq.pdev->dev, 2854 "QPLIB: process_cqe error rc = 0x%x", rc); 2855 } 2856 raw_cons++; 2857 } 2858 if (cq->hwq.cons != raw_cons) { 2859 cq->hwq.cons = raw_cons; 2860 bnxt_qplib_arm_cq(cq, DBR_DBR_TYPE_CQ); 2861 } 2862 exit: 2863 spin_unlock_irqrestore(&cq->hwq.lock, flags); 2864 return num_cqes - budget; 2865 } 2866 2867 void bnxt_qplib_req_notify_cq(struct bnxt_qplib_cq *cq, u32 arm_type) 2868 { 2869 unsigned long flags; 2870 2871 spin_lock_irqsave(&cq->hwq.lock, flags); 2872 if (arm_type) 2873 bnxt_qplib_arm_cq(cq, arm_type); 2874 /* Using cq->arm_state variable to track whether to issue cq handler */ 2875 atomic_set(&cq->arm_state, 1); 2876 spin_unlock_irqrestore(&cq->hwq.lock, flags); 2877 } 2878 2879 void bnxt_qplib_flush_cqn_wq(struct bnxt_qplib_qp *qp) 2880 { 2881 flush_workqueue(qp->scq->nq->cqn_wq); 2882 if (qp->scq != qp->rcq) 2883 flush_workqueue(qp->rcq->nq->cqn_wq); 2884 } 2885