1 /* 2 * Broadcom NetXtreme-E RoCE driver. 3 * 4 * Copyright (c) 2016 - 2017, Broadcom. All rights reserved. The term 5 * Broadcom refers to Broadcom Limited and/or its subsidiaries. 6 * 7 * This software is available to you under a choice of one of two 8 * licenses. You may choose to be licensed under the terms of the GNU 9 * General Public License (GPL) Version 2, available from the file 10 * COPYING in the main directory of this source tree, or the 11 * BSD license below: 12 * 13 * Redistribution and use in source and binary forms, with or without 14 * modification, are permitted provided that the following conditions 15 * are met: 16 * 17 * 1. Redistributions of source code must retain the above copyright 18 * notice, this list of conditions and the following disclaimer. 19 * 2. Redistributions in binary form must reproduce the above copyright 20 * notice, this list of conditions and the following disclaimer in 21 * the documentation and/or other materials provided with the 22 * distribution. 23 * 24 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' 25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, 26 * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 27 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS 28 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 29 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 30 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR 31 * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, 32 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE 33 * OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN 34 * IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 35 * 36 * Description: Fast Path Operators 37 */ 38 39 #define dev_fmt(fmt) "QPLIB: " fmt 40 41 #include <linux/interrupt.h> 42 #include <linux/spinlock.h> 43 #include <linux/sched.h> 44 #include <linux/slab.h> 45 #include <linux/pci.h> 46 #include <linux/delay.h> 47 #include <linux/prefetch.h> 48 #include <linux/if_ether.h> 49 #include <rdma/ib_mad.h> 50 51 #include "roce_hsi.h" 52 53 #include "qplib_res.h" 54 #include "qplib_rcfw.h" 55 #include "qplib_sp.h" 56 #include "qplib_fp.h" 57 #include <rdma/ib_addr.h> 58 #include "bnxt_ulp.h" 59 #include "bnxt_re.h" 60 #include "ib_verbs.h" 61 62 static void __clean_cq(struct bnxt_qplib_cq *cq, u64 qp); 63 64 static void bnxt_qplib_cancel_phantom_processing(struct bnxt_qplib_qp *qp) 65 { 66 qp->sq.condition = false; 67 qp->sq.send_phantom = false; 68 qp->sq.single = false; 69 } 70 71 /* Flush list */ 72 static void __bnxt_qplib_add_flush_qp(struct bnxt_qplib_qp *qp) 73 { 74 struct bnxt_qplib_cq *scq, *rcq; 75 76 scq = qp->scq; 77 rcq = qp->rcq; 78 79 if (!qp->sq.flushed) { 80 dev_dbg(&scq->hwq.pdev->dev, 81 "FP: Adding to SQ Flush list = %p\n", qp); 82 bnxt_qplib_cancel_phantom_processing(qp); 83 list_add_tail(&qp->sq_flush, &scq->sqf_head); 84 qp->sq.flushed = true; 85 } 86 if (!qp->srq) { 87 if (!qp->rq.flushed) { 88 dev_dbg(&rcq->hwq.pdev->dev, 89 "FP: Adding to RQ Flush list = %p\n", qp); 90 list_add_tail(&qp->rq_flush, &rcq->rqf_head); 91 qp->rq.flushed = true; 92 } 93 } 94 } 95 96 static void bnxt_qplib_acquire_cq_flush_locks(struct bnxt_qplib_qp *qp, 97 unsigned long *flags) 98 __acquires(&qp->scq->flush_lock) __acquires(&qp->rcq->flush_lock) 99 { 100 spin_lock_irqsave(&qp->scq->flush_lock, *flags); 101 if (qp->scq == qp->rcq) 102 __acquire(&qp->rcq->flush_lock); 103 else 104 spin_lock(&qp->rcq->flush_lock); 105 } 106 107 static void bnxt_qplib_release_cq_flush_locks(struct bnxt_qplib_qp *qp, 108 unsigned long *flags) 109 __releases(&qp->scq->flush_lock) __releases(&qp->rcq->flush_lock) 110 { 111 if (qp->scq == qp->rcq) 112 __release(&qp->rcq->flush_lock); 113 else 114 spin_unlock(&qp->rcq->flush_lock); 115 spin_unlock_irqrestore(&qp->scq->flush_lock, *flags); 116 } 117 118 void bnxt_qplib_add_flush_qp(struct bnxt_qplib_qp *qp) 119 { 120 unsigned long flags; 121 122 bnxt_qplib_acquire_cq_flush_locks(qp, &flags); 123 __bnxt_qplib_add_flush_qp(qp); 124 bnxt_qplib_release_cq_flush_locks(qp, &flags); 125 } 126 127 static void __bnxt_qplib_del_flush_qp(struct bnxt_qplib_qp *qp) 128 { 129 if (qp->sq.flushed) { 130 qp->sq.flushed = false; 131 list_del(&qp->sq_flush); 132 } 133 if (!qp->srq) { 134 if (qp->rq.flushed) { 135 qp->rq.flushed = false; 136 list_del(&qp->rq_flush); 137 } 138 } 139 } 140 141 void bnxt_qplib_clean_qp(struct bnxt_qplib_qp *qp) 142 { 143 unsigned long flags; 144 145 bnxt_qplib_acquire_cq_flush_locks(qp, &flags); 146 __clean_cq(qp->scq, (u64)(unsigned long)qp); 147 qp->sq.hwq.prod = 0; 148 qp->sq.hwq.cons = 0; 149 __clean_cq(qp->rcq, (u64)(unsigned long)qp); 150 qp->rq.hwq.prod = 0; 151 qp->rq.hwq.cons = 0; 152 153 __bnxt_qplib_del_flush_qp(qp); 154 bnxt_qplib_release_cq_flush_locks(qp, &flags); 155 } 156 157 static void bnxt_qpn_cqn_sched_task(struct work_struct *work) 158 { 159 struct bnxt_qplib_nq_work *nq_work = 160 container_of(work, struct bnxt_qplib_nq_work, work); 161 162 struct bnxt_qplib_cq *cq = nq_work->cq; 163 struct bnxt_qplib_nq *nq = nq_work->nq; 164 165 if (cq && nq) { 166 spin_lock_bh(&cq->compl_lock); 167 if (atomic_read(&cq->arm_state) && nq->cqn_handler) { 168 dev_dbg(&nq->pdev->dev, 169 "%s:Trigger cq = %p event nq = %p\n", 170 __func__, cq, nq); 171 nq->cqn_handler(nq, cq); 172 } 173 spin_unlock_bh(&cq->compl_lock); 174 } 175 kfree(nq_work); 176 } 177 178 static void bnxt_qplib_free_qp_hdr_buf(struct bnxt_qplib_res *res, 179 struct bnxt_qplib_qp *qp) 180 { 181 struct bnxt_qplib_q *rq = &qp->rq; 182 struct bnxt_qplib_q *sq = &qp->sq; 183 184 if (qp->rq_hdr_buf) 185 dma_free_coherent(&res->pdev->dev, 186 rq->max_wqe * qp->rq_hdr_buf_size, 187 qp->rq_hdr_buf, qp->rq_hdr_buf_map); 188 if (qp->sq_hdr_buf) 189 dma_free_coherent(&res->pdev->dev, 190 sq->max_wqe * qp->sq_hdr_buf_size, 191 qp->sq_hdr_buf, qp->sq_hdr_buf_map); 192 qp->rq_hdr_buf = NULL; 193 qp->sq_hdr_buf = NULL; 194 qp->rq_hdr_buf_map = 0; 195 qp->sq_hdr_buf_map = 0; 196 qp->sq_hdr_buf_size = 0; 197 qp->rq_hdr_buf_size = 0; 198 } 199 200 static int bnxt_qplib_alloc_qp_hdr_buf(struct bnxt_qplib_res *res, 201 struct bnxt_qplib_qp *qp) 202 { 203 struct bnxt_qplib_q *rq = &qp->rq; 204 struct bnxt_qplib_q *sq = &qp->sq; 205 int rc = 0; 206 207 if (qp->sq_hdr_buf_size && sq->max_wqe) { 208 qp->sq_hdr_buf = dma_alloc_coherent(&res->pdev->dev, 209 sq->max_wqe * qp->sq_hdr_buf_size, 210 &qp->sq_hdr_buf_map, GFP_KERNEL); 211 if (!qp->sq_hdr_buf) { 212 rc = -ENOMEM; 213 dev_err(&res->pdev->dev, 214 "Failed to create sq_hdr_buf\n"); 215 goto fail; 216 } 217 } 218 219 if (qp->rq_hdr_buf_size && rq->max_wqe) { 220 qp->rq_hdr_buf = dma_alloc_coherent(&res->pdev->dev, 221 rq->max_wqe * 222 qp->rq_hdr_buf_size, 223 &qp->rq_hdr_buf_map, 224 GFP_KERNEL); 225 if (!qp->rq_hdr_buf) { 226 rc = -ENOMEM; 227 dev_err(&res->pdev->dev, 228 "Failed to create rq_hdr_buf\n"); 229 goto fail; 230 } 231 } 232 return 0; 233 234 fail: 235 bnxt_qplib_free_qp_hdr_buf(res, qp); 236 return rc; 237 } 238 239 static void clean_nq(struct bnxt_qplib_nq *nq, struct bnxt_qplib_cq *cq) 240 { 241 struct bnxt_qplib_hwq *hwq = &nq->hwq; 242 struct nq_base *nqe, **nq_ptr; 243 int budget = nq->budget; 244 uintptr_t q_handle; 245 u16 type; 246 247 spin_lock_bh(&hwq->lock); 248 /* Service the NQ until empty */ 249 while (budget--) { 250 nq_ptr = (struct nq_base **)hwq->pbl_ptr; 251 nqe = &nq_ptr[NQE_PG(hwq->cons)][NQE_IDX(hwq->cons)]; 252 if (!NQE_CMP_VALID(nqe, nq->nq_db.dbinfo.flags)) 253 break; 254 255 /* 256 * The valid test of the entry must be done first before 257 * reading any further. 258 */ 259 dma_rmb(); 260 261 type = le16_to_cpu(nqe->info10_type) & NQ_BASE_TYPE_MASK; 262 switch (type) { 263 case NQ_BASE_TYPE_CQ_NOTIFICATION: 264 { 265 struct nq_cn *nqcne = (struct nq_cn *)nqe; 266 267 q_handle = le32_to_cpu(nqcne->cq_handle_low); 268 q_handle |= (u64)le32_to_cpu(nqcne->cq_handle_high) 269 << 32; 270 if ((unsigned long)cq == q_handle) { 271 nqcne->cq_handle_low = 0; 272 nqcne->cq_handle_high = 0; 273 cq->cnq_events++; 274 } 275 break; 276 } 277 default: 278 break; 279 } 280 bnxt_qplib_hwq_incr_cons(hwq->max_elements, &hwq->cons, 281 1, &nq->nq_db.dbinfo.flags); 282 } 283 spin_unlock_bh(&hwq->lock); 284 } 285 286 /* Wait for receiving all NQEs for this CQ and clean the NQEs associated with 287 * this CQ. 288 */ 289 static void __wait_for_all_nqes(struct bnxt_qplib_cq *cq, u16 cnq_events) 290 { 291 u32 retry_cnt = 100; 292 293 while (retry_cnt--) { 294 if (cnq_events == cq->cnq_events) 295 return; 296 usleep_range(50, 100); 297 clean_nq(cq->nq, cq); 298 } 299 } 300 301 static void bnxt_qplib_service_nq(struct tasklet_struct *t) 302 { 303 struct bnxt_qplib_nq *nq = from_tasklet(nq, t, nq_tasklet); 304 struct bnxt_qplib_hwq *hwq = &nq->hwq; 305 struct bnxt_qplib_cq *cq; 306 int budget = nq->budget; 307 struct nq_base *nqe; 308 uintptr_t q_handle; 309 u32 hw_polled = 0; 310 u16 type; 311 312 spin_lock_bh(&hwq->lock); 313 /* Service the NQ until empty */ 314 while (budget--) { 315 nqe = bnxt_qplib_get_qe(hwq, hwq->cons, NULL); 316 if (!NQE_CMP_VALID(nqe, nq->nq_db.dbinfo.flags)) 317 break; 318 319 /* 320 * The valid test of the entry must be done first before 321 * reading any further. 322 */ 323 dma_rmb(); 324 325 type = le16_to_cpu(nqe->info10_type) & NQ_BASE_TYPE_MASK; 326 switch (type) { 327 case NQ_BASE_TYPE_CQ_NOTIFICATION: 328 { 329 struct nq_cn *nqcne = (struct nq_cn *)nqe; 330 struct bnxt_re_cq *cq_p; 331 332 q_handle = le32_to_cpu(nqcne->cq_handle_low); 333 q_handle |= (u64)le32_to_cpu(nqcne->cq_handle_high) 334 << 32; 335 cq = (struct bnxt_qplib_cq *)(unsigned long)q_handle; 336 if (!cq) 337 break; 338 cq->toggle = (le16_to_cpu(nqe->info10_type) & 339 NQ_CN_TOGGLE_MASK) >> NQ_CN_TOGGLE_SFT; 340 cq->dbinfo.toggle = cq->toggle; 341 cq_p = container_of(cq, struct bnxt_re_cq, qplib_cq); 342 if (cq_p->uctx_cq_page) 343 *((u32 *)cq_p->uctx_cq_page) = cq->toggle; 344 345 bnxt_qplib_armen_db(&cq->dbinfo, 346 DBC_DBC_TYPE_CQ_ARMENA); 347 spin_lock_bh(&cq->compl_lock); 348 atomic_set(&cq->arm_state, 0); 349 if (nq->cqn_handler(nq, (cq))) 350 dev_warn(&nq->pdev->dev, 351 "cqn - type 0x%x not handled\n", type); 352 cq->cnq_events++; 353 spin_unlock_bh(&cq->compl_lock); 354 break; 355 } 356 case NQ_BASE_TYPE_SRQ_EVENT: 357 { 358 struct bnxt_qplib_srq *srq; 359 struct bnxt_re_srq *srq_p; 360 struct nq_srq_event *nqsrqe = 361 (struct nq_srq_event *)nqe; 362 363 q_handle = le32_to_cpu(nqsrqe->srq_handle_low); 364 q_handle |= (u64)le32_to_cpu(nqsrqe->srq_handle_high) 365 << 32; 366 srq = (struct bnxt_qplib_srq *)q_handle; 367 srq->toggle = (le16_to_cpu(nqe->info10_type) & NQ_CN_TOGGLE_MASK) 368 >> NQ_CN_TOGGLE_SFT; 369 srq->dbinfo.toggle = srq->toggle; 370 srq_p = container_of(srq, struct bnxt_re_srq, qplib_srq); 371 if (srq_p->uctx_srq_page) 372 *((u32 *)srq_p->uctx_srq_page) = srq->toggle; 373 bnxt_qplib_armen_db(&srq->dbinfo, 374 DBC_DBC_TYPE_SRQ_ARMENA); 375 if (nq->srqn_handler(nq, 376 (struct bnxt_qplib_srq *)q_handle, 377 nqsrqe->event)) 378 dev_warn(&nq->pdev->dev, 379 "SRQ event 0x%x not handled\n", 380 nqsrqe->event); 381 break; 382 } 383 case NQ_BASE_TYPE_DBQ_EVENT: 384 break; 385 default: 386 dev_warn(&nq->pdev->dev, 387 "nqe with type = 0x%x not handled\n", type); 388 break; 389 } 390 hw_polled++; 391 bnxt_qplib_hwq_incr_cons(hwq->max_elements, &hwq->cons, 392 1, &nq->nq_db.dbinfo.flags); 393 } 394 if (hw_polled) 395 bnxt_qplib_ring_nq_db(&nq->nq_db.dbinfo, nq->res->cctx, true); 396 spin_unlock_bh(&hwq->lock); 397 } 398 399 /* bnxt_re_synchronize_nq - self polling notification queue. 400 * @nq - notification queue pointer 401 * 402 * This function will start polling entries of a given notification queue 403 * for all pending entries. 404 * This function is useful to synchronize notification entries while resources 405 * are going away. 406 */ 407 408 void bnxt_re_synchronize_nq(struct bnxt_qplib_nq *nq) 409 { 410 int budget = nq->budget; 411 412 nq->budget = nq->hwq.max_elements; 413 bnxt_qplib_service_nq(&nq->nq_tasklet); 414 nq->budget = budget; 415 } 416 417 static irqreturn_t bnxt_qplib_nq_irq(int irq, void *dev_instance) 418 { 419 struct bnxt_qplib_nq *nq = dev_instance; 420 struct bnxt_qplib_hwq *hwq = &nq->hwq; 421 u32 sw_cons; 422 423 /* Prefetch the NQ element */ 424 sw_cons = HWQ_CMP(hwq->cons, hwq); 425 prefetch(bnxt_qplib_get_qe(hwq, sw_cons, NULL)); 426 427 /* Fan out to CPU affinitized kthreads? */ 428 tasklet_schedule(&nq->nq_tasklet); 429 430 return IRQ_HANDLED; 431 } 432 433 void bnxt_qplib_nq_stop_irq(struct bnxt_qplib_nq *nq, bool kill) 434 { 435 if (!nq->requested) 436 return; 437 438 nq->requested = false; 439 /* Mask h/w interrupt */ 440 bnxt_qplib_ring_nq_db(&nq->nq_db.dbinfo, nq->res->cctx, false); 441 /* Sync with last running IRQ handler */ 442 synchronize_irq(nq->msix_vec); 443 irq_set_affinity_hint(nq->msix_vec, NULL); 444 free_irq(nq->msix_vec, nq); 445 kfree(nq->name); 446 nq->name = NULL; 447 448 if (kill) 449 tasklet_kill(&nq->nq_tasklet); 450 tasklet_disable(&nq->nq_tasklet); 451 } 452 453 void bnxt_qplib_disable_nq(struct bnxt_qplib_nq *nq) 454 { 455 if (nq->cqn_wq) { 456 destroy_workqueue(nq->cqn_wq); 457 nq->cqn_wq = NULL; 458 } 459 460 /* Make sure the HW is stopped! */ 461 bnxt_qplib_nq_stop_irq(nq, true); 462 463 if (nq->nq_db.reg.bar_reg) { 464 iounmap(nq->nq_db.reg.bar_reg); 465 nq->nq_db.reg.bar_reg = NULL; 466 } 467 468 nq->cqn_handler = NULL; 469 nq->srqn_handler = NULL; 470 nq->msix_vec = 0; 471 } 472 473 int bnxt_qplib_nq_start_irq(struct bnxt_qplib_nq *nq, int nq_indx, 474 int msix_vector, bool need_init) 475 { 476 struct bnxt_qplib_res *res = nq->res; 477 int rc; 478 479 if (nq->requested) 480 return -EFAULT; 481 482 nq->msix_vec = msix_vector; 483 if (need_init) 484 tasklet_setup(&nq->nq_tasklet, bnxt_qplib_service_nq); 485 else 486 tasklet_enable(&nq->nq_tasklet); 487 488 nq->name = kasprintf(GFP_KERNEL, "bnxt_re-nq-%d@pci:%s", 489 nq_indx, pci_name(res->pdev)); 490 if (!nq->name) 491 return -ENOMEM; 492 rc = request_irq(nq->msix_vec, bnxt_qplib_nq_irq, 0, nq->name, nq); 493 if (rc) { 494 kfree(nq->name); 495 nq->name = NULL; 496 tasklet_disable(&nq->nq_tasklet); 497 return rc; 498 } 499 500 cpumask_clear(&nq->mask); 501 cpumask_set_cpu(nq_indx, &nq->mask); 502 rc = irq_set_affinity_hint(nq->msix_vec, &nq->mask); 503 if (rc) { 504 dev_warn(&nq->pdev->dev, 505 "set affinity failed; vector: %d nq_idx: %d\n", 506 nq->msix_vec, nq_indx); 507 } 508 nq->requested = true; 509 bnxt_qplib_ring_nq_db(&nq->nq_db.dbinfo, res->cctx, true); 510 511 return rc; 512 } 513 514 static int bnxt_qplib_map_nq_db(struct bnxt_qplib_nq *nq, u32 reg_offt) 515 { 516 resource_size_t reg_base; 517 struct bnxt_qplib_nq_db *nq_db; 518 struct pci_dev *pdev; 519 520 pdev = nq->pdev; 521 nq_db = &nq->nq_db; 522 523 nq_db->dbinfo.flags = 0; 524 nq_db->reg.bar_id = NQ_CONS_PCI_BAR_REGION; 525 nq_db->reg.bar_base = pci_resource_start(pdev, nq_db->reg.bar_id); 526 if (!nq_db->reg.bar_base) { 527 dev_err(&pdev->dev, "QPLIB: NQ BAR region %d resc start is 0!", 528 nq_db->reg.bar_id); 529 return -ENOMEM; 530 } 531 532 reg_base = nq_db->reg.bar_base + reg_offt; 533 /* Unconditionally map 8 bytes to support 57500 series */ 534 nq_db->reg.len = 8; 535 nq_db->reg.bar_reg = ioremap(reg_base, nq_db->reg.len); 536 if (!nq_db->reg.bar_reg) { 537 dev_err(&pdev->dev, "QPLIB: NQ BAR region %d mapping failed", 538 nq_db->reg.bar_id); 539 return -ENOMEM; 540 } 541 542 nq_db->dbinfo.db = nq_db->reg.bar_reg; 543 nq_db->dbinfo.hwq = &nq->hwq; 544 nq_db->dbinfo.xid = nq->ring_id; 545 546 return 0; 547 } 548 549 int bnxt_qplib_enable_nq(struct pci_dev *pdev, struct bnxt_qplib_nq *nq, 550 int nq_idx, int msix_vector, int bar_reg_offset, 551 cqn_handler_t cqn_handler, 552 srqn_handler_t srqn_handler) 553 { 554 int rc; 555 556 nq->pdev = pdev; 557 nq->cqn_handler = cqn_handler; 558 nq->srqn_handler = srqn_handler; 559 560 /* Have a task to schedule CQ notifiers in post send case */ 561 nq->cqn_wq = create_singlethread_workqueue("bnxt_qplib_nq"); 562 if (!nq->cqn_wq) 563 return -ENOMEM; 564 565 rc = bnxt_qplib_map_nq_db(nq, bar_reg_offset); 566 if (rc) 567 goto fail; 568 569 rc = bnxt_qplib_nq_start_irq(nq, nq_idx, msix_vector, true); 570 if (rc) { 571 dev_err(&nq->pdev->dev, 572 "Failed to request irq for nq-idx %d\n", nq_idx); 573 goto fail; 574 } 575 576 return 0; 577 fail: 578 bnxt_qplib_disable_nq(nq); 579 return rc; 580 } 581 582 void bnxt_qplib_free_nq(struct bnxt_qplib_nq *nq) 583 { 584 if (nq->hwq.max_elements) { 585 bnxt_qplib_free_hwq(nq->res, &nq->hwq); 586 nq->hwq.max_elements = 0; 587 } 588 } 589 590 int bnxt_qplib_alloc_nq(struct bnxt_qplib_res *res, struct bnxt_qplib_nq *nq) 591 { 592 struct bnxt_qplib_hwq_attr hwq_attr = {}; 593 struct bnxt_qplib_sg_info sginfo = {}; 594 595 nq->pdev = res->pdev; 596 nq->res = res; 597 if (!nq->hwq.max_elements || 598 nq->hwq.max_elements > BNXT_QPLIB_NQE_MAX_CNT) 599 nq->hwq.max_elements = BNXT_QPLIB_NQE_MAX_CNT; 600 601 sginfo.pgsize = PAGE_SIZE; 602 sginfo.pgshft = PAGE_SHIFT; 603 hwq_attr.res = res; 604 hwq_attr.sginfo = &sginfo; 605 hwq_attr.depth = nq->hwq.max_elements; 606 hwq_attr.stride = sizeof(struct nq_base); 607 hwq_attr.type = bnxt_qplib_get_hwq_type(nq->res); 608 if (bnxt_qplib_alloc_init_hwq(&nq->hwq, &hwq_attr)) { 609 dev_err(&nq->pdev->dev, "FP NQ allocation failed"); 610 return -ENOMEM; 611 } 612 nq->budget = 8; 613 return 0; 614 } 615 616 /* SRQ */ 617 void bnxt_qplib_destroy_srq(struct bnxt_qplib_res *res, 618 struct bnxt_qplib_srq *srq) 619 { 620 struct bnxt_qplib_rcfw *rcfw = res->rcfw; 621 struct creq_destroy_srq_resp resp = {}; 622 struct bnxt_qplib_cmdqmsg msg = {}; 623 struct cmdq_destroy_srq req = {}; 624 int rc; 625 626 bnxt_qplib_rcfw_cmd_prep((struct cmdq_base *)&req, 627 CMDQ_BASE_OPCODE_DESTROY_SRQ, 628 sizeof(req)); 629 630 /* Configure the request */ 631 req.srq_cid = cpu_to_le32(srq->id); 632 633 bnxt_qplib_fill_cmdqmsg(&msg, &req, &resp, NULL, sizeof(req), sizeof(resp), 0); 634 rc = bnxt_qplib_rcfw_send_message(rcfw, &msg); 635 kfree(srq->swq); 636 if (rc) 637 return; 638 bnxt_qplib_free_hwq(res, &srq->hwq); 639 } 640 641 int bnxt_qplib_create_srq(struct bnxt_qplib_res *res, 642 struct bnxt_qplib_srq *srq) 643 { 644 struct bnxt_qplib_rcfw *rcfw = res->rcfw; 645 struct bnxt_qplib_hwq_attr hwq_attr = {}; 646 struct creq_create_srq_resp resp = {}; 647 struct bnxt_qplib_cmdqmsg msg = {}; 648 struct cmdq_create_srq req = {}; 649 struct bnxt_qplib_pbl *pbl; 650 u16 pg_sz_lvl; 651 int rc, idx; 652 653 hwq_attr.res = res; 654 hwq_attr.sginfo = &srq->sg_info; 655 hwq_attr.depth = srq->max_wqe; 656 hwq_attr.stride = srq->wqe_size; 657 hwq_attr.type = HWQ_TYPE_QUEUE; 658 rc = bnxt_qplib_alloc_init_hwq(&srq->hwq, &hwq_attr); 659 if (rc) 660 return rc; 661 662 srq->swq = kcalloc(srq->hwq.max_elements, sizeof(*srq->swq), 663 GFP_KERNEL); 664 if (!srq->swq) { 665 rc = -ENOMEM; 666 goto fail; 667 } 668 srq->dbinfo.flags = 0; 669 bnxt_qplib_rcfw_cmd_prep((struct cmdq_base *)&req, 670 CMDQ_BASE_OPCODE_CREATE_SRQ, 671 sizeof(req)); 672 673 /* Configure the request */ 674 req.dpi = cpu_to_le32(srq->dpi->dpi); 675 req.srq_handle = cpu_to_le64((uintptr_t)srq); 676 677 req.srq_size = cpu_to_le16((u16)srq->hwq.max_elements); 678 pbl = &srq->hwq.pbl[PBL_LVL_0]; 679 pg_sz_lvl = ((u16)bnxt_qplib_base_pg_size(&srq->hwq) << 680 CMDQ_CREATE_SRQ_PG_SIZE_SFT); 681 pg_sz_lvl |= (srq->hwq.level & CMDQ_CREATE_SRQ_LVL_MASK) << 682 CMDQ_CREATE_SRQ_LVL_SFT; 683 req.pg_size_lvl = cpu_to_le16(pg_sz_lvl); 684 req.pbl = cpu_to_le64(pbl->pg_map_arr[0]); 685 req.pd_id = cpu_to_le32(srq->pd->id); 686 req.eventq_id = cpu_to_le16(srq->eventq_hw_ring_id); 687 688 bnxt_qplib_fill_cmdqmsg(&msg, &req, &resp, NULL, sizeof(req), sizeof(resp), 0); 689 rc = bnxt_qplib_rcfw_send_message(rcfw, &msg); 690 if (rc) 691 goto fail; 692 693 spin_lock_init(&srq->lock); 694 srq->start_idx = 0; 695 srq->last_idx = srq->hwq.max_elements - 1; 696 for (idx = 0; idx < srq->hwq.max_elements; idx++) 697 srq->swq[idx].next_idx = idx + 1; 698 srq->swq[srq->last_idx].next_idx = -1; 699 700 srq->id = le32_to_cpu(resp.xid); 701 srq->dbinfo.hwq = &srq->hwq; 702 srq->dbinfo.xid = srq->id; 703 srq->dbinfo.db = srq->dpi->dbr; 704 srq->dbinfo.max_slot = 1; 705 srq->dbinfo.priv_db = res->dpi_tbl.priv_db; 706 if (srq->threshold) 707 bnxt_qplib_armen_db(&srq->dbinfo, DBC_DBC_TYPE_SRQ_ARMENA); 708 srq->arm_req = false; 709 710 return 0; 711 fail: 712 bnxt_qplib_free_hwq(res, &srq->hwq); 713 kfree(srq->swq); 714 715 return rc; 716 } 717 718 int bnxt_qplib_modify_srq(struct bnxt_qplib_res *res, 719 struct bnxt_qplib_srq *srq) 720 { 721 struct bnxt_qplib_hwq *srq_hwq = &srq->hwq; 722 u32 count; 723 724 count = __bnxt_qplib_get_avail(srq_hwq); 725 if (count > srq->threshold) { 726 srq->arm_req = false; 727 bnxt_qplib_srq_arm_db(&srq->dbinfo, srq->threshold); 728 } else { 729 /* Deferred arming */ 730 srq->arm_req = true; 731 } 732 733 return 0; 734 } 735 736 int bnxt_qplib_query_srq(struct bnxt_qplib_res *res, 737 struct bnxt_qplib_srq *srq) 738 { 739 struct bnxt_qplib_rcfw *rcfw = res->rcfw; 740 struct creq_query_srq_resp resp = {}; 741 struct bnxt_qplib_cmdqmsg msg = {}; 742 struct bnxt_qplib_rcfw_sbuf sbuf; 743 struct creq_query_srq_resp_sb *sb; 744 struct cmdq_query_srq req = {}; 745 int rc; 746 747 bnxt_qplib_rcfw_cmd_prep((struct cmdq_base *)&req, 748 CMDQ_BASE_OPCODE_QUERY_SRQ, 749 sizeof(req)); 750 751 /* Configure the request */ 752 sbuf.size = ALIGN(sizeof(*sb), BNXT_QPLIB_CMDQE_UNITS); 753 sbuf.sb = dma_alloc_coherent(&rcfw->pdev->dev, sbuf.size, 754 &sbuf.dma_addr, GFP_KERNEL); 755 if (!sbuf.sb) 756 return -ENOMEM; 757 req.resp_size = sbuf.size / BNXT_QPLIB_CMDQE_UNITS; 758 req.srq_cid = cpu_to_le32(srq->id); 759 sb = sbuf.sb; 760 bnxt_qplib_fill_cmdqmsg(&msg, &req, &resp, &sbuf, sizeof(req), 761 sizeof(resp), 0); 762 rc = bnxt_qplib_rcfw_send_message(rcfw, &msg); 763 if (!rc) 764 srq->threshold = le16_to_cpu(sb->srq_limit); 765 dma_free_coherent(&rcfw->pdev->dev, sbuf.size, 766 sbuf.sb, sbuf.dma_addr); 767 768 return rc; 769 } 770 771 int bnxt_qplib_post_srq_recv(struct bnxt_qplib_srq *srq, 772 struct bnxt_qplib_swqe *wqe) 773 { 774 struct bnxt_qplib_hwq *srq_hwq = &srq->hwq; 775 struct rq_wqe *srqe; 776 struct sq_sge *hw_sge; 777 u32 count = 0; 778 int i, next; 779 780 spin_lock(&srq_hwq->lock); 781 if (srq->start_idx == srq->last_idx) { 782 dev_err(&srq_hwq->pdev->dev, 783 "FP: SRQ (0x%x) is full!\n", srq->id); 784 spin_unlock(&srq_hwq->lock); 785 return -EINVAL; 786 } 787 next = srq->start_idx; 788 srq->start_idx = srq->swq[next].next_idx; 789 spin_unlock(&srq_hwq->lock); 790 791 srqe = bnxt_qplib_get_qe(srq_hwq, srq_hwq->prod, NULL); 792 memset(srqe, 0, srq->wqe_size); 793 /* Calculate wqe_size16 and data_len */ 794 for (i = 0, hw_sge = (struct sq_sge *)srqe->data; 795 i < wqe->num_sge; i++, hw_sge++) { 796 hw_sge->va_or_pa = cpu_to_le64(wqe->sg_list[i].addr); 797 hw_sge->l_key = cpu_to_le32(wqe->sg_list[i].lkey); 798 hw_sge->size = cpu_to_le32(wqe->sg_list[i].size); 799 } 800 srqe->wqe_type = wqe->type; 801 srqe->flags = wqe->flags; 802 srqe->wqe_size = wqe->num_sge + 803 ((offsetof(typeof(*srqe), data) + 15) >> 4); 804 srqe->wr_id[0] = cpu_to_le32((u32)next); 805 srq->swq[next].wr_id = wqe->wr_id; 806 807 bnxt_qplib_hwq_incr_prod(&srq->dbinfo, srq_hwq, srq->dbinfo.max_slot); 808 809 spin_lock(&srq_hwq->lock); 810 count = __bnxt_qplib_get_avail(srq_hwq); 811 spin_unlock(&srq_hwq->lock); 812 /* Ring DB */ 813 bnxt_qplib_ring_prod_db(&srq->dbinfo, DBC_DBC_TYPE_SRQ); 814 if (srq->arm_req == true && count > srq->threshold) { 815 srq->arm_req = false; 816 bnxt_qplib_srq_arm_db(&srq->dbinfo, srq->threshold); 817 } 818 819 return 0; 820 } 821 822 /* QP */ 823 824 static int bnxt_qplib_alloc_init_swq(struct bnxt_qplib_q *que) 825 { 826 int indx; 827 828 que->swq = kcalloc(que->max_sw_wqe, sizeof(*que->swq), GFP_KERNEL); 829 if (!que->swq) 830 return -ENOMEM; 831 832 que->swq_start = 0; 833 que->swq_last = que->max_sw_wqe - 1; 834 for (indx = 0; indx < que->max_sw_wqe; indx++) 835 que->swq[indx].next_idx = indx + 1; 836 que->swq[que->swq_last].next_idx = 0; /* Make it circular */ 837 que->swq_last = 0; 838 839 return 0; 840 } 841 842 int bnxt_qplib_create_qp1(struct bnxt_qplib_res *res, struct bnxt_qplib_qp *qp) 843 { 844 struct bnxt_qplib_hwq_attr hwq_attr = {}; 845 struct bnxt_qplib_rcfw *rcfw = res->rcfw; 846 struct creq_create_qp1_resp resp = {}; 847 struct bnxt_qplib_cmdqmsg msg = {}; 848 struct bnxt_qplib_q *sq = &qp->sq; 849 struct bnxt_qplib_q *rq = &qp->rq; 850 struct cmdq_create_qp1 req = {}; 851 struct bnxt_qplib_pbl *pbl; 852 u32 qp_flags = 0; 853 u8 pg_sz_lvl; 854 u32 tbl_indx; 855 int rc; 856 857 sq->dbinfo.flags = 0; 858 bnxt_qplib_rcfw_cmd_prep((struct cmdq_base *)&req, 859 CMDQ_BASE_OPCODE_CREATE_QP1, 860 sizeof(req)); 861 /* General */ 862 req.type = qp->type; 863 req.dpi = cpu_to_le32(qp->dpi->dpi); 864 req.qp_handle = cpu_to_le64(qp->qp_handle); 865 866 /* SQ */ 867 hwq_attr.res = res; 868 hwq_attr.sginfo = &sq->sg_info; 869 hwq_attr.stride = sizeof(struct sq_sge); 870 hwq_attr.depth = bnxt_qplib_get_depth(sq, qp->wqe_mode, false); 871 hwq_attr.type = HWQ_TYPE_QUEUE; 872 rc = bnxt_qplib_alloc_init_hwq(&sq->hwq, &hwq_attr); 873 if (rc) 874 return rc; 875 876 rc = bnxt_qplib_alloc_init_swq(sq); 877 if (rc) 878 goto fail_sq; 879 880 req.sq_size = cpu_to_le32(bnxt_qplib_set_sq_size(sq, qp->wqe_mode)); 881 pbl = &sq->hwq.pbl[PBL_LVL_0]; 882 req.sq_pbl = cpu_to_le64(pbl->pg_map_arr[0]); 883 pg_sz_lvl = (bnxt_qplib_base_pg_size(&sq->hwq) << 884 CMDQ_CREATE_QP1_SQ_PG_SIZE_SFT); 885 pg_sz_lvl |= (sq->hwq.level & CMDQ_CREATE_QP1_SQ_LVL_MASK); 886 req.sq_pg_size_sq_lvl = pg_sz_lvl; 887 req.sq_fwo_sq_sge = 888 cpu_to_le16((sq->max_sge & CMDQ_CREATE_QP1_SQ_SGE_MASK) << 889 CMDQ_CREATE_QP1_SQ_SGE_SFT); 890 req.scq_cid = cpu_to_le32(qp->scq->id); 891 892 /* RQ */ 893 if (rq->max_wqe) { 894 rq->dbinfo.flags = 0; 895 hwq_attr.res = res; 896 hwq_attr.sginfo = &rq->sg_info; 897 hwq_attr.stride = sizeof(struct sq_sge); 898 hwq_attr.depth = bnxt_qplib_get_depth(rq, qp->wqe_mode, false); 899 hwq_attr.type = HWQ_TYPE_QUEUE; 900 rc = bnxt_qplib_alloc_init_hwq(&rq->hwq, &hwq_attr); 901 if (rc) 902 goto sq_swq; 903 rc = bnxt_qplib_alloc_init_swq(rq); 904 if (rc) 905 goto fail_rq; 906 req.rq_size = cpu_to_le32(rq->max_wqe); 907 pbl = &rq->hwq.pbl[PBL_LVL_0]; 908 req.rq_pbl = cpu_to_le64(pbl->pg_map_arr[0]); 909 pg_sz_lvl = (bnxt_qplib_base_pg_size(&rq->hwq) << 910 CMDQ_CREATE_QP1_RQ_PG_SIZE_SFT); 911 pg_sz_lvl |= (rq->hwq.level & CMDQ_CREATE_QP1_RQ_LVL_MASK); 912 req.rq_pg_size_rq_lvl = pg_sz_lvl; 913 req.rq_fwo_rq_sge = 914 cpu_to_le16((rq->max_sge & 915 CMDQ_CREATE_QP1_RQ_SGE_MASK) << 916 CMDQ_CREATE_QP1_RQ_SGE_SFT); 917 } 918 req.rcq_cid = cpu_to_le32(qp->rcq->id); 919 /* Header buffer - allow hdr_buf pass in */ 920 rc = bnxt_qplib_alloc_qp_hdr_buf(res, qp); 921 if (rc) { 922 rc = -ENOMEM; 923 goto rq_rwq; 924 } 925 qp_flags |= CMDQ_CREATE_QP1_QP_FLAGS_RESERVED_LKEY_ENABLE; 926 req.qp_flags = cpu_to_le32(qp_flags); 927 req.pd_id = cpu_to_le32(qp->pd->id); 928 929 bnxt_qplib_fill_cmdqmsg(&msg, &req, &resp, NULL, sizeof(req), sizeof(resp), 0); 930 rc = bnxt_qplib_rcfw_send_message(rcfw, &msg); 931 if (rc) 932 goto fail; 933 934 qp->id = le32_to_cpu(resp.xid); 935 qp->cur_qp_state = CMDQ_MODIFY_QP_NEW_STATE_RESET; 936 qp->cctx = res->cctx; 937 sq->dbinfo.hwq = &sq->hwq; 938 sq->dbinfo.xid = qp->id; 939 sq->dbinfo.db = qp->dpi->dbr; 940 sq->dbinfo.max_slot = bnxt_qplib_set_sq_max_slot(qp->wqe_mode); 941 if (rq->max_wqe) { 942 rq->dbinfo.hwq = &rq->hwq; 943 rq->dbinfo.xid = qp->id; 944 rq->dbinfo.db = qp->dpi->dbr; 945 rq->dbinfo.max_slot = bnxt_qplib_set_rq_max_slot(rq->wqe_size); 946 } 947 tbl_indx = map_qp_id_to_tbl_indx(qp->id, rcfw); 948 rcfw->qp_tbl[tbl_indx].qp_id = qp->id; 949 rcfw->qp_tbl[tbl_indx].qp_handle = (void *)qp; 950 951 return 0; 952 953 fail: 954 bnxt_qplib_free_qp_hdr_buf(res, qp); 955 rq_rwq: 956 kfree(rq->swq); 957 fail_rq: 958 bnxt_qplib_free_hwq(res, &rq->hwq); 959 sq_swq: 960 kfree(sq->swq); 961 fail_sq: 962 bnxt_qplib_free_hwq(res, &sq->hwq); 963 return rc; 964 } 965 966 static void bnxt_qplib_init_psn_ptr(struct bnxt_qplib_qp *qp, int size) 967 { 968 struct bnxt_qplib_hwq *hwq; 969 struct bnxt_qplib_q *sq; 970 u64 fpsne, psn_pg; 971 u16 indx_pad = 0; 972 973 sq = &qp->sq; 974 hwq = &sq->hwq; 975 /* First psn entry */ 976 fpsne = (u64)bnxt_qplib_get_qe(hwq, hwq->depth, &psn_pg); 977 if (!IS_ALIGNED(fpsne, PAGE_SIZE)) 978 indx_pad = (fpsne & ~PAGE_MASK) / size; 979 hwq->pad_pgofft = indx_pad; 980 hwq->pad_pg = (u64 *)psn_pg; 981 hwq->pad_stride = size; 982 } 983 984 int bnxt_qplib_create_qp(struct bnxt_qplib_res *res, struct bnxt_qplib_qp *qp) 985 { 986 struct bnxt_qplib_rcfw *rcfw = res->rcfw; 987 struct bnxt_qplib_hwq_attr hwq_attr = {}; 988 struct bnxt_qplib_sg_info sginfo = {}; 989 struct creq_create_qp_resp resp = {}; 990 struct bnxt_qplib_cmdqmsg msg = {}; 991 struct bnxt_qplib_q *sq = &qp->sq; 992 struct bnxt_qplib_q *rq = &qp->rq; 993 struct cmdq_create_qp req = {}; 994 int rc, req_size, psn_sz = 0; 995 struct bnxt_qplib_hwq *xrrq; 996 struct bnxt_qplib_pbl *pbl; 997 u32 qp_flags = 0; 998 u8 pg_sz_lvl; 999 u32 tbl_indx; 1000 u16 nsge; 1001 1002 if (res->dattr) 1003 qp->is_host_msn_tbl = _is_host_msn_table(res->dattr->dev_cap_flags2); 1004 1005 sq->dbinfo.flags = 0; 1006 bnxt_qplib_rcfw_cmd_prep((struct cmdq_base *)&req, 1007 CMDQ_BASE_OPCODE_CREATE_QP, 1008 sizeof(req)); 1009 1010 /* General */ 1011 req.type = qp->type; 1012 req.dpi = cpu_to_le32(qp->dpi->dpi); 1013 req.qp_handle = cpu_to_le64(qp->qp_handle); 1014 1015 /* SQ */ 1016 if (qp->type == CMDQ_CREATE_QP_TYPE_RC) { 1017 psn_sz = bnxt_qplib_is_chip_gen_p5_p7(res->cctx) ? 1018 sizeof(struct sq_psn_search_ext) : 1019 sizeof(struct sq_psn_search); 1020 1021 if (qp->is_host_msn_tbl) { 1022 psn_sz = sizeof(struct sq_msn_search); 1023 qp->msn = 0; 1024 } 1025 } 1026 1027 hwq_attr.res = res; 1028 hwq_attr.sginfo = &sq->sg_info; 1029 hwq_attr.stride = sizeof(struct sq_sge); 1030 hwq_attr.depth = bnxt_qplib_get_depth(sq, qp->wqe_mode, true); 1031 hwq_attr.aux_stride = psn_sz; 1032 hwq_attr.aux_depth = psn_sz ? bnxt_qplib_set_sq_size(sq, qp->wqe_mode) 1033 : 0; 1034 /* Update msn tbl size */ 1035 if (qp->is_host_msn_tbl && psn_sz) { 1036 hwq_attr.aux_depth = roundup_pow_of_two(bnxt_qplib_set_sq_size(sq, qp->wqe_mode)); 1037 qp->msn_tbl_sz = hwq_attr.aux_depth; 1038 qp->msn = 0; 1039 } 1040 1041 hwq_attr.type = HWQ_TYPE_QUEUE; 1042 rc = bnxt_qplib_alloc_init_hwq(&sq->hwq, &hwq_attr); 1043 if (rc) 1044 return rc; 1045 1046 rc = bnxt_qplib_alloc_init_swq(sq); 1047 if (rc) 1048 goto fail_sq; 1049 1050 if (psn_sz) 1051 bnxt_qplib_init_psn_ptr(qp, psn_sz); 1052 1053 req.sq_size = cpu_to_le32(bnxt_qplib_set_sq_size(sq, qp->wqe_mode)); 1054 pbl = &sq->hwq.pbl[PBL_LVL_0]; 1055 req.sq_pbl = cpu_to_le64(pbl->pg_map_arr[0]); 1056 pg_sz_lvl = (bnxt_qplib_base_pg_size(&sq->hwq) << 1057 CMDQ_CREATE_QP_SQ_PG_SIZE_SFT); 1058 pg_sz_lvl |= (sq->hwq.level & CMDQ_CREATE_QP_SQ_LVL_MASK); 1059 req.sq_pg_size_sq_lvl = pg_sz_lvl; 1060 req.sq_fwo_sq_sge = 1061 cpu_to_le16(((sq->max_sge & CMDQ_CREATE_QP_SQ_SGE_MASK) << 1062 CMDQ_CREATE_QP_SQ_SGE_SFT) | 0); 1063 req.scq_cid = cpu_to_le32(qp->scq->id); 1064 1065 /* RQ */ 1066 if (!qp->srq) { 1067 rq->dbinfo.flags = 0; 1068 hwq_attr.res = res; 1069 hwq_attr.sginfo = &rq->sg_info; 1070 hwq_attr.stride = sizeof(struct sq_sge); 1071 hwq_attr.depth = bnxt_qplib_get_depth(rq, qp->wqe_mode, false); 1072 hwq_attr.aux_stride = 0; 1073 hwq_attr.aux_depth = 0; 1074 hwq_attr.type = HWQ_TYPE_QUEUE; 1075 rc = bnxt_qplib_alloc_init_hwq(&rq->hwq, &hwq_attr); 1076 if (rc) 1077 goto sq_swq; 1078 rc = bnxt_qplib_alloc_init_swq(rq); 1079 if (rc) 1080 goto fail_rq; 1081 1082 req.rq_size = cpu_to_le32(rq->max_wqe); 1083 pbl = &rq->hwq.pbl[PBL_LVL_0]; 1084 req.rq_pbl = cpu_to_le64(pbl->pg_map_arr[0]); 1085 pg_sz_lvl = (bnxt_qplib_base_pg_size(&rq->hwq) << 1086 CMDQ_CREATE_QP_RQ_PG_SIZE_SFT); 1087 pg_sz_lvl |= (rq->hwq.level & CMDQ_CREATE_QP_RQ_LVL_MASK); 1088 req.rq_pg_size_rq_lvl = pg_sz_lvl; 1089 nsge = (qp->wqe_mode == BNXT_QPLIB_WQE_MODE_STATIC) ? 1090 6 : rq->max_sge; 1091 req.rq_fwo_rq_sge = 1092 cpu_to_le16(((nsge & 1093 CMDQ_CREATE_QP_RQ_SGE_MASK) << 1094 CMDQ_CREATE_QP_RQ_SGE_SFT) | 0); 1095 } else { 1096 /* SRQ */ 1097 qp_flags |= CMDQ_CREATE_QP_QP_FLAGS_SRQ_USED; 1098 req.srq_cid = cpu_to_le32(qp->srq->id); 1099 } 1100 req.rcq_cid = cpu_to_le32(qp->rcq->id); 1101 1102 qp_flags |= CMDQ_CREATE_QP_QP_FLAGS_RESERVED_LKEY_ENABLE; 1103 qp_flags |= CMDQ_CREATE_QP_QP_FLAGS_FR_PMR_ENABLED; 1104 if (qp->sig_type) 1105 qp_flags |= CMDQ_CREATE_QP_QP_FLAGS_FORCE_COMPLETION; 1106 if (qp->wqe_mode == BNXT_QPLIB_WQE_MODE_VARIABLE) 1107 qp_flags |= CMDQ_CREATE_QP_QP_FLAGS_VARIABLE_SIZED_WQE_ENABLED; 1108 if (_is_ext_stats_supported(res->dattr->dev_cap_flags) && !res->is_vf) 1109 qp_flags |= CMDQ_CREATE_QP_QP_FLAGS_EXT_STATS_ENABLED; 1110 1111 req.qp_flags = cpu_to_le32(qp_flags); 1112 1113 /* ORRQ and IRRQ */ 1114 if (psn_sz) { 1115 xrrq = &qp->orrq; 1116 xrrq->max_elements = 1117 ORD_LIMIT_TO_ORRQ_SLOTS(qp->max_rd_atomic); 1118 req_size = xrrq->max_elements * 1119 BNXT_QPLIB_MAX_ORRQE_ENTRY_SIZE + PAGE_SIZE - 1; 1120 req_size &= ~(PAGE_SIZE - 1); 1121 sginfo.pgsize = req_size; 1122 sginfo.pgshft = PAGE_SHIFT; 1123 1124 hwq_attr.res = res; 1125 hwq_attr.sginfo = &sginfo; 1126 hwq_attr.depth = xrrq->max_elements; 1127 hwq_attr.stride = BNXT_QPLIB_MAX_ORRQE_ENTRY_SIZE; 1128 hwq_attr.aux_stride = 0; 1129 hwq_attr.aux_depth = 0; 1130 hwq_attr.type = HWQ_TYPE_CTX; 1131 rc = bnxt_qplib_alloc_init_hwq(xrrq, &hwq_attr); 1132 if (rc) 1133 goto rq_swq; 1134 pbl = &xrrq->pbl[PBL_LVL_0]; 1135 req.orrq_addr = cpu_to_le64(pbl->pg_map_arr[0]); 1136 1137 xrrq = &qp->irrq; 1138 xrrq->max_elements = IRD_LIMIT_TO_IRRQ_SLOTS( 1139 qp->max_dest_rd_atomic); 1140 req_size = xrrq->max_elements * 1141 BNXT_QPLIB_MAX_IRRQE_ENTRY_SIZE + PAGE_SIZE - 1; 1142 req_size &= ~(PAGE_SIZE - 1); 1143 sginfo.pgsize = req_size; 1144 hwq_attr.depth = xrrq->max_elements; 1145 hwq_attr.stride = BNXT_QPLIB_MAX_IRRQE_ENTRY_SIZE; 1146 rc = bnxt_qplib_alloc_init_hwq(xrrq, &hwq_attr); 1147 if (rc) 1148 goto fail_orrq; 1149 1150 pbl = &xrrq->pbl[PBL_LVL_0]; 1151 req.irrq_addr = cpu_to_le64(pbl->pg_map_arr[0]); 1152 } 1153 req.pd_id = cpu_to_le32(qp->pd->id); 1154 1155 bnxt_qplib_fill_cmdqmsg(&msg, &req, &resp, NULL, sizeof(req), 1156 sizeof(resp), 0); 1157 rc = bnxt_qplib_rcfw_send_message(rcfw, &msg); 1158 if (rc) 1159 goto fail; 1160 1161 qp->id = le32_to_cpu(resp.xid); 1162 qp->cur_qp_state = CMDQ_MODIFY_QP_NEW_STATE_RESET; 1163 INIT_LIST_HEAD(&qp->sq_flush); 1164 INIT_LIST_HEAD(&qp->rq_flush); 1165 qp->cctx = res->cctx; 1166 sq->dbinfo.hwq = &sq->hwq; 1167 sq->dbinfo.xid = qp->id; 1168 sq->dbinfo.db = qp->dpi->dbr; 1169 sq->dbinfo.max_slot = bnxt_qplib_set_sq_max_slot(qp->wqe_mode); 1170 if (rq->max_wqe) { 1171 rq->dbinfo.hwq = &rq->hwq; 1172 rq->dbinfo.xid = qp->id; 1173 rq->dbinfo.db = qp->dpi->dbr; 1174 rq->dbinfo.max_slot = bnxt_qplib_set_rq_max_slot(rq->wqe_size); 1175 } 1176 tbl_indx = map_qp_id_to_tbl_indx(qp->id, rcfw); 1177 rcfw->qp_tbl[tbl_indx].qp_id = qp->id; 1178 rcfw->qp_tbl[tbl_indx].qp_handle = (void *)qp; 1179 1180 return 0; 1181 fail: 1182 bnxt_qplib_free_hwq(res, &qp->irrq); 1183 fail_orrq: 1184 bnxt_qplib_free_hwq(res, &qp->orrq); 1185 rq_swq: 1186 kfree(rq->swq); 1187 fail_rq: 1188 bnxt_qplib_free_hwq(res, &rq->hwq); 1189 sq_swq: 1190 kfree(sq->swq); 1191 fail_sq: 1192 bnxt_qplib_free_hwq(res, &sq->hwq); 1193 return rc; 1194 } 1195 1196 static void __modify_flags_from_init_state(struct bnxt_qplib_qp *qp) 1197 { 1198 switch (qp->state) { 1199 case CMDQ_MODIFY_QP_NEW_STATE_RTR: 1200 /* INIT->RTR, configure the path_mtu to the default 1201 * 2048 if not being requested 1202 */ 1203 if (!(qp->modify_flags & 1204 CMDQ_MODIFY_QP_MODIFY_MASK_PATH_MTU)) { 1205 qp->modify_flags |= 1206 CMDQ_MODIFY_QP_MODIFY_MASK_PATH_MTU; 1207 qp->path_mtu = 1208 CMDQ_MODIFY_QP_PATH_MTU_MTU_2048; 1209 } 1210 qp->modify_flags &= 1211 ~CMDQ_MODIFY_QP_MODIFY_MASK_VLAN_ID; 1212 /* Bono FW require the max_dest_rd_atomic to be >= 1 */ 1213 if (qp->max_dest_rd_atomic < 1) 1214 qp->max_dest_rd_atomic = 1; 1215 qp->modify_flags &= ~CMDQ_MODIFY_QP_MODIFY_MASK_SRC_MAC; 1216 /* Bono FW 20.6.5 requires SGID_INDEX configuration */ 1217 if (!(qp->modify_flags & 1218 CMDQ_MODIFY_QP_MODIFY_MASK_SGID_INDEX)) { 1219 qp->modify_flags |= 1220 CMDQ_MODIFY_QP_MODIFY_MASK_SGID_INDEX; 1221 qp->ah.sgid_index = 0; 1222 } 1223 break; 1224 default: 1225 break; 1226 } 1227 } 1228 1229 static void __modify_flags_from_rtr_state(struct bnxt_qplib_qp *qp) 1230 { 1231 switch (qp->state) { 1232 case CMDQ_MODIFY_QP_NEW_STATE_RTS: 1233 /* Bono FW requires the max_rd_atomic to be >= 1 */ 1234 if (qp->max_rd_atomic < 1) 1235 qp->max_rd_atomic = 1; 1236 /* Bono FW does not allow PKEY_INDEX, 1237 * DGID, FLOW_LABEL, SGID_INDEX, HOP_LIMIT, 1238 * TRAFFIC_CLASS, DEST_MAC, PATH_MTU, RQ_PSN, 1239 * MIN_RNR_TIMER, MAX_DEST_RD_ATOMIC, DEST_QP_ID 1240 * modification 1241 */ 1242 qp->modify_flags &= 1243 ~(CMDQ_MODIFY_QP_MODIFY_MASK_PKEY | 1244 CMDQ_MODIFY_QP_MODIFY_MASK_DGID | 1245 CMDQ_MODIFY_QP_MODIFY_MASK_FLOW_LABEL | 1246 CMDQ_MODIFY_QP_MODIFY_MASK_SGID_INDEX | 1247 CMDQ_MODIFY_QP_MODIFY_MASK_HOP_LIMIT | 1248 CMDQ_MODIFY_QP_MODIFY_MASK_TRAFFIC_CLASS | 1249 CMDQ_MODIFY_QP_MODIFY_MASK_DEST_MAC | 1250 CMDQ_MODIFY_QP_MODIFY_MASK_PATH_MTU | 1251 CMDQ_MODIFY_QP_MODIFY_MASK_RQ_PSN | 1252 CMDQ_MODIFY_QP_MODIFY_MASK_MIN_RNR_TIMER | 1253 CMDQ_MODIFY_QP_MODIFY_MASK_MAX_DEST_RD_ATOMIC | 1254 CMDQ_MODIFY_QP_MODIFY_MASK_DEST_QP_ID); 1255 break; 1256 default: 1257 break; 1258 } 1259 } 1260 1261 static void __filter_modify_flags(struct bnxt_qplib_qp *qp) 1262 { 1263 switch (qp->cur_qp_state) { 1264 case CMDQ_MODIFY_QP_NEW_STATE_RESET: 1265 break; 1266 case CMDQ_MODIFY_QP_NEW_STATE_INIT: 1267 __modify_flags_from_init_state(qp); 1268 break; 1269 case CMDQ_MODIFY_QP_NEW_STATE_RTR: 1270 __modify_flags_from_rtr_state(qp); 1271 break; 1272 case CMDQ_MODIFY_QP_NEW_STATE_RTS: 1273 break; 1274 case CMDQ_MODIFY_QP_NEW_STATE_SQD: 1275 break; 1276 case CMDQ_MODIFY_QP_NEW_STATE_SQE: 1277 break; 1278 case CMDQ_MODIFY_QP_NEW_STATE_ERR: 1279 break; 1280 default: 1281 break; 1282 } 1283 } 1284 1285 int bnxt_qplib_modify_qp(struct bnxt_qplib_res *res, struct bnxt_qplib_qp *qp) 1286 { 1287 struct bnxt_qplib_rcfw *rcfw = res->rcfw; 1288 struct creq_modify_qp_resp resp = {}; 1289 struct bnxt_qplib_cmdqmsg msg = {}; 1290 struct cmdq_modify_qp req = {}; 1291 u32 temp32[4]; 1292 u32 bmask; 1293 int rc; 1294 1295 bnxt_qplib_rcfw_cmd_prep((struct cmdq_base *)&req, 1296 CMDQ_BASE_OPCODE_MODIFY_QP, 1297 sizeof(req)); 1298 1299 /* Filter out the qp_attr_mask based on the state->new transition */ 1300 __filter_modify_flags(qp); 1301 bmask = qp->modify_flags; 1302 req.modify_mask = cpu_to_le32(qp->modify_flags); 1303 req.qp_cid = cpu_to_le32(qp->id); 1304 if (bmask & CMDQ_MODIFY_QP_MODIFY_MASK_STATE) { 1305 req.network_type_en_sqd_async_notify_new_state = 1306 (qp->state & CMDQ_MODIFY_QP_NEW_STATE_MASK) | 1307 (qp->en_sqd_async_notify ? 1308 CMDQ_MODIFY_QP_EN_SQD_ASYNC_NOTIFY : 0); 1309 } 1310 req.network_type_en_sqd_async_notify_new_state |= qp->nw_type; 1311 1312 if (bmask & CMDQ_MODIFY_QP_MODIFY_MASK_ACCESS) 1313 req.access = qp->access; 1314 1315 if (bmask & CMDQ_MODIFY_QP_MODIFY_MASK_PKEY) 1316 req.pkey = cpu_to_le16(IB_DEFAULT_PKEY_FULL); 1317 1318 if (bmask & CMDQ_MODIFY_QP_MODIFY_MASK_QKEY) 1319 req.qkey = cpu_to_le32(qp->qkey); 1320 1321 if (bmask & CMDQ_MODIFY_QP_MODIFY_MASK_DGID) { 1322 memcpy(temp32, qp->ah.dgid.data, sizeof(struct bnxt_qplib_gid)); 1323 req.dgid[0] = cpu_to_le32(temp32[0]); 1324 req.dgid[1] = cpu_to_le32(temp32[1]); 1325 req.dgid[2] = cpu_to_le32(temp32[2]); 1326 req.dgid[3] = cpu_to_le32(temp32[3]); 1327 } 1328 if (bmask & CMDQ_MODIFY_QP_MODIFY_MASK_FLOW_LABEL) 1329 req.flow_label = cpu_to_le32(qp->ah.flow_label); 1330 1331 if (bmask & CMDQ_MODIFY_QP_MODIFY_MASK_SGID_INDEX) 1332 req.sgid_index = cpu_to_le16(res->sgid_tbl.hw_id 1333 [qp->ah.sgid_index]); 1334 1335 if (bmask & CMDQ_MODIFY_QP_MODIFY_MASK_HOP_LIMIT) 1336 req.hop_limit = qp->ah.hop_limit; 1337 1338 if (bmask & CMDQ_MODIFY_QP_MODIFY_MASK_TRAFFIC_CLASS) 1339 req.traffic_class = qp->ah.traffic_class; 1340 1341 if (bmask & CMDQ_MODIFY_QP_MODIFY_MASK_DEST_MAC) 1342 memcpy(req.dest_mac, qp->ah.dmac, 6); 1343 1344 if (bmask & CMDQ_MODIFY_QP_MODIFY_MASK_PATH_MTU) 1345 req.path_mtu_pingpong_push_enable |= qp->path_mtu; 1346 1347 if (bmask & CMDQ_MODIFY_QP_MODIFY_MASK_TIMEOUT) 1348 req.timeout = qp->timeout; 1349 1350 if (bmask & CMDQ_MODIFY_QP_MODIFY_MASK_RETRY_CNT) 1351 req.retry_cnt = qp->retry_cnt; 1352 1353 if (bmask & CMDQ_MODIFY_QP_MODIFY_MASK_RNR_RETRY) 1354 req.rnr_retry = qp->rnr_retry; 1355 1356 if (bmask & CMDQ_MODIFY_QP_MODIFY_MASK_MIN_RNR_TIMER) 1357 req.min_rnr_timer = qp->min_rnr_timer; 1358 1359 if (bmask & CMDQ_MODIFY_QP_MODIFY_MASK_RQ_PSN) 1360 req.rq_psn = cpu_to_le32(qp->rq.psn); 1361 1362 if (bmask & CMDQ_MODIFY_QP_MODIFY_MASK_SQ_PSN) 1363 req.sq_psn = cpu_to_le32(qp->sq.psn); 1364 1365 if (bmask & CMDQ_MODIFY_QP_MODIFY_MASK_MAX_RD_ATOMIC) 1366 req.max_rd_atomic = 1367 ORD_LIMIT_TO_ORRQ_SLOTS(qp->max_rd_atomic); 1368 1369 if (bmask & CMDQ_MODIFY_QP_MODIFY_MASK_MAX_DEST_RD_ATOMIC) 1370 req.max_dest_rd_atomic = 1371 IRD_LIMIT_TO_IRRQ_SLOTS(qp->max_dest_rd_atomic); 1372 1373 req.sq_size = cpu_to_le32(qp->sq.hwq.max_elements); 1374 req.rq_size = cpu_to_le32(qp->rq.hwq.max_elements); 1375 req.sq_sge = cpu_to_le16(qp->sq.max_sge); 1376 req.rq_sge = cpu_to_le16(qp->rq.max_sge); 1377 req.max_inline_data = cpu_to_le32(qp->max_inline_data); 1378 if (bmask & CMDQ_MODIFY_QP_MODIFY_MASK_DEST_QP_ID) 1379 req.dest_qp_id = cpu_to_le32(qp->dest_qpn); 1380 1381 req.vlan_pcp_vlan_dei_vlan_id = cpu_to_le16(qp->vlan_id); 1382 1383 bnxt_qplib_fill_cmdqmsg(&msg, &req, &resp, NULL, sizeof(req), sizeof(resp), 0); 1384 rc = bnxt_qplib_rcfw_send_message(rcfw, &msg); 1385 if (rc) 1386 return rc; 1387 qp->cur_qp_state = qp->state; 1388 return 0; 1389 } 1390 1391 int bnxt_qplib_query_qp(struct bnxt_qplib_res *res, struct bnxt_qplib_qp *qp) 1392 { 1393 struct bnxt_qplib_rcfw *rcfw = res->rcfw; 1394 struct creq_query_qp_resp resp = {}; 1395 struct bnxt_qplib_cmdqmsg msg = {}; 1396 struct bnxt_qplib_rcfw_sbuf sbuf; 1397 struct creq_query_qp_resp_sb *sb; 1398 struct cmdq_query_qp req = {}; 1399 u32 temp32[4]; 1400 int i, rc; 1401 1402 sbuf.size = ALIGN(sizeof(*sb), BNXT_QPLIB_CMDQE_UNITS); 1403 sbuf.sb = dma_alloc_coherent(&rcfw->pdev->dev, sbuf.size, 1404 &sbuf.dma_addr, GFP_KERNEL); 1405 if (!sbuf.sb) 1406 return -ENOMEM; 1407 sb = sbuf.sb; 1408 1409 bnxt_qplib_rcfw_cmd_prep((struct cmdq_base *)&req, 1410 CMDQ_BASE_OPCODE_QUERY_QP, 1411 sizeof(req)); 1412 1413 req.qp_cid = cpu_to_le32(qp->id); 1414 req.resp_size = sbuf.size / BNXT_QPLIB_CMDQE_UNITS; 1415 bnxt_qplib_fill_cmdqmsg(&msg, &req, &resp, &sbuf, sizeof(req), 1416 sizeof(resp), 0); 1417 rc = bnxt_qplib_rcfw_send_message(rcfw, &msg); 1418 if (rc) 1419 goto bail; 1420 /* Extract the context from the side buffer */ 1421 qp->state = sb->en_sqd_async_notify_state & 1422 CREQ_QUERY_QP_RESP_SB_STATE_MASK; 1423 qp->en_sqd_async_notify = sb->en_sqd_async_notify_state & 1424 CREQ_QUERY_QP_RESP_SB_EN_SQD_ASYNC_NOTIFY; 1425 qp->access = sb->access; 1426 qp->pkey_index = le16_to_cpu(sb->pkey); 1427 qp->qkey = le32_to_cpu(sb->qkey); 1428 1429 temp32[0] = le32_to_cpu(sb->dgid[0]); 1430 temp32[1] = le32_to_cpu(sb->dgid[1]); 1431 temp32[2] = le32_to_cpu(sb->dgid[2]); 1432 temp32[3] = le32_to_cpu(sb->dgid[3]); 1433 memcpy(qp->ah.dgid.data, temp32, sizeof(qp->ah.dgid.data)); 1434 1435 qp->ah.flow_label = le32_to_cpu(sb->flow_label); 1436 1437 qp->ah.sgid_index = 0; 1438 for (i = 0; i < res->sgid_tbl.max; i++) { 1439 if (res->sgid_tbl.hw_id[i] == le16_to_cpu(sb->sgid_index)) { 1440 qp->ah.sgid_index = i; 1441 break; 1442 } 1443 } 1444 if (i == res->sgid_tbl.max) 1445 dev_warn(&res->pdev->dev, "SGID not found??\n"); 1446 1447 qp->ah.hop_limit = sb->hop_limit; 1448 qp->ah.traffic_class = sb->traffic_class; 1449 memcpy(qp->ah.dmac, sb->dest_mac, 6); 1450 qp->ah.vlan_id = (le16_to_cpu(sb->path_mtu_dest_vlan_id) & 1451 CREQ_QUERY_QP_RESP_SB_VLAN_ID_MASK) >> 1452 CREQ_QUERY_QP_RESP_SB_VLAN_ID_SFT; 1453 qp->path_mtu = (le16_to_cpu(sb->path_mtu_dest_vlan_id) & 1454 CREQ_QUERY_QP_RESP_SB_PATH_MTU_MASK) >> 1455 CREQ_QUERY_QP_RESP_SB_PATH_MTU_SFT; 1456 qp->timeout = sb->timeout; 1457 qp->retry_cnt = sb->retry_cnt; 1458 qp->rnr_retry = sb->rnr_retry; 1459 qp->min_rnr_timer = sb->min_rnr_timer; 1460 qp->rq.psn = le32_to_cpu(sb->rq_psn); 1461 qp->max_rd_atomic = ORRQ_SLOTS_TO_ORD_LIMIT(sb->max_rd_atomic); 1462 qp->sq.psn = le32_to_cpu(sb->sq_psn); 1463 qp->max_dest_rd_atomic = 1464 IRRQ_SLOTS_TO_IRD_LIMIT(sb->max_dest_rd_atomic); 1465 qp->sq.max_wqe = qp->sq.hwq.max_elements; 1466 qp->rq.max_wqe = qp->rq.hwq.max_elements; 1467 qp->sq.max_sge = le16_to_cpu(sb->sq_sge); 1468 qp->rq.max_sge = le16_to_cpu(sb->rq_sge); 1469 qp->max_inline_data = le32_to_cpu(sb->max_inline_data); 1470 qp->dest_qpn = le32_to_cpu(sb->dest_qp_id); 1471 memcpy(qp->smac, sb->src_mac, 6); 1472 qp->vlan_id = le16_to_cpu(sb->vlan_pcp_vlan_dei_vlan_id); 1473 bail: 1474 dma_free_coherent(&rcfw->pdev->dev, sbuf.size, 1475 sbuf.sb, sbuf.dma_addr); 1476 return rc; 1477 } 1478 1479 static void __clean_cq(struct bnxt_qplib_cq *cq, u64 qp) 1480 { 1481 struct bnxt_qplib_hwq *cq_hwq = &cq->hwq; 1482 u32 peek_flags, peek_cons; 1483 struct cq_base *hw_cqe; 1484 int i; 1485 1486 peek_flags = cq->dbinfo.flags; 1487 peek_cons = cq_hwq->cons; 1488 for (i = 0; i < cq_hwq->max_elements; i++) { 1489 hw_cqe = bnxt_qplib_get_qe(cq_hwq, peek_cons, NULL); 1490 if (!CQE_CMP_VALID(hw_cqe, peek_flags)) 1491 continue; 1492 /* 1493 * The valid test of the entry must be done first before 1494 * reading any further. 1495 */ 1496 dma_rmb(); 1497 switch (hw_cqe->cqe_type_toggle & CQ_BASE_CQE_TYPE_MASK) { 1498 case CQ_BASE_CQE_TYPE_REQ: 1499 case CQ_BASE_CQE_TYPE_TERMINAL: 1500 { 1501 struct cq_req *cqe = (struct cq_req *)hw_cqe; 1502 1503 if (qp == le64_to_cpu(cqe->qp_handle)) 1504 cqe->qp_handle = 0; 1505 break; 1506 } 1507 case CQ_BASE_CQE_TYPE_RES_RC: 1508 case CQ_BASE_CQE_TYPE_RES_UD: 1509 case CQ_BASE_CQE_TYPE_RES_RAWETH_QP1: 1510 { 1511 struct cq_res_rc *cqe = (struct cq_res_rc *)hw_cqe; 1512 1513 if (qp == le64_to_cpu(cqe->qp_handle)) 1514 cqe->qp_handle = 0; 1515 break; 1516 } 1517 default: 1518 break; 1519 } 1520 bnxt_qplib_hwq_incr_cons(cq_hwq->max_elements, &peek_cons, 1521 1, &peek_flags); 1522 } 1523 } 1524 1525 int bnxt_qplib_destroy_qp(struct bnxt_qplib_res *res, 1526 struct bnxt_qplib_qp *qp) 1527 { 1528 struct bnxt_qplib_rcfw *rcfw = res->rcfw; 1529 struct creq_destroy_qp_resp resp = {}; 1530 struct bnxt_qplib_cmdqmsg msg = {}; 1531 struct cmdq_destroy_qp req = {}; 1532 u32 tbl_indx; 1533 int rc; 1534 1535 tbl_indx = map_qp_id_to_tbl_indx(qp->id, rcfw); 1536 rcfw->qp_tbl[tbl_indx].qp_id = BNXT_QPLIB_QP_ID_INVALID; 1537 rcfw->qp_tbl[tbl_indx].qp_handle = NULL; 1538 1539 bnxt_qplib_rcfw_cmd_prep((struct cmdq_base *)&req, 1540 CMDQ_BASE_OPCODE_DESTROY_QP, 1541 sizeof(req)); 1542 1543 req.qp_cid = cpu_to_le32(qp->id); 1544 bnxt_qplib_fill_cmdqmsg(&msg, &req, &resp, NULL, sizeof(req), 1545 sizeof(resp), 0); 1546 rc = bnxt_qplib_rcfw_send_message(rcfw, &msg); 1547 if (rc) { 1548 rcfw->qp_tbl[tbl_indx].qp_id = qp->id; 1549 rcfw->qp_tbl[tbl_indx].qp_handle = qp; 1550 return rc; 1551 } 1552 1553 return 0; 1554 } 1555 1556 void bnxt_qplib_free_qp_res(struct bnxt_qplib_res *res, 1557 struct bnxt_qplib_qp *qp) 1558 { 1559 bnxt_qplib_free_qp_hdr_buf(res, qp); 1560 bnxt_qplib_free_hwq(res, &qp->sq.hwq); 1561 kfree(qp->sq.swq); 1562 1563 bnxt_qplib_free_hwq(res, &qp->rq.hwq); 1564 kfree(qp->rq.swq); 1565 1566 if (qp->irrq.max_elements) 1567 bnxt_qplib_free_hwq(res, &qp->irrq); 1568 if (qp->orrq.max_elements) 1569 bnxt_qplib_free_hwq(res, &qp->orrq); 1570 1571 } 1572 1573 void *bnxt_qplib_get_qp1_sq_buf(struct bnxt_qplib_qp *qp, 1574 struct bnxt_qplib_sge *sge) 1575 { 1576 struct bnxt_qplib_q *sq = &qp->sq; 1577 u32 sw_prod; 1578 1579 memset(sge, 0, sizeof(*sge)); 1580 1581 if (qp->sq_hdr_buf) { 1582 sw_prod = sq->swq_start; 1583 sge->addr = (dma_addr_t)(qp->sq_hdr_buf_map + 1584 sw_prod * qp->sq_hdr_buf_size); 1585 sge->lkey = 0xFFFFFFFF; 1586 sge->size = qp->sq_hdr_buf_size; 1587 return qp->sq_hdr_buf + sw_prod * sge->size; 1588 } 1589 return NULL; 1590 } 1591 1592 u32 bnxt_qplib_get_rq_prod_index(struct bnxt_qplib_qp *qp) 1593 { 1594 struct bnxt_qplib_q *rq = &qp->rq; 1595 1596 return rq->swq_start; 1597 } 1598 1599 dma_addr_t bnxt_qplib_get_qp_buf_from_index(struct bnxt_qplib_qp *qp, u32 index) 1600 { 1601 return (qp->rq_hdr_buf_map + index * qp->rq_hdr_buf_size); 1602 } 1603 1604 void *bnxt_qplib_get_qp1_rq_buf(struct bnxt_qplib_qp *qp, 1605 struct bnxt_qplib_sge *sge) 1606 { 1607 struct bnxt_qplib_q *rq = &qp->rq; 1608 u32 sw_prod; 1609 1610 memset(sge, 0, sizeof(*sge)); 1611 1612 if (qp->rq_hdr_buf) { 1613 sw_prod = rq->swq_start; 1614 sge->addr = (dma_addr_t)(qp->rq_hdr_buf_map + 1615 sw_prod * qp->rq_hdr_buf_size); 1616 sge->lkey = 0xFFFFFFFF; 1617 sge->size = qp->rq_hdr_buf_size; 1618 return qp->rq_hdr_buf + sw_prod * sge->size; 1619 } 1620 return NULL; 1621 } 1622 1623 /* Fil the MSN table into the next psn row */ 1624 static void bnxt_qplib_fill_msn_search(struct bnxt_qplib_qp *qp, 1625 struct bnxt_qplib_swqe *wqe, 1626 struct bnxt_qplib_swq *swq) 1627 { 1628 struct sq_msn_search *msns; 1629 u32 start_psn, next_psn; 1630 u16 start_idx; 1631 1632 msns = (struct sq_msn_search *)swq->psn_search; 1633 msns->start_idx_next_psn_start_psn = 0; 1634 1635 start_psn = swq->start_psn; 1636 next_psn = swq->next_psn; 1637 start_idx = swq->slot_idx; 1638 msns->start_idx_next_psn_start_psn |= 1639 bnxt_re_update_msn_tbl(start_idx, next_psn, start_psn); 1640 qp->msn++; 1641 qp->msn %= qp->msn_tbl_sz; 1642 } 1643 1644 static void bnxt_qplib_fill_psn_search(struct bnxt_qplib_qp *qp, 1645 struct bnxt_qplib_swqe *wqe, 1646 struct bnxt_qplib_swq *swq) 1647 { 1648 struct sq_psn_search_ext *psns_ext; 1649 struct sq_psn_search *psns; 1650 u32 flg_npsn; 1651 u32 op_spsn; 1652 1653 if (!swq->psn_search) 1654 return; 1655 /* Handle MSN differently on cap flags */ 1656 if (qp->is_host_msn_tbl) { 1657 bnxt_qplib_fill_msn_search(qp, wqe, swq); 1658 return; 1659 } 1660 psns = (struct sq_psn_search *)swq->psn_search; 1661 psns = swq->psn_search; 1662 psns_ext = swq->psn_ext; 1663 1664 op_spsn = ((swq->start_psn << SQ_PSN_SEARCH_START_PSN_SFT) & 1665 SQ_PSN_SEARCH_START_PSN_MASK); 1666 op_spsn |= ((wqe->type << SQ_PSN_SEARCH_OPCODE_SFT) & 1667 SQ_PSN_SEARCH_OPCODE_MASK); 1668 flg_npsn = ((swq->next_psn << SQ_PSN_SEARCH_NEXT_PSN_SFT) & 1669 SQ_PSN_SEARCH_NEXT_PSN_MASK); 1670 1671 if (bnxt_qplib_is_chip_gen_p5_p7(qp->cctx)) { 1672 psns_ext->opcode_start_psn = cpu_to_le32(op_spsn); 1673 psns_ext->flags_next_psn = cpu_to_le32(flg_npsn); 1674 psns_ext->start_slot_idx = cpu_to_le16(swq->slot_idx); 1675 } else { 1676 psns->opcode_start_psn = cpu_to_le32(op_spsn); 1677 psns->flags_next_psn = cpu_to_le32(flg_npsn); 1678 } 1679 } 1680 1681 static int bnxt_qplib_put_inline(struct bnxt_qplib_qp *qp, 1682 struct bnxt_qplib_swqe *wqe, 1683 u16 *idx) 1684 { 1685 struct bnxt_qplib_hwq *hwq; 1686 int len, t_len, offt; 1687 bool pull_dst = true; 1688 void *il_dst = NULL; 1689 void *il_src = NULL; 1690 int t_cplen, cplen; 1691 int indx; 1692 1693 hwq = &qp->sq.hwq; 1694 t_len = 0; 1695 for (indx = 0; indx < wqe->num_sge; indx++) { 1696 len = wqe->sg_list[indx].size; 1697 il_src = (void *)wqe->sg_list[indx].addr; 1698 t_len += len; 1699 if (t_len > qp->max_inline_data) 1700 return -ENOMEM; 1701 while (len) { 1702 if (pull_dst) { 1703 pull_dst = false; 1704 il_dst = bnxt_qplib_get_prod_qe(hwq, *idx); 1705 (*idx)++; 1706 t_cplen = 0; 1707 offt = 0; 1708 } 1709 cplen = min_t(int, len, sizeof(struct sq_sge)); 1710 cplen = min_t(int, cplen, 1711 (sizeof(struct sq_sge) - offt)); 1712 memcpy(il_dst, il_src, cplen); 1713 t_cplen += cplen; 1714 il_src += cplen; 1715 il_dst += cplen; 1716 offt += cplen; 1717 len -= cplen; 1718 if (t_cplen == sizeof(struct sq_sge)) 1719 pull_dst = true; 1720 } 1721 } 1722 1723 return t_len; 1724 } 1725 1726 static u32 bnxt_qplib_put_sges(struct bnxt_qplib_hwq *hwq, 1727 struct bnxt_qplib_sge *ssge, 1728 u16 nsge, u16 *idx) 1729 { 1730 struct sq_sge *dsge; 1731 int indx, len = 0; 1732 1733 for (indx = 0; indx < nsge; indx++, (*idx)++) { 1734 dsge = bnxt_qplib_get_prod_qe(hwq, *idx); 1735 dsge->va_or_pa = cpu_to_le64(ssge[indx].addr); 1736 dsge->l_key = cpu_to_le32(ssge[indx].lkey); 1737 dsge->size = cpu_to_le32(ssge[indx].size); 1738 len += ssge[indx].size; 1739 } 1740 1741 return len; 1742 } 1743 1744 static u16 bnxt_qplib_required_slots(struct bnxt_qplib_qp *qp, 1745 struct bnxt_qplib_swqe *wqe, 1746 u16 *wqe_sz, u16 *qdf, u8 mode) 1747 { 1748 u32 ilsize, bytes; 1749 u16 nsge; 1750 u16 slot; 1751 1752 nsge = wqe->num_sge; 1753 /* Adding sq_send_hdr is a misnomer, for rq also hdr size is same. */ 1754 bytes = sizeof(struct sq_send_hdr) + nsge * sizeof(struct sq_sge); 1755 if (wqe->flags & BNXT_QPLIB_SWQE_FLAGS_INLINE) { 1756 ilsize = bnxt_qplib_calc_ilsize(wqe, qp->max_inline_data); 1757 bytes = ALIGN(ilsize, sizeof(struct sq_sge)); 1758 bytes += sizeof(struct sq_send_hdr); 1759 } 1760 1761 *qdf = __xlate_qfd(qp->sq.q_full_delta, bytes); 1762 slot = bytes >> 4; 1763 *wqe_sz = slot; 1764 if (mode == BNXT_QPLIB_WQE_MODE_STATIC) 1765 slot = 8; 1766 return slot; 1767 } 1768 1769 static void bnxt_qplib_pull_psn_buff(struct bnxt_qplib_qp *qp, struct bnxt_qplib_q *sq, 1770 struct bnxt_qplib_swq *swq, bool hw_retx) 1771 { 1772 struct bnxt_qplib_hwq *hwq; 1773 u32 pg_num, pg_indx; 1774 void *buff; 1775 u32 tail; 1776 1777 hwq = &sq->hwq; 1778 if (!hwq->pad_pg) 1779 return; 1780 tail = swq->slot_idx / sq->dbinfo.max_slot; 1781 if (hw_retx) { 1782 /* For HW retx use qp msn index */ 1783 tail = qp->msn; 1784 tail %= qp->msn_tbl_sz; 1785 } 1786 pg_num = (tail + hwq->pad_pgofft) / (PAGE_SIZE / hwq->pad_stride); 1787 pg_indx = (tail + hwq->pad_pgofft) % (PAGE_SIZE / hwq->pad_stride); 1788 buff = (void *)(hwq->pad_pg[pg_num] + pg_indx * hwq->pad_stride); 1789 swq->psn_ext = buff; 1790 swq->psn_search = buff; 1791 } 1792 1793 void bnxt_qplib_post_send_db(struct bnxt_qplib_qp *qp) 1794 { 1795 struct bnxt_qplib_q *sq = &qp->sq; 1796 1797 bnxt_qplib_ring_prod_db(&sq->dbinfo, DBC_DBC_TYPE_SQ); 1798 } 1799 1800 int bnxt_qplib_post_send(struct bnxt_qplib_qp *qp, 1801 struct bnxt_qplib_swqe *wqe) 1802 { 1803 struct bnxt_qplib_nq_work *nq_work = NULL; 1804 int i, rc = 0, data_len = 0, pkt_num = 0; 1805 struct bnxt_qplib_q *sq = &qp->sq; 1806 struct bnxt_qplib_hwq *hwq; 1807 struct bnxt_qplib_swq *swq; 1808 bool sch_handler = false; 1809 u16 wqe_sz, qdf = 0; 1810 bool msn_update; 1811 void *base_hdr; 1812 void *ext_hdr; 1813 __le32 temp32; 1814 u32 wqe_idx; 1815 u32 slots; 1816 u16 idx; 1817 1818 hwq = &sq->hwq; 1819 if (qp->state != CMDQ_MODIFY_QP_NEW_STATE_RTS && 1820 qp->state != CMDQ_MODIFY_QP_NEW_STATE_ERR) { 1821 dev_err(&hwq->pdev->dev, 1822 "QPLIB: FP: QP (0x%x) is in the 0x%x state", 1823 qp->id, qp->state); 1824 rc = -EINVAL; 1825 goto done; 1826 } 1827 1828 slots = bnxt_qplib_required_slots(qp, wqe, &wqe_sz, &qdf, qp->wqe_mode); 1829 if (bnxt_qplib_queue_full(sq, slots + qdf)) { 1830 dev_err(&hwq->pdev->dev, 1831 "prod = %#x cons = %#x qdepth = %#x delta = %#x\n", 1832 hwq->prod, hwq->cons, hwq->depth, sq->q_full_delta); 1833 rc = -ENOMEM; 1834 goto done; 1835 } 1836 1837 swq = bnxt_qplib_get_swqe(sq, &wqe_idx); 1838 bnxt_qplib_pull_psn_buff(qp, sq, swq, qp->is_host_msn_tbl); 1839 1840 idx = 0; 1841 swq->slot_idx = hwq->prod; 1842 swq->slots = slots; 1843 swq->wr_id = wqe->wr_id; 1844 swq->type = wqe->type; 1845 swq->flags = wqe->flags; 1846 swq->start_psn = sq->psn & BTH_PSN_MASK; 1847 if (qp->sig_type) 1848 swq->flags |= SQ_SEND_FLAGS_SIGNAL_COMP; 1849 1850 if (qp->state == CMDQ_MODIFY_QP_NEW_STATE_ERR) { 1851 sch_handler = true; 1852 dev_dbg(&hwq->pdev->dev, 1853 "%s Error QP. Scheduling for poll_cq\n", __func__); 1854 goto queue_err; 1855 } 1856 1857 base_hdr = bnxt_qplib_get_prod_qe(hwq, idx++); 1858 ext_hdr = bnxt_qplib_get_prod_qe(hwq, idx++); 1859 memset(base_hdr, 0, sizeof(struct sq_sge)); 1860 memset(ext_hdr, 0, sizeof(struct sq_sge)); 1861 1862 if (wqe->flags & BNXT_QPLIB_SWQE_FLAGS_INLINE) 1863 /* Copy the inline data */ 1864 data_len = bnxt_qplib_put_inline(qp, wqe, &idx); 1865 else 1866 data_len = bnxt_qplib_put_sges(hwq, wqe->sg_list, wqe->num_sge, 1867 &idx); 1868 if (data_len < 0) 1869 goto queue_err; 1870 /* Make sure we update MSN table only for wired wqes */ 1871 msn_update = true; 1872 /* Specifics */ 1873 switch (wqe->type) { 1874 case BNXT_QPLIB_SWQE_TYPE_SEND: 1875 if (qp->type == CMDQ_CREATE_QP1_TYPE_GSI) { 1876 struct sq_send_raweth_qp1_hdr *sqe = base_hdr; 1877 struct sq_raw_ext_hdr *ext_sqe = ext_hdr; 1878 /* Assemble info for Raw Ethertype QPs */ 1879 1880 sqe->wqe_type = wqe->type; 1881 sqe->flags = wqe->flags; 1882 sqe->wqe_size = wqe_sz; 1883 sqe->cfa_action = cpu_to_le16(wqe->rawqp1.cfa_action); 1884 sqe->lflags = cpu_to_le16(wqe->rawqp1.lflags); 1885 sqe->length = cpu_to_le32(data_len); 1886 ext_sqe->cfa_meta = cpu_to_le32((wqe->rawqp1.cfa_meta & 1887 SQ_SEND_RAWETH_QP1_CFA_META_VLAN_VID_MASK) << 1888 SQ_SEND_RAWETH_QP1_CFA_META_VLAN_VID_SFT); 1889 1890 break; 1891 } 1892 fallthrough; 1893 case BNXT_QPLIB_SWQE_TYPE_SEND_WITH_IMM: 1894 case BNXT_QPLIB_SWQE_TYPE_SEND_WITH_INV: 1895 { 1896 struct sq_ud_ext_hdr *ext_sqe = ext_hdr; 1897 struct sq_send_hdr *sqe = base_hdr; 1898 1899 sqe->wqe_type = wqe->type; 1900 sqe->flags = wqe->flags; 1901 sqe->wqe_size = wqe_sz; 1902 sqe->inv_key_or_imm_data = cpu_to_le32(wqe->send.inv_key); 1903 if (qp->type == CMDQ_CREATE_QP_TYPE_UD || 1904 qp->type == CMDQ_CREATE_QP_TYPE_GSI) { 1905 sqe->q_key = cpu_to_le32(wqe->send.q_key); 1906 sqe->length = cpu_to_le32(data_len); 1907 sq->psn = (sq->psn + 1) & BTH_PSN_MASK; 1908 ext_sqe->dst_qp = cpu_to_le32(wqe->send.dst_qp & 1909 SQ_SEND_DST_QP_MASK); 1910 ext_sqe->avid = cpu_to_le32(wqe->send.avid & 1911 SQ_SEND_AVID_MASK); 1912 msn_update = false; 1913 } else { 1914 sqe->length = cpu_to_le32(data_len); 1915 if (qp->mtu) 1916 pkt_num = (data_len + qp->mtu - 1) / qp->mtu; 1917 if (!pkt_num) 1918 pkt_num = 1; 1919 sq->psn = (sq->psn + pkt_num) & BTH_PSN_MASK; 1920 } 1921 break; 1922 } 1923 case BNXT_QPLIB_SWQE_TYPE_RDMA_WRITE: 1924 case BNXT_QPLIB_SWQE_TYPE_RDMA_WRITE_WITH_IMM: 1925 case BNXT_QPLIB_SWQE_TYPE_RDMA_READ: 1926 { 1927 struct sq_rdma_ext_hdr *ext_sqe = ext_hdr; 1928 struct sq_rdma_hdr *sqe = base_hdr; 1929 1930 sqe->wqe_type = wqe->type; 1931 sqe->flags = wqe->flags; 1932 sqe->wqe_size = wqe_sz; 1933 sqe->imm_data = cpu_to_le32(wqe->rdma.inv_key); 1934 sqe->length = cpu_to_le32((u32)data_len); 1935 ext_sqe->remote_va = cpu_to_le64(wqe->rdma.remote_va); 1936 ext_sqe->remote_key = cpu_to_le32(wqe->rdma.r_key); 1937 if (qp->mtu) 1938 pkt_num = (data_len + qp->mtu - 1) / qp->mtu; 1939 if (!pkt_num) 1940 pkt_num = 1; 1941 sq->psn = (sq->psn + pkt_num) & BTH_PSN_MASK; 1942 break; 1943 } 1944 case BNXT_QPLIB_SWQE_TYPE_ATOMIC_CMP_AND_SWP: 1945 case BNXT_QPLIB_SWQE_TYPE_ATOMIC_FETCH_AND_ADD: 1946 { 1947 struct sq_atomic_ext_hdr *ext_sqe = ext_hdr; 1948 struct sq_atomic_hdr *sqe = base_hdr; 1949 1950 sqe->wqe_type = wqe->type; 1951 sqe->flags = wqe->flags; 1952 sqe->remote_key = cpu_to_le32(wqe->atomic.r_key); 1953 sqe->remote_va = cpu_to_le64(wqe->atomic.remote_va); 1954 ext_sqe->swap_data = cpu_to_le64(wqe->atomic.swap_data); 1955 ext_sqe->cmp_data = cpu_to_le64(wqe->atomic.cmp_data); 1956 if (qp->mtu) 1957 pkt_num = (data_len + qp->mtu - 1) / qp->mtu; 1958 if (!pkt_num) 1959 pkt_num = 1; 1960 sq->psn = (sq->psn + pkt_num) & BTH_PSN_MASK; 1961 break; 1962 } 1963 case BNXT_QPLIB_SWQE_TYPE_LOCAL_INV: 1964 { 1965 struct sq_localinvalidate *sqe = base_hdr; 1966 1967 sqe->wqe_type = wqe->type; 1968 sqe->flags = wqe->flags; 1969 sqe->inv_l_key = cpu_to_le32(wqe->local_inv.inv_l_key); 1970 msn_update = false; 1971 break; 1972 } 1973 case BNXT_QPLIB_SWQE_TYPE_FAST_REG_MR: 1974 { 1975 struct sq_fr_pmr_ext_hdr *ext_sqe = ext_hdr; 1976 struct sq_fr_pmr_hdr *sqe = base_hdr; 1977 1978 sqe->wqe_type = wqe->type; 1979 sqe->flags = wqe->flags; 1980 sqe->access_cntl = wqe->frmr.access_cntl | 1981 SQ_FR_PMR_ACCESS_CNTL_LOCAL_WRITE; 1982 sqe->zero_based_page_size_log = 1983 (wqe->frmr.pg_sz_log & SQ_FR_PMR_PAGE_SIZE_LOG_MASK) << 1984 SQ_FR_PMR_PAGE_SIZE_LOG_SFT | 1985 (wqe->frmr.zero_based ? SQ_FR_PMR_ZERO_BASED : 0); 1986 sqe->l_key = cpu_to_le32(wqe->frmr.l_key); 1987 temp32 = cpu_to_le32(wqe->frmr.length); 1988 memcpy(sqe->length, &temp32, sizeof(wqe->frmr.length)); 1989 sqe->numlevels_pbl_page_size_log = 1990 ((wqe->frmr.pbl_pg_sz_log << 1991 SQ_FR_PMR_PBL_PAGE_SIZE_LOG_SFT) & 1992 SQ_FR_PMR_PBL_PAGE_SIZE_LOG_MASK) | 1993 ((wqe->frmr.levels << SQ_FR_PMR_NUMLEVELS_SFT) & 1994 SQ_FR_PMR_NUMLEVELS_MASK); 1995 1996 for (i = 0; i < wqe->frmr.page_list_len; i++) 1997 wqe->frmr.pbl_ptr[i] = cpu_to_le64( 1998 wqe->frmr.page_list[i] | 1999 PTU_PTE_VALID); 2000 ext_sqe->pblptr = cpu_to_le64(wqe->frmr.pbl_dma_ptr); 2001 ext_sqe->va = cpu_to_le64(wqe->frmr.va); 2002 msn_update = false; 2003 2004 break; 2005 } 2006 case BNXT_QPLIB_SWQE_TYPE_BIND_MW: 2007 { 2008 struct sq_bind_ext_hdr *ext_sqe = ext_hdr; 2009 struct sq_bind_hdr *sqe = base_hdr; 2010 2011 sqe->wqe_type = wqe->type; 2012 sqe->flags = wqe->flags; 2013 sqe->access_cntl = wqe->bind.access_cntl; 2014 sqe->mw_type_zero_based = wqe->bind.mw_type | 2015 (wqe->bind.zero_based ? SQ_BIND_ZERO_BASED : 0); 2016 sqe->parent_l_key = cpu_to_le32(wqe->bind.parent_l_key); 2017 sqe->l_key = cpu_to_le32(wqe->bind.r_key); 2018 ext_sqe->va = cpu_to_le64(wqe->bind.va); 2019 ext_sqe->length_lo = cpu_to_le32(wqe->bind.length); 2020 msn_update = false; 2021 break; 2022 } 2023 default: 2024 /* Bad wqe, return error */ 2025 rc = -EINVAL; 2026 goto done; 2027 } 2028 if (!qp->is_host_msn_tbl || msn_update) { 2029 swq->next_psn = sq->psn & BTH_PSN_MASK; 2030 bnxt_qplib_fill_psn_search(qp, wqe, swq); 2031 } 2032 queue_err: 2033 bnxt_qplib_swq_mod_start(sq, wqe_idx); 2034 bnxt_qplib_hwq_incr_prod(&sq->dbinfo, hwq, swq->slots); 2035 qp->wqe_cnt++; 2036 done: 2037 if (sch_handler) { 2038 nq_work = kzalloc(sizeof(*nq_work), GFP_ATOMIC); 2039 if (nq_work) { 2040 nq_work->cq = qp->scq; 2041 nq_work->nq = qp->scq->nq; 2042 INIT_WORK(&nq_work->work, bnxt_qpn_cqn_sched_task); 2043 queue_work(qp->scq->nq->cqn_wq, &nq_work->work); 2044 } else { 2045 dev_err(&hwq->pdev->dev, 2046 "FP: Failed to allocate SQ nq_work!\n"); 2047 rc = -ENOMEM; 2048 } 2049 } 2050 return rc; 2051 } 2052 2053 void bnxt_qplib_post_recv_db(struct bnxt_qplib_qp *qp) 2054 { 2055 struct bnxt_qplib_q *rq = &qp->rq; 2056 2057 bnxt_qplib_ring_prod_db(&rq->dbinfo, DBC_DBC_TYPE_RQ); 2058 } 2059 2060 int bnxt_qplib_post_recv(struct bnxt_qplib_qp *qp, 2061 struct bnxt_qplib_swqe *wqe) 2062 { 2063 struct bnxt_qplib_nq_work *nq_work = NULL; 2064 struct bnxt_qplib_q *rq = &qp->rq; 2065 struct rq_wqe_hdr *base_hdr; 2066 struct rq_ext_hdr *ext_hdr; 2067 struct bnxt_qplib_hwq *hwq; 2068 struct bnxt_qplib_swq *swq; 2069 bool sch_handler = false; 2070 u16 wqe_sz, idx; 2071 u32 wqe_idx; 2072 int rc = 0; 2073 2074 hwq = &rq->hwq; 2075 if (qp->state == CMDQ_MODIFY_QP_NEW_STATE_RESET) { 2076 dev_err(&hwq->pdev->dev, 2077 "QPLIB: FP: QP (0x%x) is in the 0x%x state", 2078 qp->id, qp->state); 2079 rc = -EINVAL; 2080 goto done; 2081 } 2082 2083 if (bnxt_qplib_queue_full(rq, rq->dbinfo.max_slot)) { 2084 dev_err(&hwq->pdev->dev, 2085 "FP: QP (0x%x) RQ is full!\n", qp->id); 2086 rc = -EINVAL; 2087 goto done; 2088 } 2089 2090 swq = bnxt_qplib_get_swqe(rq, &wqe_idx); 2091 swq->wr_id = wqe->wr_id; 2092 swq->slots = rq->dbinfo.max_slot; 2093 2094 if (qp->state == CMDQ_MODIFY_QP_NEW_STATE_ERR) { 2095 sch_handler = true; 2096 dev_dbg(&hwq->pdev->dev, 2097 "%s: Error QP. Scheduling for poll_cq\n", __func__); 2098 goto queue_err; 2099 } 2100 2101 idx = 0; 2102 base_hdr = bnxt_qplib_get_prod_qe(hwq, idx++); 2103 ext_hdr = bnxt_qplib_get_prod_qe(hwq, idx++); 2104 memset(base_hdr, 0, sizeof(struct sq_sge)); 2105 memset(ext_hdr, 0, sizeof(struct sq_sge)); 2106 wqe_sz = (sizeof(struct rq_wqe_hdr) + 2107 wqe->num_sge * sizeof(struct sq_sge)) >> 4; 2108 bnxt_qplib_put_sges(hwq, wqe->sg_list, wqe->num_sge, &idx); 2109 if (!wqe->num_sge) { 2110 struct sq_sge *sge; 2111 2112 sge = bnxt_qplib_get_prod_qe(hwq, idx++); 2113 sge->size = 0; 2114 wqe_sz++; 2115 } 2116 base_hdr->wqe_type = wqe->type; 2117 base_hdr->flags = wqe->flags; 2118 base_hdr->wqe_size = wqe_sz; 2119 base_hdr->wr_id[0] = cpu_to_le32(wqe_idx); 2120 queue_err: 2121 bnxt_qplib_swq_mod_start(rq, wqe_idx); 2122 bnxt_qplib_hwq_incr_prod(&rq->dbinfo, hwq, swq->slots); 2123 done: 2124 if (sch_handler) { 2125 nq_work = kzalloc(sizeof(*nq_work), GFP_ATOMIC); 2126 if (nq_work) { 2127 nq_work->cq = qp->rcq; 2128 nq_work->nq = qp->rcq->nq; 2129 INIT_WORK(&nq_work->work, bnxt_qpn_cqn_sched_task); 2130 queue_work(qp->rcq->nq->cqn_wq, &nq_work->work); 2131 } else { 2132 dev_err(&hwq->pdev->dev, 2133 "FP: Failed to allocate RQ nq_work!\n"); 2134 rc = -ENOMEM; 2135 } 2136 } 2137 2138 return rc; 2139 } 2140 2141 /* CQ */ 2142 int bnxt_qplib_create_cq(struct bnxt_qplib_res *res, struct bnxt_qplib_cq *cq) 2143 { 2144 struct bnxt_qplib_rcfw *rcfw = res->rcfw; 2145 struct bnxt_qplib_hwq_attr hwq_attr = {}; 2146 struct creq_create_cq_resp resp = {}; 2147 struct bnxt_qplib_cmdqmsg msg = {}; 2148 struct cmdq_create_cq req = {}; 2149 struct bnxt_qplib_pbl *pbl; 2150 u32 pg_sz_lvl; 2151 int rc; 2152 2153 if (!cq->dpi) { 2154 dev_err(&rcfw->pdev->dev, 2155 "FP: CREATE_CQ failed due to NULL DPI\n"); 2156 return -EINVAL; 2157 } 2158 2159 cq->dbinfo.flags = 0; 2160 hwq_attr.res = res; 2161 hwq_attr.depth = cq->max_wqe; 2162 hwq_attr.stride = sizeof(struct cq_base); 2163 hwq_attr.type = HWQ_TYPE_QUEUE; 2164 hwq_attr.sginfo = &cq->sg_info; 2165 rc = bnxt_qplib_alloc_init_hwq(&cq->hwq, &hwq_attr); 2166 if (rc) 2167 return rc; 2168 2169 bnxt_qplib_rcfw_cmd_prep((struct cmdq_base *)&req, 2170 CMDQ_BASE_OPCODE_CREATE_CQ, 2171 sizeof(req)); 2172 2173 req.dpi = cpu_to_le32(cq->dpi->dpi); 2174 req.cq_handle = cpu_to_le64(cq->cq_handle); 2175 req.cq_size = cpu_to_le32(cq->max_wqe); 2176 pbl = &cq->hwq.pbl[PBL_LVL_0]; 2177 pg_sz_lvl = (bnxt_qplib_base_pg_size(&cq->hwq) << 2178 CMDQ_CREATE_CQ_PG_SIZE_SFT); 2179 pg_sz_lvl |= (cq->hwq.level & CMDQ_CREATE_CQ_LVL_MASK); 2180 req.pg_size_lvl = cpu_to_le32(pg_sz_lvl); 2181 req.pbl = cpu_to_le64(pbl->pg_map_arr[0]); 2182 req.cq_fco_cnq_id = cpu_to_le32( 2183 (cq->cnq_hw_ring_id & CMDQ_CREATE_CQ_CNQ_ID_MASK) << 2184 CMDQ_CREATE_CQ_CNQ_ID_SFT); 2185 bnxt_qplib_fill_cmdqmsg(&msg, &req, &resp, NULL, sizeof(req), 2186 sizeof(resp), 0); 2187 rc = bnxt_qplib_rcfw_send_message(rcfw, &msg); 2188 if (rc) 2189 goto fail; 2190 2191 cq->id = le32_to_cpu(resp.xid); 2192 cq->period = BNXT_QPLIB_QUEUE_START_PERIOD; 2193 init_waitqueue_head(&cq->waitq); 2194 INIT_LIST_HEAD(&cq->sqf_head); 2195 INIT_LIST_HEAD(&cq->rqf_head); 2196 spin_lock_init(&cq->compl_lock); 2197 spin_lock_init(&cq->flush_lock); 2198 2199 cq->dbinfo.hwq = &cq->hwq; 2200 cq->dbinfo.xid = cq->id; 2201 cq->dbinfo.db = cq->dpi->dbr; 2202 cq->dbinfo.priv_db = res->dpi_tbl.priv_db; 2203 cq->dbinfo.flags = 0; 2204 cq->dbinfo.toggle = 0; 2205 2206 bnxt_qplib_armen_db(&cq->dbinfo, DBC_DBC_TYPE_CQ_ARMENA); 2207 2208 return 0; 2209 2210 fail: 2211 bnxt_qplib_free_hwq(res, &cq->hwq); 2212 return rc; 2213 } 2214 2215 void bnxt_qplib_resize_cq_complete(struct bnxt_qplib_res *res, 2216 struct bnxt_qplib_cq *cq) 2217 { 2218 bnxt_qplib_free_hwq(res, &cq->hwq); 2219 memcpy(&cq->hwq, &cq->resize_hwq, sizeof(cq->hwq)); 2220 /* Reset only the cons bit in the flags */ 2221 cq->dbinfo.flags &= ~(1UL << BNXT_QPLIB_FLAG_EPOCH_CONS_SHIFT); 2222 } 2223 2224 int bnxt_qplib_resize_cq(struct bnxt_qplib_res *res, struct bnxt_qplib_cq *cq, 2225 int new_cqes) 2226 { 2227 struct bnxt_qplib_hwq_attr hwq_attr = {}; 2228 struct bnxt_qplib_rcfw *rcfw = res->rcfw; 2229 struct creq_resize_cq_resp resp = {}; 2230 struct bnxt_qplib_cmdqmsg msg = {}; 2231 struct cmdq_resize_cq req = {}; 2232 struct bnxt_qplib_pbl *pbl; 2233 u32 pg_sz, lvl, new_sz; 2234 int rc; 2235 2236 bnxt_qplib_rcfw_cmd_prep((struct cmdq_base *)&req, 2237 CMDQ_BASE_OPCODE_RESIZE_CQ, 2238 sizeof(req)); 2239 hwq_attr.sginfo = &cq->sg_info; 2240 hwq_attr.res = res; 2241 hwq_attr.depth = new_cqes; 2242 hwq_attr.stride = sizeof(struct cq_base); 2243 hwq_attr.type = HWQ_TYPE_QUEUE; 2244 rc = bnxt_qplib_alloc_init_hwq(&cq->resize_hwq, &hwq_attr); 2245 if (rc) 2246 return rc; 2247 2248 req.cq_cid = cpu_to_le32(cq->id); 2249 pbl = &cq->resize_hwq.pbl[PBL_LVL_0]; 2250 pg_sz = bnxt_qplib_base_pg_size(&cq->resize_hwq); 2251 lvl = (cq->resize_hwq.level << CMDQ_RESIZE_CQ_LVL_SFT) & 2252 CMDQ_RESIZE_CQ_LVL_MASK; 2253 new_sz = (new_cqes << CMDQ_RESIZE_CQ_NEW_CQ_SIZE_SFT) & 2254 CMDQ_RESIZE_CQ_NEW_CQ_SIZE_MASK; 2255 req.new_cq_size_pg_size_lvl = cpu_to_le32(new_sz | pg_sz | lvl); 2256 req.new_pbl = cpu_to_le64(pbl->pg_map_arr[0]); 2257 2258 bnxt_qplib_fill_cmdqmsg(&msg, &req, &resp, NULL, sizeof(req), 2259 sizeof(resp), 0); 2260 rc = bnxt_qplib_rcfw_send_message(rcfw, &msg); 2261 return rc; 2262 } 2263 2264 int bnxt_qplib_destroy_cq(struct bnxt_qplib_res *res, struct bnxt_qplib_cq *cq) 2265 { 2266 struct bnxt_qplib_rcfw *rcfw = res->rcfw; 2267 struct creq_destroy_cq_resp resp = {}; 2268 struct bnxt_qplib_cmdqmsg msg = {}; 2269 struct cmdq_destroy_cq req = {}; 2270 u16 total_cnq_events; 2271 int rc; 2272 2273 bnxt_qplib_rcfw_cmd_prep((struct cmdq_base *)&req, 2274 CMDQ_BASE_OPCODE_DESTROY_CQ, 2275 sizeof(req)); 2276 2277 req.cq_cid = cpu_to_le32(cq->id); 2278 bnxt_qplib_fill_cmdqmsg(&msg, &req, &resp, NULL, sizeof(req), 2279 sizeof(resp), 0); 2280 rc = bnxt_qplib_rcfw_send_message(rcfw, &msg); 2281 if (rc) 2282 return rc; 2283 total_cnq_events = le16_to_cpu(resp.total_cnq_events); 2284 __wait_for_all_nqes(cq, total_cnq_events); 2285 bnxt_qplib_free_hwq(res, &cq->hwq); 2286 return 0; 2287 } 2288 2289 static int __flush_sq(struct bnxt_qplib_q *sq, struct bnxt_qplib_qp *qp, 2290 struct bnxt_qplib_cqe **pcqe, int *budget) 2291 { 2292 struct bnxt_qplib_cqe *cqe; 2293 u32 start, last; 2294 int rc = 0; 2295 2296 /* Now complete all outstanding SQEs with FLUSHED_ERR */ 2297 start = sq->swq_start; 2298 cqe = *pcqe; 2299 while (*budget) { 2300 last = sq->swq_last; 2301 if (start == last) 2302 break; 2303 /* Skip the FENCE WQE completions */ 2304 if (sq->swq[last].wr_id == BNXT_QPLIB_FENCE_WRID) { 2305 bnxt_qplib_cancel_phantom_processing(qp); 2306 goto skip_compl; 2307 } 2308 memset(cqe, 0, sizeof(*cqe)); 2309 cqe->status = CQ_REQ_STATUS_WORK_REQUEST_FLUSHED_ERR; 2310 cqe->opcode = CQ_BASE_CQE_TYPE_REQ; 2311 cqe->qp_handle = (u64)(unsigned long)qp; 2312 cqe->wr_id = sq->swq[last].wr_id; 2313 cqe->src_qp = qp->id; 2314 cqe->type = sq->swq[last].type; 2315 cqe++; 2316 (*budget)--; 2317 skip_compl: 2318 bnxt_qplib_hwq_incr_cons(sq->hwq.max_elements, &sq->hwq.cons, 2319 sq->swq[last].slots, &sq->dbinfo.flags); 2320 sq->swq_last = sq->swq[last].next_idx; 2321 } 2322 *pcqe = cqe; 2323 if (!(*budget) && sq->swq_last != start) 2324 /* Out of budget */ 2325 rc = -EAGAIN; 2326 2327 return rc; 2328 } 2329 2330 static int __flush_rq(struct bnxt_qplib_q *rq, struct bnxt_qplib_qp *qp, 2331 struct bnxt_qplib_cqe **pcqe, int *budget) 2332 { 2333 struct bnxt_qplib_cqe *cqe; 2334 u32 start, last; 2335 int opcode = 0; 2336 int rc = 0; 2337 2338 switch (qp->type) { 2339 case CMDQ_CREATE_QP1_TYPE_GSI: 2340 opcode = CQ_BASE_CQE_TYPE_RES_RAWETH_QP1; 2341 break; 2342 case CMDQ_CREATE_QP_TYPE_RC: 2343 opcode = CQ_BASE_CQE_TYPE_RES_RC; 2344 break; 2345 case CMDQ_CREATE_QP_TYPE_UD: 2346 case CMDQ_CREATE_QP_TYPE_GSI: 2347 opcode = CQ_BASE_CQE_TYPE_RES_UD; 2348 break; 2349 } 2350 2351 /* Flush the rest of the RQ */ 2352 start = rq->swq_start; 2353 cqe = *pcqe; 2354 while (*budget) { 2355 last = rq->swq_last; 2356 if (last == start) 2357 break; 2358 memset(cqe, 0, sizeof(*cqe)); 2359 cqe->status = 2360 CQ_RES_RC_STATUS_WORK_REQUEST_FLUSHED_ERR; 2361 cqe->opcode = opcode; 2362 cqe->qp_handle = (unsigned long)qp; 2363 cqe->wr_id = rq->swq[last].wr_id; 2364 cqe++; 2365 (*budget)--; 2366 bnxt_qplib_hwq_incr_cons(rq->hwq.max_elements, &rq->hwq.cons, 2367 rq->swq[last].slots, &rq->dbinfo.flags); 2368 rq->swq_last = rq->swq[last].next_idx; 2369 } 2370 *pcqe = cqe; 2371 if (!*budget && rq->swq_last != start) 2372 /* Out of budget */ 2373 rc = -EAGAIN; 2374 2375 return rc; 2376 } 2377 2378 void bnxt_qplib_mark_qp_error(void *qp_handle) 2379 { 2380 struct bnxt_qplib_qp *qp = qp_handle; 2381 2382 if (!qp) 2383 return; 2384 2385 /* Must block new posting of SQ and RQ */ 2386 qp->state = CMDQ_MODIFY_QP_NEW_STATE_ERR; 2387 bnxt_qplib_cancel_phantom_processing(qp); 2388 } 2389 2390 /* Note: SQE is valid from sw_sq_cons up to cqe_sq_cons (exclusive) 2391 * CQE is track from sw_cq_cons to max_element but valid only if VALID=1 2392 */ 2393 static int do_wa9060(struct bnxt_qplib_qp *qp, struct bnxt_qplib_cq *cq, 2394 u32 cq_cons, u32 swq_last, u32 cqe_sq_cons) 2395 { 2396 u32 peek_sw_cq_cons, peek_sq_cons_idx, peek_flags; 2397 struct bnxt_qplib_q *sq = &qp->sq; 2398 struct cq_req *peek_req_hwcqe; 2399 struct bnxt_qplib_qp *peek_qp; 2400 struct bnxt_qplib_q *peek_sq; 2401 struct bnxt_qplib_swq *swq; 2402 struct cq_base *peek_hwcqe; 2403 int i, rc = 0; 2404 2405 /* Normal mode */ 2406 /* Check for the psn_search marking before completing */ 2407 swq = &sq->swq[swq_last]; 2408 if (swq->psn_search && 2409 le32_to_cpu(swq->psn_search->flags_next_psn) & 0x80000000) { 2410 /* Unmark */ 2411 swq->psn_search->flags_next_psn = cpu_to_le32 2412 (le32_to_cpu(swq->psn_search->flags_next_psn) 2413 & ~0x80000000); 2414 dev_dbg(&cq->hwq.pdev->dev, 2415 "FP: Process Req cq_cons=0x%x qp=0x%x sq cons sw=0x%x cqe=0x%x marked!\n", 2416 cq_cons, qp->id, swq_last, cqe_sq_cons); 2417 sq->condition = true; 2418 sq->send_phantom = true; 2419 2420 /* TODO: Only ARM if the previous SQE is ARMALL */ 2421 bnxt_qplib_ring_db(&cq->dbinfo, DBC_DBC_TYPE_CQ_ARMALL); 2422 rc = -EAGAIN; 2423 goto out; 2424 } 2425 if (sq->condition) { 2426 /* Peek at the completions */ 2427 peek_flags = cq->dbinfo.flags; 2428 peek_sw_cq_cons = cq_cons; 2429 i = cq->hwq.max_elements; 2430 while (i--) { 2431 peek_hwcqe = bnxt_qplib_get_qe(&cq->hwq, 2432 peek_sw_cq_cons, NULL); 2433 /* If the next hwcqe is VALID */ 2434 if (CQE_CMP_VALID(peek_hwcqe, peek_flags)) { 2435 /* 2436 * The valid test of the entry must be done first before 2437 * reading any further. 2438 */ 2439 dma_rmb(); 2440 /* If the next hwcqe is a REQ */ 2441 if ((peek_hwcqe->cqe_type_toggle & 2442 CQ_BASE_CQE_TYPE_MASK) == 2443 CQ_BASE_CQE_TYPE_REQ) { 2444 peek_req_hwcqe = (struct cq_req *) 2445 peek_hwcqe; 2446 peek_qp = (struct bnxt_qplib_qp *) 2447 ((unsigned long) 2448 le64_to_cpu 2449 (peek_req_hwcqe->qp_handle)); 2450 peek_sq = &peek_qp->sq; 2451 peek_sq_cons_idx = 2452 ((le16_to_cpu( 2453 peek_req_hwcqe->sq_cons_idx) 2454 - 1) % sq->max_wqe); 2455 /* If the hwcqe's sq's wr_id matches */ 2456 if (peek_sq == sq && 2457 sq->swq[peek_sq_cons_idx].wr_id == 2458 BNXT_QPLIB_FENCE_WRID) { 2459 /* 2460 * Unbreak only if the phantom 2461 * comes back 2462 */ 2463 dev_dbg(&cq->hwq.pdev->dev, 2464 "FP: Got Phantom CQE\n"); 2465 sq->condition = false; 2466 sq->single = true; 2467 rc = 0; 2468 goto out; 2469 } 2470 } 2471 /* Valid but not the phantom, so keep looping */ 2472 } else { 2473 /* Not valid yet, just exit and wait */ 2474 rc = -EINVAL; 2475 goto out; 2476 } 2477 bnxt_qplib_hwq_incr_cons(cq->hwq.max_elements, 2478 &peek_sw_cq_cons, 2479 1, &peek_flags); 2480 } 2481 dev_err(&cq->hwq.pdev->dev, 2482 "Should not have come here! cq_cons=0x%x qp=0x%x sq cons sw=0x%x hw=0x%x\n", 2483 cq_cons, qp->id, swq_last, cqe_sq_cons); 2484 rc = -EINVAL; 2485 } 2486 out: 2487 return rc; 2488 } 2489 2490 static int bnxt_qplib_get_cqe_sq_cons(struct bnxt_qplib_q *sq, u32 cqe_slot) 2491 { 2492 struct bnxt_qplib_hwq *sq_hwq; 2493 struct bnxt_qplib_swq *swq; 2494 int cqe_sq_cons = -1; 2495 u32 start, last; 2496 2497 sq_hwq = &sq->hwq; 2498 2499 start = sq->swq_start; 2500 last = sq->swq_last; 2501 2502 while (last != start) { 2503 swq = &sq->swq[last]; 2504 if (swq->slot_idx == cqe_slot) { 2505 cqe_sq_cons = swq->next_idx; 2506 dev_err(&sq_hwq->pdev->dev, "%s: Found cons wqe = %d slot = %d\n", 2507 __func__, cqe_sq_cons, cqe_slot); 2508 break; 2509 } 2510 2511 last = swq->next_idx; 2512 } 2513 return cqe_sq_cons; 2514 } 2515 2516 static int bnxt_qplib_cq_process_req(struct bnxt_qplib_cq *cq, 2517 struct cq_req *hwcqe, 2518 struct bnxt_qplib_cqe **pcqe, int *budget, 2519 u32 cq_cons, struct bnxt_qplib_qp **lib_qp) 2520 { 2521 struct bnxt_qplib_swq *swq; 2522 struct bnxt_qplib_cqe *cqe; 2523 u32 cqe_sq_cons, slot_num; 2524 struct bnxt_qplib_qp *qp; 2525 struct bnxt_qplib_q *sq; 2526 int cqe_cons; 2527 int rc = 0; 2528 2529 qp = (struct bnxt_qplib_qp *)((unsigned long) 2530 le64_to_cpu(hwcqe->qp_handle)); 2531 if (!qp) { 2532 dev_err(&cq->hwq.pdev->dev, 2533 "FP: Process Req qp is NULL\n"); 2534 return -EINVAL; 2535 } 2536 sq = &qp->sq; 2537 2538 cqe_sq_cons = le16_to_cpu(hwcqe->sq_cons_idx) % sq->max_sw_wqe; 2539 if (qp->sq.flushed) { 2540 dev_dbg(&cq->hwq.pdev->dev, 2541 "%s: QP in Flush QP = %p\n", __func__, qp); 2542 goto done; 2543 } 2544 2545 if (__is_err_cqe_for_var_wqe(qp, hwcqe->status)) { 2546 slot_num = le16_to_cpu(hwcqe->sq_cons_idx); 2547 cqe_cons = bnxt_qplib_get_cqe_sq_cons(sq, slot_num); 2548 if (cqe_cons < 0) { 2549 dev_err(&cq->hwq.pdev->dev, "%s: Wrong SQ cons cqe_slot_indx = %d\n", 2550 __func__, slot_num); 2551 goto done; 2552 } 2553 cqe_sq_cons = cqe_cons; 2554 dev_err(&cq->hwq.pdev->dev, "%s: cqe_sq_cons = %d swq_last = %d swq_start = %d\n", 2555 __func__, cqe_sq_cons, sq->swq_last, sq->swq_start); 2556 } 2557 2558 /* Require to walk the sq's swq to fabricate CQEs for all previously 2559 * signaled SWQEs due to CQE aggregation from the current sq cons 2560 * to the cqe_sq_cons 2561 */ 2562 cqe = *pcqe; 2563 while (*budget) { 2564 if (sq->swq_last == cqe_sq_cons) 2565 /* Done */ 2566 break; 2567 2568 swq = &sq->swq[sq->swq_last]; 2569 memset(cqe, 0, sizeof(*cqe)); 2570 cqe->opcode = CQ_BASE_CQE_TYPE_REQ; 2571 cqe->qp_handle = (u64)(unsigned long)qp; 2572 cqe->src_qp = qp->id; 2573 cqe->wr_id = swq->wr_id; 2574 if (cqe->wr_id == BNXT_QPLIB_FENCE_WRID) 2575 goto skip; 2576 cqe->type = swq->type; 2577 2578 /* For the last CQE, check for status. For errors, regardless 2579 * of the request being signaled or not, it must complete with 2580 * the hwcqe error status 2581 */ 2582 if (swq->next_idx == cqe_sq_cons && 2583 hwcqe->status != CQ_REQ_STATUS_OK) { 2584 cqe->status = hwcqe->status; 2585 dev_err(&cq->hwq.pdev->dev, 2586 "FP: CQ Processed Req wr_id[%d] = 0x%llx with status 0x%x\n", 2587 sq->swq_last, cqe->wr_id, cqe->status); 2588 cqe++; 2589 (*budget)--; 2590 bnxt_qplib_mark_qp_error(qp); 2591 /* Add qp to flush list of the CQ */ 2592 bnxt_qplib_add_flush_qp(qp); 2593 } else { 2594 /* Before we complete, do WA 9060 */ 2595 if (do_wa9060(qp, cq, cq_cons, sq->swq_last, 2596 cqe_sq_cons)) { 2597 *lib_qp = qp; 2598 goto out; 2599 } 2600 if (swq->flags & SQ_SEND_FLAGS_SIGNAL_COMP) { 2601 cqe->status = CQ_REQ_STATUS_OK; 2602 cqe++; 2603 (*budget)--; 2604 } 2605 } 2606 skip: 2607 bnxt_qplib_hwq_incr_cons(sq->hwq.max_elements, &sq->hwq.cons, 2608 swq->slots, &sq->dbinfo.flags); 2609 sq->swq_last = swq->next_idx; 2610 if (sq->single) 2611 break; 2612 } 2613 out: 2614 *pcqe = cqe; 2615 if (sq->swq_last != cqe_sq_cons) { 2616 /* Out of budget */ 2617 rc = -EAGAIN; 2618 goto done; 2619 } 2620 /* 2621 * Back to normal completion mode only after it has completed all of 2622 * the WC for this CQE 2623 */ 2624 sq->single = false; 2625 done: 2626 return rc; 2627 } 2628 2629 static void bnxt_qplib_release_srqe(struct bnxt_qplib_srq *srq, u32 tag) 2630 { 2631 spin_lock(&srq->hwq.lock); 2632 srq->swq[srq->last_idx].next_idx = (int)tag; 2633 srq->last_idx = (int)tag; 2634 srq->swq[srq->last_idx].next_idx = -1; 2635 bnxt_qplib_hwq_incr_cons(srq->hwq.max_elements, &srq->hwq.cons, 2636 srq->dbinfo.max_slot, &srq->dbinfo.flags); 2637 spin_unlock(&srq->hwq.lock); 2638 } 2639 2640 static int bnxt_qplib_cq_process_res_rc(struct bnxt_qplib_cq *cq, 2641 struct cq_res_rc *hwcqe, 2642 struct bnxt_qplib_cqe **pcqe, 2643 int *budget) 2644 { 2645 struct bnxt_qplib_srq *srq; 2646 struct bnxt_qplib_cqe *cqe; 2647 struct bnxt_qplib_qp *qp; 2648 struct bnxt_qplib_q *rq; 2649 u32 wr_id_idx; 2650 2651 qp = (struct bnxt_qplib_qp *)((unsigned long) 2652 le64_to_cpu(hwcqe->qp_handle)); 2653 if (!qp) { 2654 dev_err(&cq->hwq.pdev->dev, "process_cq RC qp is NULL\n"); 2655 return -EINVAL; 2656 } 2657 if (qp->rq.flushed) { 2658 dev_dbg(&cq->hwq.pdev->dev, 2659 "%s: QP in Flush QP = %p\n", __func__, qp); 2660 return 0; 2661 } 2662 2663 cqe = *pcqe; 2664 cqe->opcode = hwcqe->cqe_type_toggle & CQ_BASE_CQE_TYPE_MASK; 2665 cqe->length = le32_to_cpu(hwcqe->length); 2666 cqe->invrkey = le32_to_cpu(hwcqe->imm_data_or_inv_r_key); 2667 cqe->mr_handle = le64_to_cpu(hwcqe->mr_handle); 2668 cqe->flags = le16_to_cpu(hwcqe->flags); 2669 cqe->status = hwcqe->status; 2670 cqe->qp_handle = (u64)(unsigned long)qp; 2671 2672 wr_id_idx = le32_to_cpu(hwcqe->srq_or_rq_wr_id) & 2673 CQ_RES_RC_SRQ_OR_RQ_WR_ID_MASK; 2674 if (cqe->flags & CQ_RES_RC_FLAGS_SRQ_SRQ) { 2675 srq = qp->srq; 2676 if (!srq) 2677 return -EINVAL; 2678 if (wr_id_idx >= srq->hwq.max_elements) { 2679 dev_err(&cq->hwq.pdev->dev, 2680 "FP: CQ Process RC wr_id idx 0x%x exceeded SRQ max 0x%x\n", 2681 wr_id_idx, srq->hwq.max_elements); 2682 return -EINVAL; 2683 } 2684 cqe->wr_id = srq->swq[wr_id_idx].wr_id; 2685 bnxt_qplib_release_srqe(srq, wr_id_idx); 2686 cqe++; 2687 (*budget)--; 2688 *pcqe = cqe; 2689 } else { 2690 struct bnxt_qplib_swq *swq; 2691 2692 rq = &qp->rq; 2693 if (wr_id_idx > (rq->max_wqe - 1)) { 2694 dev_err(&cq->hwq.pdev->dev, 2695 "FP: CQ Process RC wr_id idx 0x%x exceeded RQ max 0x%x\n", 2696 wr_id_idx, rq->max_wqe); 2697 return -EINVAL; 2698 } 2699 if (wr_id_idx != rq->swq_last) 2700 return -EINVAL; 2701 swq = &rq->swq[rq->swq_last]; 2702 cqe->wr_id = swq->wr_id; 2703 cqe++; 2704 (*budget)--; 2705 bnxt_qplib_hwq_incr_cons(rq->hwq.max_elements, &rq->hwq.cons, 2706 swq->slots, &rq->dbinfo.flags); 2707 rq->swq_last = swq->next_idx; 2708 *pcqe = cqe; 2709 2710 if (hwcqe->status != CQ_RES_RC_STATUS_OK) { 2711 qp->state = CMDQ_MODIFY_QP_NEW_STATE_ERR; 2712 /* Add qp to flush list of the CQ */ 2713 bnxt_qplib_add_flush_qp(qp); 2714 } 2715 } 2716 2717 return 0; 2718 } 2719 2720 static int bnxt_qplib_cq_process_res_ud(struct bnxt_qplib_cq *cq, 2721 struct cq_res_ud *hwcqe, 2722 struct bnxt_qplib_cqe **pcqe, 2723 int *budget) 2724 { 2725 struct bnxt_qplib_srq *srq; 2726 struct bnxt_qplib_cqe *cqe; 2727 struct bnxt_qplib_qp *qp; 2728 struct bnxt_qplib_q *rq; 2729 u32 wr_id_idx; 2730 2731 qp = (struct bnxt_qplib_qp *)((unsigned long) 2732 le64_to_cpu(hwcqe->qp_handle)); 2733 if (!qp) { 2734 dev_err(&cq->hwq.pdev->dev, "process_cq UD qp is NULL\n"); 2735 return -EINVAL; 2736 } 2737 if (qp->rq.flushed) { 2738 dev_dbg(&cq->hwq.pdev->dev, 2739 "%s: QP in Flush QP = %p\n", __func__, qp); 2740 return 0; 2741 } 2742 cqe = *pcqe; 2743 cqe->opcode = hwcqe->cqe_type_toggle & CQ_BASE_CQE_TYPE_MASK; 2744 cqe->length = le16_to_cpu(hwcqe->length) & CQ_RES_UD_LENGTH_MASK; 2745 cqe->cfa_meta = le16_to_cpu(hwcqe->cfa_metadata); 2746 cqe->invrkey = le32_to_cpu(hwcqe->imm_data); 2747 cqe->flags = le16_to_cpu(hwcqe->flags); 2748 cqe->status = hwcqe->status; 2749 cqe->qp_handle = (u64)(unsigned long)qp; 2750 /*FIXME: Endianness fix needed for smace */ 2751 memcpy(cqe->smac, hwcqe->src_mac, ETH_ALEN); 2752 wr_id_idx = le32_to_cpu(hwcqe->src_qp_high_srq_or_rq_wr_id) 2753 & CQ_RES_UD_SRQ_OR_RQ_WR_ID_MASK; 2754 cqe->src_qp = le16_to_cpu(hwcqe->src_qp_low) | 2755 ((le32_to_cpu( 2756 hwcqe->src_qp_high_srq_or_rq_wr_id) & 2757 CQ_RES_UD_SRC_QP_HIGH_MASK) >> 8); 2758 2759 if (cqe->flags & CQ_RES_RC_FLAGS_SRQ_SRQ) { 2760 srq = qp->srq; 2761 if (!srq) 2762 return -EINVAL; 2763 2764 if (wr_id_idx >= srq->hwq.max_elements) { 2765 dev_err(&cq->hwq.pdev->dev, 2766 "FP: CQ Process UD wr_id idx 0x%x exceeded SRQ max 0x%x\n", 2767 wr_id_idx, srq->hwq.max_elements); 2768 return -EINVAL; 2769 } 2770 cqe->wr_id = srq->swq[wr_id_idx].wr_id; 2771 bnxt_qplib_release_srqe(srq, wr_id_idx); 2772 cqe++; 2773 (*budget)--; 2774 *pcqe = cqe; 2775 } else { 2776 struct bnxt_qplib_swq *swq; 2777 2778 rq = &qp->rq; 2779 if (wr_id_idx > (rq->max_wqe - 1)) { 2780 dev_err(&cq->hwq.pdev->dev, 2781 "FP: CQ Process UD wr_id idx 0x%x exceeded RQ max 0x%x\n", 2782 wr_id_idx, rq->max_wqe); 2783 return -EINVAL; 2784 } 2785 2786 if (rq->swq_last != wr_id_idx) 2787 return -EINVAL; 2788 swq = &rq->swq[rq->swq_last]; 2789 cqe->wr_id = swq->wr_id; 2790 cqe++; 2791 (*budget)--; 2792 bnxt_qplib_hwq_incr_cons(rq->hwq.max_elements, &rq->hwq.cons, 2793 swq->slots, &rq->dbinfo.flags); 2794 rq->swq_last = swq->next_idx; 2795 *pcqe = cqe; 2796 2797 if (hwcqe->status != CQ_RES_RC_STATUS_OK) { 2798 qp->state = CMDQ_MODIFY_QP_NEW_STATE_ERR; 2799 /* Add qp to flush list of the CQ */ 2800 bnxt_qplib_add_flush_qp(qp); 2801 } 2802 } 2803 2804 return 0; 2805 } 2806 2807 bool bnxt_qplib_is_cq_empty(struct bnxt_qplib_cq *cq) 2808 { 2809 struct cq_base *hw_cqe; 2810 bool rc = true; 2811 2812 hw_cqe = bnxt_qplib_get_qe(&cq->hwq, cq->hwq.cons, NULL); 2813 /* Check for Valid bit. If the CQE is valid, return false */ 2814 rc = !CQE_CMP_VALID(hw_cqe, cq->dbinfo.flags); 2815 return rc; 2816 } 2817 2818 static int bnxt_qplib_cq_process_res_raweth_qp1(struct bnxt_qplib_cq *cq, 2819 struct cq_res_raweth_qp1 *hwcqe, 2820 struct bnxt_qplib_cqe **pcqe, 2821 int *budget) 2822 { 2823 struct bnxt_qplib_qp *qp; 2824 struct bnxt_qplib_q *rq; 2825 struct bnxt_qplib_srq *srq; 2826 struct bnxt_qplib_cqe *cqe; 2827 u32 wr_id_idx; 2828 2829 qp = (struct bnxt_qplib_qp *)((unsigned long) 2830 le64_to_cpu(hwcqe->qp_handle)); 2831 if (!qp) { 2832 dev_err(&cq->hwq.pdev->dev, "process_cq Raw/QP1 qp is NULL\n"); 2833 return -EINVAL; 2834 } 2835 if (qp->rq.flushed) { 2836 dev_dbg(&cq->hwq.pdev->dev, 2837 "%s: QP in Flush QP = %p\n", __func__, qp); 2838 return 0; 2839 } 2840 cqe = *pcqe; 2841 cqe->opcode = hwcqe->cqe_type_toggle & CQ_BASE_CQE_TYPE_MASK; 2842 cqe->flags = le16_to_cpu(hwcqe->flags); 2843 cqe->qp_handle = (u64)(unsigned long)qp; 2844 2845 wr_id_idx = 2846 le32_to_cpu(hwcqe->raweth_qp1_payload_offset_srq_or_rq_wr_id) 2847 & CQ_RES_RAWETH_QP1_SRQ_OR_RQ_WR_ID_MASK; 2848 cqe->src_qp = qp->id; 2849 if (qp->id == 1 && !cqe->length) { 2850 /* Add workaround for the length misdetection */ 2851 cqe->length = 296; 2852 } else { 2853 cqe->length = le16_to_cpu(hwcqe->length); 2854 } 2855 cqe->pkey_index = qp->pkey_index; 2856 memcpy(cqe->smac, qp->smac, 6); 2857 2858 cqe->raweth_qp1_flags = le16_to_cpu(hwcqe->raweth_qp1_flags); 2859 cqe->raweth_qp1_flags2 = le32_to_cpu(hwcqe->raweth_qp1_flags2); 2860 cqe->raweth_qp1_metadata = le32_to_cpu(hwcqe->raweth_qp1_metadata); 2861 2862 if (cqe->flags & CQ_RES_RAWETH_QP1_FLAGS_SRQ_SRQ) { 2863 srq = qp->srq; 2864 if (!srq) { 2865 dev_err(&cq->hwq.pdev->dev, 2866 "FP: SRQ used but not defined??\n"); 2867 return -EINVAL; 2868 } 2869 if (wr_id_idx >= srq->hwq.max_elements) { 2870 dev_err(&cq->hwq.pdev->dev, 2871 "FP: CQ Process Raw/QP1 wr_id idx 0x%x exceeded SRQ max 0x%x\n", 2872 wr_id_idx, srq->hwq.max_elements); 2873 return -EINVAL; 2874 } 2875 cqe->wr_id = srq->swq[wr_id_idx].wr_id; 2876 bnxt_qplib_release_srqe(srq, wr_id_idx); 2877 cqe++; 2878 (*budget)--; 2879 *pcqe = cqe; 2880 } else { 2881 struct bnxt_qplib_swq *swq; 2882 2883 rq = &qp->rq; 2884 if (wr_id_idx > (rq->max_wqe - 1)) { 2885 dev_err(&cq->hwq.pdev->dev, 2886 "FP: CQ Process Raw/QP1 RQ wr_id idx 0x%x exceeded RQ max 0x%x\n", 2887 wr_id_idx, rq->max_wqe); 2888 return -EINVAL; 2889 } 2890 if (rq->swq_last != wr_id_idx) 2891 return -EINVAL; 2892 swq = &rq->swq[rq->swq_last]; 2893 cqe->wr_id = swq->wr_id; 2894 cqe++; 2895 (*budget)--; 2896 bnxt_qplib_hwq_incr_cons(rq->hwq.max_elements, &rq->hwq.cons, 2897 swq->slots, &rq->dbinfo.flags); 2898 rq->swq_last = swq->next_idx; 2899 *pcqe = cqe; 2900 2901 if (hwcqe->status != CQ_RES_RC_STATUS_OK) { 2902 qp->state = CMDQ_MODIFY_QP_NEW_STATE_ERR; 2903 /* Add qp to flush list of the CQ */ 2904 bnxt_qplib_add_flush_qp(qp); 2905 } 2906 } 2907 2908 return 0; 2909 } 2910 2911 static int bnxt_qplib_cq_process_terminal(struct bnxt_qplib_cq *cq, 2912 struct cq_terminal *hwcqe, 2913 struct bnxt_qplib_cqe **pcqe, 2914 int *budget) 2915 { 2916 struct bnxt_qplib_qp *qp; 2917 struct bnxt_qplib_q *sq, *rq; 2918 struct bnxt_qplib_cqe *cqe; 2919 u32 swq_last = 0, cqe_cons; 2920 int rc = 0; 2921 2922 /* Check the Status */ 2923 if (hwcqe->status != CQ_TERMINAL_STATUS_OK) 2924 dev_warn(&cq->hwq.pdev->dev, 2925 "FP: CQ Process Terminal Error status = 0x%x\n", 2926 hwcqe->status); 2927 2928 qp = (struct bnxt_qplib_qp *)((unsigned long) 2929 le64_to_cpu(hwcqe->qp_handle)); 2930 if (!qp) 2931 return -EINVAL; 2932 2933 /* Must block new posting of SQ and RQ */ 2934 qp->state = CMDQ_MODIFY_QP_NEW_STATE_ERR; 2935 2936 sq = &qp->sq; 2937 rq = &qp->rq; 2938 2939 cqe_cons = le16_to_cpu(hwcqe->sq_cons_idx); 2940 if (cqe_cons == 0xFFFF) 2941 goto do_rq; 2942 cqe_cons %= sq->max_sw_wqe; 2943 2944 if (qp->sq.flushed) { 2945 dev_dbg(&cq->hwq.pdev->dev, 2946 "%s: QP in Flush QP = %p\n", __func__, qp); 2947 goto sq_done; 2948 } 2949 2950 /* Terminal CQE can also include aggregated successful CQEs prior. 2951 * So we must complete all CQEs from the current sq's cons to the 2952 * cq_cons with status OK 2953 */ 2954 cqe = *pcqe; 2955 while (*budget) { 2956 swq_last = sq->swq_last; 2957 if (swq_last == cqe_cons) 2958 break; 2959 if (sq->swq[swq_last].flags & SQ_SEND_FLAGS_SIGNAL_COMP) { 2960 memset(cqe, 0, sizeof(*cqe)); 2961 cqe->status = CQ_REQ_STATUS_OK; 2962 cqe->opcode = CQ_BASE_CQE_TYPE_REQ; 2963 cqe->qp_handle = (u64)(unsigned long)qp; 2964 cqe->src_qp = qp->id; 2965 cqe->wr_id = sq->swq[swq_last].wr_id; 2966 cqe->type = sq->swq[swq_last].type; 2967 cqe++; 2968 (*budget)--; 2969 } 2970 bnxt_qplib_hwq_incr_cons(sq->hwq.max_elements, &sq->hwq.cons, 2971 sq->swq[swq_last].slots, &sq->dbinfo.flags); 2972 sq->swq_last = sq->swq[swq_last].next_idx; 2973 } 2974 *pcqe = cqe; 2975 if (!(*budget) && swq_last != cqe_cons) { 2976 /* Out of budget */ 2977 rc = -EAGAIN; 2978 goto sq_done; 2979 } 2980 sq_done: 2981 if (rc) 2982 return rc; 2983 do_rq: 2984 cqe_cons = le16_to_cpu(hwcqe->rq_cons_idx); 2985 if (cqe_cons == 0xFFFF) { 2986 goto done; 2987 } else if (cqe_cons > rq->max_wqe - 1) { 2988 dev_err(&cq->hwq.pdev->dev, 2989 "FP: CQ Processed terminal reported rq_cons_idx 0x%x exceeds max 0x%x\n", 2990 cqe_cons, rq->max_wqe); 2991 rc = -EINVAL; 2992 goto done; 2993 } 2994 2995 if (qp->rq.flushed) { 2996 dev_dbg(&cq->hwq.pdev->dev, 2997 "%s: QP in Flush QP = %p\n", __func__, qp); 2998 rc = 0; 2999 goto done; 3000 } 3001 3002 /* Terminal CQE requires all posted RQEs to complete with FLUSHED_ERR 3003 * from the current rq->cons to the rq->prod regardless what the 3004 * rq->cons the terminal CQE indicates 3005 */ 3006 3007 /* Add qp to flush list of the CQ */ 3008 bnxt_qplib_add_flush_qp(qp); 3009 done: 3010 return rc; 3011 } 3012 3013 static int bnxt_qplib_cq_process_cutoff(struct bnxt_qplib_cq *cq, 3014 struct cq_cutoff *hwcqe) 3015 { 3016 /* Check the Status */ 3017 if (hwcqe->status != CQ_CUTOFF_STATUS_OK) { 3018 dev_err(&cq->hwq.pdev->dev, 3019 "FP: CQ Process Cutoff Error status = 0x%x\n", 3020 hwcqe->status); 3021 return -EINVAL; 3022 } 3023 clear_bit(CQ_FLAGS_RESIZE_IN_PROG, &cq->flags); 3024 wake_up_interruptible(&cq->waitq); 3025 3026 return 0; 3027 } 3028 3029 int bnxt_qplib_process_flush_list(struct bnxt_qplib_cq *cq, 3030 struct bnxt_qplib_cqe *cqe, 3031 int num_cqes) 3032 { 3033 struct bnxt_qplib_qp *qp = NULL; 3034 u32 budget = num_cqes; 3035 unsigned long flags; 3036 3037 spin_lock_irqsave(&cq->flush_lock, flags); 3038 list_for_each_entry(qp, &cq->sqf_head, sq_flush) { 3039 dev_dbg(&cq->hwq.pdev->dev, "FP: Flushing SQ QP= %p\n", qp); 3040 __flush_sq(&qp->sq, qp, &cqe, &budget); 3041 } 3042 3043 list_for_each_entry(qp, &cq->rqf_head, rq_flush) { 3044 dev_dbg(&cq->hwq.pdev->dev, "FP: Flushing RQ QP= %p\n", qp); 3045 __flush_rq(&qp->rq, qp, &cqe, &budget); 3046 } 3047 spin_unlock_irqrestore(&cq->flush_lock, flags); 3048 3049 return num_cqes - budget; 3050 } 3051 3052 int bnxt_qplib_poll_cq(struct bnxt_qplib_cq *cq, struct bnxt_qplib_cqe *cqe, 3053 int num_cqes, struct bnxt_qplib_qp **lib_qp) 3054 { 3055 struct cq_base *hw_cqe; 3056 int budget, rc = 0; 3057 u32 hw_polled = 0; 3058 u8 type; 3059 3060 budget = num_cqes; 3061 3062 while (budget) { 3063 hw_cqe = bnxt_qplib_get_qe(&cq->hwq, cq->hwq.cons, NULL); 3064 3065 /* Check for Valid bit */ 3066 if (!CQE_CMP_VALID(hw_cqe, cq->dbinfo.flags)) 3067 break; 3068 3069 /* 3070 * The valid test of the entry must be done first before 3071 * reading any further. 3072 */ 3073 dma_rmb(); 3074 /* From the device's respective CQE format to qplib_wc*/ 3075 type = hw_cqe->cqe_type_toggle & CQ_BASE_CQE_TYPE_MASK; 3076 switch (type) { 3077 case CQ_BASE_CQE_TYPE_REQ: 3078 rc = bnxt_qplib_cq_process_req(cq, 3079 (struct cq_req *)hw_cqe, 3080 &cqe, &budget, 3081 cq->hwq.cons, lib_qp); 3082 break; 3083 case CQ_BASE_CQE_TYPE_RES_RC: 3084 rc = bnxt_qplib_cq_process_res_rc(cq, 3085 (struct cq_res_rc *) 3086 hw_cqe, &cqe, 3087 &budget); 3088 break; 3089 case CQ_BASE_CQE_TYPE_RES_UD: 3090 rc = bnxt_qplib_cq_process_res_ud 3091 (cq, (struct cq_res_ud *)hw_cqe, &cqe, 3092 &budget); 3093 break; 3094 case CQ_BASE_CQE_TYPE_RES_RAWETH_QP1: 3095 rc = bnxt_qplib_cq_process_res_raweth_qp1 3096 (cq, (struct cq_res_raweth_qp1 *) 3097 hw_cqe, &cqe, &budget); 3098 break; 3099 case CQ_BASE_CQE_TYPE_TERMINAL: 3100 rc = bnxt_qplib_cq_process_terminal 3101 (cq, (struct cq_terminal *)hw_cqe, 3102 &cqe, &budget); 3103 break; 3104 case CQ_BASE_CQE_TYPE_CUT_OFF: 3105 bnxt_qplib_cq_process_cutoff 3106 (cq, (struct cq_cutoff *)hw_cqe); 3107 /* Done processing this CQ */ 3108 goto exit; 3109 default: 3110 dev_err(&cq->hwq.pdev->dev, 3111 "process_cq unknown type 0x%lx\n", 3112 hw_cqe->cqe_type_toggle & 3113 CQ_BASE_CQE_TYPE_MASK); 3114 rc = -EINVAL; 3115 break; 3116 } 3117 if (rc < 0) { 3118 if (rc == -EAGAIN) 3119 break; 3120 /* Error while processing the CQE, just skip to the 3121 * next one 3122 */ 3123 if (type != CQ_BASE_CQE_TYPE_TERMINAL) 3124 dev_err(&cq->hwq.pdev->dev, 3125 "process_cqe error rc = 0x%x\n", rc); 3126 } 3127 hw_polled++; 3128 bnxt_qplib_hwq_incr_cons(cq->hwq.max_elements, &cq->hwq.cons, 3129 1, &cq->dbinfo.flags); 3130 3131 } 3132 if (hw_polled) 3133 bnxt_qplib_ring_db(&cq->dbinfo, DBC_DBC_TYPE_CQ); 3134 exit: 3135 return num_cqes - budget; 3136 } 3137 3138 void bnxt_qplib_req_notify_cq(struct bnxt_qplib_cq *cq, u32 arm_type) 3139 { 3140 cq->dbinfo.toggle = cq->toggle; 3141 if (arm_type) 3142 bnxt_qplib_ring_db(&cq->dbinfo, arm_type); 3143 /* Using cq->arm_state variable to track whether to issue cq handler */ 3144 atomic_set(&cq->arm_state, 1); 3145 } 3146 3147 void bnxt_qplib_flush_cqn_wq(struct bnxt_qplib_qp *qp) 3148 { 3149 flush_workqueue(qp->scq->nq->cqn_wq); 3150 if (qp->scq != qp->rcq) 3151 flush_workqueue(qp->rcq->nq->cqn_wq); 3152 } 3153