xref: /linux/drivers/iio/proximity/sx9500.c (revision 4193c0f1d8631d439cea5f78329fe70f3a6e9128)
1*4193c0f1SVlad Dogaru /*
2*4193c0f1SVlad Dogaru  * Copyright (c) 2014 Intel Corporation
3*4193c0f1SVlad Dogaru  *
4*4193c0f1SVlad Dogaru  * Driver for Semtech's SX9500 capacitive proximity/button solution.
5*4193c0f1SVlad Dogaru  * Datasheet available at
6*4193c0f1SVlad Dogaru  * <http://www.semtech.com/images/datasheet/sx9500.pdf>.
7*4193c0f1SVlad Dogaru  *
8*4193c0f1SVlad Dogaru  * This program is free software; you can redistribute it and/or modify it
9*4193c0f1SVlad Dogaru  * under the terms of the GNU General Public License version 2 as published by
10*4193c0f1SVlad Dogaru  * the Free Software Foundation.
11*4193c0f1SVlad Dogaru  */
12*4193c0f1SVlad Dogaru 
13*4193c0f1SVlad Dogaru #include <linux/kernel.h>
14*4193c0f1SVlad Dogaru #include <linux/slab.h>
15*4193c0f1SVlad Dogaru #include <linux/module.h>
16*4193c0f1SVlad Dogaru #include <linux/i2c.h>
17*4193c0f1SVlad Dogaru #include <linux/irq.h>
18*4193c0f1SVlad Dogaru #include <linux/acpi.h>
19*4193c0f1SVlad Dogaru #include <linux/gpio/consumer.h>
20*4193c0f1SVlad Dogaru #include <linux/regmap.h>
21*4193c0f1SVlad Dogaru 
22*4193c0f1SVlad Dogaru #include <linux/iio/iio.h>
23*4193c0f1SVlad Dogaru #include <linux/iio/buffer.h>
24*4193c0f1SVlad Dogaru #include <linux/iio/sysfs.h>
25*4193c0f1SVlad Dogaru #include <linux/iio/events.h>
26*4193c0f1SVlad Dogaru #include <linux/iio/trigger.h>
27*4193c0f1SVlad Dogaru #include <linux/iio/triggered_buffer.h>
28*4193c0f1SVlad Dogaru #include <linux/iio/trigger_consumer.h>
29*4193c0f1SVlad Dogaru 
30*4193c0f1SVlad Dogaru #define SX9500_DRIVER_NAME		"sx9500"
31*4193c0f1SVlad Dogaru #define SX9500_IRQ_NAME			"sx9500_event"
32*4193c0f1SVlad Dogaru #define SX9500_GPIO_NAME		"sx9500_gpio"
33*4193c0f1SVlad Dogaru 
34*4193c0f1SVlad Dogaru /* Register definitions. */
35*4193c0f1SVlad Dogaru #define SX9500_REG_IRQ_SRC		0x00
36*4193c0f1SVlad Dogaru #define SX9500_REG_STAT			0x01
37*4193c0f1SVlad Dogaru #define SX9500_REG_IRQ_MSK		0x03
38*4193c0f1SVlad Dogaru 
39*4193c0f1SVlad Dogaru #define SX9500_REG_PROX_CTRL0		0x06
40*4193c0f1SVlad Dogaru #define SX9500_REG_PROX_CTRL1		0x07
41*4193c0f1SVlad Dogaru #define SX9500_REG_PROX_CTRL2		0x08
42*4193c0f1SVlad Dogaru #define SX9500_REG_PROX_CTRL3		0x09
43*4193c0f1SVlad Dogaru #define SX9500_REG_PROX_CTRL4		0x0a
44*4193c0f1SVlad Dogaru #define SX9500_REG_PROX_CTRL5		0x0b
45*4193c0f1SVlad Dogaru #define SX9500_REG_PROX_CTRL6		0x0c
46*4193c0f1SVlad Dogaru #define SX9500_REG_PROX_CTRL7		0x0d
47*4193c0f1SVlad Dogaru #define SX9500_REG_PROX_CTRL8		0x0e
48*4193c0f1SVlad Dogaru 
49*4193c0f1SVlad Dogaru #define SX9500_REG_SENSOR_SEL		0x20
50*4193c0f1SVlad Dogaru #define SX9500_REG_USE_MSB		0x21
51*4193c0f1SVlad Dogaru #define SX9500_REG_USE_LSB		0x22
52*4193c0f1SVlad Dogaru #define SX9500_REG_AVG_MSB		0x23
53*4193c0f1SVlad Dogaru #define SX9500_REG_AVG_LSB		0x24
54*4193c0f1SVlad Dogaru #define SX9500_REG_DIFF_MSB		0x25
55*4193c0f1SVlad Dogaru #define SX9500_REG_DIFF_LSB		0x26
56*4193c0f1SVlad Dogaru #define SX9500_REG_OFFSET_MSB		0x27
57*4193c0f1SVlad Dogaru #define SX9500_REG_OFFSET_LSB		0x28
58*4193c0f1SVlad Dogaru 
59*4193c0f1SVlad Dogaru #define SX9500_REG_RESET		0x7f
60*4193c0f1SVlad Dogaru 
61*4193c0f1SVlad Dogaru /* Write this to REG_RESET to do a soft reset. */
62*4193c0f1SVlad Dogaru #define SX9500_SOFT_RESET		0xde
63*4193c0f1SVlad Dogaru 
64*4193c0f1SVlad Dogaru #define SX9500_SCAN_PERIOD_MASK		GENMASK(6, 4)
65*4193c0f1SVlad Dogaru #define SX9500_SCAN_PERIOD_SHIFT	4
66*4193c0f1SVlad Dogaru 
67*4193c0f1SVlad Dogaru /*
68*4193c0f1SVlad Dogaru  * These serve for identifying IRQ source in the IRQ_SRC register, and
69*4193c0f1SVlad Dogaru  * also for masking the IRQs in the IRQ_MSK register.
70*4193c0f1SVlad Dogaru  */
71*4193c0f1SVlad Dogaru #define SX9500_CLOSE_IRQ		BIT(6)
72*4193c0f1SVlad Dogaru #define SX9500_FAR_IRQ			BIT(5)
73*4193c0f1SVlad Dogaru #define SX9500_CONVDONE_IRQ		BIT(3)
74*4193c0f1SVlad Dogaru 
75*4193c0f1SVlad Dogaru #define SX9500_PROXSTAT_SHIFT		4
76*4193c0f1SVlad Dogaru 
77*4193c0f1SVlad Dogaru #define SX9500_NUM_CHANNELS		4
78*4193c0f1SVlad Dogaru 
79*4193c0f1SVlad Dogaru struct sx9500_data {
80*4193c0f1SVlad Dogaru 	struct mutex mutex;
81*4193c0f1SVlad Dogaru 	struct i2c_client *client;
82*4193c0f1SVlad Dogaru 	struct iio_trigger *trig;
83*4193c0f1SVlad Dogaru 	struct regmap *regmap;
84*4193c0f1SVlad Dogaru 	/*
85*4193c0f1SVlad Dogaru 	 * Last reading of the proximity status for each channel.  We
86*4193c0f1SVlad Dogaru 	 * only send an event to user space when this changes.
87*4193c0f1SVlad Dogaru 	 */
88*4193c0f1SVlad Dogaru 	bool prox_stat[SX9500_NUM_CHANNELS];
89*4193c0f1SVlad Dogaru 	bool event_enabled[SX9500_NUM_CHANNELS];
90*4193c0f1SVlad Dogaru 	bool trigger_enabled;
91*4193c0f1SVlad Dogaru 	u16 *buffer;
92*4193c0f1SVlad Dogaru };
93*4193c0f1SVlad Dogaru 
94*4193c0f1SVlad Dogaru static const struct iio_event_spec sx9500_events[] = {
95*4193c0f1SVlad Dogaru 	{
96*4193c0f1SVlad Dogaru 		.type = IIO_EV_TYPE_THRESH,
97*4193c0f1SVlad Dogaru 		.dir = IIO_EV_DIR_EITHER,
98*4193c0f1SVlad Dogaru 		.mask_separate = BIT(IIO_EV_INFO_ENABLE),
99*4193c0f1SVlad Dogaru 	},
100*4193c0f1SVlad Dogaru };
101*4193c0f1SVlad Dogaru 
102*4193c0f1SVlad Dogaru #define SX9500_CHANNEL(idx)					\
103*4193c0f1SVlad Dogaru 	{							\
104*4193c0f1SVlad Dogaru 		.type = IIO_PROXIMITY,				\
105*4193c0f1SVlad Dogaru 		.info_mask_separate = BIT(IIO_CHAN_INFO_RAW),	\
106*4193c0f1SVlad Dogaru 		.info_mask_shared_by_all = BIT(IIO_CHAN_INFO_SAMP_FREQ), \
107*4193c0f1SVlad Dogaru 		.indexed = 1,					\
108*4193c0f1SVlad Dogaru 		.channel = idx,					\
109*4193c0f1SVlad Dogaru 		.event_spec = sx9500_events,			\
110*4193c0f1SVlad Dogaru 		.num_event_specs = ARRAY_SIZE(sx9500_events),	\
111*4193c0f1SVlad Dogaru 		.scan_index = idx,				\
112*4193c0f1SVlad Dogaru 		.scan_type = {					\
113*4193c0f1SVlad Dogaru 			.sign = 'u',				\
114*4193c0f1SVlad Dogaru 			.realbits = 16,				\
115*4193c0f1SVlad Dogaru 			.storagebits = 16,			\
116*4193c0f1SVlad Dogaru 			.shift = 0,				\
117*4193c0f1SVlad Dogaru 		},						\
118*4193c0f1SVlad Dogaru 	}
119*4193c0f1SVlad Dogaru 
120*4193c0f1SVlad Dogaru static const struct iio_chan_spec sx9500_channels[] = {
121*4193c0f1SVlad Dogaru 	SX9500_CHANNEL(0),
122*4193c0f1SVlad Dogaru 	SX9500_CHANNEL(1),
123*4193c0f1SVlad Dogaru 	SX9500_CHANNEL(2),
124*4193c0f1SVlad Dogaru 	SX9500_CHANNEL(3),
125*4193c0f1SVlad Dogaru 	IIO_CHAN_SOFT_TIMESTAMP(4),
126*4193c0f1SVlad Dogaru };
127*4193c0f1SVlad Dogaru 
128*4193c0f1SVlad Dogaru static const struct {
129*4193c0f1SVlad Dogaru 	int val;
130*4193c0f1SVlad Dogaru 	int val2;
131*4193c0f1SVlad Dogaru } sx9500_samp_freq_table[] = {
132*4193c0f1SVlad Dogaru 	{33, 333333},
133*4193c0f1SVlad Dogaru 	{16, 666666},
134*4193c0f1SVlad Dogaru 	{11, 111111},
135*4193c0f1SVlad Dogaru 	{8, 333333},
136*4193c0f1SVlad Dogaru 	{6, 666666},
137*4193c0f1SVlad Dogaru 	{5, 0},
138*4193c0f1SVlad Dogaru 	{3, 333333},
139*4193c0f1SVlad Dogaru 	{2, 500000},
140*4193c0f1SVlad Dogaru };
141*4193c0f1SVlad Dogaru 
142*4193c0f1SVlad Dogaru static const struct regmap_range sx9500_writable_reg_ranges[] = {
143*4193c0f1SVlad Dogaru 	regmap_reg_range(SX9500_REG_IRQ_MSK, SX9500_REG_IRQ_MSK),
144*4193c0f1SVlad Dogaru 	regmap_reg_range(SX9500_REG_PROX_CTRL0, SX9500_REG_PROX_CTRL8),
145*4193c0f1SVlad Dogaru 	regmap_reg_range(SX9500_REG_SENSOR_SEL, SX9500_REG_SENSOR_SEL),
146*4193c0f1SVlad Dogaru 	regmap_reg_range(SX9500_REG_OFFSET_MSB, SX9500_REG_OFFSET_LSB),
147*4193c0f1SVlad Dogaru 	regmap_reg_range(SX9500_REG_RESET, SX9500_REG_RESET),
148*4193c0f1SVlad Dogaru };
149*4193c0f1SVlad Dogaru 
150*4193c0f1SVlad Dogaru static const struct regmap_access_table sx9500_writeable_regs = {
151*4193c0f1SVlad Dogaru 	.yes_ranges = sx9500_writable_reg_ranges,
152*4193c0f1SVlad Dogaru 	.n_yes_ranges = ARRAY_SIZE(sx9500_writable_reg_ranges),
153*4193c0f1SVlad Dogaru };
154*4193c0f1SVlad Dogaru 
155*4193c0f1SVlad Dogaru /*
156*4193c0f1SVlad Dogaru  * All allocated registers are readable, so we just list unallocated
157*4193c0f1SVlad Dogaru  * ones.
158*4193c0f1SVlad Dogaru  */
159*4193c0f1SVlad Dogaru static const struct regmap_range sx9500_non_readable_reg_ranges[] = {
160*4193c0f1SVlad Dogaru 	regmap_reg_range(SX9500_REG_STAT + 1, SX9500_REG_STAT + 1),
161*4193c0f1SVlad Dogaru 	regmap_reg_range(SX9500_REG_IRQ_MSK + 1, SX9500_REG_PROX_CTRL0 - 1),
162*4193c0f1SVlad Dogaru 	regmap_reg_range(SX9500_REG_PROX_CTRL8 + 1, SX9500_REG_SENSOR_SEL - 1),
163*4193c0f1SVlad Dogaru 	regmap_reg_range(SX9500_REG_OFFSET_LSB + 1, SX9500_REG_RESET - 1),
164*4193c0f1SVlad Dogaru };
165*4193c0f1SVlad Dogaru 
166*4193c0f1SVlad Dogaru static const struct regmap_access_table sx9500_readable_regs = {
167*4193c0f1SVlad Dogaru 	.no_ranges = sx9500_non_readable_reg_ranges,
168*4193c0f1SVlad Dogaru 	.n_no_ranges = ARRAY_SIZE(sx9500_non_readable_reg_ranges),
169*4193c0f1SVlad Dogaru };
170*4193c0f1SVlad Dogaru 
171*4193c0f1SVlad Dogaru static const struct regmap_range sx9500_volatile_reg_ranges[] = {
172*4193c0f1SVlad Dogaru 	regmap_reg_range(SX9500_REG_IRQ_SRC, SX9500_REG_STAT),
173*4193c0f1SVlad Dogaru 	regmap_reg_range(SX9500_REG_USE_MSB, SX9500_REG_OFFSET_LSB),
174*4193c0f1SVlad Dogaru 	regmap_reg_range(SX9500_REG_RESET, SX9500_REG_RESET),
175*4193c0f1SVlad Dogaru };
176*4193c0f1SVlad Dogaru 
177*4193c0f1SVlad Dogaru static const struct regmap_access_table sx9500_volatile_regs = {
178*4193c0f1SVlad Dogaru 	.yes_ranges = sx9500_volatile_reg_ranges,
179*4193c0f1SVlad Dogaru 	.n_yes_ranges = ARRAY_SIZE(sx9500_volatile_reg_ranges),
180*4193c0f1SVlad Dogaru };
181*4193c0f1SVlad Dogaru 
182*4193c0f1SVlad Dogaru static const struct regmap_config sx9500_regmap_config = {
183*4193c0f1SVlad Dogaru 	.reg_bits = 8,
184*4193c0f1SVlad Dogaru 	.val_bits = 8,
185*4193c0f1SVlad Dogaru 
186*4193c0f1SVlad Dogaru 	.max_register = SX9500_REG_RESET,
187*4193c0f1SVlad Dogaru 	.cache_type = REGCACHE_RBTREE,
188*4193c0f1SVlad Dogaru 
189*4193c0f1SVlad Dogaru 	.wr_table = &sx9500_writeable_regs,
190*4193c0f1SVlad Dogaru 	.rd_table = &sx9500_readable_regs,
191*4193c0f1SVlad Dogaru 	.volatile_table = &sx9500_volatile_regs,
192*4193c0f1SVlad Dogaru };
193*4193c0f1SVlad Dogaru 
194*4193c0f1SVlad Dogaru static int sx9500_read_proximity(struct sx9500_data *data,
195*4193c0f1SVlad Dogaru 				 const struct iio_chan_spec *chan,
196*4193c0f1SVlad Dogaru 				 int *val)
197*4193c0f1SVlad Dogaru {
198*4193c0f1SVlad Dogaru 	int ret;
199*4193c0f1SVlad Dogaru 	__be16 regval;
200*4193c0f1SVlad Dogaru 
201*4193c0f1SVlad Dogaru 	ret = regmap_write(data->regmap, SX9500_REG_SENSOR_SEL, chan->channel);
202*4193c0f1SVlad Dogaru 	if (ret < 0)
203*4193c0f1SVlad Dogaru 		return ret;
204*4193c0f1SVlad Dogaru 
205*4193c0f1SVlad Dogaru 	ret = regmap_bulk_read(data->regmap, SX9500_REG_USE_MSB, &regval, 2);
206*4193c0f1SVlad Dogaru 	if (ret < 0)
207*4193c0f1SVlad Dogaru 		return ret;
208*4193c0f1SVlad Dogaru 
209*4193c0f1SVlad Dogaru 	*val = 32767 - (s16)be16_to_cpu(regval);
210*4193c0f1SVlad Dogaru 
211*4193c0f1SVlad Dogaru 	return IIO_VAL_INT;
212*4193c0f1SVlad Dogaru }
213*4193c0f1SVlad Dogaru 
214*4193c0f1SVlad Dogaru static int sx9500_read_samp_freq(struct sx9500_data *data,
215*4193c0f1SVlad Dogaru 				 int *val, int *val2)
216*4193c0f1SVlad Dogaru {
217*4193c0f1SVlad Dogaru 	int ret;
218*4193c0f1SVlad Dogaru 	unsigned int regval;
219*4193c0f1SVlad Dogaru 
220*4193c0f1SVlad Dogaru 	mutex_lock(&data->mutex);
221*4193c0f1SVlad Dogaru 	ret = regmap_read(data->regmap, SX9500_REG_PROX_CTRL0, &regval);
222*4193c0f1SVlad Dogaru 	mutex_unlock(&data->mutex);
223*4193c0f1SVlad Dogaru 
224*4193c0f1SVlad Dogaru 	if (ret < 0)
225*4193c0f1SVlad Dogaru 		return ret;
226*4193c0f1SVlad Dogaru 
227*4193c0f1SVlad Dogaru 	regval = (regval & SX9500_SCAN_PERIOD_MASK) >> SX9500_SCAN_PERIOD_SHIFT;
228*4193c0f1SVlad Dogaru 	*val = sx9500_samp_freq_table[regval].val;
229*4193c0f1SVlad Dogaru 	*val2 = sx9500_samp_freq_table[regval].val2;
230*4193c0f1SVlad Dogaru 
231*4193c0f1SVlad Dogaru 	return IIO_VAL_INT_PLUS_MICRO;
232*4193c0f1SVlad Dogaru }
233*4193c0f1SVlad Dogaru 
234*4193c0f1SVlad Dogaru static int sx9500_read_raw(struct iio_dev *indio_dev,
235*4193c0f1SVlad Dogaru 			   const struct iio_chan_spec *chan,
236*4193c0f1SVlad Dogaru 			   int *val, int *val2, long mask)
237*4193c0f1SVlad Dogaru {
238*4193c0f1SVlad Dogaru 	struct sx9500_data *data = iio_priv(indio_dev);
239*4193c0f1SVlad Dogaru 	int ret;
240*4193c0f1SVlad Dogaru 
241*4193c0f1SVlad Dogaru 	switch (chan->type) {
242*4193c0f1SVlad Dogaru 	case IIO_PROXIMITY:
243*4193c0f1SVlad Dogaru 		switch (mask) {
244*4193c0f1SVlad Dogaru 		case IIO_CHAN_INFO_RAW:
245*4193c0f1SVlad Dogaru 			if (iio_buffer_enabled(indio_dev))
246*4193c0f1SVlad Dogaru 				return -EBUSY;
247*4193c0f1SVlad Dogaru 			mutex_lock(&data->mutex);
248*4193c0f1SVlad Dogaru 			ret = sx9500_read_proximity(data, chan, val);
249*4193c0f1SVlad Dogaru 			mutex_unlock(&data->mutex);
250*4193c0f1SVlad Dogaru 			return ret;
251*4193c0f1SVlad Dogaru 		case IIO_CHAN_INFO_SAMP_FREQ:
252*4193c0f1SVlad Dogaru 			return sx9500_read_samp_freq(data, val, val2);
253*4193c0f1SVlad Dogaru 		default:
254*4193c0f1SVlad Dogaru 			return -EINVAL;
255*4193c0f1SVlad Dogaru 		}
256*4193c0f1SVlad Dogaru 	default:
257*4193c0f1SVlad Dogaru 		return -EINVAL;
258*4193c0f1SVlad Dogaru 	}
259*4193c0f1SVlad Dogaru }
260*4193c0f1SVlad Dogaru 
261*4193c0f1SVlad Dogaru static int sx9500_set_samp_freq(struct sx9500_data *data,
262*4193c0f1SVlad Dogaru 				int val, int val2)
263*4193c0f1SVlad Dogaru {
264*4193c0f1SVlad Dogaru 	int i, ret;
265*4193c0f1SVlad Dogaru 
266*4193c0f1SVlad Dogaru 	for (i = 0; i < ARRAY_SIZE(sx9500_samp_freq_table); i++)
267*4193c0f1SVlad Dogaru 		if (val == sx9500_samp_freq_table[i].val &&
268*4193c0f1SVlad Dogaru 		    val2 == sx9500_samp_freq_table[i].val2)
269*4193c0f1SVlad Dogaru 			break;
270*4193c0f1SVlad Dogaru 
271*4193c0f1SVlad Dogaru 	if (i == ARRAY_SIZE(sx9500_samp_freq_table))
272*4193c0f1SVlad Dogaru 		return -EINVAL;
273*4193c0f1SVlad Dogaru 
274*4193c0f1SVlad Dogaru 	mutex_lock(&data->mutex);
275*4193c0f1SVlad Dogaru 
276*4193c0f1SVlad Dogaru 	ret = regmap_update_bits(data->regmap, SX9500_REG_PROX_CTRL0,
277*4193c0f1SVlad Dogaru 				 SX9500_SCAN_PERIOD_MASK,
278*4193c0f1SVlad Dogaru 				 i << SX9500_SCAN_PERIOD_SHIFT);
279*4193c0f1SVlad Dogaru 
280*4193c0f1SVlad Dogaru 	mutex_unlock(&data->mutex);
281*4193c0f1SVlad Dogaru 
282*4193c0f1SVlad Dogaru 	return ret;
283*4193c0f1SVlad Dogaru }
284*4193c0f1SVlad Dogaru 
285*4193c0f1SVlad Dogaru static int sx9500_write_raw(struct iio_dev *indio_dev,
286*4193c0f1SVlad Dogaru 			    const struct iio_chan_spec *chan,
287*4193c0f1SVlad Dogaru 			    int val, int val2, long mask)
288*4193c0f1SVlad Dogaru {
289*4193c0f1SVlad Dogaru 	struct sx9500_data *data = iio_priv(indio_dev);
290*4193c0f1SVlad Dogaru 
291*4193c0f1SVlad Dogaru 	switch (chan->type) {
292*4193c0f1SVlad Dogaru 	case IIO_PROXIMITY:
293*4193c0f1SVlad Dogaru 		switch (mask) {
294*4193c0f1SVlad Dogaru 		case IIO_CHAN_INFO_SAMP_FREQ:
295*4193c0f1SVlad Dogaru 			return sx9500_set_samp_freq(data, val, val2);
296*4193c0f1SVlad Dogaru 		default:
297*4193c0f1SVlad Dogaru 			return -EINVAL;
298*4193c0f1SVlad Dogaru 		}
299*4193c0f1SVlad Dogaru 	default:
300*4193c0f1SVlad Dogaru 		return -EINVAL;
301*4193c0f1SVlad Dogaru 	}
302*4193c0f1SVlad Dogaru }
303*4193c0f1SVlad Dogaru 
304*4193c0f1SVlad Dogaru static irqreturn_t sx9500_irq_handler(int irq, void *private)
305*4193c0f1SVlad Dogaru {
306*4193c0f1SVlad Dogaru 	struct iio_dev *indio_dev = private;
307*4193c0f1SVlad Dogaru 	struct sx9500_data *data = iio_priv(indio_dev);
308*4193c0f1SVlad Dogaru 
309*4193c0f1SVlad Dogaru 	if (data->trigger_enabled)
310*4193c0f1SVlad Dogaru 		iio_trigger_poll(data->trig);
311*4193c0f1SVlad Dogaru 
312*4193c0f1SVlad Dogaru 	/*
313*4193c0f1SVlad Dogaru 	 * Even if no event is enabled, we need to wake the thread to
314*4193c0f1SVlad Dogaru 	 * clear the interrupt state by reading SX9500_REG_IRQ_SRC.  It
315*4193c0f1SVlad Dogaru 	 * is not possible to do that here because regmap_read takes a
316*4193c0f1SVlad Dogaru 	 * mutex.
317*4193c0f1SVlad Dogaru 	 */
318*4193c0f1SVlad Dogaru 	return IRQ_WAKE_THREAD;
319*4193c0f1SVlad Dogaru }
320*4193c0f1SVlad Dogaru 
321*4193c0f1SVlad Dogaru static irqreturn_t sx9500_irq_thread_handler(int irq, void *private)
322*4193c0f1SVlad Dogaru {
323*4193c0f1SVlad Dogaru 	struct iio_dev *indio_dev = private;
324*4193c0f1SVlad Dogaru 	struct sx9500_data *data = iio_priv(indio_dev);
325*4193c0f1SVlad Dogaru 	int ret;
326*4193c0f1SVlad Dogaru 	unsigned int val, chan;
327*4193c0f1SVlad Dogaru 
328*4193c0f1SVlad Dogaru 	mutex_lock(&data->mutex);
329*4193c0f1SVlad Dogaru 
330*4193c0f1SVlad Dogaru 	ret = regmap_read(data->regmap, SX9500_REG_IRQ_SRC, &val);
331*4193c0f1SVlad Dogaru 	if (ret < 0) {
332*4193c0f1SVlad Dogaru 		dev_err(&data->client->dev, "i2c transfer error in irq\n");
333*4193c0f1SVlad Dogaru 		goto out;
334*4193c0f1SVlad Dogaru 	}
335*4193c0f1SVlad Dogaru 
336*4193c0f1SVlad Dogaru 	if (!(val & (SX9500_CLOSE_IRQ | SX9500_FAR_IRQ)))
337*4193c0f1SVlad Dogaru 		goto out;
338*4193c0f1SVlad Dogaru 
339*4193c0f1SVlad Dogaru 	ret = regmap_read(data->regmap, SX9500_REG_STAT, &val);
340*4193c0f1SVlad Dogaru 	if (ret < 0) {
341*4193c0f1SVlad Dogaru 		dev_err(&data->client->dev, "i2c transfer error in irq\n");
342*4193c0f1SVlad Dogaru 		goto out;
343*4193c0f1SVlad Dogaru 	}
344*4193c0f1SVlad Dogaru 
345*4193c0f1SVlad Dogaru 	val >>= SX9500_PROXSTAT_SHIFT;
346*4193c0f1SVlad Dogaru 	for (chan = 0; chan < SX9500_NUM_CHANNELS; chan++) {
347*4193c0f1SVlad Dogaru 		int dir;
348*4193c0f1SVlad Dogaru 		u64 ev;
349*4193c0f1SVlad Dogaru 		bool new_prox = val & BIT(chan);
350*4193c0f1SVlad Dogaru 
351*4193c0f1SVlad Dogaru 		if (!data->event_enabled[chan])
352*4193c0f1SVlad Dogaru 			continue;
353*4193c0f1SVlad Dogaru 		if (new_prox == data->prox_stat[chan])
354*4193c0f1SVlad Dogaru 			/* No change on this channel. */
355*4193c0f1SVlad Dogaru 			continue;
356*4193c0f1SVlad Dogaru 
357*4193c0f1SVlad Dogaru 		dir = new_prox ? IIO_EV_DIR_FALLING :
358*4193c0f1SVlad Dogaru 			IIO_EV_DIR_RISING;
359*4193c0f1SVlad Dogaru 		ev = IIO_UNMOD_EVENT_CODE(IIO_PROXIMITY,
360*4193c0f1SVlad Dogaru 					  chan,
361*4193c0f1SVlad Dogaru 					  IIO_EV_TYPE_THRESH,
362*4193c0f1SVlad Dogaru 					  dir);
363*4193c0f1SVlad Dogaru 		iio_push_event(indio_dev, ev, iio_get_time_ns());
364*4193c0f1SVlad Dogaru 		data->prox_stat[chan] = new_prox;
365*4193c0f1SVlad Dogaru 	}
366*4193c0f1SVlad Dogaru 
367*4193c0f1SVlad Dogaru out:
368*4193c0f1SVlad Dogaru 	mutex_unlock(&data->mutex);
369*4193c0f1SVlad Dogaru 
370*4193c0f1SVlad Dogaru 	return IRQ_HANDLED;
371*4193c0f1SVlad Dogaru }
372*4193c0f1SVlad Dogaru 
373*4193c0f1SVlad Dogaru static int sx9500_read_event_config(struct iio_dev *indio_dev,
374*4193c0f1SVlad Dogaru 				    const struct iio_chan_spec *chan,
375*4193c0f1SVlad Dogaru 				    enum iio_event_type type,
376*4193c0f1SVlad Dogaru 				    enum iio_event_direction dir)
377*4193c0f1SVlad Dogaru {
378*4193c0f1SVlad Dogaru 	struct sx9500_data *data = iio_priv(indio_dev);
379*4193c0f1SVlad Dogaru 
380*4193c0f1SVlad Dogaru 	if (chan->type != IIO_PROXIMITY || type != IIO_EV_TYPE_THRESH ||
381*4193c0f1SVlad Dogaru 	    dir != IIO_EV_DIR_EITHER)
382*4193c0f1SVlad Dogaru 		return -EINVAL;
383*4193c0f1SVlad Dogaru 
384*4193c0f1SVlad Dogaru 	return data->event_enabled[chan->channel];
385*4193c0f1SVlad Dogaru }
386*4193c0f1SVlad Dogaru 
387*4193c0f1SVlad Dogaru static int sx9500_write_event_config(struct iio_dev *indio_dev,
388*4193c0f1SVlad Dogaru 				     const struct iio_chan_spec *chan,
389*4193c0f1SVlad Dogaru 				     enum iio_event_type type,
390*4193c0f1SVlad Dogaru 				     enum iio_event_direction dir,
391*4193c0f1SVlad Dogaru 				     int state)
392*4193c0f1SVlad Dogaru {
393*4193c0f1SVlad Dogaru 	struct sx9500_data *data = iio_priv(indio_dev);
394*4193c0f1SVlad Dogaru 	int ret, i;
395*4193c0f1SVlad Dogaru 	bool any_active = false;
396*4193c0f1SVlad Dogaru 	unsigned int irqmask;
397*4193c0f1SVlad Dogaru 
398*4193c0f1SVlad Dogaru 	if (chan->type != IIO_PROXIMITY || type != IIO_EV_TYPE_THRESH ||
399*4193c0f1SVlad Dogaru 	    dir != IIO_EV_DIR_EITHER)
400*4193c0f1SVlad Dogaru 		return -EINVAL;
401*4193c0f1SVlad Dogaru 
402*4193c0f1SVlad Dogaru 	mutex_lock(&data->mutex);
403*4193c0f1SVlad Dogaru 
404*4193c0f1SVlad Dogaru 	data->event_enabled[chan->channel] = state;
405*4193c0f1SVlad Dogaru 
406*4193c0f1SVlad Dogaru 	for (i = 0; i < SX9500_NUM_CHANNELS; i++)
407*4193c0f1SVlad Dogaru 		if (data->event_enabled[i]) {
408*4193c0f1SVlad Dogaru 			any_active = true;
409*4193c0f1SVlad Dogaru 			break;
410*4193c0f1SVlad Dogaru 		}
411*4193c0f1SVlad Dogaru 
412*4193c0f1SVlad Dogaru 	irqmask = SX9500_CLOSE_IRQ | SX9500_FAR_IRQ;
413*4193c0f1SVlad Dogaru 	if (any_active)
414*4193c0f1SVlad Dogaru 		ret = regmap_update_bits(data->regmap, SX9500_REG_IRQ_MSK,
415*4193c0f1SVlad Dogaru 					 irqmask, irqmask);
416*4193c0f1SVlad Dogaru 	else
417*4193c0f1SVlad Dogaru 		ret = regmap_update_bits(data->regmap, SX9500_REG_IRQ_MSK,
418*4193c0f1SVlad Dogaru 					 irqmask, 0);
419*4193c0f1SVlad Dogaru 
420*4193c0f1SVlad Dogaru 	mutex_unlock(&data->mutex);
421*4193c0f1SVlad Dogaru 
422*4193c0f1SVlad Dogaru 	return ret;
423*4193c0f1SVlad Dogaru }
424*4193c0f1SVlad Dogaru 
425*4193c0f1SVlad Dogaru static int sx9500_update_scan_mode(struct iio_dev *indio_dev,
426*4193c0f1SVlad Dogaru 				   const unsigned long *scan_mask)
427*4193c0f1SVlad Dogaru {
428*4193c0f1SVlad Dogaru 	struct sx9500_data *data = iio_priv(indio_dev);
429*4193c0f1SVlad Dogaru 
430*4193c0f1SVlad Dogaru 	mutex_lock(&data->mutex);
431*4193c0f1SVlad Dogaru 	kfree(data->buffer);
432*4193c0f1SVlad Dogaru 	data->buffer = kzalloc(indio_dev->scan_bytes, GFP_KERNEL);
433*4193c0f1SVlad Dogaru 	mutex_unlock(&data->mutex);
434*4193c0f1SVlad Dogaru 
435*4193c0f1SVlad Dogaru 	if (data->buffer == NULL)
436*4193c0f1SVlad Dogaru 		return -ENOMEM;
437*4193c0f1SVlad Dogaru 
438*4193c0f1SVlad Dogaru 	return 0;
439*4193c0f1SVlad Dogaru }
440*4193c0f1SVlad Dogaru 
441*4193c0f1SVlad Dogaru static IIO_CONST_ATTR_SAMP_FREQ_AVAIL(
442*4193c0f1SVlad Dogaru 	"2.500000 3.333333 5 6.666666 8.333333 11.111111 16.666666 33.333333");
443*4193c0f1SVlad Dogaru 
444*4193c0f1SVlad Dogaru static struct attribute *sx9500_attributes[] = {
445*4193c0f1SVlad Dogaru 	&iio_const_attr_sampling_frequency_available.dev_attr.attr,
446*4193c0f1SVlad Dogaru 	NULL,
447*4193c0f1SVlad Dogaru };
448*4193c0f1SVlad Dogaru 
449*4193c0f1SVlad Dogaru static const struct attribute_group sx9500_attribute_group = {
450*4193c0f1SVlad Dogaru 	.attrs = sx9500_attributes,
451*4193c0f1SVlad Dogaru };
452*4193c0f1SVlad Dogaru 
453*4193c0f1SVlad Dogaru static const struct iio_info sx9500_info = {
454*4193c0f1SVlad Dogaru 	.driver_module = THIS_MODULE,
455*4193c0f1SVlad Dogaru 	.attrs = &sx9500_attribute_group,
456*4193c0f1SVlad Dogaru 	.read_raw = &sx9500_read_raw,
457*4193c0f1SVlad Dogaru 	.write_raw = &sx9500_write_raw,
458*4193c0f1SVlad Dogaru 	.read_event_config = &sx9500_read_event_config,
459*4193c0f1SVlad Dogaru 	.write_event_config = &sx9500_write_event_config,
460*4193c0f1SVlad Dogaru 	.update_scan_mode = &sx9500_update_scan_mode,
461*4193c0f1SVlad Dogaru };
462*4193c0f1SVlad Dogaru 
463*4193c0f1SVlad Dogaru static int sx9500_set_trigger_state(struct iio_trigger *trig,
464*4193c0f1SVlad Dogaru 				    bool state)
465*4193c0f1SVlad Dogaru {
466*4193c0f1SVlad Dogaru 	struct iio_dev *indio_dev = iio_trigger_get_drvdata(trig);
467*4193c0f1SVlad Dogaru 	struct sx9500_data *data = iio_priv(indio_dev);
468*4193c0f1SVlad Dogaru 	int ret;
469*4193c0f1SVlad Dogaru 
470*4193c0f1SVlad Dogaru 	mutex_lock(&data->mutex);
471*4193c0f1SVlad Dogaru 
472*4193c0f1SVlad Dogaru 	ret = regmap_update_bits(data->regmap, SX9500_REG_IRQ_MSK,
473*4193c0f1SVlad Dogaru 				 SX9500_CONVDONE_IRQ,
474*4193c0f1SVlad Dogaru 				 state ? SX9500_CONVDONE_IRQ : 0);
475*4193c0f1SVlad Dogaru 	if (ret == 0)
476*4193c0f1SVlad Dogaru 		data->trigger_enabled = state;
477*4193c0f1SVlad Dogaru 
478*4193c0f1SVlad Dogaru 	mutex_unlock(&data->mutex);
479*4193c0f1SVlad Dogaru 
480*4193c0f1SVlad Dogaru 	return ret;
481*4193c0f1SVlad Dogaru }
482*4193c0f1SVlad Dogaru 
483*4193c0f1SVlad Dogaru static const struct iio_trigger_ops sx9500_trigger_ops = {
484*4193c0f1SVlad Dogaru 	.set_trigger_state = sx9500_set_trigger_state,
485*4193c0f1SVlad Dogaru 	.owner = THIS_MODULE,
486*4193c0f1SVlad Dogaru };
487*4193c0f1SVlad Dogaru 
488*4193c0f1SVlad Dogaru static irqreturn_t sx9500_trigger_handler(int irq, void *private)
489*4193c0f1SVlad Dogaru {
490*4193c0f1SVlad Dogaru 	struct iio_poll_func *pf = private;
491*4193c0f1SVlad Dogaru 	struct iio_dev *indio_dev = pf->indio_dev;
492*4193c0f1SVlad Dogaru 	struct sx9500_data *data = iio_priv(indio_dev);
493*4193c0f1SVlad Dogaru 	int val, bit, ret, i = 0;
494*4193c0f1SVlad Dogaru 
495*4193c0f1SVlad Dogaru 	mutex_lock(&data->mutex);
496*4193c0f1SVlad Dogaru 
497*4193c0f1SVlad Dogaru 	for_each_set_bit(bit, indio_dev->buffer->scan_mask,
498*4193c0f1SVlad Dogaru 			 indio_dev->masklength) {
499*4193c0f1SVlad Dogaru 		ret = sx9500_read_proximity(data, &indio_dev->channels[bit],
500*4193c0f1SVlad Dogaru 					    &val);
501*4193c0f1SVlad Dogaru 		if (ret < 0)
502*4193c0f1SVlad Dogaru 			goto out;
503*4193c0f1SVlad Dogaru 
504*4193c0f1SVlad Dogaru 		data->buffer[i++] = val;
505*4193c0f1SVlad Dogaru 	}
506*4193c0f1SVlad Dogaru 
507*4193c0f1SVlad Dogaru 	iio_push_to_buffers_with_timestamp(indio_dev, data->buffer,
508*4193c0f1SVlad Dogaru 					   iio_get_time_ns());
509*4193c0f1SVlad Dogaru 
510*4193c0f1SVlad Dogaru out:
511*4193c0f1SVlad Dogaru 	mutex_unlock(&data->mutex);
512*4193c0f1SVlad Dogaru 
513*4193c0f1SVlad Dogaru 	iio_trigger_notify_done(indio_dev->trig);
514*4193c0f1SVlad Dogaru 
515*4193c0f1SVlad Dogaru 	return IRQ_HANDLED;
516*4193c0f1SVlad Dogaru }
517*4193c0f1SVlad Dogaru 
518*4193c0f1SVlad Dogaru struct sx9500_reg_default {
519*4193c0f1SVlad Dogaru 	u8 reg;
520*4193c0f1SVlad Dogaru 	u8 def;
521*4193c0f1SVlad Dogaru };
522*4193c0f1SVlad Dogaru 
523*4193c0f1SVlad Dogaru static const struct sx9500_reg_default sx9500_default_regs[] = {
524*4193c0f1SVlad Dogaru 	{
525*4193c0f1SVlad Dogaru 		.reg = SX9500_REG_PROX_CTRL1,
526*4193c0f1SVlad Dogaru 		/* Shield enabled, small range. */
527*4193c0f1SVlad Dogaru 		.def = 0x43,
528*4193c0f1SVlad Dogaru 	},
529*4193c0f1SVlad Dogaru 	{
530*4193c0f1SVlad Dogaru 		.reg = SX9500_REG_PROX_CTRL2,
531*4193c0f1SVlad Dogaru 		/* x8 gain, 167kHz frequency, finest resolution. */
532*4193c0f1SVlad Dogaru 		.def = 0x77,
533*4193c0f1SVlad Dogaru 	},
534*4193c0f1SVlad Dogaru 	{
535*4193c0f1SVlad Dogaru 		.reg = SX9500_REG_PROX_CTRL3,
536*4193c0f1SVlad Dogaru 		/* Doze enabled, 2x scan period doze, no raw filter. */
537*4193c0f1SVlad Dogaru 		.def = 0x40,
538*4193c0f1SVlad Dogaru 	},
539*4193c0f1SVlad Dogaru 	{
540*4193c0f1SVlad Dogaru 		.reg = SX9500_REG_PROX_CTRL4,
541*4193c0f1SVlad Dogaru 		/* Average threshold. */
542*4193c0f1SVlad Dogaru 		.def = 0x30,
543*4193c0f1SVlad Dogaru 	},
544*4193c0f1SVlad Dogaru 	{
545*4193c0f1SVlad Dogaru 		.reg = SX9500_REG_PROX_CTRL5,
546*4193c0f1SVlad Dogaru 		/*
547*4193c0f1SVlad Dogaru 		 * Debouncer off, lowest average negative filter,
548*4193c0f1SVlad Dogaru 		 * highest average postive filter.
549*4193c0f1SVlad Dogaru 		 */
550*4193c0f1SVlad Dogaru 		.def = 0x0f,
551*4193c0f1SVlad Dogaru 	},
552*4193c0f1SVlad Dogaru 	{
553*4193c0f1SVlad Dogaru 		.reg = SX9500_REG_PROX_CTRL6,
554*4193c0f1SVlad Dogaru 		/* Proximity detection threshold: 280 */
555*4193c0f1SVlad Dogaru 		.def = 0x0e,
556*4193c0f1SVlad Dogaru 	},
557*4193c0f1SVlad Dogaru 	{
558*4193c0f1SVlad Dogaru 		.reg = SX9500_REG_PROX_CTRL7,
559*4193c0f1SVlad Dogaru 		/*
560*4193c0f1SVlad Dogaru 		 * No automatic compensation, compensate each pin
561*4193c0f1SVlad Dogaru 		 * independently, proximity hysteresis: 32, close
562*4193c0f1SVlad Dogaru 		 * debouncer off, far debouncer off.
563*4193c0f1SVlad Dogaru 		 */
564*4193c0f1SVlad Dogaru 		.def = 0x00,
565*4193c0f1SVlad Dogaru 	},
566*4193c0f1SVlad Dogaru 	{
567*4193c0f1SVlad Dogaru 		.reg = SX9500_REG_PROX_CTRL8,
568*4193c0f1SVlad Dogaru 		/* No stuck timeout, no periodic compensation. */
569*4193c0f1SVlad Dogaru 		.def = 0x00,
570*4193c0f1SVlad Dogaru 	},
571*4193c0f1SVlad Dogaru 	{
572*4193c0f1SVlad Dogaru 		.reg = SX9500_REG_PROX_CTRL0,
573*4193c0f1SVlad Dogaru 		/* Scan period: 30ms, all sensors enabled. */
574*4193c0f1SVlad Dogaru 		.def = 0x0f,
575*4193c0f1SVlad Dogaru 	},
576*4193c0f1SVlad Dogaru };
577*4193c0f1SVlad Dogaru 
578*4193c0f1SVlad Dogaru static int sx9500_init_device(struct iio_dev *indio_dev)
579*4193c0f1SVlad Dogaru {
580*4193c0f1SVlad Dogaru 	struct sx9500_data *data = iio_priv(indio_dev);
581*4193c0f1SVlad Dogaru 	int ret, i;
582*4193c0f1SVlad Dogaru 	unsigned int val;
583*4193c0f1SVlad Dogaru 
584*4193c0f1SVlad Dogaru 	ret = regmap_write(data->regmap, SX9500_REG_IRQ_MSK, 0);
585*4193c0f1SVlad Dogaru 	if (ret < 0)
586*4193c0f1SVlad Dogaru 		return ret;
587*4193c0f1SVlad Dogaru 
588*4193c0f1SVlad Dogaru 	ret = regmap_write(data->regmap, SX9500_REG_RESET,
589*4193c0f1SVlad Dogaru 			   SX9500_SOFT_RESET);
590*4193c0f1SVlad Dogaru 	if (ret < 0)
591*4193c0f1SVlad Dogaru 		return ret;
592*4193c0f1SVlad Dogaru 
593*4193c0f1SVlad Dogaru 	ret = regmap_read(data->regmap, SX9500_REG_IRQ_SRC, &val);
594*4193c0f1SVlad Dogaru 	if (ret < 0)
595*4193c0f1SVlad Dogaru 		return ret;
596*4193c0f1SVlad Dogaru 
597*4193c0f1SVlad Dogaru 	for (i = 0; i < ARRAY_SIZE(sx9500_default_regs); i++) {
598*4193c0f1SVlad Dogaru 		ret = regmap_write(data->regmap,
599*4193c0f1SVlad Dogaru 				   sx9500_default_regs[i].reg,
600*4193c0f1SVlad Dogaru 				   sx9500_default_regs[i].def);
601*4193c0f1SVlad Dogaru 		if (ret < 0)
602*4193c0f1SVlad Dogaru 			return ret;
603*4193c0f1SVlad Dogaru 	}
604*4193c0f1SVlad Dogaru 
605*4193c0f1SVlad Dogaru 	return 0;
606*4193c0f1SVlad Dogaru }
607*4193c0f1SVlad Dogaru 
608*4193c0f1SVlad Dogaru static int sx9500_gpio_probe(struct i2c_client *client,
609*4193c0f1SVlad Dogaru 			     struct sx9500_data *data)
610*4193c0f1SVlad Dogaru {
611*4193c0f1SVlad Dogaru 	struct device *dev;
612*4193c0f1SVlad Dogaru 	struct gpio_desc *gpio;
613*4193c0f1SVlad Dogaru 	int ret;
614*4193c0f1SVlad Dogaru 
615*4193c0f1SVlad Dogaru 	if (!client)
616*4193c0f1SVlad Dogaru 		return -EINVAL;
617*4193c0f1SVlad Dogaru 
618*4193c0f1SVlad Dogaru 	dev = &client->dev;
619*4193c0f1SVlad Dogaru 
620*4193c0f1SVlad Dogaru 	/* data ready gpio interrupt pin */
621*4193c0f1SVlad Dogaru 	gpio = devm_gpiod_get_index(dev, SX9500_GPIO_NAME, 0);
622*4193c0f1SVlad Dogaru 	if (IS_ERR(gpio)) {
623*4193c0f1SVlad Dogaru 		dev_err(dev, "acpi gpio get index failed\n");
624*4193c0f1SVlad Dogaru 		return PTR_ERR(gpio);
625*4193c0f1SVlad Dogaru 	}
626*4193c0f1SVlad Dogaru 
627*4193c0f1SVlad Dogaru 	ret = gpiod_direction_input(gpio);
628*4193c0f1SVlad Dogaru 	if (ret)
629*4193c0f1SVlad Dogaru 		return ret;
630*4193c0f1SVlad Dogaru 
631*4193c0f1SVlad Dogaru 	ret = gpiod_to_irq(gpio);
632*4193c0f1SVlad Dogaru 
633*4193c0f1SVlad Dogaru 	dev_dbg(dev, "GPIO resource, no:%d irq:%d\n", desc_to_gpio(gpio), ret);
634*4193c0f1SVlad Dogaru 
635*4193c0f1SVlad Dogaru 	return ret;
636*4193c0f1SVlad Dogaru }
637*4193c0f1SVlad Dogaru 
638*4193c0f1SVlad Dogaru static int sx9500_probe(struct i2c_client *client,
639*4193c0f1SVlad Dogaru 			const struct i2c_device_id *id)
640*4193c0f1SVlad Dogaru {
641*4193c0f1SVlad Dogaru 	int ret;
642*4193c0f1SVlad Dogaru 	struct iio_dev *indio_dev;
643*4193c0f1SVlad Dogaru 	struct sx9500_data *data;
644*4193c0f1SVlad Dogaru 
645*4193c0f1SVlad Dogaru 	indio_dev = devm_iio_device_alloc(&client->dev, sizeof(*data));
646*4193c0f1SVlad Dogaru 	if (indio_dev == NULL)
647*4193c0f1SVlad Dogaru 		return -ENOMEM;
648*4193c0f1SVlad Dogaru 
649*4193c0f1SVlad Dogaru 	data = iio_priv(indio_dev);
650*4193c0f1SVlad Dogaru 	data->client = client;
651*4193c0f1SVlad Dogaru 	mutex_init(&data->mutex);
652*4193c0f1SVlad Dogaru 	data->trigger_enabled = false;
653*4193c0f1SVlad Dogaru 
654*4193c0f1SVlad Dogaru 	data->regmap = devm_regmap_init_i2c(client, &sx9500_regmap_config);
655*4193c0f1SVlad Dogaru 	if (IS_ERR(data->regmap))
656*4193c0f1SVlad Dogaru 		return PTR_ERR(data->regmap);
657*4193c0f1SVlad Dogaru 
658*4193c0f1SVlad Dogaru 	sx9500_init_device(indio_dev);
659*4193c0f1SVlad Dogaru 
660*4193c0f1SVlad Dogaru 	indio_dev->dev.parent = &client->dev;
661*4193c0f1SVlad Dogaru 	indio_dev->name = SX9500_DRIVER_NAME;
662*4193c0f1SVlad Dogaru 	indio_dev->channels = sx9500_channels;
663*4193c0f1SVlad Dogaru 	indio_dev->num_channels = ARRAY_SIZE(sx9500_channels);
664*4193c0f1SVlad Dogaru 	indio_dev->info = &sx9500_info;
665*4193c0f1SVlad Dogaru 	indio_dev->modes = INDIO_DIRECT_MODE;
666*4193c0f1SVlad Dogaru 	i2c_set_clientdata(client, indio_dev);
667*4193c0f1SVlad Dogaru 
668*4193c0f1SVlad Dogaru 	if (client->irq <= 0)
669*4193c0f1SVlad Dogaru 		client->irq = sx9500_gpio_probe(client, data);
670*4193c0f1SVlad Dogaru 
671*4193c0f1SVlad Dogaru 	if (client->irq > 0) {
672*4193c0f1SVlad Dogaru 		ret = devm_request_threaded_irq(&client->dev, client->irq,
673*4193c0f1SVlad Dogaru 				sx9500_irq_handler, sx9500_irq_thread_handler,
674*4193c0f1SVlad Dogaru 				IRQF_TRIGGER_FALLING | IRQF_ONESHOT,
675*4193c0f1SVlad Dogaru 				SX9500_IRQ_NAME, indio_dev);
676*4193c0f1SVlad Dogaru 		if (ret < 0)
677*4193c0f1SVlad Dogaru 			return ret;
678*4193c0f1SVlad Dogaru 
679*4193c0f1SVlad Dogaru 		data->trig = devm_iio_trigger_alloc(&client->dev,
680*4193c0f1SVlad Dogaru 				"%s-dev%d", indio_dev->name, indio_dev->id);
681*4193c0f1SVlad Dogaru 		if (!data->trig)
682*4193c0f1SVlad Dogaru 			return -ENOMEM;
683*4193c0f1SVlad Dogaru 
684*4193c0f1SVlad Dogaru 		data->trig->dev.parent = &client->dev;
685*4193c0f1SVlad Dogaru 		data->trig->ops = &sx9500_trigger_ops;
686*4193c0f1SVlad Dogaru 		iio_trigger_set_drvdata(data->trig, indio_dev);
687*4193c0f1SVlad Dogaru 
688*4193c0f1SVlad Dogaru 		ret = iio_trigger_register(data->trig);
689*4193c0f1SVlad Dogaru 		if (ret)
690*4193c0f1SVlad Dogaru 			return ret;
691*4193c0f1SVlad Dogaru 	}
692*4193c0f1SVlad Dogaru 
693*4193c0f1SVlad Dogaru 	ret = iio_triggered_buffer_setup(indio_dev, NULL,
694*4193c0f1SVlad Dogaru 					 sx9500_trigger_handler, NULL);
695*4193c0f1SVlad Dogaru 	if (ret < 0)
696*4193c0f1SVlad Dogaru 		goto out_trigger_unregister;
697*4193c0f1SVlad Dogaru 
698*4193c0f1SVlad Dogaru 	ret = iio_device_register(indio_dev);
699*4193c0f1SVlad Dogaru 	if (ret < 0)
700*4193c0f1SVlad Dogaru 		goto out_buffer_cleanup;
701*4193c0f1SVlad Dogaru 
702*4193c0f1SVlad Dogaru 	return 0;
703*4193c0f1SVlad Dogaru 
704*4193c0f1SVlad Dogaru out_buffer_cleanup:
705*4193c0f1SVlad Dogaru 	iio_triggered_buffer_cleanup(indio_dev);
706*4193c0f1SVlad Dogaru out_trigger_unregister:
707*4193c0f1SVlad Dogaru 	if (client->irq > 0)
708*4193c0f1SVlad Dogaru 		iio_trigger_unregister(data->trig);
709*4193c0f1SVlad Dogaru 
710*4193c0f1SVlad Dogaru 	return ret;
711*4193c0f1SVlad Dogaru }
712*4193c0f1SVlad Dogaru 
713*4193c0f1SVlad Dogaru static int sx9500_remove(struct i2c_client *client)
714*4193c0f1SVlad Dogaru {
715*4193c0f1SVlad Dogaru 	struct iio_dev *indio_dev = i2c_get_clientdata(client);
716*4193c0f1SVlad Dogaru 	struct sx9500_data *data = iio_priv(indio_dev);
717*4193c0f1SVlad Dogaru 
718*4193c0f1SVlad Dogaru 	iio_device_unregister(indio_dev);
719*4193c0f1SVlad Dogaru 	iio_triggered_buffer_cleanup(indio_dev);
720*4193c0f1SVlad Dogaru 	if (client->irq > 0)
721*4193c0f1SVlad Dogaru 		iio_trigger_unregister(data->trig);
722*4193c0f1SVlad Dogaru 	kfree(data->buffer);
723*4193c0f1SVlad Dogaru 
724*4193c0f1SVlad Dogaru 	return 0;
725*4193c0f1SVlad Dogaru }
726*4193c0f1SVlad Dogaru 
727*4193c0f1SVlad Dogaru static const struct acpi_device_id sx9500_acpi_match[] = {
728*4193c0f1SVlad Dogaru 	{"SSX9500", 0},
729*4193c0f1SVlad Dogaru 	{ },
730*4193c0f1SVlad Dogaru };
731*4193c0f1SVlad Dogaru MODULE_DEVICE_TABLE(acpi, sx9500_acpi_match);
732*4193c0f1SVlad Dogaru 
733*4193c0f1SVlad Dogaru static const struct i2c_device_id sx9500_id[] = {
734*4193c0f1SVlad Dogaru 	{"sx9500", 0},
735*4193c0f1SVlad Dogaru 	{}
736*4193c0f1SVlad Dogaru };
737*4193c0f1SVlad Dogaru MODULE_DEVICE_TABLE(i2c, sx9500_id);
738*4193c0f1SVlad Dogaru 
739*4193c0f1SVlad Dogaru static struct i2c_driver sx9500_driver = {
740*4193c0f1SVlad Dogaru 	.driver = {
741*4193c0f1SVlad Dogaru 		.name	= SX9500_DRIVER_NAME,
742*4193c0f1SVlad Dogaru 		.acpi_match_table = ACPI_PTR(sx9500_acpi_match),
743*4193c0f1SVlad Dogaru 	},
744*4193c0f1SVlad Dogaru 	.probe		= sx9500_probe,
745*4193c0f1SVlad Dogaru 	.remove		= sx9500_remove,
746*4193c0f1SVlad Dogaru 	.id_table	= sx9500_id,
747*4193c0f1SVlad Dogaru };
748*4193c0f1SVlad Dogaru module_i2c_driver(sx9500_driver);
749*4193c0f1SVlad Dogaru 
750*4193c0f1SVlad Dogaru MODULE_AUTHOR("Vlad Dogaru <vlad.dogaru@intel.com>");
751*4193c0f1SVlad Dogaru MODULE_DESCRIPTION("Driver for Semtech SX9500 proximity sensor");
752*4193c0f1SVlad Dogaru MODULE_LICENSE("GPL v2");
753