1d2912cb1SThomas Gleixner // SPDX-License-Identifier: GPL-2.0-only
24193c0f1SVlad Dogaru /*
34193c0f1SVlad Dogaru * Copyright (c) 2014 Intel Corporation
44193c0f1SVlad Dogaru *
54193c0f1SVlad Dogaru * Driver for Semtech's SX9500 capacitive proximity/button solution.
64193c0f1SVlad Dogaru * Datasheet available at
74193c0f1SVlad Dogaru * <http://www.semtech.com/images/datasheet/sx9500.pdf>.
84193c0f1SVlad Dogaru */
94193c0f1SVlad Dogaru
104193c0f1SVlad Dogaru #include <linux/kernel.h>
114193c0f1SVlad Dogaru #include <linux/slab.h>
124193c0f1SVlad Dogaru #include <linux/module.h>
134193c0f1SVlad Dogaru #include <linux/i2c.h>
144193c0f1SVlad Dogaru #include <linux/irq.h>
154193c0f1SVlad Dogaru #include <linux/acpi.h>
164193c0f1SVlad Dogaru #include <linux/gpio/consumer.h>
174193c0f1SVlad Dogaru #include <linux/regmap.h>
187840ffeeSVlad Dogaru #include <linux/pm.h>
1959bd0427SVlad Dogaru #include <linux/delay.h>
204193c0f1SVlad Dogaru
214193c0f1SVlad Dogaru #include <linux/iio/iio.h>
224193c0f1SVlad Dogaru #include <linux/iio/buffer.h>
234193c0f1SVlad Dogaru #include <linux/iio/sysfs.h>
244193c0f1SVlad Dogaru #include <linux/iio/events.h>
254193c0f1SVlad Dogaru #include <linux/iio/trigger.h>
264193c0f1SVlad Dogaru #include <linux/iio/triggered_buffer.h>
274193c0f1SVlad Dogaru #include <linux/iio/trigger_consumer.h>
284193c0f1SVlad Dogaru
294193c0f1SVlad Dogaru #define SX9500_DRIVER_NAME "sx9500"
304193c0f1SVlad Dogaru #define SX9500_IRQ_NAME "sx9500_event"
3163de9f92SVlad Dogaru
324193c0f1SVlad Dogaru /* Register definitions. */
334193c0f1SVlad Dogaru #define SX9500_REG_IRQ_SRC 0x00
344193c0f1SVlad Dogaru #define SX9500_REG_STAT 0x01
354193c0f1SVlad Dogaru #define SX9500_REG_IRQ_MSK 0x03
364193c0f1SVlad Dogaru
374193c0f1SVlad Dogaru #define SX9500_REG_PROX_CTRL0 0x06
384193c0f1SVlad Dogaru #define SX9500_REG_PROX_CTRL1 0x07
394193c0f1SVlad Dogaru #define SX9500_REG_PROX_CTRL2 0x08
404193c0f1SVlad Dogaru #define SX9500_REG_PROX_CTRL3 0x09
414193c0f1SVlad Dogaru #define SX9500_REG_PROX_CTRL4 0x0a
424193c0f1SVlad Dogaru #define SX9500_REG_PROX_CTRL5 0x0b
434193c0f1SVlad Dogaru #define SX9500_REG_PROX_CTRL6 0x0c
444193c0f1SVlad Dogaru #define SX9500_REG_PROX_CTRL7 0x0d
454193c0f1SVlad Dogaru #define SX9500_REG_PROX_CTRL8 0x0e
464193c0f1SVlad Dogaru
474193c0f1SVlad Dogaru #define SX9500_REG_SENSOR_SEL 0x20
484193c0f1SVlad Dogaru #define SX9500_REG_USE_MSB 0x21
494193c0f1SVlad Dogaru #define SX9500_REG_USE_LSB 0x22
504193c0f1SVlad Dogaru #define SX9500_REG_AVG_MSB 0x23
514193c0f1SVlad Dogaru #define SX9500_REG_AVG_LSB 0x24
524193c0f1SVlad Dogaru #define SX9500_REG_DIFF_MSB 0x25
534193c0f1SVlad Dogaru #define SX9500_REG_DIFF_LSB 0x26
544193c0f1SVlad Dogaru #define SX9500_REG_OFFSET_MSB 0x27
554193c0f1SVlad Dogaru #define SX9500_REG_OFFSET_LSB 0x28
564193c0f1SVlad Dogaru
574193c0f1SVlad Dogaru #define SX9500_REG_RESET 0x7f
584193c0f1SVlad Dogaru
594193c0f1SVlad Dogaru /* Write this to REG_RESET to do a soft reset. */
604193c0f1SVlad Dogaru #define SX9500_SOFT_RESET 0xde
614193c0f1SVlad Dogaru
624193c0f1SVlad Dogaru #define SX9500_SCAN_PERIOD_MASK GENMASK(6, 4)
634193c0f1SVlad Dogaru #define SX9500_SCAN_PERIOD_SHIFT 4
644193c0f1SVlad Dogaru
654193c0f1SVlad Dogaru /*
664193c0f1SVlad Dogaru * These serve for identifying IRQ source in the IRQ_SRC register, and
674193c0f1SVlad Dogaru * also for masking the IRQs in the IRQ_MSK register.
684193c0f1SVlad Dogaru */
694193c0f1SVlad Dogaru #define SX9500_CLOSE_IRQ BIT(6)
704193c0f1SVlad Dogaru #define SX9500_FAR_IRQ BIT(5)
714193c0f1SVlad Dogaru #define SX9500_CONVDONE_IRQ BIT(3)
724193c0f1SVlad Dogaru
734193c0f1SVlad Dogaru #define SX9500_PROXSTAT_SHIFT 4
7459bd0427SVlad Dogaru #define SX9500_COMPSTAT_MASK GENMASK(3, 0)
754193c0f1SVlad Dogaru
764193c0f1SVlad Dogaru #define SX9500_NUM_CHANNELS 4
7768958bd5SVlad Dogaru #define SX9500_CHAN_MASK GENMASK(SX9500_NUM_CHANNELS - 1, 0)
784193c0f1SVlad Dogaru
794193c0f1SVlad Dogaru struct sx9500_data {
804193c0f1SVlad Dogaru struct mutex mutex;
814193c0f1SVlad Dogaru struct i2c_client *client;
824193c0f1SVlad Dogaru struct iio_trigger *trig;
834193c0f1SVlad Dogaru struct regmap *regmap;
8445fd5f8eSVlad Dogaru struct gpio_desc *gpiod_rst;
854193c0f1SVlad Dogaru /*
864193c0f1SVlad Dogaru * Last reading of the proximity status for each channel. We
874193c0f1SVlad Dogaru * only send an event to user space when this changes.
884193c0f1SVlad Dogaru */
894193c0f1SVlad Dogaru bool prox_stat[SX9500_NUM_CHANNELS];
904193c0f1SVlad Dogaru bool event_enabled[SX9500_NUM_CHANNELS];
914193c0f1SVlad Dogaru bool trigger_enabled;
924193c0f1SVlad Dogaru u16 *buffer;
937840ffeeSVlad Dogaru /* Remember enabled channels and sample rate during suspend. */
947840ffeeSVlad Dogaru unsigned int suspend_ctrl0;
9559bd0427SVlad Dogaru struct completion completion;
9659bd0427SVlad Dogaru int data_rdy_users, close_far_users;
9759bd0427SVlad Dogaru int channel_users[SX9500_NUM_CHANNELS];
984193c0f1SVlad Dogaru };
994193c0f1SVlad Dogaru
1004193c0f1SVlad Dogaru static const struct iio_event_spec sx9500_events[] = {
1014193c0f1SVlad Dogaru {
1024193c0f1SVlad Dogaru .type = IIO_EV_TYPE_THRESH,
1034193c0f1SVlad Dogaru .dir = IIO_EV_DIR_EITHER,
1044193c0f1SVlad Dogaru .mask_separate = BIT(IIO_EV_INFO_ENABLE),
1054193c0f1SVlad Dogaru },
1064193c0f1SVlad Dogaru };
1074193c0f1SVlad Dogaru
1084193c0f1SVlad Dogaru #define SX9500_CHANNEL(idx) \
1094193c0f1SVlad Dogaru { \
1104193c0f1SVlad Dogaru .type = IIO_PROXIMITY, \
1114193c0f1SVlad Dogaru .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \
1124193c0f1SVlad Dogaru .info_mask_shared_by_all = BIT(IIO_CHAN_INFO_SAMP_FREQ), \
1134193c0f1SVlad Dogaru .indexed = 1, \
1144193c0f1SVlad Dogaru .channel = idx, \
1154193c0f1SVlad Dogaru .event_spec = sx9500_events, \
1164193c0f1SVlad Dogaru .num_event_specs = ARRAY_SIZE(sx9500_events), \
1174193c0f1SVlad Dogaru .scan_index = idx, \
1184193c0f1SVlad Dogaru .scan_type = { \
1194193c0f1SVlad Dogaru .sign = 'u', \
1204193c0f1SVlad Dogaru .realbits = 16, \
1214193c0f1SVlad Dogaru .storagebits = 16, \
1224193c0f1SVlad Dogaru .shift = 0, \
1234193c0f1SVlad Dogaru }, \
1244193c0f1SVlad Dogaru }
1254193c0f1SVlad Dogaru
1264193c0f1SVlad Dogaru static const struct iio_chan_spec sx9500_channels[] = {
1274193c0f1SVlad Dogaru SX9500_CHANNEL(0),
1284193c0f1SVlad Dogaru SX9500_CHANNEL(1),
1294193c0f1SVlad Dogaru SX9500_CHANNEL(2),
1304193c0f1SVlad Dogaru SX9500_CHANNEL(3),
1314193c0f1SVlad Dogaru IIO_CHAN_SOFT_TIMESTAMP(4),
1324193c0f1SVlad Dogaru };
1334193c0f1SVlad Dogaru
1344193c0f1SVlad Dogaru static const struct {
1354193c0f1SVlad Dogaru int val;
1364193c0f1SVlad Dogaru int val2;
1374193c0f1SVlad Dogaru } sx9500_samp_freq_table[] = {
1384193c0f1SVlad Dogaru {33, 333333},
1394193c0f1SVlad Dogaru {16, 666666},
1404193c0f1SVlad Dogaru {11, 111111},
1414193c0f1SVlad Dogaru {8, 333333},
1424193c0f1SVlad Dogaru {6, 666666},
1434193c0f1SVlad Dogaru {5, 0},
1444193c0f1SVlad Dogaru {3, 333333},
1454193c0f1SVlad Dogaru {2, 500000},
1464193c0f1SVlad Dogaru };
1474193c0f1SVlad Dogaru
14859bd0427SVlad Dogaru static const unsigned int sx9500_scan_period_table[] = {
14959bd0427SVlad Dogaru 30, 60, 90, 120, 150, 200, 300, 400,
15059bd0427SVlad Dogaru };
15159bd0427SVlad Dogaru
1524193c0f1SVlad Dogaru static const struct regmap_range sx9500_writable_reg_ranges[] = {
1534193c0f1SVlad Dogaru regmap_reg_range(SX9500_REG_IRQ_MSK, SX9500_REG_IRQ_MSK),
1544193c0f1SVlad Dogaru regmap_reg_range(SX9500_REG_PROX_CTRL0, SX9500_REG_PROX_CTRL8),
1554193c0f1SVlad Dogaru regmap_reg_range(SX9500_REG_SENSOR_SEL, SX9500_REG_SENSOR_SEL),
1564193c0f1SVlad Dogaru regmap_reg_range(SX9500_REG_OFFSET_MSB, SX9500_REG_OFFSET_LSB),
1574193c0f1SVlad Dogaru regmap_reg_range(SX9500_REG_RESET, SX9500_REG_RESET),
1584193c0f1SVlad Dogaru };
1594193c0f1SVlad Dogaru
1604193c0f1SVlad Dogaru static const struct regmap_access_table sx9500_writeable_regs = {
1614193c0f1SVlad Dogaru .yes_ranges = sx9500_writable_reg_ranges,
1624193c0f1SVlad Dogaru .n_yes_ranges = ARRAY_SIZE(sx9500_writable_reg_ranges),
1634193c0f1SVlad Dogaru };
1644193c0f1SVlad Dogaru
1654193c0f1SVlad Dogaru /*
1664193c0f1SVlad Dogaru * All allocated registers are readable, so we just list unallocated
1674193c0f1SVlad Dogaru * ones.
1684193c0f1SVlad Dogaru */
1694193c0f1SVlad Dogaru static const struct regmap_range sx9500_non_readable_reg_ranges[] = {
1704193c0f1SVlad Dogaru regmap_reg_range(SX9500_REG_STAT + 1, SX9500_REG_STAT + 1),
1714193c0f1SVlad Dogaru regmap_reg_range(SX9500_REG_IRQ_MSK + 1, SX9500_REG_PROX_CTRL0 - 1),
1724193c0f1SVlad Dogaru regmap_reg_range(SX9500_REG_PROX_CTRL8 + 1, SX9500_REG_SENSOR_SEL - 1),
1734193c0f1SVlad Dogaru regmap_reg_range(SX9500_REG_OFFSET_LSB + 1, SX9500_REG_RESET - 1),
1744193c0f1SVlad Dogaru };
1754193c0f1SVlad Dogaru
1764193c0f1SVlad Dogaru static const struct regmap_access_table sx9500_readable_regs = {
1774193c0f1SVlad Dogaru .no_ranges = sx9500_non_readable_reg_ranges,
1784193c0f1SVlad Dogaru .n_no_ranges = ARRAY_SIZE(sx9500_non_readable_reg_ranges),
1794193c0f1SVlad Dogaru };
1804193c0f1SVlad Dogaru
1814193c0f1SVlad Dogaru static const struct regmap_range sx9500_volatile_reg_ranges[] = {
1824193c0f1SVlad Dogaru regmap_reg_range(SX9500_REG_IRQ_SRC, SX9500_REG_STAT),
1834193c0f1SVlad Dogaru regmap_reg_range(SX9500_REG_USE_MSB, SX9500_REG_OFFSET_LSB),
1844193c0f1SVlad Dogaru regmap_reg_range(SX9500_REG_RESET, SX9500_REG_RESET),
1854193c0f1SVlad Dogaru };
1864193c0f1SVlad Dogaru
1874193c0f1SVlad Dogaru static const struct regmap_access_table sx9500_volatile_regs = {
1884193c0f1SVlad Dogaru .yes_ranges = sx9500_volatile_reg_ranges,
1894193c0f1SVlad Dogaru .n_yes_ranges = ARRAY_SIZE(sx9500_volatile_reg_ranges),
1904193c0f1SVlad Dogaru };
1914193c0f1SVlad Dogaru
1924193c0f1SVlad Dogaru static const struct regmap_config sx9500_regmap_config = {
1934193c0f1SVlad Dogaru .reg_bits = 8,
1944193c0f1SVlad Dogaru .val_bits = 8,
1954193c0f1SVlad Dogaru
1964193c0f1SVlad Dogaru .max_register = SX9500_REG_RESET,
1974193c0f1SVlad Dogaru .cache_type = REGCACHE_RBTREE,
1984193c0f1SVlad Dogaru
1994193c0f1SVlad Dogaru .wr_table = &sx9500_writeable_regs,
2004193c0f1SVlad Dogaru .rd_table = &sx9500_readable_regs,
2014193c0f1SVlad Dogaru .volatile_table = &sx9500_volatile_regs,
2024193c0f1SVlad Dogaru };
2034193c0f1SVlad Dogaru
sx9500_inc_users(struct sx9500_data * data,int * counter,unsigned int reg,unsigned int bitmask)20459bd0427SVlad Dogaru static int sx9500_inc_users(struct sx9500_data *data, int *counter,
20559bd0427SVlad Dogaru unsigned int reg, unsigned int bitmask)
20659bd0427SVlad Dogaru {
20759bd0427SVlad Dogaru (*counter)++;
20859bd0427SVlad Dogaru if (*counter != 1)
20959bd0427SVlad Dogaru /* Bit is already active, nothing to do. */
21059bd0427SVlad Dogaru return 0;
21159bd0427SVlad Dogaru
212734ecf98STrevor Gamblin return regmap_set_bits(data->regmap, reg, bitmask);
21359bd0427SVlad Dogaru }
21459bd0427SVlad Dogaru
sx9500_dec_users(struct sx9500_data * data,int * counter,unsigned int reg,unsigned int bitmask)21559bd0427SVlad Dogaru static int sx9500_dec_users(struct sx9500_data *data, int *counter,
21659bd0427SVlad Dogaru unsigned int reg, unsigned int bitmask)
21759bd0427SVlad Dogaru {
21859bd0427SVlad Dogaru (*counter)--;
21959bd0427SVlad Dogaru if (*counter != 0)
22059bd0427SVlad Dogaru /* There are more users, do not deactivate. */
22159bd0427SVlad Dogaru return 0;
22259bd0427SVlad Dogaru
223734ecf98STrevor Gamblin return regmap_clear_bits(data->regmap, reg, bitmask);
22459bd0427SVlad Dogaru }
22559bd0427SVlad Dogaru
sx9500_inc_chan_users(struct sx9500_data * data,int chan)22659bd0427SVlad Dogaru static int sx9500_inc_chan_users(struct sx9500_data *data, int chan)
22759bd0427SVlad Dogaru {
22859bd0427SVlad Dogaru return sx9500_inc_users(data, &data->channel_users[chan],
22959bd0427SVlad Dogaru SX9500_REG_PROX_CTRL0, BIT(chan));
23059bd0427SVlad Dogaru }
23159bd0427SVlad Dogaru
sx9500_dec_chan_users(struct sx9500_data * data,int chan)23259bd0427SVlad Dogaru static int sx9500_dec_chan_users(struct sx9500_data *data, int chan)
23359bd0427SVlad Dogaru {
23459bd0427SVlad Dogaru return sx9500_dec_users(data, &data->channel_users[chan],
23559bd0427SVlad Dogaru SX9500_REG_PROX_CTRL0, BIT(chan));
23659bd0427SVlad Dogaru }
23759bd0427SVlad Dogaru
sx9500_inc_data_rdy_users(struct sx9500_data * data)23859bd0427SVlad Dogaru static int sx9500_inc_data_rdy_users(struct sx9500_data *data)
23959bd0427SVlad Dogaru {
24059bd0427SVlad Dogaru return sx9500_inc_users(data, &data->data_rdy_users,
24159bd0427SVlad Dogaru SX9500_REG_IRQ_MSK, SX9500_CONVDONE_IRQ);
24259bd0427SVlad Dogaru }
24359bd0427SVlad Dogaru
sx9500_dec_data_rdy_users(struct sx9500_data * data)24459bd0427SVlad Dogaru static int sx9500_dec_data_rdy_users(struct sx9500_data *data)
24559bd0427SVlad Dogaru {
24659bd0427SVlad Dogaru return sx9500_dec_users(data, &data->data_rdy_users,
24759bd0427SVlad Dogaru SX9500_REG_IRQ_MSK, SX9500_CONVDONE_IRQ);
24859bd0427SVlad Dogaru }
24959bd0427SVlad Dogaru
sx9500_inc_close_far_users(struct sx9500_data * data)25059bd0427SVlad Dogaru static int sx9500_inc_close_far_users(struct sx9500_data *data)
25159bd0427SVlad Dogaru {
25259bd0427SVlad Dogaru return sx9500_inc_users(data, &data->close_far_users,
25359bd0427SVlad Dogaru SX9500_REG_IRQ_MSK,
25459bd0427SVlad Dogaru SX9500_CLOSE_IRQ | SX9500_FAR_IRQ);
25559bd0427SVlad Dogaru }
25659bd0427SVlad Dogaru
sx9500_dec_close_far_users(struct sx9500_data * data)25759bd0427SVlad Dogaru static int sx9500_dec_close_far_users(struct sx9500_data *data)
25859bd0427SVlad Dogaru {
25959bd0427SVlad Dogaru return sx9500_dec_users(data, &data->close_far_users,
26059bd0427SVlad Dogaru SX9500_REG_IRQ_MSK,
26159bd0427SVlad Dogaru SX9500_CLOSE_IRQ | SX9500_FAR_IRQ);
26259bd0427SVlad Dogaru }
26359bd0427SVlad Dogaru
sx9500_read_prox_data(struct sx9500_data * data,const struct iio_chan_spec * chan,int * val)26459bd0427SVlad Dogaru static int sx9500_read_prox_data(struct sx9500_data *data,
2654193c0f1SVlad Dogaru const struct iio_chan_spec *chan,
2664193c0f1SVlad Dogaru int *val)
2674193c0f1SVlad Dogaru {
2684193c0f1SVlad Dogaru int ret;
2694193c0f1SVlad Dogaru __be16 regval;
2704193c0f1SVlad Dogaru
2714193c0f1SVlad Dogaru ret = regmap_write(data->regmap, SX9500_REG_SENSOR_SEL, chan->channel);
2724193c0f1SVlad Dogaru if (ret < 0)
2734193c0f1SVlad Dogaru return ret;
2744193c0f1SVlad Dogaru
2754193c0f1SVlad Dogaru ret = regmap_bulk_read(data->regmap, SX9500_REG_USE_MSB, ®val, 2);
2764193c0f1SVlad Dogaru if (ret < 0)
2774193c0f1SVlad Dogaru return ret;
2784193c0f1SVlad Dogaru
279fd1883f0SDaniel Baluta *val = be16_to_cpu(regval);
2804193c0f1SVlad Dogaru
2814193c0f1SVlad Dogaru return IIO_VAL_INT;
2824193c0f1SVlad Dogaru }
2834193c0f1SVlad Dogaru
28459bd0427SVlad Dogaru /*
28559bd0427SVlad Dogaru * If we have no interrupt support, we have to wait for a scan period
28659bd0427SVlad Dogaru * after enabling a channel to get a result.
28759bd0427SVlad Dogaru */
sx9500_wait_for_sample(struct sx9500_data * data)28859bd0427SVlad Dogaru static int sx9500_wait_for_sample(struct sx9500_data *data)
28959bd0427SVlad Dogaru {
29059bd0427SVlad Dogaru int ret;
29159bd0427SVlad Dogaru unsigned int val;
29259bd0427SVlad Dogaru
29359bd0427SVlad Dogaru ret = regmap_read(data->regmap, SX9500_REG_PROX_CTRL0, &val);
29459bd0427SVlad Dogaru if (ret < 0)
29559bd0427SVlad Dogaru return ret;
29659bd0427SVlad Dogaru
29759bd0427SVlad Dogaru val = (val & SX9500_SCAN_PERIOD_MASK) >> SX9500_SCAN_PERIOD_SHIFT;
29859bd0427SVlad Dogaru
29959bd0427SVlad Dogaru msleep(sx9500_scan_period_table[val]);
30059bd0427SVlad Dogaru
30159bd0427SVlad Dogaru return 0;
30259bd0427SVlad Dogaru }
30359bd0427SVlad Dogaru
sx9500_read_proximity(struct sx9500_data * data,const struct iio_chan_spec * chan,int * val)30459bd0427SVlad Dogaru static int sx9500_read_proximity(struct sx9500_data *data,
30559bd0427SVlad Dogaru const struct iio_chan_spec *chan,
30659bd0427SVlad Dogaru int *val)
30759bd0427SVlad Dogaru {
30859bd0427SVlad Dogaru int ret;
30959bd0427SVlad Dogaru
31059bd0427SVlad Dogaru mutex_lock(&data->mutex);
31159bd0427SVlad Dogaru
31259bd0427SVlad Dogaru ret = sx9500_inc_chan_users(data, chan->channel);
31359bd0427SVlad Dogaru if (ret < 0)
31459bd0427SVlad Dogaru goto out;
31559bd0427SVlad Dogaru
31659bd0427SVlad Dogaru ret = sx9500_inc_data_rdy_users(data);
31759bd0427SVlad Dogaru if (ret < 0)
31859bd0427SVlad Dogaru goto out_dec_chan;
31959bd0427SVlad Dogaru
32059bd0427SVlad Dogaru mutex_unlock(&data->mutex);
32159bd0427SVlad Dogaru
32259bd0427SVlad Dogaru if (data->client->irq > 0)
32359bd0427SVlad Dogaru ret = wait_for_completion_interruptible(&data->completion);
32459bd0427SVlad Dogaru else
32559bd0427SVlad Dogaru ret = sx9500_wait_for_sample(data);
32659bd0427SVlad Dogaru
32759bd0427SVlad Dogaru mutex_lock(&data->mutex);
32859bd0427SVlad Dogaru
329657c7ff5SVlad Dogaru if (ret < 0)
330657c7ff5SVlad Dogaru goto out_dec_data_rdy;
331657c7ff5SVlad Dogaru
33259bd0427SVlad Dogaru ret = sx9500_read_prox_data(data, chan, val);
33359bd0427SVlad Dogaru if (ret < 0)
334657c7ff5SVlad Dogaru goto out_dec_data_rdy;
33559bd0427SVlad Dogaru
33659bd0427SVlad Dogaru ret = sx9500_dec_data_rdy_users(data);
33759bd0427SVlad Dogaru if (ret < 0)
338657c7ff5SVlad Dogaru goto out_dec_chan;
339657c7ff5SVlad Dogaru
340657c7ff5SVlad Dogaru ret = sx9500_dec_chan_users(data, chan->channel);
341657c7ff5SVlad Dogaru if (ret < 0)
34259bd0427SVlad Dogaru goto out;
34359bd0427SVlad Dogaru
34459bd0427SVlad Dogaru ret = IIO_VAL_INT;
34559bd0427SVlad Dogaru
34659bd0427SVlad Dogaru goto out;
34759bd0427SVlad Dogaru
348657c7ff5SVlad Dogaru out_dec_data_rdy:
349657c7ff5SVlad Dogaru sx9500_dec_data_rdy_users(data);
35059bd0427SVlad Dogaru out_dec_chan:
35159bd0427SVlad Dogaru sx9500_dec_chan_users(data, chan->channel);
35259bd0427SVlad Dogaru out:
35359bd0427SVlad Dogaru mutex_unlock(&data->mutex);
35459bd0427SVlad Dogaru reinit_completion(&data->completion);
35559bd0427SVlad Dogaru
35659bd0427SVlad Dogaru return ret;
35759bd0427SVlad Dogaru }
35859bd0427SVlad Dogaru
sx9500_read_samp_freq(struct sx9500_data * data,int * val,int * val2)3594193c0f1SVlad Dogaru static int sx9500_read_samp_freq(struct sx9500_data *data,
3604193c0f1SVlad Dogaru int *val, int *val2)
3614193c0f1SVlad Dogaru {
3624193c0f1SVlad Dogaru int ret;
3634193c0f1SVlad Dogaru unsigned int regval;
3644193c0f1SVlad Dogaru
3654193c0f1SVlad Dogaru mutex_lock(&data->mutex);
3664193c0f1SVlad Dogaru ret = regmap_read(data->regmap, SX9500_REG_PROX_CTRL0, ®val);
3674193c0f1SVlad Dogaru mutex_unlock(&data->mutex);
3684193c0f1SVlad Dogaru
3694193c0f1SVlad Dogaru if (ret < 0)
3704193c0f1SVlad Dogaru return ret;
3714193c0f1SVlad Dogaru
3724193c0f1SVlad Dogaru regval = (regval & SX9500_SCAN_PERIOD_MASK) >> SX9500_SCAN_PERIOD_SHIFT;
3734193c0f1SVlad Dogaru *val = sx9500_samp_freq_table[regval].val;
3744193c0f1SVlad Dogaru *val2 = sx9500_samp_freq_table[regval].val2;
3754193c0f1SVlad Dogaru
3764193c0f1SVlad Dogaru return IIO_VAL_INT_PLUS_MICRO;
3774193c0f1SVlad Dogaru }
3784193c0f1SVlad Dogaru
sx9500_read_raw(struct iio_dev * indio_dev,const struct iio_chan_spec * chan,int * val,int * val2,long mask)3794193c0f1SVlad Dogaru static int sx9500_read_raw(struct iio_dev *indio_dev,
3804193c0f1SVlad Dogaru const struct iio_chan_spec *chan,
3814193c0f1SVlad Dogaru int *val, int *val2, long mask)
3824193c0f1SVlad Dogaru {
3834193c0f1SVlad Dogaru struct sx9500_data *data = iio_priv(indio_dev);
3846b2e7589SAlison Schofield int ret;
3854193c0f1SVlad Dogaru
3864193c0f1SVlad Dogaru switch (chan->type) {
3874193c0f1SVlad Dogaru case IIO_PROXIMITY:
3884193c0f1SVlad Dogaru switch (mask) {
3894193c0f1SVlad Dogaru case IIO_CHAN_INFO_RAW:
3906b2e7589SAlison Schofield ret = iio_device_claim_direct_mode(indio_dev);
3916b2e7589SAlison Schofield if (ret)
3926b2e7589SAlison Schofield return ret;
3936b2e7589SAlison Schofield ret = sx9500_read_proximity(data, chan, val);
3946b2e7589SAlison Schofield iio_device_release_direct_mode(indio_dev);
3956b2e7589SAlison Schofield return ret;
3964193c0f1SVlad Dogaru case IIO_CHAN_INFO_SAMP_FREQ:
3974193c0f1SVlad Dogaru return sx9500_read_samp_freq(data, val, val2);
3984193c0f1SVlad Dogaru default:
3994193c0f1SVlad Dogaru return -EINVAL;
4004193c0f1SVlad Dogaru }
4014193c0f1SVlad Dogaru default:
4024193c0f1SVlad Dogaru return -EINVAL;
4034193c0f1SVlad Dogaru }
4044193c0f1SVlad Dogaru }
4054193c0f1SVlad Dogaru
sx9500_set_samp_freq(struct sx9500_data * data,int val,int val2)4064193c0f1SVlad Dogaru static int sx9500_set_samp_freq(struct sx9500_data *data,
4074193c0f1SVlad Dogaru int val, int val2)
4084193c0f1SVlad Dogaru {
4094193c0f1SVlad Dogaru int i, ret;
4104193c0f1SVlad Dogaru
4114193c0f1SVlad Dogaru for (i = 0; i < ARRAY_SIZE(sx9500_samp_freq_table); i++)
4124193c0f1SVlad Dogaru if (val == sx9500_samp_freq_table[i].val &&
4134193c0f1SVlad Dogaru val2 == sx9500_samp_freq_table[i].val2)
4144193c0f1SVlad Dogaru break;
4154193c0f1SVlad Dogaru
4164193c0f1SVlad Dogaru if (i == ARRAY_SIZE(sx9500_samp_freq_table))
4174193c0f1SVlad Dogaru return -EINVAL;
4184193c0f1SVlad Dogaru
4194193c0f1SVlad Dogaru mutex_lock(&data->mutex);
4204193c0f1SVlad Dogaru
4214193c0f1SVlad Dogaru ret = regmap_update_bits(data->regmap, SX9500_REG_PROX_CTRL0,
4224193c0f1SVlad Dogaru SX9500_SCAN_PERIOD_MASK,
4234193c0f1SVlad Dogaru i << SX9500_SCAN_PERIOD_SHIFT);
4244193c0f1SVlad Dogaru
4254193c0f1SVlad Dogaru mutex_unlock(&data->mutex);
4264193c0f1SVlad Dogaru
4274193c0f1SVlad Dogaru return ret;
4284193c0f1SVlad Dogaru }
4294193c0f1SVlad Dogaru
sx9500_write_raw(struct iio_dev * indio_dev,const struct iio_chan_spec * chan,int val,int val2,long mask)4304193c0f1SVlad Dogaru static int sx9500_write_raw(struct iio_dev *indio_dev,
4314193c0f1SVlad Dogaru const struct iio_chan_spec *chan,
4324193c0f1SVlad Dogaru int val, int val2, long mask)
4334193c0f1SVlad Dogaru {
4344193c0f1SVlad Dogaru struct sx9500_data *data = iio_priv(indio_dev);
4354193c0f1SVlad Dogaru
4364193c0f1SVlad Dogaru switch (chan->type) {
4374193c0f1SVlad Dogaru case IIO_PROXIMITY:
4384193c0f1SVlad Dogaru switch (mask) {
4394193c0f1SVlad Dogaru case IIO_CHAN_INFO_SAMP_FREQ:
4404193c0f1SVlad Dogaru return sx9500_set_samp_freq(data, val, val2);
4414193c0f1SVlad Dogaru default:
4424193c0f1SVlad Dogaru return -EINVAL;
4434193c0f1SVlad Dogaru }
4444193c0f1SVlad Dogaru default:
4454193c0f1SVlad Dogaru return -EINVAL;
4464193c0f1SVlad Dogaru }
4474193c0f1SVlad Dogaru }
4484193c0f1SVlad Dogaru
sx9500_irq_handler(int irq,void * private)4494193c0f1SVlad Dogaru static irqreturn_t sx9500_irq_handler(int irq, void *private)
4504193c0f1SVlad Dogaru {
4514193c0f1SVlad Dogaru struct iio_dev *indio_dev = private;
4524193c0f1SVlad Dogaru struct sx9500_data *data = iio_priv(indio_dev);
4534193c0f1SVlad Dogaru
4544193c0f1SVlad Dogaru if (data->trigger_enabled)
4554193c0f1SVlad Dogaru iio_trigger_poll(data->trig);
4564193c0f1SVlad Dogaru
4574193c0f1SVlad Dogaru /*
4584193c0f1SVlad Dogaru * Even if no event is enabled, we need to wake the thread to
4594193c0f1SVlad Dogaru * clear the interrupt state by reading SX9500_REG_IRQ_SRC. It
4604193c0f1SVlad Dogaru * is not possible to do that here because regmap_read takes a
4614193c0f1SVlad Dogaru * mutex.
4624193c0f1SVlad Dogaru */
4634193c0f1SVlad Dogaru return IRQ_WAKE_THREAD;
4644193c0f1SVlad Dogaru }
4654193c0f1SVlad Dogaru
sx9500_push_events(struct iio_dev * indio_dev)46659bd0427SVlad Dogaru static void sx9500_push_events(struct iio_dev *indio_dev)
4674193c0f1SVlad Dogaru {
4684193c0f1SVlad Dogaru int ret;
4694193c0f1SVlad Dogaru unsigned int val, chan;
47059bd0427SVlad Dogaru struct sx9500_data *data = iio_priv(indio_dev);
4714193c0f1SVlad Dogaru
4724193c0f1SVlad Dogaru ret = regmap_read(data->regmap, SX9500_REG_STAT, &val);
4734193c0f1SVlad Dogaru if (ret < 0) {
4744193c0f1SVlad Dogaru dev_err(&data->client->dev, "i2c transfer error in irq\n");
47559bd0427SVlad Dogaru return;
4764193c0f1SVlad Dogaru }
4774193c0f1SVlad Dogaru
4784193c0f1SVlad Dogaru val >>= SX9500_PROXSTAT_SHIFT;
4794193c0f1SVlad Dogaru for (chan = 0; chan < SX9500_NUM_CHANNELS; chan++) {
4804193c0f1SVlad Dogaru int dir;
4814193c0f1SVlad Dogaru u64 ev;
4824193c0f1SVlad Dogaru bool new_prox = val & BIT(chan);
4834193c0f1SVlad Dogaru
4844193c0f1SVlad Dogaru if (!data->event_enabled[chan])
4854193c0f1SVlad Dogaru continue;
4864193c0f1SVlad Dogaru if (new_prox == data->prox_stat[chan])
4874193c0f1SVlad Dogaru /* No change on this channel. */
4884193c0f1SVlad Dogaru continue;
4894193c0f1SVlad Dogaru
49059bd0427SVlad Dogaru dir = new_prox ? IIO_EV_DIR_FALLING : IIO_EV_DIR_RISING;
49159bd0427SVlad Dogaru ev = IIO_UNMOD_EVENT_CODE(IIO_PROXIMITY, chan,
49259bd0427SVlad Dogaru IIO_EV_TYPE_THRESH, dir);
493bc2b7dabSGregor Boirie iio_push_event(indio_dev, ev, iio_get_time_ns(indio_dev));
4944193c0f1SVlad Dogaru data->prox_stat[chan] = new_prox;
4954193c0f1SVlad Dogaru }
49659bd0427SVlad Dogaru }
49759bd0427SVlad Dogaru
sx9500_irq_thread_handler(int irq,void * private)49859bd0427SVlad Dogaru static irqreturn_t sx9500_irq_thread_handler(int irq, void *private)
49959bd0427SVlad Dogaru {
50059bd0427SVlad Dogaru struct iio_dev *indio_dev = private;
50159bd0427SVlad Dogaru struct sx9500_data *data = iio_priv(indio_dev);
50259bd0427SVlad Dogaru int ret;
50359bd0427SVlad Dogaru unsigned int val;
50459bd0427SVlad Dogaru
50559bd0427SVlad Dogaru mutex_lock(&data->mutex);
50659bd0427SVlad Dogaru
50759bd0427SVlad Dogaru ret = regmap_read(data->regmap, SX9500_REG_IRQ_SRC, &val);
50859bd0427SVlad Dogaru if (ret < 0) {
50959bd0427SVlad Dogaru dev_err(&data->client->dev, "i2c transfer error in irq\n");
51059bd0427SVlad Dogaru goto out;
51159bd0427SVlad Dogaru }
51259bd0427SVlad Dogaru
51359bd0427SVlad Dogaru if (val & (SX9500_CLOSE_IRQ | SX9500_FAR_IRQ))
51459bd0427SVlad Dogaru sx9500_push_events(indio_dev);
51559bd0427SVlad Dogaru
51659bd0427SVlad Dogaru if (val & SX9500_CONVDONE_IRQ)
5178c11e161SDaniel Wagner complete(&data->completion);
5184193c0f1SVlad Dogaru
5194193c0f1SVlad Dogaru out:
5204193c0f1SVlad Dogaru mutex_unlock(&data->mutex);
5214193c0f1SVlad Dogaru
5224193c0f1SVlad Dogaru return IRQ_HANDLED;
5234193c0f1SVlad Dogaru }
5244193c0f1SVlad Dogaru
sx9500_read_event_config(struct iio_dev * indio_dev,const struct iio_chan_spec * chan,enum iio_event_type type,enum iio_event_direction dir)5254193c0f1SVlad Dogaru static int sx9500_read_event_config(struct iio_dev *indio_dev,
5264193c0f1SVlad Dogaru const struct iio_chan_spec *chan,
5274193c0f1SVlad Dogaru enum iio_event_type type,
5284193c0f1SVlad Dogaru enum iio_event_direction dir)
5294193c0f1SVlad Dogaru {
5304193c0f1SVlad Dogaru struct sx9500_data *data = iio_priv(indio_dev);
5314193c0f1SVlad Dogaru
5324193c0f1SVlad Dogaru if (chan->type != IIO_PROXIMITY || type != IIO_EV_TYPE_THRESH ||
5334193c0f1SVlad Dogaru dir != IIO_EV_DIR_EITHER)
5344193c0f1SVlad Dogaru return -EINVAL;
5354193c0f1SVlad Dogaru
5364193c0f1SVlad Dogaru return data->event_enabled[chan->channel];
5374193c0f1SVlad Dogaru }
5384193c0f1SVlad Dogaru
sx9500_write_event_config(struct iio_dev * indio_dev,const struct iio_chan_spec * chan,enum iio_event_type type,enum iio_event_direction dir,int state)5394193c0f1SVlad Dogaru static int sx9500_write_event_config(struct iio_dev *indio_dev,
5404193c0f1SVlad Dogaru const struct iio_chan_spec *chan,
5414193c0f1SVlad Dogaru enum iio_event_type type,
5424193c0f1SVlad Dogaru enum iio_event_direction dir,
5434193c0f1SVlad Dogaru int state)
5444193c0f1SVlad Dogaru {
5454193c0f1SVlad Dogaru struct sx9500_data *data = iio_priv(indio_dev);
54659bd0427SVlad Dogaru int ret;
5474193c0f1SVlad Dogaru
5484193c0f1SVlad Dogaru if (chan->type != IIO_PROXIMITY || type != IIO_EV_TYPE_THRESH ||
5494193c0f1SVlad Dogaru dir != IIO_EV_DIR_EITHER)
5504193c0f1SVlad Dogaru return -EINVAL;
5514193c0f1SVlad Dogaru
5524193c0f1SVlad Dogaru mutex_lock(&data->mutex);
5534193c0f1SVlad Dogaru
55459bd0427SVlad Dogaru if (state == 1) {
55559bd0427SVlad Dogaru ret = sx9500_inc_chan_users(data, chan->channel);
55659bd0427SVlad Dogaru if (ret < 0)
55759bd0427SVlad Dogaru goto out_unlock;
55859bd0427SVlad Dogaru ret = sx9500_inc_close_far_users(data);
55959bd0427SVlad Dogaru if (ret < 0)
56059bd0427SVlad Dogaru goto out_undo_chan;
56159bd0427SVlad Dogaru } else {
56259bd0427SVlad Dogaru ret = sx9500_dec_chan_users(data, chan->channel);
56359bd0427SVlad Dogaru if (ret < 0)
56459bd0427SVlad Dogaru goto out_unlock;
56559bd0427SVlad Dogaru ret = sx9500_dec_close_far_users(data);
56659bd0427SVlad Dogaru if (ret < 0)
56759bd0427SVlad Dogaru goto out_undo_chan;
5684193c0f1SVlad Dogaru }
5694193c0f1SVlad Dogaru
57059bd0427SVlad Dogaru data->event_enabled[chan->channel] = state;
57159bd0427SVlad Dogaru goto out_unlock;
57259bd0427SVlad Dogaru
57359bd0427SVlad Dogaru out_undo_chan:
57459bd0427SVlad Dogaru if (state == 1)
57559bd0427SVlad Dogaru sx9500_dec_chan_users(data, chan->channel);
5764193c0f1SVlad Dogaru else
57759bd0427SVlad Dogaru sx9500_inc_chan_users(data, chan->channel);
57859bd0427SVlad Dogaru out_unlock:
5794193c0f1SVlad Dogaru mutex_unlock(&data->mutex);
5804193c0f1SVlad Dogaru return ret;
5814193c0f1SVlad Dogaru }
5824193c0f1SVlad Dogaru
sx9500_update_scan_mode(struct iio_dev * indio_dev,const unsigned long * scan_mask)5834193c0f1SVlad Dogaru static int sx9500_update_scan_mode(struct iio_dev *indio_dev,
5844193c0f1SVlad Dogaru const unsigned long *scan_mask)
5854193c0f1SVlad Dogaru {
5864193c0f1SVlad Dogaru struct sx9500_data *data = iio_priv(indio_dev);
5874193c0f1SVlad Dogaru
5884193c0f1SVlad Dogaru mutex_lock(&data->mutex);
5894193c0f1SVlad Dogaru kfree(data->buffer);
5904193c0f1SVlad Dogaru data->buffer = kzalloc(indio_dev->scan_bytes, GFP_KERNEL);
5914193c0f1SVlad Dogaru mutex_unlock(&data->mutex);
5924193c0f1SVlad Dogaru
5934193c0f1SVlad Dogaru if (data->buffer == NULL)
5944193c0f1SVlad Dogaru return -ENOMEM;
5954193c0f1SVlad Dogaru
5964193c0f1SVlad Dogaru return 0;
5974193c0f1SVlad Dogaru }
5984193c0f1SVlad Dogaru
5994193c0f1SVlad Dogaru static IIO_CONST_ATTR_SAMP_FREQ_AVAIL(
6004193c0f1SVlad Dogaru "2.500000 3.333333 5 6.666666 8.333333 11.111111 16.666666 33.333333");
6014193c0f1SVlad Dogaru
6024193c0f1SVlad Dogaru static struct attribute *sx9500_attributes[] = {
6034193c0f1SVlad Dogaru &iio_const_attr_sampling_frequency_available.dev_attr.attr,
6044193c0f1SVlad Dogaru NULL,
6054193c0f1SVlad Dogaru };
6064193c0f1SVlad Dogaru
6074193c0f1SVlad Dogaru static const struct attribute_group sx9500_attribute_group = {
6084193c0f1SVlad Dogaru .attrs = sx9500_attributes,
6094193c0f1SVlad Dogaru };
6104193c0f1SVlad Dogaru
6114193c0f1SVlad Dogaru static const struct iio_info sx9500_info = {
6124193c0f1SVlad Dogaru .attrs = &sx9500_attribute_group,
6134193c0f1SVlad Dogaru .read_raw = &sx9500_read_raw,
6144193c0f1SVlad Dogaru .write_raw = &sx9500_write_raw,
6154193c0f1SVlad Dogaru .read_event_config = &sx9500_read_event_config,
6164193c0f1SVlad Dogaru .write_event_config = &sx9500_write_event_config,
6174193c0f1SVlad Dogaru .update_scan_mode = &sx9500_update_scan_mode,
6184193c0f1SVlad Dogaru };
6194193c0f1SVlad Dogaru
sx9500_set_trigger_state(struct iio_trigger * trig,bool state)6204193c0f1SVlad Dogaru static int sx9500_set_trigger_state(struct iio_trigger *trig,
6214193c0f1SVlad Dogaru bool state)
6224193c0f1SVlad Dogaru {
6234193c0f1SVlad Dogaru struct iio_dev *indio_dev = iio_trigger_get_drvdata(trig);
6244193c0f1SVlad Dogaru struct sx9500_data *data = iio_priv(indio_dev);
6254193c0f1SVlad Dogaru int ret;
6264193c0f1SVlad Dogaru
6274193c0f1SVlad Dogaru mutex_lock(&data->mutex);
6284193c0f1SVlad Dogaru
62959bd0427SVlad Dogaru if (state)
63059bd0427SVlad Dogaru ret = sx9500_inc_data_rdy_users(data);
63159bd0427SVlad Dogaru else
63259bd0427SVlad Dogaru ret = sx9500_dec_data_rdy_users(data);
63359bd0427SVlad Dogaru if (ret < 0)
63459bd0427SVlad Dogaru goto out;
63559bd0427SVlad Dogaru
6364193c0f1SVlad Dogaru data->trigger_enabled = state;
6374193c0f1SVlad Dogaru
63859bd0427SVlad Dogaru out:
6394193c0f1SVlad Dogaru mutex_unlock(&data->mutex);
6404193c0f1SVlad Dogaru
6414193c0f1SVlad Dogaru return ret;
6424193c0f1SVlad Dogaru }
6434193c0f1SVlad Dogaru
6444193c0f1SVlad Dogaru static const struct iio_trigger_ops sx9500_trigger_ops = {
6454193c0f1SVlad Dogaru .set_trigger_state = sx9500_set_trigger_state,
6464193c0f1SVlad Dogaru };
6474193c0f1SVlad Dogaru
sx9500_trigger_handler(int irq,void * private)6484193c0f1SVlad Dogaru static irqreturn_t sx9500_trigger_handler(int irq, void *private)
6494193c0f1SVlad Dogaru {
6504193c0f1SVlad Dogaru struct iio_poll_func *pf = private;
6514193c0f1SVlad Dogaru struct iio_dev *indio_dev = pf->indio_dev;
6524193c0f1SVlad Dogaru struct sx9500_data *data = iio_priv(indio_dev);
6534193c0f1SVlad Dogaru int val, bit, ret, i = 0;
6544193c0f1SVlad Dogaru
6554193c0f1SVlad Dogaru mutex_lock(&data->mutex);
6564193c0f1SVlad Dogaru
657*e46d71a8SNuno Sa iio_for_each_active_channel(indio_dev, bit) {
65859bd0427SVlad Dogaru ret = sx9500_read_prox_data(data, &indio_dev->channels[bit],
6594193c0f1SVlad Dogaru &val);
6604193c0f1SVlad Dogaru if (ret < 0)
6614193c0f1SVlad Dogaru goto out;
6624193c0f1SVlad Dogaru
6634193c0f1SVlad Dogaru data->buffer[i++] = val;
6644193c0f1SVlad Dogaru }
6654193c0f1SVlad Dogaru
6664193c0f1SVlad Dogaru iio_push_to_buffers_with_timestamp(indio_dev, data->buffer,
667bc2b7dabSGregor Boirie iio_get_time_ns(indio_dev));
6684193c0f1SVlad Dogaru
6694193c0f1SVlad Dogaru out:
6704193c0f1SVlad Dogaru mutex_unlock(&data->mutex);
6714193c0f1SVlad Dogaru
6724193c0f1SVlad Dogaru iio_trigger_notify_done(indio_dev->trig);
6734193c0f1SVlad Dogaru
6744193c0f1SVlad Dogaru return IRQ_HANDLED;
6754193c0f1SVlad Dogaru }
6764193c0f1SVlad Dogaru
sx9500_buffer_postenable(struct iio_dev * indio_dev)6773cfd6464SAlexandru Ardelean static int sx9500_buffer_postenable(struct iio_dev *indio_dev)
67859bd0427SVlad Dogaru {
67959bd0427SVlad Dogaru struct sx9500_data *data = iio_priv(indio_dev);
680897993feSGeert Uytterhoeven int ret = 0, i;
68159bd0427SVlad Dogaru
68259bd0427SVlad Dogaru mutex_lock(&data->mutex);
68359bd0427SVlad Dogaru
68459bd0427SVlad Dogaru for (i = 0; i < SX9500_NUM_CHANNELS; i++)
68559bd0427SVlad Dogaru if (test_bit(i, indio_dev->active_scan_mask)) {
68659bd0427SVlad Dogaru ret = sx9500_inc_chan_users(data, i);
68759bd0427SVlad Dogaru if (ret)
68859bd0427SVlad Dogaru break;
68959bd0427SVlad Dogaru }
69059bd0427SVlad Dogaru
69159bd0427SVlad Dogaru if (ret)
69259bd0427SVlad Dogaru for (i = i - 1; i >= 0; i--)
69359bd0427SVlad Dogaru if (test_bit(i, indio_dev->active_scan_mask))
69459bd0427SVlad Dogaru sx9500_dec_chan_users(data, i);
69559bd0427SVlad Dogaru
69659bd0427SVlad Dogaru mutex_unlock(&data->mutex);
69759bd0427SVlad Dogaru
69859bd0427SVlad Dogaru return ret;
69959bd0427SVlad Dogaru }
70059bd0427SVlad Dogaru
sx9500_buffer_predisable(struct iio_dev * indio_dev)70159bd0427SVlad Dogaru static int sx9500_buffer_predisable(struct iio_dev *indio_dev)
70259bd0427SVlad Dogaru {
70359bd0427SVlad Dogaru struct sx9500_data *data = iio_priv(indio_dev);
704897993feSGeert Uytterhoeven int ret = 0, i;
70559bd0427SVlad Dogaru
70659bd0427SVlad Dogaru mutex_lock(&data->mutex);
70759bd0427SVlad Dogaru
70859bd0427SVlad Dogaru for (i = 0; i < SX9500_NUM_CHANNELS; i++)
70959bd0427SVlad Dogaru if (test_bit(i, indio_dev->active_scan_mask)) {
71059bd0427SVlad Dogaru ret = sx9500_dec_chan_users(data, i);
71159bd0427SVlad Dogaru if (ret)
71259bd0427SVlad Dogaru break;
71359bd0427SVlad Dogaru }
71459bd0427SVlad Dogaru
71559bd0427SVlad Dogaru if (ret)
71659bd0427SVlad Dogaru for (i = i - 1; i >= 0; i--)
71759bd0427SVlad Dogaru if (test_bit(i, indio_dev->active_scan_mask))
71859bd0427SVlad Dogaru sx9500_inc_chan_users(data, i);
71959bd0427SVlad Dogaru
72059bd0427SVlad Dogaru mutex_unlock(&data->mutex);
72159bd0427SVlad Dogaru
72259bd0427SVlad Dogaru return ret;
72359bd0427SVlad Dogaru }
72459bd0427SVlad Dogaru
72559bd0427SVlad Dogaru static const struct iio_buffer_setup_ops sx9500_buffer_setup_ops = {
7263cfd6464SAlexandru Ardelean .postenable = sx9500_buffer_postenable,
72759bd0427SVlad Dogaru .predisable = sx9500_buffer_predisable,
72859bd0427SVlad Dogaru };
72959bd0427SVlad Dogaru
7304193c0f1SVlad Dogaru struct sx9500_reg_default {
7314193c0f1SVlad Dogaru u8 reg;
7324193c0f1SVlad Dogaru u8 def;
7334193c0f1SVlad Dogaru };
7344193c0f1SVlad Dogaru
7354193c0f1SVlad Dogaru static const struct sx9500_reg_default sx9500_default_regs[] = {
7364193c0f1SVlad Dogaru {
7374193c0f1SVlad Dogaru .reg = SX9500_REG_PROX_CTRL1,
7384193c0f1SVlad Dogaru /* Shield enabled, small range. */
7394193c0f1SVlad Dogaru .def = 0x43,
7404193c0f1SVlad Dogaru },
7414193c0f1SVlad Dogaru {
7424193c0f1SVlad Dogaru .reg = SX9500_REG_PROX_CTRL2,
7434193c0f1SVlad Dogaru /* x8 gain, 167kHz frequency, finest resolution. */
7444193c0f1SVlad Dogaru .def = 0x77,
7454193c0f1SVlad Dogaru },
7464193c0f1SVlad Dogaru {
7474193c0f1SVlad Dogaru .reg = SX9500_REG_PROX_CTRL3,
7484193c0f1SVlad Dogaru /* Doze enabled, 2x scan period doze, no raw filter. */
7494193c0f1SVlad Dogaru .def = 0x40,
7504193c0f1SVlad Dogaru },
7514193c0f1SVlad Dogaru {
7524193c0f1SVlad Dogaru .reg = SX9500_REG_PROX_CTRL4,
7534193c0f1SVlad Dogaru /* Average threshold. */
7544193c0f1SVlad Dogaru .def = 0x30,
7554193c0f1SVlad Dogaru },
7564193c0f1SVlad Dogaru {
7574193c0f1SVlad Dogaru .reg = SX9500_REG_PROX_CTRL5,
7584193c0f1SVlad Dogaru /*
7594193c0f1SVlad Dogaru * Debouncer off, lowest average negative filter,
760a04e3db5SBhaskar Chowdhury * highest average positive filter.
7614193c0f1SVlad Dogaru */
7624193c0f1SVlad Dogaru .def = 0x0f,
7634193c0f1SVlad Dogaru },
7644193c0f1SVlad Dogaru {
7654193c0f1SVlad Dogaru .reg = SX9500_REG_PROX_CTRL6,
7664193c0f1SVlad Dogaru /* Proximity detection threshold: 280 */
7674193c0f1SVlad Dogaru .def = 0x0e,
7684193c0f1SVlad Dogaru },
7694193c0f1SVlad Dogaru {
7704193c0f1SVlad Dogaru .reg = SX9500_REG_PROX_CTRL7,
7714193c0f1SVlad Dogaru /*
7724193c0f1SVlad Dogaru * No automatic compensation, compensate each pin
7734193c0f1SVlad Dogaru * independently, proximity hysteresis: 32, close
7744193c0f1SVlad Dogaru * debouncer off, far debouncer off.
7754193c0f1SVlad Dogaru */
7764193c0f1SVlad Dogaru .def = 0x00,
7774193c0f1SVlad Dogaru },
7784193c0f1SVlad Dogaru {
7794193c0f1SVlad Dogaru .reg = SX9500_REG_PROX_CTRL8,
7804193c0f1SVlad Dogaru /* No stuck timeout, no periodic compensation. */
7814193c0f1SVlad Dogaru .def = 0x00,
7824193c0f1SVlad Dogaru },
7834193c0f1SVlad Dogaru {
7844193c0f1SVlad Dogaru .reg = SX9500_REG_PROX_CTRL0,
78559bd0427SVlad Dogaru /* Scan period: 30ms, all sensors disabled. */
78659bd0427SVlad Dogaru .def = 0x00,
7874193c0f1SVlad Dogaru },
7884193c0f1SVlad Dogaru };
7894193c0f1SVlad Dogaru
79059bd0427SVlad Dogaru /* Activate all channels and perform an initial compensation. */
sx9500_init_compensation(struct iio_dev * indio_dev)79159bd0427SVlad Dogaru static int sx9500_init_compensation(struct iio_dev *indio_dev)
79259bd0427SVlad Dogaru {
79359bd0427SVlad Dogaru struct sx9500_data *data = iio_priv(indio_dev);
79459bd0427SVlad Dogaru int i, ret;
79559bd0427SVlad Dogaru unsigned int val;
79659bd0427SVlad Dogaru
797734ecf98STrevor Gamblin ret = regmap_set_bits(data->regmap, SX9500_REG_PROX_CTRL0,
798734ecf98STrevor Gamblin SX9500_CHAN_MASK);
79959bd0427SVlad Dogaru if (ret < 0)
80059bd0427SVlad Dogaru return ret;
80159bd0427SVlad Dogaru
80259bd0427SVlad Dogaru for (i = 10; i >= 0; i--) {
80359bd0427SVlad Dogaru usleep_range(10000, 20000);
80459bd0427SVlad Dogaru ret = regmap_read(data->regmap, SX9500_REG_STAT, &val);
80559bd0427SVlad Dogaru if (ret < 0)
80659bd0427SVlad Dogaru goto out;
80759bd0427SVlad Dogaru if (!(val & SX9500_COMPSTAT_MASK))
80859bd0427SVlad Dogaru break;
80959bd0427SVlad Dogaru }
81059bd0427SVlad Dogaru
81159bd0427SVlad Dogaru if (i < 0) {
81259bd0427SVlad Dogaru dev_err(&data->client->dev, "initial compensation timed out");
81359bd0427SVlad Dogaru ret = -ETIMEDOUT;
81459bd0427SVlad Dogaru }
81559bd0427SVlad Dogaru
81659bd0427SVlad Dogaru out:
817734ecf98STrevor Gamblin regmap_clear_bits(data->regmap, SX9500_REG_PROX_CTRL0,
818734ecf98STrevor Gamblin SX9500_CHAN_MASK);
81959bd0427SVlad Dogaru return ret;
82059bd0427SVlad Dogaru }
82159bd0427SVlad Dogaru
sx9500_init_device(struct iio_dev * indio_dev)8224193c0f1SVlad Dogaru static int sx9500_init_device(struct iio_dev *indio_dev)
8234193c0f1SVlad Dogaru {
8244193c0f1SVlad Dogaru struct sx9500_data *data = iio_priv(indio_dev);
8254193c0f1SVlad Dogaru int ret, i;
8264193c0f1SVlad Dogaru unsigned int val;
8274193c0f1SVlad Dogaru
82845fd5f8eSVlad Dogaru if (data->gpiod_rst) {
82945fd5f8eSVlad Dogaru gpiod_set_value_cansleep(data->gpiod_rst, 0);
83045fd5f8eSVlad Dogaru usleep_range(1000, 2000);
83145fd5f8eSVlad Dogaru gpiod_set_value_cansleep(data->gpiod_rst, 1);
83245fd5f8eSVlad Dogaru usleep_range(1000, 2000);
83345fd5f8eSVlad Dogaru }
83445fd5f8eSVlad Dogaru
8354193c0f1SVlad Dogaru ret = regmap_write(data->regmap, SX9500_REG_IRQ_MSK, 0);
8364193c0f1SVlad Dogaru if (ret < 0)
8374193c0f1SVlad Dogaru return ret;
8384193c0f1SVlad Dogaru
8394193c0f1SVlad Dogaru ret = regmap_write(data->regmap, SX9500_REG_RESET,
8404193c0f1SVlad Dogaru SX9500_SOFT_RESET);
8414193c0f1SVlad Dogaru if (ret < 0)
8424193c0f1SVlad Dogaru return ret;
8434193c0f1SVlad Dogaru
8444193c0f1SVlad Dogaru ret = regmap_read(data->regmap, SX9500_REG_IRQ_SRC, &val);
8454193c0f1SVlad Dogaru if (ret < 0)
8464193c0f1SVlad Dogaru return ret;
8474193c0f1SVlad Dogaru
8484193c0f1SVlad Dogaru for (i = 0; i < ARRAY_SIZE(sx9500_default_regs); i++) {
8494193c0f1SVlad Dogaru ret = regmap_write(data->regmap,
8504193c0f1SVlad Dogaru sx9500_default_regs[i].reg,
8514193c0f1SVlad Dogaru sx9500_default_regs[i].def);
8524193c0f1SVlad Dogaru if (ret < 0)
8534193c0f1SVlad Dogaru return ret;
8544193c0f1SVlad Dogaru }
8554193c0f1SVlad Dogaru
8561a30295aSJonathan Cameron return sx9500_init_compensation(indio_dev);
8574193c0f1SVlad Dogaru }
8584193c0f1SVlad Dogaru
859b61d8e63SAndy Shevchenko static const struct acpi_gpio_params reset_gpios = { 0, 0, false };
860b61d8e63SAndy Shevchenko static const struct acpi_gpio_params interrupt_gpios = { 2, 0, false };
861b61d8e63SAndy Shevchenko
862b61d8e63SAndy Shevchenko static const struct acpi_gpio_mapping acpi_sx9500_gpios[] = {
863b61d8e63SAndy Shevchenko { "reset-gpios", &reset_gpios, 1 },
864b61d8e63SAndy Shevchenko /*
865b61d8e63SAndy Shevchenko * Some platforms have a bug in ACPI GPIO description making IRQ
866b61d8e63SAndy Shevchenko * GPIO to be output only. Ask the GPIO core to ignore this limit.
867b61d8e63SAndy Shevchenko */
868b61d8e63SAndy Shevchenko { "interrupt-gpios", &interrupt_gpios, 1, ACPI_GPIO_QUIRK_NO_IO_RESTRICTION },
869b61d8e63SAndy Shevchenko { },
870b61d8e63SAndy Shevchenko };
871b61d8e63SAndy Shevchenko
sx9500_gpio_probe(struct i2c_client * client,struct sx9500_data * data)872821ace29SVlad Dogaru static void sx9500_gpio_probe(struct i2c_client *client,
8734193c0f1SVlad Dogaru struct sx9500_data *data)
8744193c0f1SVlad Dogaru {
875e53111adSAndy Shevchenko struct gpio_desc *gpiod_int;
8764193c0f1SVlad Dogaru struct device *dev;
877b61d8e63SAndy Shevchenko int ret;
8784193c0f1SVlad Dogaru
8794193c0f1SVlad Dogaru if (!client)
880821ace29SVlad Dogaru return;
8814193c0f1SVlad Dogaru
8824193c0f1SVlad Dogaru dev = &client->dev;
8834193c0f1SVlad Dogaru
884b61d8e63SAndy Shevchenko ret = devm_acpi_dev_add_driver_gpios(dev, acpi_sx9500_gpios);
885b61d8e63SAndy Shevchenko if (ret)
886b61d8e63SAndy Shevchenko dev_dbg(dev, "Unable to add GPIO mapping table\n");
887b61d8e63SAndy Shevchenko
888e53111adSAndy Shevchenko if (client->irq <= 0) {
889b61d8e63SAndy Shevchenko gpiod_int = devm_gpiod_get(dev, "interrupt", GPIOD_IN);
890e53111adSAndy Shevchenko if (IS_ERR(gpiod_int))
891e53111adSAndy Shevchenko dev_err(dev, "gpio get irq failed\n");
892e53111adSAndy Shevchenko else
893e53111adSAndy Shevchenko client->irq = gpiod_to_irq(gpiod_int);
894e53111adSAndy Shevchenko }
895e53111adSAndy Shevchenko
896b61d8e63SAndy Shevchenko data->gpiod_rst = devm_gpiod_get(dev, "reset", GPIOD_OUT_HIGH);
89745fd5f8eSVlad Dogaru if (IS_ERR(data->gpiod_rst)) {
89845fd5f8eSVlad Dogaru dev_warn(dev, "gpio get reset pin failed\n");
89945fd5f8eSVlad Dogaru data->gpiod_rst = NULL;
90045fd5f8eSVlad Dogaru }
9014193c0f1SVlad Dogaru }
9024193c0f1SVlad Dogaru
sx9500_probe(struct i2c_client * client)9037660d32eSUwe Kleine-König static int sx9500_probe(struct i2c_client *client)
9044193c0f1SVlad Dogaru {
9054193c0f1SVlad Dogaru int ret;
9064193c0f1SVlad Dogaru struct iio_dev *indio_dev;
9074193c0f1SVlad Dogaru struct sx9500_data *data;
9084193c0f1SVlad Dogaru
9094193c0f1SVlad Dogaru indio_dev = devm_iio_device_alloc(&client->dev, sizeof(*data));
9104193c0f1SVlad Dogaru if (indio_dev == NULL)
9114193c0f1SVlad Dogaru return -ENOMEM;
9124193c0f1SVlad Dogaru
9134193c0f1SVlad Dogaru data = iio_priv(indio_dev);
9144193c0f1SVlad Dogaru data->client = client;
9154193c0f1SVlad Dogaru mutex_init(&data->mutex);
91659bd0427SVlad Dogaru init_completion(&data->completion);
9174193c0f1SVlad Dogaru data->trigger_enabled = false;
9184193c0f1SVlad Dogaru
9194193c0f1SVlad Dogaru data->regmap = devm_regmap_init_i2c(client, &sx9500_regmap_config);
9204193c0f1SVlad Dogaru if (IS_ERR(data->regmap))
9214193c0f1SVlad Dogaru return PTR_ERR(data->regmap);
9224193c0f1SVlad Dogaru
9234193c0f1SVlad Dogaru indio_dev->name = SX9500_DRIVER_NAME;
9244193c0f1SVlad Dogaru indio_dev->channels = sx9500_channels;
9254193c0f1SVlad Dogaru indio_dev->num_channels = ARRAY_SIZE(sx9500_channels);
9264193c0f1SVlad Dogaru indio_dev->info = &sx9500_info;
9274193c0f1SVlad Dogaru indio_dev->modes = INDIO_DIRECT_MODE;
9284193c0f1SVlad Dogaru i2c_set_clientdata(client, indio_dev);
9294193c0f1SVlad Dogaru
930821ace29SVlad Dogaru sx9500_gpio_probe(client, data);
9314193c0f1SVlad Dogaru
93245fd5f8eSVlad Dogaru ret = sx9500_init_device(indio_dev);
93345fd5f8eSVlad Dogaru if (ret < 0)
93445fd5f8eSVlad Dogaru return ret;
93545fd5f8eSVlad Dogaru
93659bd0427SVlad Dogaru if (client->irq <= 0)
93759bd0427SVlad Dogaru dev_warn(&client->dev, "no valid irq found\n");
93859bd0427SVlad Dogaru else {
9394193c0f1SVlad Dogaru ret = devm_request_threaded_irq(&client->dev, client->irq,
9404193c0f1SVlad Dogaru sx9500_irq_handler, sx9500_irq_thread_handler,
9414193c0f1SVlad Dogaru IRQF_TRIGGER_FALLING | IRQF_ONESHOT,
9424193c0f1SVlad Dogaru SX9500_IRQ_NAME, indio_dev);
9434193c0f1SVlad Dogaru if (ret < 0)
9444193c0f1SVlad Dogaru return ret;
9454193c0f1SVlad Dogaru
9464193c0f1SVlad Dogaru data->trig = devm_iio_trigger_alloc(&client->dev,
94715ea2878SJonathan Cameron "%s-dev%d", indio_dev->name, iio_device_id(indio_dev));
9484193c0f1SVlad Dogaru if (!data->trig)
9494193c0f1SVlad Dogaru return -ENOMEM;
9504193c0f1SVlad Dogaru
9514193c0f1SVlad Dogaru data->trig->ops = &sx9500_trigger_ops;
9524193c0f1SVlad Dogaru iio_trigger_set_drvdata(data->trig, indio_dev);
9534193c0f1SVlad Dogaru
9544193c0f1SVlad Dogaru ret = iio_trigger_register(data->trig);
9554193c0f1SVlad Dogaru if (ret)
9564193c0f1SVlad Dogaru return ret;
9574193c0f1SVlad Dogaru }
9584193c0f1SVlad Dogaru
9594193c0f1SVlad Dogaru ret = iio_triggered_buffer_setup(indio_dev, NULL,
96059bd0427SVlad Dogaru sx9500_trigger_handler,
96159bd0427SVlad Dogaru &sx9500_buffer_setup_ops);
9624193c0f1SVlad Dogaru if (ret < 0)
9634193c0f1SVlad Dogaru goto out_trigger_unregister;
9644193c0f1SVlad Dogaru
9654193c0f1SVlad Dogaru ret = iio_device_register(indio_dev);
9664193c0f1SVlad Dogaru if (ret < 0)
9674193c0f1SVlad Dogaru goto out_buffer_cleanup;
9684193c0f1SVlad Dogaru
9694193c0f1SVlad Dogaru return 0;
9704193c0f1SVlad Dogaru
9714193c0f1SVlad Dogaru out_buffer_cleanup:
9724193c0f1SVlad Dogaru iio_triggered_buffer_cleanup(indio_dev);
9734193c0f1SVlad Dogaru out_trigger_unregister:
9744193c0f1SVlad Dogaru if (client->irq > 0)
9754193c0f1SVlad Dogaru iio_trigger_unregister(data->trig);
9764193c0f1SVlad Dogaru
9774193c0f1SVlad Dogaru return ret;
9784193c0f1SVlad Dogaru }
9794193c0f1SVlad Dogaru
sx9500_remove(struct i2c_client * client)980ed5c2f5fSUwe Kleine-König static void sx9500_remove(struct i2c_client *client)
9814193c0f1SVlad Dogaru {
9824193c0f1SVlad Dogaru struct iio_dev *indio_dev = i2c_get_clientdata(client);
9834193c0f1SVlad Dogaru struct sx9500_data *data = iio_priv(indio_dev);
9844193c0f1SVlad Dogaru
9854193c0f1SVlad Dogaru iio_device_unregister(indio_dev);
9864193c0f1SVlad Dogaru iio_triggered_buffer_cleanup(indio_dev);
9874193c0f1SVlad Dogaru if (client->irq > 0)
9884193c0f1SVlad Dogaru iio_trigger_unregister(data->trig);
9894193c0f1SVlad Dogaru kfree(data->buffer);
9904193c0f1SVlad Dogaru }
9914193c0f1SVlad Dogaru
sx9500_suspend(struct device * dev)9927840ffeeSVlad Dogaru static int sx9500_suspend(struct device *dev)
9937840ffeeSVlad Dogaru {
9947840ffeeSVlad Dogaru struct iio_dev *indio_dev = i2c_get_clientdata(to_i2c_client(dev));
9957840ffeeSVlad Dogaru struct sx9500_data *data = iio_priv(indio_dev);
9967840ffeeSVlad Dogaru int ret;
9977840ffeeSVlad Dogaru
9987840ffeeSVlad Dogaru mutex_lock(&data->mutex);
9997840ffeeSVlad Dogaru ret = regmap_read(data->regmap, SX9500_REG_PROX_CTRL0,
10007840ffeeSVlad Dogaru &data->suspend_ctrl0);
10017840ffeeSVlad Dogaru if (ret < 0)
10027840ffeeSVlad Dogaru goto out;
10037840ffeeSVlad Dogaru
10047840ffeeSVlad Dogaru /*
10057840ffeeSVlad Dogaru * Scan period doesn't matter because when all the sensors are
10067840ffeeSVlad Dogaru * deactivated the device is in sleep mode.
10077840ffeeSVlad Dogaru */
10087840ffeeSVlad Dogaru ret = regmap_write(data->regmap, SX9500_REG_PROX_CTRL0, 0);
10097840ffeeSVlad Dogaru
10107840ffeeSVlad Dogaru out:
10117840ffeeSVlad Dogaru mutex_unlock(&data->mutex);
10127840ffeeSVlad Dogaru return ret;
10137840ffeeSVlad Dogaru }
10147840ffeeSVlad Dogaru
sx9500_resume(struct device * dev)10157840ffeeSVlad Dogaru static int sx9500_resume(struct device *dev)
10167840ffeeSVlad Dogaru {
10177840ffeeSVlad Dogaru struct iio_dev *indio_dev = i2c_get_clientdata(to_i2c_client(dev));
10187840ffeeSVlad Dogaru struct sx9500_data *data = iio_priv(indio_dev);
10197840ffeeSVlad Dogaru int ret;
10207840ffeeSVlad Dogaru
10217840ffeeSVlad Dogaru mutex_lock(&data->mutex);
10227840ffeeSVlad Dogaru ret = regmap_write(data->regmap, SX9500_REG_PROX_CTRL0,
10237840ffeeSVlad Dogaru data->suspend_ctrl0);
10247840ffeeSVlad Dogaru mutex_unlock(&data->mutex);
10257840ffeeSVlad Dogaru
10267840ffeeSVlad Dogaru return ret;
10277840ffeeSVlad Dogaru }
10287840ffeeSVlad Dogaru
102951e256d4SJonathan Cameron static DEFINE_SIMPLE_DEV_PM_OPS(sx9500_pm_ops, sx9500_suspend, sx9500_resume);
10307840ffeeSVlad Dogaru
10314193c0f1SVlad Dogaru static const struct acpi_device_id sx9500_acpi_match[] = {
10324193c0f1SVlad Dogaru {"SSX9500", 0},
1033b8793555SAndy Shevchenko {"SASX9500", 0},
10344193c0f1SVlad Dogaru { },
10354193c0f1SVlad Dogaru };
10364193c0f1SVlad Dogaru MODULE_DEVICE_TABLE(acpi, sx9500_acpi_match);
10374193c0f1SVlad Dogaru
1038a5c8b11aSChristoph Fritz static const struct of_device_id sx9500_of_match[] = {
1039a5c8b11aSChristoph Fritz { .compatible = "semtech,sx9500", },
1040a5c8b11aSChristoph Fritz { }
1041a5c8b11aSChristoph Fritz };
1042a5c8b11aSChristoph Fritz MODULE_DEVICE_TABLE(of, sx9500_of_match);
1043a5c8b11aSChristoph Fritz
10444193c0f1SVlad Dogaru static const struct i2c_device_id sx9500_id[] = {
10454391affaSUwe Kleine-König { "sx9500" },
10464391affaSUwe Kleine-König { }
10474193c0f1SVlad Dogaru };
10484193c0f1SVlad Dogaru MODULE_DEVICE_TABLE(i2c, sx9500_id);
10494193c0f1SVlad Dogaru
10504193c0f1SVlad Dogaru static struct i2c_driver sx9500_driver = {
10514193c0f1SVlad Dogaru .driver = {
10524193c0f1SVlad Dogaru .name = SX9500_DRIVER_NAME,
10539ee6bc3aSKrzysztof Kozlowski .acpi_match_table = sx9500_acpi_match,
10549ee6bc3aSKrzysztof Kozlowski .of_match_table = sx9500_of_match,
105551e256d4SJonathan Cameron .pm = pm_sleep_ptr(&sx9500_pm_ops),
10564193c0f1SVlad Dogaru },
10577cf15f42SUwe Kleine-König .probe = sx9500_probe,
10584193c0f1SVlad Dogaru .remove = sx9500_remove,
10594193c0f1SVlad Dogaru .id_table = sx9500_id,
10604193c0f1SVlad Dogaru };
10614193c0f1SVlad Dogaru module_i2c_driver(sx9500_driver);
10624193c0f1SVlad Dogaru
10634193c0f1SVlad Dogaru MODULE_AUTHOR("Vlad Dogaru <vlad.dogaru@intel.com>");
10644193c0f1SVlad Dogaru MODULE_DESCRIPTION("Driver for Semtech SX9500 proximity sensor");
10654193c0f1SVlad Dogaru MODULE_LICENSE("GPL v2");
1066