1 /* SPDX-License-Identifier: GPL-2.0 */ 2 #include <linux/bitops.h> 3 #include <linux/device.h> 4 #include <linux/regmap.h> 5 #include <linux/regulator/consumer.h> 6 7 #include <linux/iio/iio.h> 8 9 /* BMP580 specific registers */ 10 #define BMP580_REG_CMD 0x7E 11 #define BMP580_REG_EFF_OSR 0x38 12 #define BMP580_REG_ODR_CONFIG 0x37 13 #define BMP580_REG_OSR_CONFIG 0x36 14 #define BMP580_REG_IF_CONFIG 0x13 15 #define BMP580_REG_REV_ID 0x02 16 #define BMP580_REG_CHIP_ID 0x01 17 /* OOR allows to configure a pressure alarm */ 18 #define BMP580_REG_OOR_CONFIG 0x35 19 #define BMP580_REG_OOR_RANGE 0x34 20 #define BMP580_REG_OOR_THR_MSB 0x33 21 #define BMP580_REG_OOR_THR_LSB 0x32 22 /* DSP registers (IIR filters) */ 23 #define BMP580_REG_DSP_IIR 0x31 24 #define BMP580_REG_DSP_CONFIG 0x30 25 /* NVM access registers */ 26 #define BMP580_REG_NVM_DATA_MSB 0x2D 27 #define BMP580_REG_NVM_DATA_LSB 0x2C 28 #define BMP580_REG_NVM_ADDR 0x2B 29 /* Status registers */ 30 #define BMP580_REG_STATUS 0x28 31 #define BMP580_REG_INT_STATUS 0x27 32 #define BMP580_REG_CHIP_STATUS 0x11 33 /* Data registers */ 34 #define BMP580_REG_FIFO_DATA 0x29 35 #define BMP580_REG_PRESS_MSB 0x22 36 #define BMP580_REG_PRESS_LSB 0x21 37 #define BMP580_REG_PRESS_XLSB 0x20 38 #define BMP580_REG_TEMP_MSB 0x1F 39 #define BMP580_REG_TEMP_LSB 0x1E 40 #define BMP580_REG_TEMP_XLSB 0x1D 41 /* FIFO config registers */ 42 #define BMP580_REG_FIFO_SEL 0x18 43 #define BMP580_REG_FIFO_COUNT 0x17 44 #define BMP580_REG_FIFO_CONFIG 0x16 45 /* Interruptions config registers */ 46 #define BMP580_REG_INT_SOURCE 0x15 47 #define BMP580_REG_INT_CONFIG 0x14 48 49 #define BMP580_CMD_NOOP 0x00 50 #define BMP580_CMD_EXTMODE_SEQ_0 0x73 51 #define BMP580_CMD_EXTMODE_SEQ_1 0xB4 52 #define BMP580_CMD_EXTMODE_SEQ_2 0x69 53 #define BMP580_CMD_NVM_OP_SEQ_0 0x5D 54 #define BMP580_CMD_NVM_READ_SEQ_1 0xA5 55 #define BMP580_CMD_NVM_WRITE_SEQ_1 0xA0 56 #define BMP580_CMD_SOFT_RESET 0xB6 57 58 #define BMP580_INT_STATUS_POR_MASK BIT(4) 59 60 #define BMP580_STATUS_CORE_RDY_MASK BIT(0) 61 #define BMP580_STATUS_NVM_RDY_MASK BIT(1) 62 #define BMP580_STATUS_NVM_ERR_MASK BIT(2) 63 #define BMP580_STATUS_NVM_CMD_ERR_MASK BIT(3) 64 65 #define BMP580_OSR_PRESS_MASK GENMASK(5, 3) 66 #define BMP580_OSR_TEMP_MASK GENMASK(2, 0) 67 #define BMP580_OSR_PRESS_EN BIT(6) 68 #define BMP580_EFF_OSR_PRESS_MASK GENMASK(5, 3) 69 #define BMP580_EFF_OSR_TEMP_MASK GENMASK(2, 0) 70 #define BMP580_EFF_OSR_VALID_ODR BIT(7) 71 72 #define BMP580_ODR_MASK GENMASK(6, 2) 73 #define BMP580_MODE_MASK GENMASK(1, 0) 74 #define BMP580_MODE_SLEEP 0 75 #define BMP580_MODE_NORMAL 1 76 #define BMP580_MODE_FORCED 2 77 #define BMP580_MODE_CONTINOUS 3 78 #define BMP580_ODR_DEEPSLEEP_DIS BIT(7) 79 80 #define BMP580_DSP_COMP_MASK GENMASK(1, 0) 81 #define BMP580_DSP_COMP_DIS 0 82 #define BMP580_DSP_TEMP_COMP_EN 1 83 /* 84 * In section 7.27 of datasheet, modes 2 and 3 are technically the same. 85 * Pressure compensation means also enabling temperature compensation 86 */ 87 #define BMP580_DSP_PRESS_COMP_EN 2 88 #define BMP580_DSP_PRESS_TEMP_COMP_EN 3 89 #define BMP580_DSP_IIR_FORCED_FLUSH BIT(2) 90 #define BMP580_DSP_SHDW_IIR_TEMP_EN BIT(3) 91 #define BMP580_DSP_FIFO_IIR_TEMP_EN BIT(4) 92 #define BMP580_DSP_SHDW_IIR_PRESS_EN BIT(5) 93 #define BMP580_DSP_FIFO_IIR_PRESS_EN BIT(6) 94 #define BMP580_DSP_OOR_IIR_PRESS_EN BIT(7) 95 96 #define BMP580_DSP_IIR_PRESS_MASK GENMASK(5, 3) 97 #define BMP580_DSP_IIR_TEMP_MASK GENMASK(2, 0) 98 #define BMP580_FILTER_OFF 0 99 #define BMP580_FILTER_1X 1 100 #define BMP580_FILTER_3X 2 101 #define BMP580_FILTER_7X 3 102 #define BMP580_FILTER_15X 4 103 #define BMP580_FILTER_31X 5 104 #define BMP580_FILTER_63X 6 105 #define BMP580_FILTER_127X 7 106 107 #define BMP580_NVM_ROW_ADDR_MASK GENMASK(5, 0) 108 #define BMP580_NVM_PROG_EN BIT(6) 109 110 #define BMP580_TEMP_SKIPPED 0x7f7f7f 111 #define BMP580_PRESS_SKIPPED 0x7f7f7f 112 113 /* BMP380 specific registers */ 114 #define BMP380_REG_CMD 0x7E 115 #define BMP380_REG_CONFIG 0x1F 116 #define BMP380_REG_ODR 0x1D 117 #define BMP380_REG_OSR 0x1C 118 #define BMP380_REG_POWER_CONTROL 0x1B 119 #define BMP380_REG_IF_CONFIG 0x1A 120 #define BMP380_REG_INT_CONTROL 0x19 121 #define BMP380_REG_INT_STATUS 0x11 122 #define BMP380_REG_EVENT 0x10 123 #define BMP380_REG_STATUS 0x03 124 #define BMP380_REG_ERROR 0x02 125 #define BMP380_REG_ID 0x00 126 127 #define BMP380_REG_FIFO_CONFIG_1 0x18 128 #define BMP380_REG_FIFO_CONFIG_2 0x17 129 #define BMP380_REG_FIFO_WATERMARK_MSB 0x16 130 #define BMP380_REG_FIFO_WATERMARK_LSB 0x15 131 #define BMP380_REG_FIFO_DATA 0x14 132 #define BMP380_REG_FIFO_LENGTH_MSB 0x13 133 #define BMP380_REG_FIFO_LENGTH_LSB 0x12 134 135 #define BMP380_REG_SENSOR_TIME_MSB 0x0E 136 #define BMP380_REG_SENSOR_TIME_LSB 0x0D 137 #define BMP380_REG_SENSOR_TIME_XLSB 0x0C 138 139 #define BMP380_REG_TEMP_MSB 0x09 140 #define BMP380_REG_TEMP_LSB 0x08 141 #define BMP380_REG_TEMP_XLSB 0x07 142 143 #define BMP380_REG_PRESS_MSB 0x06 144 #define BMP380_REG_PRESS_LSB 0x05 145 #define BMP380_REG_PRESS_XLSB 0x04 146 147 #define BMP380_REG_CALIB_TEMP_START 0x31 148 #define BMP380_CALIB_REG_COUNT 21 149 150 #define BMP380_FILTER_MASK GENMASK(3, 1) 151 #define BMP380_FILTER_OFF 0 152 #define BMP380_FILTER_1X 1 153 #define BMP380_FILTER_3X 2 154 #define BMP380_FILTER_7X 3 155 #define BMP380_FILTER_15X 4 156 #define BMP380_FILTER_31X 5 157 #define BMP380_FILTER_63X 6 158 #define BMP380_FILTER_127X 7 159 160 #define BMP380_OSRS_TEMP_MASK GENMASK(5, 3) 161 #define BMP380_OSRS_PRESS_MASK GENMASK(2, 0) 162 163 #define BMP380_ODRS_MASK GENMASK(4, 0) 164 165 #define BMP380_CTRL_SENSORS_MASK GENMASK(1, 0) 166 #define BMP380_CTRL_SENSORS_PRESS_EN BIT(0) 167 #define BMP380_CTRL_SENSORS_TEMP_EN BIT(1) 168 #define BMP380_MODE_MASK GENMASK(5, 4) 169 #define BMP380_MODE_SLEEP 0 170 #define BMP380_MODE_FORCED 1 171 #define BMP380_MODE_NORMAL 3 172 173 #define BMP380_MIN_TEMP -4000 174 #define BMP380_MAX_TEMP 8500 175 #define BMP380_MIN_PRES 3000000 176 #define BMP380_MAX_PRES 12500000 177 178 #define BMP380_CMD_NOOP 0x00 179 #define BMP380_CMD_EXTMODE_EN_MID 0x34 180 #define BMP380_CMD_FIFO_FLUSH 0xB0 181 #define BMP380_CMD_SOFT_RESET 0xB6 182 183 #define BMP380_STATUS_CMD_RDY_MASK BIT(4) 184 #define BMP380_STATUS_DRDY_PRESS_MASK BIT(5) 185 #define BMP380_STATUS_DRDY_TEMP_MASK BIT(6) 186 187 #define BMP380_ERR_FATAL_MASK BIT(0) 188 #define BMP380_ERR_CMD_MASK BIT(1) 189 #define BMP380_ERR_CONF_MASK BIT(2) 190 191 #define BMP380_TEMP_SKIPPED 0x800000 192 #define BMP380_PRESS_SKIPPED 0x800000 193 194 /* BMP280 specific registers */ 195 #define BMP280_REG_TEMP_XLSB 0xFC 196 #define BMP280_REG_TEMP_LSB 0xFB 197 #define BMP280_REG_TEMP_MSB 0xFA 198 #define BMP280_REG_PRESS_XLSB 0xF9 199 #define BMP280_REG_PRESS_LSB 0xF8 200 #define BMP280_REG_PRESS_MSB 0xF7 201 202 /* Helper mask to truncate excess 4 bits on pressure and temp readings */ 203 #define BMP280_MEAS_TRIM_MASK GENMASK(24, 4) 204 205 #define BMP280_REG_CONFIG 0xF5 206 #define BMP280_REG_CTRL_MEAS 0xF4 207 #define BMP280_REG_STATUS 0xF3 208 209 #define BMP280_REG_COMP_TEMP_START 0x88 210 #define BMP280_COMP_TEMP_REG_COUNT 6 211 212 #define BMP280_REG_COMP_PRESS_START 0x8E 213 #define BMP280_COMP_PRESS_REG_COUNT 18 214 215 #define BMP280_CONTIGUOUS_CALIB_REGS (BMP280_COMP_TEMP_REG_COUNT + \ 216 BMP280_COMP_PRESS_REG_COUNT) 217 218 #define BMP280_FILTER_MASK GENMASK(4, 2) 219 #define BMP280_FILTER_OFF 0 220 #define BMP280_FILTER_2X 1 221 #define BMP280_FILTER_4X 2 222 #define BMP280_FILTER_8X 3 223 #define BMP280_FILTER_16X 4 224 225 #define BMP280_OSRS_TEMP_MASK GENMASK(7, 5) 226 #define BMP280_OSRS_TEMP_SKIP 0 227 #define BMP280_OSRS_TEMP_1X 1 228 #define BMP280_OSRS_TEMP_2X 2 229 #define BMP280_OSRS_TEMP_4X 3 230 #define BMP280_OSRS_TEMP_8X 4 231 #define BMP280_OSRS_TEMP_16X 5 232 233 #define BMP280_OSRS_PRESS_MASK GENMASK(4, 2) 234 #define BMP280_OSRS_PRESS_SKIP 0 235 #define BMP280_OSRS_PRESS_1X 1 236 #define BMP280_OSRS_PRESS_2X 2 237 #define BMP280_OSRS_PRESS_4X 3 238 #define BMP280_OSRS_PRESS_8X 4 239 #define BMP280_OSRS_PRESS_16X 5 240 241 #define BMP280_MODE_MASK GENMASK(1, 0) 242 #define BMP280_MODE_SLEEP 0 243 #define BMP280_MODE_FORCED 1 244 #define BMP280_MODE_NORMAL 3 245 246 /* BME280 specific registers */ 247 #define BME280_REG_HUMIDITY_LSB 0xFE 248 #define BME280_REG_HUMIDITY_MSB 0xFD 249 250 #define BME280_REG_CTRL_HUMIDITY 0xF2 251 252 /* Due to non linear mapping, and data sizes we can't do a bulk read */ 253 #define BME280_REG_COMP_H1 0xA1 254 #define BME280_REG_COMP_H2 0xE1 255 #define BME280_REG_COMP_H3 0xE3 256 #define BME280_REG_COMP_H4 0xE4 257 #define BME280_REG_COMP_H5 0xE5 258 #define BME280_REG_COMP_H6 0xE7 259 260 #define BME280_COMP_H5_MASK GENMASK(15, 4) 261 262 #define BME280_OSRS_HUMIDITY_MASK GENMASK(2, 0) 263 #define BME280_OSRS_HUMIDITY_SKIP 0 264 #define BME280_OSRS_HUMIDITY_1X 1 265 #define BME280_OSRS_HUMIDITY_2X 2 266 #define BME280_OSRS_HUMIDITY_4X 3 267 #define BME280_OSRS_HUMIDITY_8X 4 268 #define BME280_OSRS_HUMIDITY_16X 5 269 270 /* BMP180 specific registers */ 271 #define BMP180_REG_OUT_XLSB 0xF8 272 #define BMP180_REG_OUT_LSB 0xF7 273 #define BMP180_REG_OUT_MSB 0xF6 274 275 #define BMP180_REG_CALIB_START 0xAA 276 #define BMP180_REG_CALIB_COUNT 22 277 278 #define BMP180_MEAS_CTRL_MASK GENMASK(4, 0) 279 #define BMP180_MEAS_TEMP 0x0E 280 #define BMP180_MEAS_PRESS 0x14 281 #define BMP180_MEAS_SCO BIT(5) 282 #define BMP180_OSRS_PRESS_MASK GENMASK(7, 6) 283 #define BMP180_MEAS_PRESS_1X 0 284 #define BMP180_MEAS_PRESS_2X 1 285 #define BMP180_MEAS_PRESS_4X 2 286 #define BMP180_MEAS_PRESS_8X 3 287 288 /* BMP180 and BMP280 common registers */ 289 #define BMP280_REG_CTRL_MEAS 0xF4 290 #define BMP280_REG_RESET 0xE0 291 #define BMP280_REG_ID 0xD0 292 293 #define BMP380_CHIP_ID 0x50 294 #define BMP580_CHIP_ID 0x50 295 #define BMP580_CHIP_ID_ALT 0x51 296 #define BMP180_CHIP_ID 0x55 297 #define BMP280_CHIP_ID 0x58 298 #define BMP390_CHIP_ID 0x60 299 #define BME280_CHIP_ID 0x60 300 #define BMP280_SOFT_RESET_VAL 0xB6 301 302 /* BMP280 register skipped special values */ 303 #define BMP280_TEMP_SKIPPED 0x80000 304 #define BMP280_PRESS_SKIPPED 0x80000 305 #define BMP280_HUMIDITY_SKIPPED 0x8000 306 307 /* Number of bytes for each value */ 308 #define BMP280_NUM_PRESS_BYTES 3 309 #define BMP280_NUM_TEMP_BYTES 3 310 #define BME280_NUM_HUMIDITY_BYTES 2 311 #define BMP280_BURST_READ_BYTES (BMP280_NUM_PRESS_BYTES + \ 312 BMP280_NUM_TEMP_BYTES) 313 #define BME280_BURST_READ_BYTES (BMP280_NUM_PRESS_BYTES + \ 314 BMP280_NUM_TEMP_BYTES + \ 315 BME280_NUM_HUMIDITY_BYTES) 316 317 /* Core exported structs */ 318 319 static const char *const bmp280_supply_names[] = { 320 "vddd", "vdda" 321 }; 322 323 #define BMP280_NUM_SUPPLIES ARRAY_SIZE(bmp280_supply_names) 324 325 struct bmp180_calib { 326 s16 AC1; 327 s16 AC2; 328 s16 AC3; 329 u16 AC4; 330 u16 AC5; 331 u16 AC6; 332 s16 B1; 333 s16 B2; 334 s16 MB; 335 s16 MC; 336 s16 MD; 337 }; 338 339 /* See datasheet Section 4.2.2. */ 340 struct bmp280_calib { 341 u16 T1; 342 s16 T2; 343 s16 T3; 344 u16 P1; 345 s16 P2; 346 s16 P3; 347 s16 P4; 348 s16 P5; 349 s16 P6; 350 s16 P7; 351 s16 P8; 352 s16 P9; 353 u8 H1; 354 s16 H2; 355 u8 H3; 356 s16 H4; 357 s16 H5; 358 s8 H6; 359 }; 360 361 /* See datasheet Section 3.11.1. */ 362 struct bmp380_calib { 363 u16 T1; 364 u16 T2; 365 s8 T3; 366 s16 P1; 367 s16 P2; 368 s8 P3; 369 s8 P4; 370 u16 P5; 371 u16 P6; 372 s8 P7; 373 s8 P8; 374 s16 P9; 375 s8 P10; 376 s8 P11; 377 }; 378 379 struct bmp280_data { 380 struct device *dev; 381 struct mutex lock; 382 struct regmap *regmap; 383 struct completion done; 384 bool use_eoc; 385 const struct bmp280_chip_info *chip_info; 386 union { 387 struct bmp180_calib bmp180; 388 struct bmp280_calib bmp280; 389 struct bmp380_calib bmp380; 390 } calib; 391 struct regulator_bulk_data supplies[BMP280_NUM_SUPPLIES]; 392 unsigned int start_up_time; /* in microseconds */ 393 394 /* log of base 2 of oversampling rate */ 395 u8 oversampling_press; 396 u8 oversampling_temp; 397 u8 oversampling_humid; 398 u8 iir_filter_coeff; 399 400 /* 401 * BMP380 devices introduce sampling frequency configuration. See 402 * datasheet sections 3.3.3. and 4.3.19 for more details. 403 * 404 * BMx280 devices allowed indirect configuration of sampling frequency 405 * changing the t_standby duration between measurements, as detailed on 406 * section 3.6.3 of the datasheet. 407 */ 408 int sampling_freq; 409 410 /* 411 * Data to push to userspace triggered buffer. Up to 3 channels and 412 * s64 timestamp, aligned. 413 */ 414 s32 sensor_data[6] __aligned(8); 415 416 /* 417 * DMA (thus cache coherency maintenance) may require the 418 * transfer buffers to live in their own cache lines. 419 */ 420 union { 421 /* Sensor data buffer */ 422 u8 buf[BME280_BURST_READ_BYTES]; 423 /* Calibration data buffers */ 424 __le16 bmp280_cal_buf[BMP280_CONTIGUOUS_CALIB_REGS / 2]; 425 __be16 bmp180_cal_buf[BMP180_REG_CALIB_COUNT / 2]; 426 u8 bmp380_cal_buf[BMP380_CALIB_REG_COUNT]; 427 /* Miscellaneous, endianness-aware data buffers */ 428 __le16 le16; 429 __be16 be16; 430 } __aligned(IIO_DMA_MINALIGN); 431 }; 432 433 struct bmp280_chip_info { 434 unsigned int id_reg; 435 const u8 *chip_id; 436 int num_chip_id; 437 438 const struct regmap_config *regmap_config; 439 bool spi_read_extra_byte; 440 441 const struct iio_chan_spec *channels; 442 int num_channels; 443 unsigned int start_up_time; 444 const unsigned long *avail_scan_masks; 445 446 const int *oversampling_temp_avail; 447 int num_oversampling_temp_avail; 448 int oversampling_temp_default; 449 450 const int *oversampling_press_avail; 451 int num_oversampling_press_avail; 452 int oversampling_press_default; 453 454 const int *oversampling_humid_avail; 455 int num_oversampling_humid_avail; 456 int oversampling_humid_default; 457 458 const int *iir_filter_coeffs_avail; 459 int num_iir_filter_coeffs_avail; 460 int iir_filter_coeff_default; 461 462 const int (*sampling_freq_avail)[2]; 463 int num_sampling_freq_avail; 464 int sampling_freq_default; 465 466 const int *temp_coeffs; 467 const int temp_coeffs_type; 468 const int *press_coeffs; 469 const int press_coeffs_type; 470 const int *humid_coeffs; 471 const int humid_coeffs_type; 472 473 int (*chip_config)(struct bmp280_data *data); 474 int (*read_temp)(struct bmp280_data *data, s32 *adc_temp); 475 int (*read_press)(struct bmp280_data *data, u32 *adc_press); 476 int (*read_humid)(struct bmp280_data *data, u32 *adc_humidity); 477 int (*read_calib)(struct bmp280_data *data); 478 int (*preinit)(struct bmp280_data *data); 479 480 irqreturn_t (*trigger_handler)(int irq, void *p); 481 }; 482 483 /* Chip infos for each variant */ 484 extern const struct bmp280_chip_info bmp180_chip_info; 485 extern const struct bmp280_chip_info bmp280_chip_info; 486 extern const struct bmp280_chip_info bme280_chip_info; 487 extern const struct bmp280_chip_info bmp380_chip_info; 488 extern const struct bmp280_chip_info bmp580_chip_info; 489 490 /* Regmap configurations */ 491 extern const struct regmap_config bmp180_regmap_config; 492 extern const struct regmap_config bmp280_regmap_config; 493 extern const struct regmap_config bme280_regmap_config; 494 extern const struct regmap_config bmp380_regmap_config; 495 extern const struct regmap_config bmp580_regmap_config; 496 497 /* Probe called from different transports */ 498 int bmp280_common_probe(struct device *dev, 499 struct regmap *regmap, 500 const struct bmp280_chip_info *chip_info, 501 const char *name, 502 int irq); 503 504 /* PM ops */ 505 extern const struct dev_pm_ops bmp280_dev_pm_ops; 506