1 /* 2 * Industrial I/O driver for Microchip digital potentiometers 3 * 4 * Copyright (c) 2016 Slawomir Stepien 5 * Based on: Peter Rosin's code from mcp4531.c 6 * 7 * Datasheet: http://ww1.microchip.com/downloads/en/DeviceDoc/22060b.pdf 8 * 9 * DEVID #Wipers #Positions Resistor Opts (kOhm) 10 * mcp4131 1 129 5, 10, 50, 100 11 * mcp4132 1 129 5, 10, 50, 100 12 * mcp4141 1 129 5, 10, 50, 100 13 * mcp4142 1 129 5, 10, 50, 100 14 * mcp4151 1 257 5, 10, 50, 100 15 * mcp4152 1 257 5, 10, 50, 100 16 * mcp4161 1 257 5, 10, 50, 100 17 * mcp4162 1 257 5, 10, 50, 100 18 * mcp4231 2 129 5, 10, 50, 100 19 * mcp4232 2 129 5, 10, 50, 100 20 * mcp4241 2 129 5, 10, 50, 100 21 * mcp4242 2 129 5, 10, 50, 100 22 * mcp4251 2 257 5, 10, 50, 100 23 * mcp4252 2 257 5, 10, 50, 100 24 * mcp4261 2 257 5, 10, 50, 100 25 * mcp4262 2 257 5, 10, 50, 100 26 * 27 * This program is free software; you can redistribute it and/or modify it 28 * under the terms of the GNU General Public License version 2 as published by 29 * the Free Software Foundation. 30 */ 31 32 /* 33 * TODO: 34 * 1. Write wiper setting to EEPROM for EEPROM capable models. 35 */ 36 37 #include <linux/cache.h> 38 #include <linux/err.h> 39 #include <linux/export.h> 40 #include <linux/iio/iio.h> 41 #include <linux/iio/types.h> 42 #include <linux/module.h> 43 #include <linux/mutex.h> 44 #include <linux/of.h> 45 #include <linux/of_device.h> 46 #include <linux/spi/spi.h> 47 48 #define MCP4131_WRITE (0x00 << 2) 49 #define MCP4131_READ (0x03 << 2) 50 51 #define MCP4131_WIPER_SHIFT 4 52 #define MCP4131_CMDERR(r) ((r[0]) & 0x02) 53 #define MCP4131_RAW(r) ((r[0]) == 0xff ? 0x100 : (r[1])) 54 55 struct mcp4131_cfg { 56 int wipers; 57 int max_pos; 58 int kohms; 59 }; 60 61 enum mcp4131_type { 62 MCP413x_502 = 0, 63 MCP413x_103, 64 MCP413x_503, 65 MCP413x_104, 66 MCP414x_502, 67 MCP414x_103, 68 MCP414x_503, 69 MCP414x_104, 70 MCP415x_502, 71 MCP415x_103, 72 MCP415x_503, 73 MCP415x_104, 74 MCP416x_502, 75 MCP416x_103, 76 MCP416x_503, 77 MCP416x_104, 78 MCP423x_502, 79 MCP423x_103, 80 MCP423x_503, 81 MCP423x_104, 82 MCP424x_502, 83 MCP424x_103, 84 MCP424x_503, 85 MCP424x_104, 86 MCP425x_502, 87 MCP425x_103, 88 MCP425x_503, 89 MCP425x_104, 90 MCP426x_502, 91 MCP426x_103, 92 MCP426x_503, 93 MCP426x_104, 94 }; 95 96 static const struct mcp4131_cfg mcp4131_cfg[] = { 97 [MCP413x_502] = { .wipers = 1, .max_pos = 128, .kohms = 5, }, 98 [MCP413x_103] = { .wipers = 1, .max_pos = 128, .kohms = 10, }, 99 [MCP413x_503] = { .wipers = 1, .max_pos = 128, .kohms = 50, }, 100 [MCP413x_104] = { .wipers = 1, .max_pos = 128, .kohms = 100, }, 101 [MCP414x_502] = { .wipers = 1, .max_pos = 128, .kohms = 5, }, 102 [MCP414x_103] = { .wipers = 1, .max_pos = 128, .kohms = 10, }, 103 [MCP414x_503] = { .wipers = 1, .max_pos = 128, .kohms = 50, }, 104 [MCP414x_104] = { .wipers = 1, .max_pos = 128, .kohms = 100, }, 105 [MCP415x_502] = { .wipers = 1, .max_pos = 256, .kohms = 5, }, 106 [MCP415x_103] = { .wipers = 1, .max_pos = 256, .kohms = 10, }, 107 [MCP415x_503] = { .wipers = 1, .max_pos = 256, .kohms = 50, }, 108 [MCP415x_104] = { .wipers = 1, .max_pos = 256, .kohms = 100, }, 109 [MCP416x_502] = { .wipers = 1, .max_pos = 256, .kohms = 5, }, 110 [MCP416x_103] = { .wipers = 1, .max_pos = 256, .kohms = 10, }, 111 [MCP416x_503] = { .wipers = 1, .max_pos = 256, .kohms = 50, }, 112 [MCP416x_104] = { .wipers = 1, .max_pos = 256, .kohms = 100, }, 113 [MCP423x_502] = { .wipers = 2, .max_pos = 128, .kohms = 5, }, 114 [MCP423x_103] = { .wipers = 2, .max_pos = 128, .kohms = 10, }, 115 [MCP423x_503] = { .wipers = 2, .max_pos = 128, .kohms = 50, }, 116 [MCP423x_104] = { .wipers = 2, .max_pos = 128, .kohms = 100, }, 117 [MCP424x_502] = { .wipers = 2, .max_pos = 128, .kohms = 5, }, 118 [MCP424x_103] = { .wipers = 2, .max_pos = 128, .kohms = 10, }, 119 [MCP424x_503] = { .wipers = 2, .max_pos = 128, .kohms = 50, }, 120 [MCP424x_104] = { .wipers = 2, .max_pos = 128, .kohms = 100, }, 121 [MCP425x_502] = { .wipers = 2, .max_pos = 256, .kohms = 5, }, 122 [MCP425x_103] = { .wipers = 2, .max_pos = 256, .kohms = 10, }, 123 [MCP425x_503] = { .wipers = 2, .max_pos = 256, .kohms = 50, }, 124 [MCP425x_104] = { .wipers = 2, .max_pos = 256, .kohms = 100, }, 125 [MCP426x_502] = { .wipers = 2, .max_pos = 256, .kohms = 5, }, 126 [MCP426x_103] = { .wipers = 2, .max_pos = 256, .kohms = 10, }, 127 [MCP426x_503] = { .wipers = 2, .max_pos = 256, .kohms = 50, }, 128 [MCP426x_104] = { .wipers = 2, .max_pos = 256, .kohms = 100, }, 129 }; 130 131 struct mcp4131_data { 132 struct spi_device *spi; 133 const struct mcp4131_cfg *cfg; 134 struct mutex lock; 135 u8 buf[2] ____cacheline_aligned; 136 }; 137 138 #define MCP4131_CHANNEL(ch) { \ 139 .type = IIO_RESISTANCE, \ 140 .indexed = 1, \ 141 .output = 1, \ 142 .channel = (ch), \ 143 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \ 144 .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE), \ 145 } 146 147 static const struct iio_chan_spec mcp4131_channels[] = { 148 MCP4131_CHANNEL(0), 149 MCP4131_CHANNEL(1), 150 }; 151 152 static int mcp4131_read(struct spi_device *spi, void *buf, size_t len) 153 { 154 struct spi_transfer t = { 155 .tx_buf = buf, /* We need to send addr, cmd and 12 bits */ 156 .rx_buf = buf, 157 .len = len, 158 }; 159 struct spi_message m; 160 161 spi_message_init(&m); 162 spi_message_add_tail(&t, &m); 163 164 return spi_sync(spi, &m); 165 } 166 167 static int mcp4131_read_raw(struct iio_dev *indio_dev, 168 struct iio_chan_spec const *chan, 169 int *val, int *val2, long mask) 170 { 171 int err; 172 struct mcp4131_data *data = iio_priv(indio_dev); 173 int address = chan->channel; 174 175 switch (mask) { 176 case IIO_CHAN_INFO_RAW: 177 mutex_lock(&data->lock); 178 179 data->buf[0] = (address << MCP4131_WIPER_SHIFT) | MCP4131_READ; 180 data->buf[1] = 0; 181 182 err = mcp4131_read(data->spi, data->buf, 2); 183 if (err) { 184 mutex_unlock(&data->lock); 185 return err; 186 } 187 188 /* Error, bad address/command combination */ 189 if (!MCP4131_CMDERR(data->buf)) { 190 mutex_unlock(&data->lock); 191 return -EIO; 192 } 193 194 *val = MCP4131_RAW(data->buf); 195 mutex_unlock(&data->lock); 196 197 return IIO_VAL_INT; 198 199 case IIO_CHAN_INFO_SCALE: 200 *val = 1000 * data->cfg->kohms; 201 *val2 = data->cfg->max_pos; 202 return IIO_VAL_FRACTIONAL; 203 } 204 205 return -EINVAL; 206 } 207 208 static int mcp4131_write_raw(struct iio_dev *indio_dev, 209 struct iio_chan_spec const *chan, 210 int val, int val2, long mask) 211 { 212 int err; 213 struct mcp4131_data *data = iio_priv(indio_dev); 214 int address = chan->channel << MCP4131_WIPER_SHIFT; 215 216 switch (mask) { 217 case IIO_CHAN_INFO_RAW: 218 if (val > data->cfg->max_pos || val < 0) 219 return -EINVAL; 220 break; 221 222 default: 223 return -EINVAL; 224 } 225 226 mutex_lock(&data->lock); 227 228 data->buf[0] = address << MCP4131_WIPER_SHIFT; 229 data->buf[0] |= MCP4131_WRITE | (val >> 8); 230 data->buf[1] = val & 0xFF; /* 8 bits here */ 231 232 err = spi_write(data->spi, data->buf, 2); 233 mutex_unlock(&data->lock); 234 235 return err; 236 } 237 238 static const struct iio_info mcp4131_info = { 239 .read_raw = mcp4131_read_raw, 240 .write_raw = mcp4131_write_raw, 241 }; 242 243 static int mcp4131_probe(struct spi_device *spi) 244 { 245 int err; 246 struct device *dev = &spi->dev; 247 unsigned long devid; 248 struct mcp4131_data *data; 249 struct iio_dev *indio_dev; 250 251 indio_dev = devm_iio_device_alloc(dev, sizeof(*data)); 252 if (!indio_dev) 253 return -ENOMEM; 254 255 data = iio_priv(indio_dev); 256 spi_set_drvdata(spi, indio_dev); 257 data->spi = spi; 258 data->cfg = of_device_get_match_data(&spi->dev); 259 if (!data->cfg) { 260 devid = spi_get_device_id(spi)->driver_data; 261 data->cfg = &mcp4131_cfg[devid]; 262 } 263 264 mutex_init(&data->lock); 265 266 indio_dev->dev.parent = dev; 267 indio_dev->info = &mcp4131_info; 268 indio_dev->channels = mcp4131_channels; 269 indio_dev->num_channels = data->cfg->wipers; 270 indio_dev->name = spi_get_device_id(spi)->name; 271 272 err = devm_iio_device_register(dev, indio_dev); 273 if (err) { 274 dev_info(&spi->dev, "Unable to register %s\n", indio_dev->name); 275 return err; 276 } 277 278 return 0; 279 } 280 281 static const struct of_device_id mcp4131_dt_ids[] = { 282 { .compatible = "microchip,mcp4131-502", 283 .data = &mcp4131_cfg[MCP413x_502] }, 284 { .compatible = "microchip,mcp4131-103", 285 .data = &mcp4131_cfg[MCP413x_103] }, 286 { .compatible = "microchip,mcp4131-503", 287 .data = &mcp4131_cfg[MCP413x_503] }, 288 { .compatible = "microchip,mcp4131-104", 289 .data = &mcp4131_cfg[MCP413x_104] }, 290 { .compatible = "microchip,mcp4132-502", 291 .data = &mcp4131_cfg[MCP413x_502] }, 292 { .compatible = "microchip,mcp4132-103", 293 .data = &mcp4131_cfg[MCP413x_103] }, 294 { .compatible = "microchip,mcp4132-503", 295 .data = &mcp4131_cfg[MCP413x_503] }, 296 { .compatible = "microchip,mcp4132-104", 297 .data = &mcp4131_cfg[MCP413x_104] }, 298 { .compatible = "microchip,mcp4141-502", 299 .data = &mcp4131_cfg[MCP414x_502] }, 300 { .compatible = "microchip,mcp4141-103", 301 .data = &mcp4131_cfg[MCP414x_103] }, 302 { .compatible = "microchip,mcp4141-503", 303 .data = &mcp4131_cfg[MCP414x_503] }, 304 { .compatible = "microchip,mcp4141-104", 305 .data = &mcp4131_cfg[MCP414x_104] }, 306 { .compatible = "microchip,mcp4142-502", 307 .data = &mcp4131_cfg[MCP414x_502] }, 308 { .compatible = "microchip,mcp4142-103", 309 .data = &mcp4131_cfg[MCP414x_103] }, 310 { .compatible = "microchip,mcp4142-503", 311 .data = &mcp4131_cfg[MCP414x_503] }, 312 { .compatible = "microchip,mcp4142-104", 313 .data = &mcp4131_cfg[MCP414x_104] }, 314 { .compatible = "microchip,mcp4151-502", 315 .data = &mcp4131_cfg[MCP415x_502] }, 316 { .compatible = "microchip,mcp4151-103", 317 .data = &mcp4131_cfg[MCP415x_103] }, 318 { .compatible = "microchip,mcp4151-503", 319 .data = &mcp4131_cfg[MCP415x_503] }, 320 { .compatible = "microchip,mcp4151-104", 321 .data = &mcp4131_cfg[MCP415x_104] }, 322 { .compatible = "microchip,mcp4152-502", 323 .data = &mcp4131_cfg[MCP415x_502] }, 324 { .compatible = "microchip,mcp4152-103", 325 .data = &mcp4131_cfg[MCP415x_103] }, 326 { .compatible = "microchip,mcp4152-503", 327 .data = &mcp4131_cfg[MCP415x_503] }, 328 { .compatible = "microchip,mcp4152-104", 329 .data = &mcp4131_cfg[MCP415x_104] }, 330 { .compatible = "microchip,mcp4161-502", 331 .data = &mcp4131_cfg[MCP416x_502] }, 332 { .compatible = "microchip,mcp4161-103", 333 .data = &mcp4131_cfg[MCP416x_103] }, 334 { .compatible = "microchip,mcp4161-503", 335 .data = &mcp4131_cfg[MCP416x_503] }, 336 { .compatible = "microchip,mcp4161-104", 337 .data = &mcp4131_cfg[MCP416x_104] }, 338 { .compatible = "microchip,mcp4162-502", 339 .data = &mcp4131_cfg[MCP416x_502] }, 340 { .compatible = "microchip,mcp4162-103", 341 .data = &mcp4131_cfg[MCP416x_103] }, 342 { .compatible = "microchip,mcp4162-503", 343 .data = &mcp4131_cfg[MCP416x_503] }, 344 { .compatible = "microchip,mcp4162-104", 345 .data = &mcp4131_cfg[MCP416x_104] }, 346 { .compatible = "microchip,mcp4231-502", 347 .data = &mcp4131_cfg[MCP423x_502] }, 348 { .compatible = "microchip,mcp4231-103", 349 .data = &mcp4131_cfg[MCP423x_103] }, 350 { .compatible = "microchip,mcp4231-503", 351 .data = &mcp4131_cfg[MCP423x_503] }, 352 { .compatible = "microchip,mcp4231-104", 353 .data = &mcp4131_cfg[MCP423x_104] }, 354 { .compatible = "microchip,mcp4232-502", 355 .data = &mcp4131_cfg[MCP423x_502] }, 356 { .compatible = "microchip,mcp4232-103", 357 .data = &mcp4131_cfg[MCP423x_103] }, 358 { .compatible = "microchip,mcp4232-503", 359 .data = &mcp4131_cfg[MCP423x_503] }, 360 { .compatible = "microchip,mcp4232-104", 361 .data = &mcp4131_cfg[MCP423x_104] }, 362 { .compatible = "microchip,mcp4241-502", 363 .data = &mcp4131_cfg[MCP424x_502] }, 364 { .compatible = "microchip,mcp4241-103", 365 .data = &mcp4131_cfg[MCP424x_103] }, 366 { .compatible = "microchip,mcp4241-503", 367 .data = &mcp4131_cfg[MCP424x_503] }, 368 { .compatible = "microchip,mcp4241-104", 369 .data = &mcp4131_cfg[MCP424x_104] }, 370 { .compatible = "microchip,mcp4242-502", 371 .data = &mcp4131_cfg[MCP424x_502] }, 372 { .compatible = "microchip,mcp4242-103", 373 .data = &mcp4131_cfg[MCP424x_103] }, 374 { .compatible = "microchip,mcp4242-503", 375 .data = &mcp4131_cfg[MCP424x_503] }, 376 { .compatible = "microchip,mcp4242-104", 377 .data = &mcp4131_cfg[MCP424x_104] }, 378 { .compatible = "microchip,mcp4251-502", 379 .data = &mcp4131_cfg[MCP425x_502] }, 380 { .compatible = "microchip,mcp4251-103", 381 .data = &mcp4131_cfg[MCP425x_103] }, 382 { .compatible = "microchip,mcp4251-503", 383 .data = &mcp4131_cfg[MCP425x_503] }, 384 { .compatible = "microchip,mcp4251-104", 385 .data = &mcp4131_cfg[MCP425x_104] }, 386 { .compatible = "microchip,mcp4252-502", 387 .data = &mcp4131_cfg[MCP425x_502] }, 388 { .compatible = "microchip,mcp4252-103", 389 .data = &mcp4131_cfg[MCP425x_103] }, 390 { .compatible = "microchip,mcp4252-503", 391 .data = &mcp4131_cfg[MCP425x_503] }, 392 { .compatible = "microchip,mcp4252-104", 393 .data = &mcp4131_cfg[MCP425x_104] }, 394 { .compatible = "microchip,mcp4261-502", 395 .data = &mcp4131_cfg[MCP426x_502] }, 396 { .compatible = "microchip,mcp4261-103", 397 .data = &mcp4131_cfg[MCP426x_103] }, 398 { .compatible = "microchip,mcp4261-503", 399 .data = &mcp4131_cfg[MCP426x_503] }, 400 { .compatible = "microchip,mcp4261-104", 401 .data = &mcp4131_cfg[MCP426x_104] }, 402 { .compatible = "microchip,mcp4262-502", 403 .data = &mcp4131_cfg[MCP426x_502] }, 404 { .compatible = "microchip,mcp4262-103", 405 .data = &mcp4131_cfg[MCP426x_103] }, 406 { .compatible = "microchip,mcp4262-503", 407 .data = &mcp4131_cfg[MCP426x_503] }, 408 { .compatible = "microchip,mcp4262-104", 409 .data = &mcp4131_cfg[MCP426x_104] }, 410 {} 411 }; 412 MODULE_DEVICE_TABLE(of, mcp4131_dt_ids); 413 414 static const struct spi_device_id mcp4131_id[] = { 415 { "mcp4131-502", MCP413x_502 }, 416 { "mcp4131-103", MCP413x_103 }, 417 { "mcp4131-503", MCP413x_503 }, 418 { "mcp4131-104", MCP413x_104 }, 419 { "mcp4132-502", MCP413x_502 }, 420 { "mcp4132-103", MCP413x_103 }, 421 { "mcp4132-503", MCP413x_503 }, 422 { "mcp4132-104", MCP413x_104 }, 423 { "mcp4141-502", MCP414x_502 }, 424 { "mcp4141-103", MCP414x_103 }, 425 { "mcp4141-503", MCP414x_503 }, 426 { "mcp4141-104", MCP414x_104 }, 427 { "mcp4142-502", MCP414x_502 }, 428 { "mcp4142-103", MCP414x_103 }, 429 { "mcp4142-503", MCP414x_503 }, 430 { "mcp4142-104", MCP414x_104 }, 431 { "mcp4151-502", MCP415x_502 }, 432 { "mcp4151-103", MCP415x_103 }, 433 { "mcp4151-503", MCP415x_503 }, 434 { "mcp4151-104", MCP415x_104 }, 435 { "mcp4152-502", MCP415x_502 }, 436 { "mcp4152-103", MCP415x_103 }, 437 { "mcp4152-503", MCP415x_503 }, 438 { "mcp4152-104", MCP415x_104 }, 439 { "mcp4161-502", MCP416x_502 }, 440 { "mcp4161-103", MCP416x_103 }, 441 { "mcp4161-503", MCP416x_503 }, 442 { "mcp4161-104", MCP416x_104 }, 443 { "mcp4162-502", MCP416x_502 }, 444 { "mcp4162-103", MCP416x_103 }, 445 { "mcp4162-503", MCP416x_503 }, 446 { "mcp4162-104", MCP416x_104 }, 447 { "mcp4231-502", MCP423x_502 }, 448 { "mcp4231-103", MCP423x_103 }, 449 { "mcp4231-503", MCP423x_503 }, 450 { "mcp4231-104", MCP423x_104 }, 451 { "mcp4232-502", MCP423x_502 }, 452 { "mcp4232-103", MCP423x_103 }, 453 { "mcp4232-503", MCP423x_503 }, 454 { "mcp4232-104", MCP423x_104 }, 455 { "mcp4241-502", MCP424x_502 }, 456 { "mcp4241-103", MCP424x_103 }, 457 { "mcp4241-503", MCP424x_503 }, 458 { "mcp4241-104", MCP424x_104 }, 459 { "mcp4242-502", MCP424x_502 }, 460 { "mcp4242-103", MCP424x_103 }, 461 { "mcp4242-503", MCP424x_503 }, 462 { "mcp4242-104", MCP424x_104 }, 463 { "mcp4251-502", MCP425x_502 }, 464 { "mcp4251-103", MCP425x_103 }, 465 { "mcp4251-503", MCP425x_503 }, 466 { "mcp4251-104", MCP425x_104 }, 467 { "mcp4252-502", MCP425x_502 }, 468 { "mcp4252-103", MCP425x_103 }, 469 { "mcp4252-503", MCP425x_503 }, 470 { "mcp4252-104", MCP425x_104 }, 471 { "mcp4261-502", MCP426x_502 }, 472 { "mcp4261-103", MCP426x_103 }, 473 { "mcp4261-503", MCP426x_503 }, 474 { "mcp4261-104", MCP426x_104 }, 475 { "mcp4262-502", MCP426x_502 }, 476 { "mcp4262-103", MCP426x_103 }, 477 { "mcp4262-503", MCP426x_503 }, 478 { "mcp4262-104", MCP426x_104 }, 479 {} 480 }; 481 MODULE_DEVICE_TABLE(spi, mcp4131_id); 482 483 static struct spi_driver mcp4131_driver = { 484 .driver = { 485 .name = "mcp4131", 486 .of_match_table = of_match_ptr(mcp4131_dt_ids), 487 }, 488 .probe = mcp4131_probe, 489 .id_table = mcp4131_id, 490 }; 491 492 module_spi_driver(mcp4131_driver); 493 494 MODULE_AUTHOR("Slawomir Stepien <sst@poczta.fm>"); 495 MODULE_DESCRIPTION("MCP4131 digital potentiometer"); 496 MODULE_LICENSE("GPL v2"); 497