1 // SPDX-License-Identifier: GPL-2.0-only 2 /* 3 * tcs3472.c - Support for TAOS TCS3472 color light-to-digital converter 4 * 5 * Copyright (c) 2013 Peter Meerwald <pmeerw@pmeerw.net> 6 * 7 * Color light sensor with 16-bit channels for red, green, blue, clear); 8 * 7-bit I2C slave address 0x39 (TCS34721, TCS34723) or 0x29 (TCS34725, 9 * TCS34727) 10 * 11 * Datasheet: http://ams.com/eng/content/download/319364/1117183/file/TCS3472_Datasheet_EN_v2.pdf 12 * 13 * TODO: wait time 14 */ 15 16 #include <linux/cleanup.h> 17 #include <linux/delay.h> 18 #include <linux/i2c.h> 19 #include <linux/module.h> 20 #include <linux/mutex.h> 21 #include <linux/pm.h> 22 23 #include <linux/iio/buffer.h> 24 #include <linux/iio/events.h> 25 #include <linux/iio/iio.h> 26 #include <linux/iio/sysfs.h> 27 #include <linux/iio/trigger_consumer.h> 28 #include <linux/iio/triggered_buffer.h> 29 30 #define TCS3472_DRV_NAME "tcs3472" 31 32 #define TCS3472_COMMAND BIT(7) 33 #define TCS3472_AUTO_INCR BIT(5) 34 #define TCS3472_SPECIAL_FUNC (BIT(5) | BIT(6)) 35 36 #define TCS3472_INTR_CLEAR (TCS3472_COMMAND | TCS3472_SPECIAL_FUNC | 0x06) 37 38 #define TCS3472_ENABLE (TCS3472_COMMAND | 0x00) 39 #define TCS3472_ATIME (TCS3472_COMMAND | 0x01) 40 #define TCS3472_WTIME (TCS3472_COMMAND | 0x03) 41 #define TCS3472_AILT (TCS3472_COMMAND | TCS3472_AUTO_INCR | 0x04) 42 #define TCS3472_AIHT (TCS3472_COMMAND | TCS3472_AUTO_INCR | 0x06) 43 #define TCS3472_PERS (TCS3472_COMMAND | 0x0c) 44 #define TCS3472_CONFIG (TCS3472_COMMAND | 0x0d) 45 #define TCS3472_CONTROL (TCS3472_COMMAND | 0x0f) 46 #define TCS3472_ID (TCS3472_COMMAND | 0x12) 47 #define TCS3472_STATUS (TCS3472_COMMAND | 0x13) 48 #define TCS3472_CDATA (TCS3472_COMMAND | TCS3472_AUTO_INCR | 0x14) 49 #define TCS3472_RDATA (TCS3472_COMMAND | TCS3472_AUTO_INCR | 0x16) 50 #define TCS3472_GDATA (TCS3472_COMMAND | TCS3472_AUTO_INCR | 0x18) 51 #define TCS3472_BDATA (TCS3472_COMMAND | TCS3472_AUTO_INCR | 0x1a) 52 53 #define TCS3472_STATUS_AINT BIT(4) 54 #define TCS3472_STATUS_AVALID BIT(0) 55 #define TCS3472_ENABLE_AIEN BIT(4) 56 #define TCS3472_ENABLE_AEN BIT(1) 57 #define TCS3472_ENABLE_PON BIT(0) 58 #define TCS3472_CONTROL_AGAIN_MASK (BIT(0) | BIT(1)) 59 60 struct tcs3472_data { 61 struct i2c_client *client; 62 struct mutex lock; 63 u16 low_thresh; 64 u16 high_thresh; 65 u8 enable; 66 u8 control; 67 u8 atime; 68 u8 apers; 69 }; 70 71 static const struct iio_event_spec tcs3472_events[] = { 72 { 73 .type = IIO_EV_TYPE_THRESH, 74 .dir = IIO_EV_DIR_RISING, 75 .mask_separate = BIT(IIO_EV_INFO_VALUE), 76 }, { 77 .type = IIO_EV_TYPE_THRESH, 78 .dir = IIO_EV_DIR_FALLING, 79 .mask_separate = BIT(IIO_EV_INFO_VALUE), 80 }, { 81 .type = IIO_EV_TYPE_THRESH, 82 .dir = IIO_EV_DIR_EITHER, 83 .mask_separate = BIT(IIO_EV_INFO_ENABLE) | 84 BIT(IIO_EV_INFO_PERIOD), 85 }, 86 }; 87 88 #define TCS3472_CHANNEL(_color, _si, _addr) { \ 89 .type = IIO_INTENSITY, \ 90 .modified = 1, \ 91 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \ 92 .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_CALIBSCALE) | \ 93 BIT(IIO_CHAN_INFO_INT_TIME), \ 94 .channel2 = IIO_MOD_LIGHT_##_color, \ 95 .address = _addr, \ 96 .scan_index = _si, \ 97 .scan_type = { \ 98 .sign = 'u', \ 99 .realbits = 16, \ 100 .storagebits = 16, \ 101 .endianness = IIO_CPU, \ 102 }, \ 103 .event_spec = _si ? NULL : tcs3472_events, \ 104 .num_event_specs = _si ? 0 : ARRAY_SIZE(tcs3472_events), \ 105 } 106 107 static const int tcs3472_agains[] = { 1, 4, 16, 60 }; 108 109 static const struct iio_chan_spec tcs3472_channels[] = { 110 TCS3472_CHANNEL(CLEAR, 0, TCS3472_CDATA), 111 TCS3472_CHANNEL(RED, 1, TCS3472_RDATA), 112 TCS3472_CHANNEL(GREEN, 2, TCS3472_GDATA), 113 TCS3472_CHANNEL(BLUE, 3, TCS3472_BDATA), 114 IIO_CHAN_SOFT_TIMESTAMP(4), 115 }; 116 117 static int tcs3472_req_data(struct tcs3472_data *data) 118 { 119 int tries = 50; 120 int ret; 121 122 while (tries--) { 123 ret = i2c_smbus_read_byte_data(data->client, TCS3472_STATUS); 124 if (ret < 0) 125 return ret; 126 if (ret & TCS3472_STATUS_AVALID) 127 break; 128 msleep(20); 129 } 130 131 if (tries < 0) { 132 dev_err(&data->client->dev, "data not ready\n"); 133 return -EIO; 134 } 135 136 return 0; 137 } 138 139 static int tcs3472_read_raw(struct iio_dev *indio_dev, 140 struct iio_chan_spec const *chan, 141 int *val, int *val2, long mask) 142 { 143 struct tcs3472_data *data = iio_priv(indio_dev); 144 int ret; 145 146 switch (mask) { 147 case IIO_CHAN_INFO_RAW: 148 if (!iio_device_claim_direct(indio_dev)) 149 return -EBUSY; 150 ret = tcs3472_req_data(data); 151 if (ret < 0) { 152 iio_device_release_direct(indio_dev); 153 return ret; 154 } 155 ret = i2c_smbus_read_word_data(data->client, chan->address); 156 iio_device_release_direct(indio_dev); 157 if (ret < 0) 158 return ret; 159 *val = ret; 160 return IIO_VAL_INT; 161 case IIO_CHAN_INFO_CALIBSCALE: 162 *val = tcs3472_agains[data->control & 163 TCS3472_CONTROL_AGAIN_MASK]; 164 return IIO_VAL_INT; 165 case IIO_CHAN_INFO_INT_TIME: 166 *val = 0; 167 *val2 = (256 - data->atime) * 2400; 168 return IIO_VAL_INT_PLUS_MICRO; 169 default: 170 return -EINVAL; 171 } 172 } 173 174 static int tcs3472_write_raw(struct iio_dev *indio_dev, 175 struct iio_chan_spec const *chan, 176 int val, int val2, long mask) 177 { 178 struct tcs3472_data *data = iio_priv(indio_dev); 179 int i; 180 181 switch (mask) { 182 case IIO_CHAN_INFO_CALIBSCALE: 183 if (val2 != 0) 184 return -EINVAL; 185 for (i = 0; i < ARRAY_SIZE(tcs3472_agains); i++) { 186 if (val == tcs3472_agains[i]) { 187 data->control &= ~TCS3472_CONTROL_AGAIN_MASK; 188 data->control |= i; 189 return i2c_smbus_write_byte_data( 190 data->client, TCS3472_CONTROL, 191 data->control); 192 } 193 } 194 return -EINVAL; 195 case IIO_CHAN_INFO_INT_TIME: 196 if (val != 0) 197 return -EINVAL; 198 for (i = 0; i < 256; i++) { 199 if (val2 == (256 - i) * 2400) { 200 data->atime = i; 201 return i2c_smbus_write_byte_data( 202 data->client, TCS3472_ATIME, 203 data->atime); 204 } 205 206 } 207 return -EINVAL; 208 default: 209 return -EINVAL; 210 } 211 } 212 213 /* 214 * Translation from APERS field value to the number of consecutive out-of-range 215 * clear channel values before an interrupt is generated 216 */ 217 static const int tcs3472_intr_pers[] = { 218 0, 1, 2, 3, 5, 10, 15, 20, 25, 30, 35, 40, 45, 50, 55, 60 219 }; 220 221 static int tcs3472_read_event(struct iio_dev *indio_dev, 222 const struct iio_chan_spec *chan, enum iio_event_type type, 223 enum iio_event_direction dir, enum iio_event_info info, int *val, 224 int *val2) 225 { 226 struct tcs3472_data *data = iio_priv(indio_dev); 227 unsigned int period; 228 229 guard(mutex)(&data->lock); 230 231 switch (info) { 232 case IIO_EV_INFO_VALUE: 233 *val = (dir == IIO_EV_DIR_RISING) ? 234 data->high_thresh : data->low_thresh; 235 return IIO_VAL_INT; 236 case IIO_EV_INFO_PERIOD: 237 period = (256 - data->atime) * 2400 * 238 tcs3472_intr_pers[data->apers]; 239 *val = period / USEC_PER_SEC; 240 *val2 = period % USEC_PER_SEC; 241 return IIO_VAL_INT_PLUS_MICRO; 242 default: 243 return -EINVAL; 244 } 245 } 246 247 static int tcs3472_write_event(struct iio_dev *indio_dev, 248 const struct iio_chan_spec *chan, enum iio_event_type type, 249 enum iio_event_direction dir, enum iio_event_info info, int val, 250 int val2) 251 { 252 struct tcs3472_data *data = iio_priv(indio_dev); 253 int ret; 254 u8 command; 255 int period; 256 int i; 257 258 guard(mutex)(&data->lock); 259 260 switch (info) { 261 case IIO_EV_INFO_VALUE: 262 switch (dir) { 263 case IIO_EV_DIR_RISING: 264 command = TCS3472_AIHT; 265 break; 266 case IIO_EV_DIR_FALLING: 267 command = TCS3472_AILT; 268 break; 269 default: 270 return -EINVAL; 271 } 272 ret = i2c_smbus_write_word_data(data->client, command, val); 273 if (ret) 274 return ret; 275 276 if (dir == IIO_EV_DIR_RISING) 277 data->high_thresh = val; 278 else 279 data->low_thresh = val; 280 281 return 0; 282 case IIO_EV_INFO_PERIOD: 283 period = val * USEC_PER_SEC + val2; 284 for (i = 1; i < ARRAY_SIZE(tcs3472_intr_pers) - 1; i++) { 285 if (period <= (256 - data->atime) * 2400 * 286 tcs3472_intr_pers[i]) 287 break; 288 } 289 ret = i2c_smbus_write_byte_data(data->client, TCS3472_PERS, i); 290 if (ret) 291 return ret; 292 293 data->apers = i; 294 295 return 0; 296 default: 297 return -EINVAL; 298 } 299 } 300 301 static int tcs3472_read_event_config(struct iio_dev *indio_dev, 302 const struct iio_chan_spec *chan, enum iio_event_type type, 303 enum iio_event_direction dir) 304 { 305 struct tcs3472_data *data = iio_priv(indio_dev); 306 307 guard(mutex)(&data->lock); 308 309 return (data->enable & TCS3472_ENABLE_AIEN) ? 1 : 0; 310 } 311 312 static int tcs3472_write_event_config(struct iio_dev *indio_dev, 313 const struct iio_chan_spec *chan, enum iio_event_type type, 314 enum iio_event_direction dir, bool state) 315 { 316 struct tcs3472_data *data = iio_priv(indio_dev); 317 int ret = 0; 318 u8 enable_old; 319 320 guard(mutex)(&data->lock); 321 322 enable_old = data->enable; 323 324 if (state) 325 data->enable |= TCS3472_ENABLE_AIEN; 326 else 327 data->enable &= ~TCS3472_ENABLE_AIEN; 328 329 if (enable_old != data->enable) { 330 ret = i2c_smbus_write_byte_data(data->client, TCS3472_ENABLE, 331 data->enable); 332 if (ret) { 333 data->enable = enable_old; 334 return ret; 335 } 336 } 337 338 return 0; 339 } 340 341 static irqreturn_t tcs3472_event_handler(int irq, void *priv) 342 { 343 struct iio_dev *indio_dev = priv; 344 struct tcs3472_data *data = iio_priv(indio_dev); 345 int ret; 346 347 ret = i2c_smbus_read_byte_data(data->client, TCS3472_STATUS); 348 if (ret >= 0 && (ret & TCS3472_STATUS_AINT)) { 349 iio_push_event(indio_dev, IIO_UNMOD_EVENT_CODE(IIO_INTENSITY, 0, 350 IIO_EV_TYPE_THRESH, 351 IIO_EV_DIR_EITHER), 352 iio_get_time_ns(indio_dev)); 353 354 i2c_smbus_read_byte_data(data->client, TCS3472_INTR_CLEAR); 355 } 356 357 return IRQ_HANDLED; 358 } 359 360 static irqreturn_t tcs3472_trigger_handler(int irq, void *p) 361 { 362 struct iio_poll_func *pf = p; 363 struct iio_dev *indio_dev = pf->indio_dev; 364 struct tcs3472_data *data = iio_priv(indio_dev); 365 int i, j = 0; 366 /* Ensure timestamp is naturally aligned */ 367 struct { 368 u16 chans[4]; 369 aligned_s64 timestamp; 370 } scan = { }; 371 372 int ret = tcs3472_req_data(data); 373 if (ret < 0) 374 goto done; 375 376 iio_for_each_active_channel(indio_dev, i) { 377 ret = i2c_smbus_read_word_data(data->client, 378 TCS3472_CDATA + 2*i); 379 if (ret < 0) 380 goto done; 381 382 scan.chans[j++] = ret; 383 } 384 385 iio_push_to_buffers_with_ts(indio_dev, &scan, sizeof(scan), 386 iio_get_time_ns(indio_dev)); 387 388 done: 389 iio_trigger_notify_done(indio_dev->trig); 390 391 return IRQ_HANDLED; 392 } 393 394 static ssize_t tcs3472_show_int_time_available(struct device *dev, 395 struct device_attribute *attr, 396 char *buf) 397 { 398 size_t len = 0; 399 int i; 400 401 for (i = 1; i <= 256; i++) 402 len += scnprintf(buf + len, PAGE_SIZE - len, "0.%06d ", 403 2400 * i); 404 405 /* replace trailing space by newline */ 406 buf[len - 1] = '\n'; 407 408 return len; 409 } 410 411 static IIO_CONST_ATTR(calibscale_available, "1 4 16 60"); 412 static IIO_DEV_ATTR_INT_TIME_AVAIL(tcs3472_show_int_time_available); 413 414 static struct attribute *tcs3472_attributes[] = { 415 &iio_const_attr_calibscale_available.dev_attr.attr, 416 &iio_dev_attr_integration_time_available.dev_attr.attr, 417 NULL 418 }; 419 420 static const struct attribute_group tcs3472_attribute_group = { 421 .attrs = tcs3472_attributes, 422 }; 423 424 static const struct iio_info tcs3472_info = { 425 .read_raw = tcs3472_read_raw, 426 .write_raw = tcs3472_write_raw, 427 .read_event_value = tcs3472_read_event, 428 .write_event_value = tcs3472_write_event, 429 .read_event_config = tcs3472_read_event_config, 430 .write_event_config = tcs3472_write_event_config, 431 .attrs = &tcs3472_attribute_group, 432 }; 433 434 static int tcs3472_powerdown(struct tcs3472_data *data) 435 { 436 int ret; 437 u8 enable_mask = TCS3472_ENABLE_AEN | TCS3472_ENABLE_PON; 438 439 guard(mutex)(&data->lock); 440 441 ret = i2c_smbus_write_byte_data(data->client, TCS3472_ENABLE, 442 data->enable & ~enable_mask); 443 if (ret) 444 return ret; 445 446 data->enable &= ~enable_mask; 447 448 return 0; 449 } 450 451 static void tcs3472_powerdown_action(void *data) 452 { 453 tcs3472_powerdown(data); 454 } 455 456 static int tcs3472_probe(struct i2c_client *client) 457 { 458 struct device *dev = &client->dev; 459 struct tcs3472_data *data; 460 struct iio_dev *indio_dev; 461 int ret; 462 463 indio_dev = devm_iio_device_alloc(dev, sizeof(*data)); 464 if (!indio_dev) 465 return -ENOMEM; 466 467 data = iio_priv(indio_dev); 468 i2c_set_clientdata(client, indio_dev); 469 data->client = client; 470 ret = devm_mutex_init(dev, &data->lock); 471 if (ret) 472 return ret; 473 474 indio_dev->info = &tcs3472_info; 475 indio_dev->name = TCS3472_DRV_NAME; 476 indio_dev->channels = tcs3472_channels; 477 indio_dev->num_channels = ARRAY_SIZE(tcs3472_channels); 478 indio_dev->modes = INDIO_DIRECT_MODE; 479 480 ret = i2c_smbus_read_byte_data(data->client, TCS3472_ID); 481 if (ret < 0) 482 return ret; 483 484 if (ret == 0x44) 485 dev_info(dev, "TCS34721/34725 found\n"); 486 else if (ret == 0x4d) 487 dev_info(dev, "TCS34723/34727 found\n"); 488 else 489 return -ENODEV; 490 491 ret = i2c_smbus_read_byte_data(data->client, TCS3472_CONTROL); 492 if (ret < 0) 493 return ret; 494 data->control = ret; 495 496 ret = i2c_smbus_read_byte_data(data->client, TCS3472_ATIME); 497 if (ret < 0) 498 return ret; 499 data->atime = ret; 500 501 ret = i2c_smbus_read_word_data(data->client, TCS3472_AILT); 502 if (ret < 0) 503 return ret; 504 data->low_thresh = ret; 505 506 ret = i2c_smbus_read_word_data(data->client, TCS3472_AIHT); 507 if (ret < 0) 508 return ret; 509 data->high_thresh = ret; 510 511 data->apers = 1; 512 ret = i2c_smbus_write_byte_data(data->client, TCS3472_PERS, 513 data->apers); 514 if (ret < 0) 515 return ret; 516 517 ret = i2c_smbus_read_byte_data(data->client, TCS3472_ENABLE); 518 if (ret < 0) 519 return ret; 520 521 /* enable device */ 522 data->enable = ret | TCS3472_ENABLE_PON | TCS3472_ENABLE_AEN; 523 data->enable &= ~TCS3472_ENABLE_AIEN; 524 ret = i2c_smbus_write_byte_data(data->client, TCS3472_ENABLE, 525 data->enable); 526 if (ret < 0) 527 return ret; 528 529 ret = devm_add_action_or_reset(dev, tcs3472_powerdown_action, data); 530 if (ret) 531 return ret; 532 533 ret = devm_iio_triggered_buffer_setup(dev, indio_dev, NULL, 534 tcs3472_trigger_handler, NULL); 535 if (ret < 0) 536 return ret; 537 538 if (client->irq) { 539 ret = devm_request_threaded_irq(dev, client->irq, NULL, 540 tcs3472_event_handler, 541 IRQF_TRIGGER_FALLING | 542 IRQF_SHARED | 543 IRQF_ONESHOT, 544 client->name, indio_dev); 545 if (ret) 546 return ret; 547 } 548 549 return devm_iio_device_register(dev, indio_dev); 550 } 551 552 static int tcs3472_suspend(struct device *dev) 553 { 554 struct tcs3472_data *data = iio_priv(i2c_get_clientdata( 555 to_i2c_client(dev))); 556 return tcs3472_powerdown(data); 557 } 558 559 static int tcs3472_resume(struct device *dev) 560 { 561 struct tcs3472_data *data = iio_priv(i2c_get_clientdata( 562 to_i2c_client(dev))); 563 int ret; 564 u8 enable_mask = TCS3472_ENABLE_AEN | TCS3472_ENABLE_PON; 565 566 guard(mutex)(&data->lock); 567 568 ret = i2c_smbus_write_byte_data(data->client, TCS3472_ENABLE, 569 data->enable | enable_mask); 570 if (ret) 571 return ret; 572 573 data->enable |= enable_mask; 574 575 return 0; 576 } 577 578 static DEFINE_SIMPLE_DEV_PM_OPS(tcs3472_pm_ops, tcs3472_suspend, 579 tcs3472_resume); 580 581 static const struct i2c_device_id tcs3472_id[] = { 582 { .name = "tcs3472" }, 583 { } 584 }; 585 MODULE_DEVICE_TABLE(i2c, tcs3472_id); 586 587 static struct i2c_driver tcs3472_driver = { 588 .driver = { 589 .name = TCS3472_DRV_NAME, 590 .pm = pm_sleep_ptr(&tcs3472_pm_ops), 591 }, 592 .probe = tcs3472_probe, 593 .id_table = tcs3472_id, 594 }; 595 module_i2c_driver(tcs3472_driver); 596 597 MODULE_AUTHOR("Peter Meerwald <pmeerw@pmeerw.net>"); 598 MODULE_DESCRIPTION("TCS3472 color light sensors driver"); 599 MODULE_LICENSE("GPL"); 600