1 // SPDX-License-Identifier: GPL-2.0-only 2 /* 3 * opt3001.c - Texas Instruments OPT3001 Light Sensor 4 * 5 * Copyright (C) 2014 Texas Instruments Incorporated - https://www.ti.com 6 * 7 * Author: Andreas Dannenberg <dannenberg@ti.com> 8 * Based on previous work from: Felipe Balbi <balbi@ti.com> 9 */ 10 11 #include <linux/array_size.h> 12 #include <linux/bits.h> 13 #include <linux/delay.h> 14 #include <linux/dev_printk.h> 15 #include <linux/errno.h> 16 #include <linux/i2c.h> 17 #include <linux/interrupt.h> 18 #include <linux/jiffies.h> 19 #include <linux/module.h> 20 #include <linux/mutex.h> 21 #include <linux/types.h> 22 #include <linux/wait.h> 23 24 #include <linux/iio/events.h> 25 #include <linux/iio/iio.h> 26 #include <linux/iio/sysfs.h> 27 28 #define OPT3001_RESULT 0x00 29 #define OPT3001_CONFIGURATION 0x01 30 #define OPT3001_LOW_LIMIT 0x02 31 #define OPT3001_HIGH_LIMIT 0x03 32 #define OPT3001_MANUFACTURER_ID 0x7e 33 #define OPT3001_DEVICE_ID 0x7f 34 35 #define OPT3001_CONFIGURATION_RN_MASK GENMASK(15, 12) 36 #define OPT3001_CONFIGURATION_RN_AUTO (0xc << 12) 37 38 #define OPT3001_CONFIGURATION_CT BIT(11) 39 40 #define OPT3001_CONFIGURATION_M_MASK GENMASK(10, 9) 41 #define OPT3001_CONFIGURATION_M_SHUTDOWN (0 << 9) 42 #define OPT3001_CONFIGURATION_M_SINGLE (1 << 9) 43 #define OPT3001_CONFIGURATION_M_CONTINUOUS (2 << 9) /* also 3 << 9 */ 44 45 #define OPT3001_CONFIGURATION_CRF BIT(7) 46 #define OPT3001_CONFIGURATION_FH BIT(6) 47 #define OPT3001_CONFIGURATION_FL BIT(5) 48 #define OPT3001_CONFIGURATION_L BIT(4) 49 #define OPT3001_CONFIGURATION_POL BIT(3) 50 #define OPT3001_CONFIGURATION_ME BIT(2) 51 52 #define OPT3001_CONFIGURATION_FC_MASK GENMASK(1, 0) 53 54 /* The end-of-conversion enable is located in the low-limit register */ 55 #define OPT3001_LOW_LIMIT_EOC_ENABLE 0xc000 56 57 #define OPT3001_REG_EXPONENT(n) ((n) >> 12) 58 #define OPT3001_REG_MANTISSA(n) ((n) & 0xfff) 59 60 #define OPT3001_INT_TIME_LONG 800000 61 #define OPT3001_INT_TIME_SHORT 100000 62 63 /* 64 * Time to wait for conversion result to be ready. The device datasheet 65 * sect. 6.5 states results are ready after total integration time plus 3ms. 66 * This results in worst-case max values of 113ms or 883ms, respectively. 67 * Add some slack to be on the safe side. 68 */ 69 #define OPT3001_RESULT_READY_SHORT 150 70 #define OPT3001_RESULT_READY_LONG 1000 71 72 struct opt3001_scale { 73 int val; 74 int val2; 75 }; 76 77 struct opt3001_chip_info { 78 const struct iio_chan_spec (*channels)[2]; 79 enum iio_chan_type chan_type; 80 int num_channels; 81 82 const struct opt3001_scale (*scales)[12]; 83 /* 84 * Factor as specified by conversion equation in datasheet. 85 * eg. 0.01 (scaled to integer 10) for opt3001. 86 */ 87 int factor_whole; 88 /* 89 * Factor to compensate for potentially scaled factor_whole. 90 */ 91 int factor_integer; 92 /* 93 * Factor used to align decimal part of processed value to six decimal 94 * places. 95 */ 96 int factor_decimal; 97 98 bool has_id; 99 }; 100 101 struct opt3001 { 102 struct i2c_client *client; 103 struct device *dev; 104 105 struct mutex lock; 106 bool ok_to_ignore_lock; 107 bool result_ready; 108 wait_queue_head_t result_ready_queue; 109 u16 result; 110 const struct opt3001_chip_info *chip_info; 111 112 u32 int_time; 113 u32 mode; 114 115 u16 high_thresh_mantissa; 116 u16 low_thresh_mantissa; 117 118 u8 high_thresh_exp; 119 u8 low_thresh_exp; 120 121 bool use_irq; 122 }; 123 124 static const struct opt3001_scale opt3001_scales[] = { 125 { 126 .val = 40, 127 .val2 = 950000, 128 }, 129 { 130 .val = 81, 131 .val2 = 900000, 132 }, 133 { 134 .val = 163, 135 .val2 = 800000, 136 }, 137 { 138 .val = 327, 139 .val2 = 600000, 140 }, 141 { 142 .val = 655, 143 .val2 = 200000, 144 }, 145 { 146 .val = 1310, 147 .val2 = 400000, 148 }, 149 { 150 .val = 2620, 151 .val2 = 800000, 152 }, 153 { 154 .val = 5241, 155 .val2 = 600000, 156 }, 157 { 158 .val = 10483, 159 .val2 = 200000, 160 }, 161 { 162 .val = 20966, 163 .val2 = 400000, 164 }, 165 { 166 .val = 41932, 167 .val2 = 800000, 168 }, 169 { 170 .val = 83865, 171 .val2 = 600000, 172 }, 173 }; 174 175 static const struct opt3001_scale opt3002_scales[] = { 176 { 177 .val = 4914, 178 .val2 = 0, 179 }, 180 { 181 .val = 9828, 182 .val2 = 0, 183 }, 184 { 185 .val = 19656, 186 .val2 = 0, 187 }, 188 { 189 .val = 39312, 190 .val2 = 0, 191 }, 192 { 193 .val = 78624, 194 .val2 = 0, 195 }, 196 { 197 .val = 157248, 198 .val2 = 0, 199 }, 200 { 201 .val = 314496, 202 .val2 = 0, 203 }, 204 { 205 .val = 628992, 206 .val2 = 0, 207 }, 208 { 209 .val = 1257984, 210 .val2 = 0, 211 }, 212 { 213 .val = 2515968, 214 .val2 = 0, 215 }, 216 { 217 .val = 5031936, 218 .val2 = 0, 219 }, 220 { 221 .val = 10063872, 222 .val2 = 0, 223 }, 224 }; 225 226 static int opt3001_find_scale(const struct opt3001 *opt, int val, 227 int val2, u8 *exponent) 228 { 229 int i; 230 for (i = 0; i < ARRAY_SIZE(*opt->chip_info->scales); i++) { 231 const struct opt3001_scale *scale = &(*opt->chip_info->scales)[i]; 232 /* 233 * Compare the integer and micro parts to determine value scale. 234 */ 235 if (val < scale->val || 236 (val == scale->val && val2 <= scale->val2)) { 237 *exponent = i; 238 return 0; 239 } 240 } 241 242 return -EINVAL; 243 } 244 245 static void opt3001_to_iio_ret(struct opt3001 *opt, u8 exponent, 246 u16 mantissa, int *val, int *val2) 247 { 248 int ret; 249 int whole = opt->chip_info->factor_whole; 250 int integer = opt->chip_info->factor_integer; 251 int decimal = opt->chip_info->factor_decimal; 252 253 ret = whole * (mantissa << exponent); 254 *val = ret / integer; 255 *val2 = (ret - (*val * integer)) * decimal; 256 } 257 258 static void opt3001_set_mode(struct opt3001 *opt, u16 *reg, u16 mode) 259 { 260 *reg &= ~OPT3001_CONFIGURATION_M_MASK; 261 *reg |= mode; 262 opt->mode = mode; 263 } 264 265 static IIO_CONST_ATTR_INT_TIME_AVAIL("0.1 0.8"); 266 267 static struct attribute *opt3001_attributes[] = { 268 &iio_const_attr_integration_time_available.dev_attr.attr, 269 NULL 270 }; 271 272 static const struct attribute_group opt3001_attribute_group = { 273 .attrs = opt3001_attributes, 274 }; 275 276 static const struct iio_event_spec opt3001_event_spec[] = { 277 { 278 .type = IIO_EV_TYPE_THRESH, 279 .dir = IIO_EV_DIR_RISING, 280 .mask_separate = BIT(IIO_EV_INFO_VALUE) | 281 BIT(IIO_EV_INFO_ENABLE), 282 }, 283 { 284 .type = IIO_EV_TYPE_THRESH, 285 .dir = IIO_EV_DIR_FALLING, 286 .mask_separate = BIT(IIO_EV_INFO_VALUE) | 287 BIT(IIO_EV_INFO_ENABLE), 288 }, 289 }; 290 291 static const struct iio_chan_spec opt3001_channels[] = { 292 { 293 .type = IIO_LIGHT, 294 .info_mask_separate = BIT(IIO_CHAN_INFO_PROCESSED) | 295 BIT(IIO_CHAN_INFO_INT_TIME), 296 .event_spec = opt3001_event_spec, 297 .num_event_specs = ARRAY_SIZE(opt3001_event_spec), 298 }, 299 IIO_CHAN_SOFT_TIMESTAMP(1), 300 }; 301 302 static const struct iio_chan_spec opt3002_channels[] = { 303 { 304 .type = IIO_INTENSITY, 305 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | 306 BIT(IIO_CHAN_INFO_INT_TIME), 307 .event_spec = opt3001_event_spec, 308 .num_event_specs = ARRAY_SIZE(opt3001_event_spec), 309 }, 310 IIO_CHAN_SOFT_TIMESTAMP(1), 311 }; 312 313 static int opt3001_get_processed(struct opt3001 *opt, int *val, int *val2) 314 { 315 int ret; 316 u16 mantissa; 317 u16 reg; 318 u8 exponent; 319 u16 value; 320 long timeout; 321 322 if (opt->use_irq) { 323 /* 324 * Enable the end-of-conversion interrupt mechanism. Note that 325 * doing so will overwrite the low-level limit value however we 326 * will restore this value later on. 327 */ 328 ret = i2c_smbus_write_word_swapped(opt->client, 329 OPT3001_LOW_LIMIT, 330 OPT3001_LOW_LIMIT_EOC_ENABLE); 331 if (ret < 0) { 332 dev_err(opt->dev, "failed to write register %02x\n", 333 OPT3001_LOW_LIMIT); 334 return ret; 335 } 336 337 /* Allow IRQ to access the device despite lock being set */ 338 opt->ok_to_ignore_lock = true; 339 } 340 341 /* Reset data-ready indicator flag */ 342 opt->result_ready = false; 343 344 /* Configure for single-conversion mode and start a new conversion */ 345 ret = i2c_smbus_read_word_swapped(opt->client, OPT3001_CONFIGURATION); 346 if (ret < 0) { 347 dev_err(opt->dev, "failed to read register %02x\n", 348 OPT3001_CONFIGURATION); 349 goto err; 350 } 351 352 reg = ret; 353 opt3001_set_mode(opt, ®, OPT3001_CONFIGURATION_M_SINGLE); 354 355 ret = i2c_smbus_write_word_swapped(opt->client, OPT3001_CONFIGURATION, 356 reg); 357 if (ret < 0) { 358 dev_err(opt->dev, "failed to write register %02x\n", 359 OPT3001_CONFIGURATION); 360 goto err; 361 } 362 363 if (opt->use_irq) { 364 /* Wait for the IRQ to indicate the conversion is complete */ 365 ret = wait_event_timeout(opt->result_ready_queue, 366 opt->result_ready, 367 msecs_to_jiffies(OPT3001_RESULT_READY_LONG)); 368 if (ret == 0) { 369 ret = -ETIMEDOUT; 370 goto err; 371 } 372 } else { 373 /* Sleep for result ready time */ 374 timeout = (opt->int_time == OPT3001_INT_TIME_SHORT) ? 375 OPT3001_RESULT_READY_SHORT : OPT3001_RESULT_READY_LONG; 376 msleep(timeout); 377 378 /* Check result ready flag */ 379 ret = i2c_smbus_read_word_swapped(opt->client, 380 OPT3001_CONFIGURATION); 381 if (ret < 0) { 382 dev_err(opt->dev, "failed to read register %02x\n", 383 OPT3001_CONFIGURATION); 384 goto err; 385 } 386 387 if (!(ret & OPT3001_CONFIGURATION_CRF)) { 388 ret = -ETIMEDOUT; 389 goto err; 390 } 391 392 /* Obtain value */ 393 ret = i2c_smbus_read_word_swapped(opt->client, OPT3001_RESULT); 394 if (ret < 0) { 395 dev_err(opt->dev, "failed to read register %02x\n", 396 OPT3001_RESULT); 397 goto err; 398 } 399 opt->result = ret; 400 opt->result_ready = true; 401 } 402 403 err: 404 if (opt->use_irq) 405 /* Disallow IRQ to access the device while lock is active */ 406 opt->ok_to_ignore_lock = false; 407 408 if (ret < 0) 409 return ret; 410 411 if (opt->use_irq) { 412 /* 413 * Disable the end-of-conversion interrupt mechanism by 414 * restoring the low-level limit value (clearing 415 * OPT3001_LOW_LIMIT_EOC_ENABLE). Note that selectively clearing 416 * those enable bits would affect the actual limit value due to 417 * bit-overlap and therefore can't be done. 418 */ 419 value = (opt->low_thresh_exp << 12) | opt->low_thresh_mantissa; 420 ret = i2c_smbus_write_word_swapped(opt->client, 421 OPT3001_LOW_LIMIT, 422 value); 423 if (ret < 0) { 424 dev_err(opt->dev, "failed to write register %02x\n", 425 OPT3001_LOW_LIMIT); 426 return ret; 427 } 428 } 429 430 exponent = OPT3001_REG_EXPONENT(opt->result); 431 mantissa = OPT3001_REG_MANTISSA(opt->result); 432 433 opt3001_to_iio_ret(opt, exponent, mantissa, val, val2); 434 435 return IIO_VAL_INT_PLUS_MICRO; 436 } 437 438 static int opt3001_get_int_time(struct opt3001 *opt, int *val, int *val2) 439 { 440 *val = 0; 441 *val2 = opt->int_time; 442 443 return IIO_VAL_INT_PLUS_MICRO; 444 } 445 446 static int opt3001_set_int_time(struct opt3001 *opt, int time) 447 { 448 int ret; 449 u16 reg; 450 451 ret = i2c_smbus_read_word_swapped(opt->client, OPT3001_CONFIGURATION); 452 if (ret < 0) { 453 dev_err(opt->dev, "failed to read register %02x\n", 454 OPT3001_CONFIGURATION); 455 return ret; 456 } 457 458 reg = ret; 459 460 switch (time) { 461 case OPT3001_INT_TIME_SHORT: 462 reg &= ~OPT3001_CONFIGURATION_CT; 463 opt->int_time = OPT3001_INT_TIME_SHORT; 464 break; 465 case OPT3001_INT_TIME_LONG: 466 reg |= OPT3001_CONFIGURATION_CT; 467 opt->int_time = OPT3001_INT_TIME_LONG; 468 break; 469 default: 470 return -EINVAL; 471 } 472 473 return i2c_smbus_write_word_swapped(opt->client, OPT3001_CONFIGURATION, 474 reg); 475 } 476 477 static int opt3001_read_raw(struct iio_dev *iio, 478 struct iio_chan_spec const *chan, int *val, int *val2, 479 long mask) 480 { 481 struct opt3001 *opt = iio_priv(iio); 482 int ret; 483 484 if (opt->mode == OPT3001_CONFIGURATION_M_CONTINUOUS) 485 return -EBUSY; 486 487 if (chan->type != opt->chip_info->chan_type) 488 return -EINVAL; 489 490 mutex_lock(&opt->lock); 491 492 switch (mask) { 493 case IIO_CHAN_INFO_RAW: 494 case IIO_CHAN_INFO_PROCESSED: 495 ret = opt3001_get_processed(opt, val, val2); 496 break; 497 case IIO_CHAN_INFO_INT_TIME: 498 ret = opt3001_get_int_time(opt, val, val2); 499 break; 500 default: 501 ret = -EINVAL; 502 } 503 504 mutex_unlock(&opt->lock); 505 506 return ret; 507 } 508 509 static int opt3001_write_raw(struct iio_dev *iio, 510 struct iio_chan_spec const *chan, int val, int val2, 511 long mask) 512 { 513 struct opt3001 *opt = iio_priv(iio); 514 int ret; 515 516 if (opt->mode == OPT3001_CONFIGURATION_M_CONTINUOUS) 517 return -EBUSY; 518 519 if (chan->type != opt->chip_info->chan_type) 520 return -EINVAL; 521 522 if (mask != IIO_CHAN_INFO_INT_TIME) 523 return -EINVAL; 524 525 if (val != 0) 526 return -EINVAL; 527 528 mutex_lock(&opt->lock); 529 ret = opt3001_set_int_time(opt, val2); 530 mutex_unlock(&opt->lock); 531 532 return ret; 533 } 534 535 static int opt3001_read_event_value(struct iio_dev *iio, 536 const struct iio_chan_spec *chan, enum iio_event_type type, 537 enum iio_event_direction dir, enum iio_event_info info, 538 int *val, int *val2) 539 { 540 struct opt3001 *opt = iio_priv(iio); 541 int ret = IIO_VAL_INT_PLUS_MICRO; 542 543 mutex_lock(&opt->lock); 544 545 switch (dir) { 546 case IIO_EV_DIR_RISING: 547 opt3001_to_iio_ret(opt, opt->high_thresh_exp, 548 opt->high_thresh_mantissa, val, val2); 549 break; 550 case IIO_EV_DIR_FALLING: 551 opt3001_to_iio_ret(opt, opt->low_thresh_exp, 552 opt->low_thresh_mantissa, val, val2); 553 break; 554 default: 555 ret = -EINVAL; 556 } 557 558 mutex_unlock(&opt->lock); 559 560 return ret; 561 } 562 563 static int opt3001_write_event_value(struct iio_dev *iio, 564 const struct iio_chan_spec *chan, enum iio_event_type type, 565 enum iio_event_direction dir, enum iio_event_info info, 566 int val, int val2) 567 { 568 struct opt3001 *opt = iio_priv(iio); 569 int ret; 570 int whole; 571 int integer; 572 int decimal; 573 574 u16 mantissa; 575 u16 value; 576 u16 reg; 577 578 u8 exponent; 579 580 if (val < 0) 581 return -EINVAL; 582 583 mutex_lock(&opt->lock); 584 585 ret = opt3001_find_scale(opt, val, val2, &exponent); 586 if (ret < 0) { 587 dev_err(opt->dev, "can't find scale for %d.%06u\n", val, val2); 588 goto err; 589 } 590 591 whole = opt->chip_info->factor_whole; 592 integer = opt->chip_info->factor_integer; 593 decimal = opt->chip_info->factor_decimal; 594 595 mantissa = (((val * integer) + (val2 / decimal)) / whole) >> exponent; 596 597 value = (exponent << 12) | mantissa; 598 599 switch (dir) { 600 case IIO_EV_DIR_RISING: 601 reg = OPT3001_HIGH_LIMIT; 602 opt->high_thresh_mantissa = mantissa; 603 opt->high_thresh_exp = exponent; 604 break; 605 case IIO_EV_DIR_FALLING: 606 reg = OPT3001_LOW_LIMIT; 607 opt->low_thresh_mantissa = mantissa; 608 opt->low_thresh_exp = exponent; 609 break; 610 default: 611 ret = -EINVAL; 612 goto err; 613 } 614 615 ret = i2c_smbus_write_word_swapped(opt->client, reg, value); 616 if (ret < 0) { 617 dev_err(opt->dev, "failed to write register %02x\n", reg); 618 goto err; 619 } 620 621 err: 622 mutex_unlock(&opt->lock); 623 624 return ret; 625 } 626 627 static int opt3001_read_event_config(struct iio_dev *iio, 628 const struct iio_chan_spec *chan, enum iio_event_type type, 629 enum iio_event_direction dir) 630 { 631 struct opt3001 *opt = iio_priv(iio); 632 633 return opt->mode == OPT3001_CONFIGURATION_M_CONTINUOUS; 634 } 635 636 static int opt3001_write_event_config(struct iio_dev *iio, 637 const struct iio_chan_spec *chan, enum iio_event_type type, 638 enum iio_event_direction dir, bool state) 639 { 640 struct opt3001 *opt = iio_priv(iio); 641 int ret; 642 u16 mode; 643 u16 reg; 644 645 if (state && opt->mode == OPT3001_CONFIGURATION_M_CONTINUOUS) 646 return 0; 647 648 if (!state && opt->mode == OPT3001_CONFIGURATION_M_SHUTDOWN) 649 return 0; 650 651 mutex_lock(&opt->lock); 652 653 mode = state ? OPT3001_CONFIGURATION_M_CONTINUOUS 654 : OPT3001_CONFIGURATION_M_SHUTDOWN; 655 656 ret = i2c_smbus_read_word_swapped(opt->client, OPT3001_CONFIGURATION); 657 if (ret < 0) { 658 dev_err(opt->dev, "failed to read register %02x\n", 659 OPT3001_CONFIGURATION); 660 goto err; 661 } 662 663 reg = ret; 664 opt3001_set_mode(opt, ®, mode); 665 666 ret = i2c_smbus_write_word_swapped(opt->client, OPT3001_CONFIGURATION, 667 reg); 668 if (ret < 0) { 669 dev_err(opt->dev, "failed to write register %02x\n", 670 OPT3001_CONFIGURATION); 671 goto err; 672 } 673 674 err: 675 mutex_unlock(&opt->lock); 676 677 return ret; 678 } 679 680 static const struct iio_info opt3001_info = { 681 .attrs = &opt3001_attribute_group, 682 .read_raw = opt3001_read_raw, 683 .write_raw = opt3001_write_raw, 684 .read_event_value = opt3001_read_event_value, 685 .write_event_value = opt3001_write_event_value, 686 .read_event_config = opt3001_read_event_config, 687 .write_event_config = opt3001_write_event_config, 688 }; 689 690 static int opt3001_read_id(struct opt3001 *opt) 691 { 692 char manufacturer[2]; 693 u16 device_id; 694 int ret; 695 696 ret = i2c_smbus_read_word_swapped(opt->client, OPT3001_MANUFACTURER_ID); 697 if (ret < 0) { 698 dev_err(opt->dev, "failed to read register %02x\n", 699 OPT3001_MANUFACTURER_ID); 700 return ret; 701 } 702 703 manufacturer[0] = ret >> 8; 704 manufacturer[1] = ret & 0xff; 705 706 ret = i2c_smbus_read_word_swapped(opt->client, OPT3001_DEVICE_ID); 707 if (ret < 0) { 708 dev_err(opt->dev, "failed to read register %02x\n", 709 OPT3001_DEVICE_ID); 710 return ret; 711 } 712 713 device_id = ret; 714 715 dev_info(opt->dev, "Found %c%c OPT%04x\n", manufacturer[0], 716 manufacturer[1], device_id); 717 718 return 0; 719 } 720 721 static int opt3001_configure(struct opt3001 *opt) 722 { 723 int ret; 724 u16 reg; 725 726 ret = i2c_smbus_read_word_swapped(opt->client, OPT3001_CONFIGURATION); 727 if (ret < 0) { 728 dev_err(opt->dev, "failed to read register %02x\n", 729 OPT3001_CONFIGURATION); 730 return ret; 731 } 732 733 reg = ret; 734 735 /* Enable automatic full-scale setting mode */ 736 reg &= ~OPT3001_CONFIGURATION_RN_MASK; 737 reg |= OPT3001_CONFIGURATION_RN_AUTO; 738 739 /* Reflect status of the device's integration time setting */ 740 if (reg & OPT3001_CONFIGURATION_CT) 741 opt->int_time = OPT3001_INT_TIME_LONG; 742 else 743 opt->int_time = OPT3001_INT_TIME_SHORT; 744 745 /* Ensure device is in shutdown initially */ 746 opt3001_set_mode(opt, ®, OPT3001_CONFIGURATION_M_SHUTDOWN); 747 748 /* Configure for latched window-style comparison operation */ 749 reg |= OPT3001_CONFIGURATION_L; 750 reg &= ~OPT3001_CONFIGURATION_POL; 751 reg &= ~OPT3001_CONFIGURATION_ME; 752 reg &= ~OPT3001_CONFIGURATION_FC_MASK; 753 754 ret = i2c_smbus_write_word_swapped(opt->client, OPT3001_CONFIGURATION, 755 reg); 756 if (ret < 0) { 757 dev_err(opt->dev, "failed to write register %02x\n", 758 OPT3001_CONFIGURATION); 759 return ret; 760 } 761 762 ret = i2c_smbus_read_word_swapped(opt->client, OPT3001_LOW_LIMIT); 763 if (ret < 0) { 764 dev_err(opt->dev, "failed to read register %02x\n", 765 OPT3001_LOW_LIMIT); 766 return ret; 767 } 768 769 opt->low_thresh_mantissa = OPT3001_REG_MANTISSA(ret); 770 opt->low_thresh_exp = OPT3001_REG_EXPONENT(ret); 771 772 ret = i2c_smbus_read_word_swapped(opt->client, OPT3001_HIGH_LIMIT); 773 if (ret < 0) { 774 dev_err(opt->dev, "failed to read register %02x\n", 775 OPT3001_HIGH_LIMIT); 776 return ret; 777 } 778 779 opt->high_thresh_mantissa = OPT3001_REG_MANTISSA(ret); 780 opt->high_thresh_exp = OPT3001_REG_EXPONENT(ret); 781 782 return 0; 783 } 784 785 static irqreturn_t opt3001_irq(int irq, void *_iio) 786 { 787 struct iio_dev *iio = _iio; 788 struct opt3001 *opt = iio_priv(iio); 789 int ret; 790 bool wake_result_ready_queue = false; 791 enum iio_chan_type chan_type = opt->chip_info->chan_type; 792 bool ok_to_ignore_lock = opt->ok_to_ignore_lock; 793 794 if (!ok_to_ignore_lock) 795 mutex_lock(&opt->lock); 796 797 ret = i2c_smbus_read_word_swapped(opt->client, OPT3001_CONFIGURATION); 798 if (ret < 0) { 799 dev_err(opt->dev, "failed to read register %02x\n", 800 OPT3001_CONFIGURATION); 801 goto out; 802 } 803 804 if ((ret & OPT3001_CONFIGURATION_M_MASK) == 805 OPT3001_CONFIGURATION_M_CONTINUOUS) { 806 if (ret & OPT3001_CONFIGURATION_FH) 807 iio_push_event(iio, 808 IIO_UNMOD_EVENT_CODE(chan_type, 0, 809 IIO_EV_TYPE_THRESH, 810 IIO_EV_DIR_RISING), 811 iio_get_time_ns(iio)); 812 if (ret & OPT3001_CONFIGURATION_FL) 813 iio_push_event(iio, 814 IIO_UNMOD_EVENT_CODE(chan_type, 0, 815 IIO_EV_TYPE_THRESH, 816 IIO_EV_DIR_FALLING), 817 iio_get_time_ns(iio)); 818 } else if (ret & OPT3001_CONFIGURATION_CRF) { 819 ret = i2c_smbus_read_word_swapped(opt->client, OPT3001_RESULT); 820 if (ret < 0) { 821 dev_err(opt->dev, "failed to read register %02x\n", 822 OPT3001_RESULT); 823 goto out; 824 } 825 opt->result = ret; 826 opt->result_ready = true; 827 wake_result_ready_queue = true; 828 } 829 830 out: 831 if (!ok_to_ignore_lock) 832 mutex_unlock(&opt->lock); 833 834 if (wake_result_ready_queue) 835 wake_up(&opt->result_ready_queue); 836 837 return IRQ_HANDLED; 838 } 839 840 static int opt3001_probe(struct i2c_client *client) 841 { 842 struct device *dev = &client->dev; 843 844 struct iio_dev *iio; 845 struct opt3001 *opt; 846 int irq = client->irq; 847 int ret; 848 849 iio = devm_iio_device_alloc(dev, sizeof(*opt)); 850 if (!iio) 851 return -ENOMEM; 852 853 opt = iio_priv(iio); 854 opt->client = client; 855 opt->dev = dev; 856 opt->chip_info = i2c_get_match_data(client); 857 858 mutex_init(&opt->lock); 859 init_waitqueue_head(&opt->result_ready_queue); 860 i2c_set_clientdata(client, iio); 861 862 if (opt->chip_info->has_id) { 863 ret = opt3001_read_id(opt); 864 if (ret) 865 return ret; 866 } 867 868 ret = opt3001_configure(opt); 869 if (ret) 870 return ret; 871 872 iio->name = client->name; 873 iio->channels = *opt->chip_info->channels; 874 iio->num_channels = opt->chip_info->num_channels; 875 iio->modes = INDIO_DIRECT_MODE; 876 iio->info = &opt3001_info; 877 878 ret = devm_iio_device_register(dev, iio); 879 if (ret) { 880 dev_err(dev, "failed to register IIO device\n"); 881 return ret; 882 } 883 884 /* Make use of INT pin only if valid IRQ no. is given */ 885 if (irq > 0) { 886 ret = request_threaded_irq(irq, NULL, opt3001_irq, 887 IRQF_TRIGGER_FALLING | IRQF_ONESHOT, 888 "opt3001", iio); 889 if (ret) { 890 dev_err(dev, "failed to request IRQ #%d\n", irq); 891 return ret; 892 } 893 opt->use_irq = true; 894 } else { 895 dev_dbg(opt->dev, "enabling interrupt-less operation\n"); 896 } 897 898 return 0; 899 } 900 901 static void opt3001_remove(struct i2c_client *client) 902 { 903 struct iio_dev *iio = i2c_get_clientdata(client); 904 struct opt3001 *opt = iio_priv(iio); 905 int ret; 906 u16 reg; 907 908 if (opt->use_irq) 909 free_irq(client->irq, iio); 910 911 ret = i2c_smbus_read_word_swapped(opt->client, OPT3001_CONFIGURATION); 912 if (ret < 0) { 913 dev_err(opt->dev, "failed to read register %02x\n", 914 OPT3001_CONFIGURATION); 915 return; 916 } 917 918 reg = ret; 919 opt3001_set_mode(opt, ®, OPT3001_CONFIGURATION_M_SHUTDOWN); 920 921 ret = i2c_smbus_write_word_swapped(opt->client, OPT3001_CONFIGURATION, 922 reg); 923 if (ret < 0) { 924 dev_err(opt->dev, "failed to write register %02x\n", 925 OPT3001_CONFIGURATION); 926 } 927 } 928 929 static const struct opt3001_chip_info opt3001_chip_information = { 930 .channels = &opt3001_channels, 931 .chan_type = IIO_LIGHT, 932 .num_channels = ARRAY_SIZE(opt3001_channels), 933 .scales = &opt3001_scales, 934 .factor_whole = 10, 935 .factor_integer = 1000, 936 .factor_decimal = 1000, 937 .has_id = true, 938 }; 939 940 static const struct opt3001_chip_info opt3002_chip_information = { 941 .channels = &opt3002_channels, 942 .chan_type = IIO_INTENSITY, 943 .num_channels = ARRAY_SIZE(opt3002_channels), 944 .scales = &opt3002_scales, 945 .factor_whole = 12, 946 .factor_integer = 10, 947 .factor_decimal = 100000, 948 .has_id = false, 949 }; 950 951 static const struct i2c_device_id opt3001_id[] = { 952 { .name = "opt3001", .driver_data = (kernel_ulong_t)&opt3001_chip_information }, 953 { .name = "opt3002", .driver_data = (kernel_ulong_t)&opt3002_chip_information }, 954 { } /* Terminating Entry */ 955 }; 956 MODULE_DEVICE_TABLE(i2c, opt3001_id); 957 958 static const struct of_device_id opt3001_of_match[] = { 959 { .compatible = "ti,opt3001", .data = &opt3001_chip_information }, 960 { .compatible = "ti,opt3002", .data = &opt3002_chip_information }, 961 { } 962 }; 963 MODULE_DEVICE_TABLE(of, opt3001_of_match); 964 965 static struct i2c_driver opt3001_driver = { 966 .probe = opt3001_probe, 967 .remove = opt3001_remove, 968 .id_table = opt3001_id, 969 970 .driver = { 971 .name = "opt3001", 972 .of_match_table = opt3001_of_match, 973 }, 974 }; 975 976 module_i2c_driver(opt3001_driver); 977 978 MODULE_LICENSE("GPL v2"); 979 MODULE_AUTHOR("Andreas Dannenberg <dannenberg@ti.com>"); 980 MODULE_DESCRIPTION("Texas Instruments OPT3001 Light Sensor Driver"); 981