1 // SPDX-License-Identifier: GPL-2.0-only 2 /* 3 * Support for Lite-On LTR501 and similar ambient light and proximity sensors. 4 * 5 * Copyright 2014 Peter Meerwald <pmeerw@pmeerw.net> 6 * 7 * 7-bit I2C slave address 0x23 8 * 9 * TODO: IR LED characteristics 10 */ 11 12 #include <linux/module.h> 13 #include <linux/mod_devicetable.h> 14 #include <linux/i2c.h> 15 #include <linux/err.h> 16 #include <linux/delay.h> 17 #include <linux/regmap.h> 18 #include <linux/regulator/consumer.h> 19 20 #include <linux/iio/iio.h> 21 #include <linux/iio/events.h> 22 #include <linux/iio/sysfs.h> 23 #include <linux/iio/trigger_consumer.h> 24 #include <linux/iio/buffer.h> 25 #include <linux/iio/triggered_buffer.h> 26 27 #define LTR501_DRV_NAME "ltr501" 28 29 #define LTR501_ALS_CONTR 0x80 /* ALS operation mode, SW reset */ 30 #define LTR501_PS_CONTR 0x81 /* PS operation mode */ 31 #define LTR501_PS_MEAS_RATE 0x84 /* measurement rate*/ 32 #define LTR501_ALS_MEAS_RATE 0x85 /* ALS integ time, measurement rate*/ 33 #define LTR501_PART_ID 0x86 34 #define LTR501_MANUFAC_ID 0x87 35 #define LTR501_ALS_DATA1 0x88 /* 16-bit, little endian */ 36 #define LTR501_ALS_DATA1_UPPER 0x89 /* upper 8 bits of LTR501_ALS_DATA1 */ 37 #define LTR501_ALS_DATA0 0x8a /* 16-bit, little endian */ 38 #define LTR501_ALS_DATA0_UPPER 0x8b /* upper 8 bits of LTR501_ALS_DATA0 */ 39 #define LTR501_ALS_PS_STATUS 0x8c 40 #define LTR501_PS_DATA 0x8d /* 16-bit, little endian */ 41 #define LTR501_PS_DATA_UPPER 0x8e /* upper 8 bits of LTR501_PS_DATA */ 42 #define LTR501_INTR 0x8f /* output mode, polarity, mode */ 43 #define LTR501_PS_THRESH_UP 0x90 /* 11 bit, ps upper threshold */ 44 #define LTR501_PS_THRESH_LOW 0x92 /* 11 bit, ps lower threshold */ 45 #define LTR501_ALS_THRESH_UP 0x97 /* 16 bit, ALS upper threshold */ 46 #define LTR501_ALS_THRESH_LOW 0x99 /* 16 bit, ALS lower threshold */ 47 #define LTR501_INTR_PRST 0x9e /* ps thresh, als thresh */ 48 #define LTR501_MAX_REG 0x9f 49 50 #define LTR501_ALS_CONTR_SW_RESET BIT(2) 51 #define LTR501_CONTR_PS_GAIN_MASK (BIT(3) | BIT(2)) 52 #define LTR501_CONTR_PS_GAIN_SHIFT 2 53 #define LTR501_CONTR_ALS_GAIN_MASK BIT(3) 54 #define LTR501_CONTR_ACTIVE BIT(1) 55 56 #define LTR501_STATUS_ALS_INTR BIT(3) 57 #define LTR501_STATUS_ALS_RDY BIT(2) 58 #define LTR501_STATUS_PS_INTR BIT(1) 59 #define LTR501_STATUS_PS_RDY BIT(0) 60 61 #define LTR501_PS_DATA_MASK 0x7ff 62 #define LTR501_PS_THRESH_MASK 0x7ff 63 #define LTR501_ALS_THRESH_MASK 0xffff 64 65 #define LTR501_ALS_DEF_PERIOD 500000 66 #define LTR501_PS_DEF_PERIOD 100000 67 68 #define LTR501_REGMAP_NAME "ltr501_regmap" 69 70 #define LTR501_LUX_CONV(vis_coeff, vis_data, ir_coeff, ir_data) \ 71 ((vis_coeff * vis_data) - (ir_coeff * ir_data)) 72 73 static const int int_time_mapping[] = {100000, 50000, 200000, 400000}; 74 75 static const struct reg_field reg_field_it = 76 REG_FIELD(LTR501_ALS_MEAS_RATE, 3, 4); 77 static const struct reg_field reg_field_als_intr = 78 REG_FIELD(LTR501_INTR, 1, 1); 79 static const struct reg_field reg_field_ps_intr = 80 REG_FIELD(LTR501_INTR, 0, 0); 81 static const struct reg_field reg_field_als_rate = 82 REG_FIELD(LTR501_ALS_MEAS_RATE, 0, 2); 83 static const struct reg_field reg_field_ps_rate = 84 REG_FIELD(LTR501_PS_MEAS_RATE, 0, 3); 85 static const struct reg_field reg_field_als_prst = 86 REG_FIELD(LTR501_INTR_PRST, 0, 3); 87 static const struct reg_field reg_field_ps_prst = 88 REG_FIELD(LTR501_INTR_PRST, 4, 7); 89 90 struct ltr501_samp_table { 91 int freq_val; /* repetition frequency in micro HZ*/ 92 int time_val; /* repetition rate in micro seconds */ 93 }; 94 95 #define LTR501_RESERVED_GAIN -1 96 97 enum { 98 ltr501 = 0, 99 ltr559, 100 ltr301, 101 ltr303, 102 }; 103 104 struct ltr501_gain { 105 int scale; 106 int uscale; 107 }; 108 109 static const struct ltr501_gain ltr501_als_gain_tbl[] = { 110 {1, 0}, 111 {0, 5000}, 112 }; 113 114 static const struct ltr501_gain ltr559_als_gain_tbl[] = { 115 {1, 0}, 116 {0, 500000}, 117 {0, 250000}, 118 {0, 125000}, 119 {LTR501_RESERVED_GAIN, LTR501_RESERVED_GAIN}, 120 {LTR501_RESERVED_GAIN, LTR501_RESERVED_GAIN}, 121 {0, 20000}, 122 {0, 10000}, 123 }; 124 125 static const struct ltr501_gain ltr501_ps_gain_tbl[] = { 126 {1, 0}, 127 {0, 250000}, 128 {0, 125000}, 129 {0, 62500}, 130 }; 131 132 static const struct ltr501_gain ltr559_ps_gain_tbl[] = { 133 {0, 62500}, /* x16 gain */ 134 {0, 31250}, /* x32 gain */ 135 {0, 15625}, /* bits X1 are for x64 gain */ 136 {0, 15624}, 137 }; 138 139 struct ltr501_chip_info { 140 u8 partid; 141 const struct ltr501_gain *als_gain; 142 int als_gain_tbl_size; 143 const struct ltr501_gain *ps_gain; 144 int ps_gain_tbl_size; 145 u8 als_mode_active; 146 u8 als_gain_mask; 147 u8 als_gain_shift; 148 struct iio_chan_spec const *channels; 149 const int no_channels; 150 const struct iio_info *info; 151 const struct iio_info *info_no_irq; 152 }; 153 154 struct ltr501_data { 155 struct i2c_client *client; 156 struct mutex lock_als, lock_ps; 157 const struct ltr501_chip_info *chip_info; 158 u8 als_contr, ps_contr; 159 int als_period, ps_period; /* period in micro seconds */ 160 struct regmap *regmap; 161 struct regmap_field *reg_it; 162 struct regmap_field *reg_als_intr; 163 struct regmap_field *reg_ps_intr; 164 struct regmap_field *reg_als_rate; 165 struct regmap_field *reg_ps_rate; 166 struct regmap_field *reg_als_prst; 167 struct regmap_field *reg_ps_prst; 168 uint32_t near_level; 169 }; 170 171 static const struct ltr501_samp_table ltr501_als_samp_table[] = { 172 {20000000, 50000}, {10000000, 100000}, 173 {5000000, 200000}, {2000000, 500000}, 174 {1000000, 1000000}, {500000, 2000000}, 175 {500000, 2000000}, {500000, 2000000} 176 }; 177 178 static const struct ltr501_samp_table ltr501_ps_samp_table[] = { 179 {20000000, 50000}, {14285714, 70000}, 180 {10000000, 100000}, {5000000, 200000}, 181 {2000000, 500000}, {1000000, 1000000}, 182 {500000, 2000000}, {500000, 2000000}, 183 {500000, 2000000} 184 }; 185 186 static int ltr501_match_samp_freq(const struct ltr501_samp_table *tab, 187 int len, int val, int val2) 188 { 189 int i, freq; 190 191 freq = val * 1000000 + val2; 192 193 for (i = 0; i < len; i++) { 194 if (tab[i].freq_val == freq) 195 return i; 196 } 197 198 return -EINVAL; 199 } 200 201 static int ltr501_als_read_samp_freq(const struct ltr501_data *data, 202 int *val, int *val2) 203 { 204 int ret, i; 205 206 ret = regmap_field_read(data->reg_als_rate, &i); 207 if (ret < 0) 208 return ret; 209 210 if (i < 0 || i >= ARRAY_SIZE(ltr501_als_samp_table)) 211 return -EINVAL; 212 213 *val = ltr501_als_samp_table[i].freq_val / 1000000; 214 *val2 = ltr501_als_samp_table[i].freq_val % 1000000; 215 216 return IIO_VAL_INT_PLUS_MICRO; 217 } 218 219 static int ltr501_ps_read_samp_freq(const struct ltr501_data *data, 220 int *val, int *val2) 221 { 222 int ret, i; 223 224 ret = regmap_field_read(data->reg_ps_rate, &i); 225 if (ret < 0) 226 return ret; 227 228 if (i < 0 || i >= ARRAY_SIZE(ltr501_ps_samp_table)) 229 return -EINVAL; 230 231 *val = ltr501_ps_samp_table[i].freq_val / 1000000; 232 *val2 = ltr501_ps_samp_table[i].freq_val % 1000000; 233 234 return IIO_VAL_INT_PLUS_MICRO; 235 } 236 237 static int ltr501_als_write_samp_freq(struct ltr501_data *data, 238 int val, int val2) 239 { 240 int i, ret; 241 242 i = ltr501_match_samp_freq(ltr501_als_samp_table, 243 ARRAY_SIZE(ltr501_als_samp_table), 244 val, val2); 245 246 if (i < 0) 247 return i; 248 249 mutex_lock(&data->lock_als); 250 ret = regmap_field_write(data->reg_als_rate, i); 251 mutex_unlock(&data->lock_als); 252 253 return ret; 254 } 255 256 static int ltr501_ps_write_samp_freq(struct ltr501_data *data, 257 int val, int val2) 258 { 259 int i, ret; 260 261 i = ltr501_match_samp_freq(ltr501_ps_samp_table, 262 ARRAY_SIZE(ltr501_ps_samp_table), 263 val, val2); 264 265 if (i < 0) 266 return i; 267 268 mutex_lock(&data->lock_ps); 269 ret = regmap_field_write(data->reg_ps_rate, i); 270 mutex_unlock(&data->lock_ps); 271 272 return ret; 273 } 274 275 static int ltr501_als_read_samp_period(const struct ltr501_data *data, int *val) 276 { 277 int ret, i; 278 279 ret = regmap_field_read(data->reg_als_rate, &i); 280 if (ret < 0) 281 return ret; 282 283 if (i < 0 || i >= ARRAY_SIZE(ltr501_als_samp_table)) 284 return -EINVAL; 285 286 *val = ltr501_als_samp_table[i].time_val; 287 288 return IIO_VAL_INT; 289 } 290 291 static int ltr501_ps_read_samp_period(const struct ltr501_data *data, int *val) 292 { 293 int ret, i; 294 295 ret = regmap_field_read(data->reg_ps_rate, &i); 296 if (ret < 0) 297 return ret; 298 299 if (i < 0 || i >= ARRAY_SIZE(ltr501_ps_samp_table)) 300 return -EINVAL; 301 302 *val = ltr501_ps_samp_table[i].time_val; 303 304 return IIO_VAL_INT; 305 } 306 307 /* IR and visible spectrum coeff's are given in data sheet */ 308 static unsigned long ltr501_calculate_lux(u16 vis_data, u16 ir_data) 309 { 310 unsigned long ratio, lux; 311 312 if (vis_data == 0) 313 return 0; 314 315 /* multiply numerator by 100 to avoid handling ratio < 1 */ 316 ratio = DIV_ROUND_UP(ir_data * 100, ir_data + vis_data); 317 318 if (ratio < 45) 319 lux = LTR501_LUX_CONV(1774, vis_data, -1105, ir_data); 320 else if (ratio >= 45 && ratio < 64) 321 lux = LTR501_LUX_CONV(3772, vis_data, 1336, ir_data); 322 else if (ratio >= 64 && ratio < 85) 323 lux = LTR501_LUX_CONV(1690, vis_data, 169, ir_data); 324 else 325 lux = 0; 326 327 return lux / 1000; 328 } 329 330 static int ltr501_drdy(const struct ltr501_data *data, u8 drdy_mask) 331 { 332 int tries = 100; 333 int ret, status; 334 335 while (tries--) { 336 ret = regmap_read(data->regmap, LTR501_ALS_PS_STATUS, &status); 337 if (ret < 0) 338 return ret; 339 if ((status & drdy_mask) == drdy_mask) 340 return 0; 341 msleep(25); 342 } 343 344 dev_err(&data->client->dev, "ltr501_drdy() failed, data not ready\n"); 345 return -EIO; 346 } 347 348 static int ltr501_set_it_time(struct ltr501_data *data, int it) 349 { 350 int ret, i, index = -1, status; 351 352 for (i = 0; i < ARRAY_SIZE(int_time_mapping); i++) { 353 if (int_time_mapping[i] == it) { 354 index = i; 355 break; 356 } 357 } 358 /* Make sure integ time index is valid */ 359 if (index < 0) 360 return -EINVAL; 361 362 ret = regmap_read(data->regmap, LTR501_ALS_CONTR, &status); 363 if (ret < 0) 364 return ret; 365 366 if (status & LTR501_CONTR_ALS_GAIN_MASK) { 367 /* 368 * 200 ms and 400 ms integ time can only be 369 * used in dynamic range 1 370 */ 371 if (index > 1) 372 return -EINVAL; 373 } else 374 /* 50 ms integ time can only be used in dynamic range 2 */ 375 if (index == 1) 376 return -EINVAL; 377 378 return regmap_field_write(data->reg_it, index); 379 } 380 381 /* read int time in micro seconds */ 382 static int ltr501_read_it_time(const struct ltr501_data *data, 383 int *val, int *val2) 384 { 385 int ret, index; 386 387 ret = regmap_field_read(data->reg_it, &index); 388 if (ret < 0) 389 return ret; 390 391 /* Make sure integ time index is valid */ 392 if (index < 0 || index >= ARRAY_SIZE(int_time_mapping)) 393 return -EINVAL; 394 395 *val2 = int_time_mapping[index]; 396 *val = 0; 397 398 return IIO_VAL_INT_PLUS_MICRO; 399 } 400 401 static int ltr501_read_als(const struct ltr501_data *data, __le16 buf[2]) 402 { 403 int ret; 404 405 ret = ltr501_drdy(data, LTR501_STATUS_ALS_RDY); 406 if (ret < 0) 407 return ret; 408 /* always read both ALS channels in given order */ 409 return regmap_bulk_read(data->regmap, LTR501_ALS_DATA1, 410 buf, 2 * sizeof(__le16)); 411 } 412 413 static int ltr501_read_ps(const struct ltr501_data *data) 414 { 415 __le16 status; 416 int ret; 417 418 ret = ltr501_drdy(data, LTR501_STATUS_PS_RDY); 419 if (ret < 0) 420 return ret; 421 422 ret = regmap_bulk_read(data->regmap, LTR501_PS_DATA, 423 &status, sizeof(status)); 424 if (ret < 0) 425 return ret; 426 427 return le16_to_cpu(status); 428 } 429 430 static int ltr501_read_intr_prst(const struct ltr501_data *data, 431 enum iio_chan_type type, 432 int *val2) 433 { 434 int ret, samp_period, prst; 435 436 switch (type) { 437 case IIO_INTENSITY: 438 ret = regmap_field_read(data->reg_als_prst, &prst); 439 if (ret < 0) 440 return ret; 441 442 ret = ltr501_als_read_samp_period(data, &samp_period); 443 444 if (ret < 0) 445 return ret; 446 *val2 = samp_period * prst; 447 return IIO_VAL_INT_PLUS_MICRO; 448 case IIO_PROXIMITY: 449 ret = regmap_field_read(data->reg_ps_prst, &prst); 450 if (ret < 0) 451 return ret; 452 453 ret = ltr501_ps_read_samp_period(data, &samp_period); 454 455 if (ret < 0) 456 return ret; 457 458 *val2 = samp_period * prst; 459 return IIO_VAL_INT_PLUS_MICRO; 460 default: 461 return -EINVAL; 462 } 463 464 return -EINVAL; 465 } 466 467 static int ltr501_write_intr_prst(struct ltr501_data *data, 468 enum iio_chan_type type, 469 int val, int val2) 470 { 471 int ret, samp_period, new_val; 472 unsigned long period; 473 474 if (val < 0 || val2 < 0) 475 return -EINVAL; 476 477 /* period in microseconds */ 478 period = ((val * 1000000) + val2); 479 480 switch (type) { 481 case IIO_INTENSITY: 482 ret = ltr501_als_read_samp_period(data, &samp_period); 483 if (ret < 0) 484 return ret; 485 486 /* period should be atleast equal to sampling period */ 487 if (period < samp_period) 488 return -EINVAL; 489 490 new_val = DIV_ROUND_UP(period, samp_period); 491 if (new_val < 0 || new_val > 0x0f) 492 return -EINVAL; 493 494 mutex_lock(&data->lock_als); 495 ret = regmap_field_write(data->reg_als_prst, new_val); 496 mutex_unlock(&data->lock_als); 497 if (ret >= 0) 498 data->als_period = period; 499 500 return ret; 501 case IIO_PROXIMITY: 502 ret = ltr501_ps_read_samp_period(data, &samp_period); 503 if (ret < 0) 504 return ret; 505 506 /* period should be atleast equal to rate */ 507 if (period < samp_period) 508 return -EINVAL; 509 510 new_val = DIV_ROUND_UP(period, samp_period); 511 if (new_val < 0 || new_val > 0x0f) 512 return -EINVAL; 513 514 mutex_lock(&data->lock_ps); 515 ret = regmap_field_write(data->reg_ps_prst, new_val); 516 mutex_unlock(&data->lock_ps); 517 if (ret >= 0) 518 data->ps_period = period; 519 520 return ret; 521 default: 522 return -EINVAL; 523 } 524 525 return -EINVAL; 526 } 527 528 static ssize_t ltr501_read_near_level(struct iio_dev *indio_dev, 529 uintptr_t priv, 530 const struct iio_chan_spec *chan, 531 char *buf) 532 { 533 struct ltr501_data *data = iio_priv(indio_dev); 534 535 return sprintf(buf, "%u\n", data->near_level); 536 } 537 538 static const struct iio_chan_spec_ext_info ltr501_ext_info[] = { 539 { 540 .name = "nearlevel", 541 .shared = IIO_SEPARATE, 542 .read = ltr501_read_near_level, 543 }, 544 { /* sentinel */ } 545 }; 546 547 static const struct iio_event_spec ltr501_als_event_spec[] = { 548 { 549 .type = IIO_EV_TYPE_THRESH, 550 .dir = IIO_EV_DIR_RISING, 551 .mask_separate = BIT(IIO_EV_INFO_VALUE), 552 }, { 553 .type = IIO_EV_TYPE_THRESH, 554 .dir = IIO_EV_DIR_FALLING, 555 .mask_separate = BIT(IIO_EV_INFO_VALUE), 556 }, { 557 .type = IIO_EV_TYPE_THRESH, 558 .dir = IIO_EV_DIR_EITHER, 559 .mask_separate = BIT(IIO_EV_INFO_ENABLE) | 560 BIT(IIO_EV_INFO_PERIOD), 561 }, 562 563 }; 564 565 static const struct iio_event_spec ltr501_pxs_event_spec[] = { 566 { 567 .type = IIO_EV_TYPE_THRESH, 568 .dir = IIO_EV_DIR_RISING, 569 .mask_separate = BIT(IIO_EV_INFO_VALUE), 570 }, { 571 .type = IIO_EV_TYPE_THRESH, 572 .dir = IIO_EV_DIR_FALLING, 573 .mask_separate = BIT(IIO_EV_INFO_VALUE), 574 }, { 575 .type = IIO_EV_TYPE_THRESH, 576 .dir = IIO_EV_DIR_EITHER, 577 .mask_separate = BIT(IIO_EV_INFO_ENABLE) | 578 BIT(IIO_EV_INFO_PERIOD), 579 }, 580 }; 581 582 #define LTR501_INTENSITY_CHANNEL(_idx, _addr, _mod, _shared, \ 583 _evspec, _evsize) { \ 584 .type = IIO_INTENSITY, \ 585 .modified = 1, \ 586 .address = (_addr), \ 587 .channel2 = (_mod), \ 588 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \ 589 .info_mask_shared_by_type = (_shared), \ 590 .scan_index = (_idx), \ 591 .scan_type = { \ 592 .sign = 'u', \ 593 .realbits = 16, \ 594 .storagebits = 16, \ 595 .endianness = IIO_CPU, \ 596 }, \ 597 .event_spec = _evspec,\ 598 .num_event_specs = _evsize,\ 599 } 600 601 #define LTR501_LIGHT_CHANNEL() { \ 602 .type = IIO_LIGHT, \ 603 .info_mask_separate = BIT(IIO_CHAN_INFO_PROCESSED), \ 604 .scan_index = -1, \ 605 } 606 607 static const struct iio_chan_spec ltr501_channels[] = { 608 LTR501_LIGHT_CHANNEL(), 609 LTR501_INTENSITY_CHANNEL(0, LTR501_ALS_DATA0, IIO_MOD_LIGHT_BOTH, 0, 610 ltr501_als_event_spec, 611 ARRAY_SIZE(ltr501_als_event_spec)), 612 LTR501_INTENSITY_CHANNEL(1, LTR501_ALS_DATA1, IIO_MOD_LIGHT_IR, 613 BIT(IIO_CHAN_INFO_SCALE) | 614 BIT(IIO_CHAN_INFO_INT_TIME) | 615 BIT(IIO_CHAN_INFO_SAMP_FREQ), 616 NULL, 0), 617 { 618 .type = IIO_PROXIMITY, 619 .address = LTR501_PS_DATA, 620 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | 621 BIT(IIO_CHAN_INFO_SCALE), 622 .scan_index = 2, 623 .scan_type = { 624 .sign = 'u', 625 .realbits = 11, 626 .storagebits = 16, 627 .endianness = IIO_CPU, 628 }, 629 .event_spec = ltr501_pxs_event_spec, 630 .num_event_specs = ARRAY_SIZE(ltr501_pxs_event_spec), 631 .ext_info = ltr501_ext_info, 632 }, 633 IIO_CHAN_SOFT_TIMESTAMP(3), 634 }; 635 636 static const struct iio_chan_spec ltr301_channels[] = { 637 LTR501_LIGHT_CHANNEL(), 638 LTR501_INTENSITY_CHANNEL(0, LTR501_ALS_DATA0, IIO_MOD_LIGHT_BOTH, 0, 639 ltr501_als_event_spec, 640 ARRAY_SIZE(ltr501_als_event_spec)), 641 LTR501_INTENSITY_CHANNEL(1, LTR501_ALS_DATA1, IIO_MOD_LIGHT_IR, 642 BIT(IIO_CHAN_INFO_SCALE) | 643 BIT(IIO_CHAN_INFO_INT_TIME) | 644 BIT(IIO_CHAN_INFO_SAMP_FREQ), 645 NULL, 0), 646 IIO_CHAN_SOFT_TIMESTAMP(2), 647 }; 648 649 static int ltr501_read_raw(struct iio_dev *indio_dev, 650 struct iio_chan_spec const *chan, 651 int *val, int *val2, long mask) 652 { 653 struct ltr501_data *data = iio_priv(indio_dev); 654 __le16 buf[2]; 655 int ret, i; 656 657 switch (mask) { 658 case IIO_CHAN_INFO_PROCESSED: 659 switch (chan->type) { 660 case IIO_LIGHT: 661 ret = iio_device_claim_direct_mode(indio_dev); 662 if (ret) 663 return ret; 664 665 mutex_lock(&data->lock_als); 666 ret = ltr501_read_als(data, buf); 667 mutex_unlock(&data->lock_als); 668 iio_device_release_direct_mode(indio_dev); 669 if (ret < 0) 670 return ret; 671 *val = ltr501_calculate_lux(le16_to_cpu(buf[1]), 672 le16_to_cpu(buf[0])); 673 return IIO_VAL_INT; 674 default: 675 return -EINVAL; 676 } 677 case IIO_CHAN_INFO_RAW: 678 ret = iio_device_claim_direct_mode(indio_dev); 679 if (ret) 680 return ret; 681 682 switch (chan->type) { 683 case IIO_INTENSITY: 684 mutex_lock(&data->lock_als); 685 ret = ltr501_read_als(data, buf); 686 mutex_unlock(&data->lock_als); 687 if (ret < 0) 688 break; 689 *val = le16_to_cpu(chan->address == LTR501_ALS_DATA1 ? 690 buf[0] : buf[1]); 691 ret = IIO_VAL_INT; 692 break; 693 case IIO_PROXIMITY: 694 mutex_lock(&data->lock_ps); 695 ret = ltr501_read_ps(data); 696 mutex_unlock(&data->lock_ps); 697 if (ret < 0) 698 break; 699 *val = ret & LTR501_PS_DATA_MASK; 700 ret = IIO_VAL_INT; 701 break; 702 default: 703 ret = -EINVAL; 704 break; 705 } 706 707 iio_device_release_direct_mode(indio_dev); 708 return ret; 709 710 case IIO_CHAN_INFO_SCALE: 711 switch (chan->type) { 712 case IIO_INTENSITY: 713 i = (data->als_contr & data->chip_info->als_gain_mask) 714 >> data->chip_info->als_gain_shift; 715 *val = data->chip_info->als_gain[i].scale; 716 *val2 = data->chip_info->als_gain[i].uscale; 717 return IIO_VAL_INT_PLUS_MICRO; 718 case IIO_PROXIMITY: 719 i = (data->ps_contr & LTR501_CONTR_PS_GAIN_MASK) >> 720 LTR501_CONTR_PS_GAIN_SHIFT; 721 *val = data->chip_info->ps_gain[i].scale; 722 *val2 = data->chip_info->ps_gain[i].uscale; 723 return IIO_VAL_INT_PLUS_MICRO; 724 default: 725 return -EINVAL; 726 } 727 case IIO_CHAN_INFO_INT_TIME: 728 switch (chan->type) { 729 case IIO_INTENSITY: 730 return ltr501_read_it_time(data, val, val2); 731 default: 732 return -EINVAL; 733 } 734 case IIO_CHAN_INFO_SAMP_FREQ: 735 switch (chan->type) { 736 case IIO_INTENSITY: 737 return ltr501_als_read_samp_freq(data, val, val2); 738 case IIO_PROXIMITY: 739 return ltr501_ps_read_samp_freq(data, val, val2); 740 default: 741 return -EINVAL; 742 } 743 } 744 return -EINVAL; 745 } 746 747 static int ltr501_get_gain_index(const struct ltr501_gain *gain, int size, 748 int val, int val2) 749 { 750 int i; 751 752 for (i = 0; i < size; i++) 753 if (val == gain[i].scale && val2 == gain[i].uscale) 754 return i; 755 756 return -1; 757 } 758 759 static int ltr501_write_raw(struct iio_dev *indio_dev, 760 struct iio_chan_spec const *chan, 761 int val, int val2, long mask) 762 { 763 struct ltr501_data *data = iio_priv(indio_dev); 764 int i, ret, freq_val, freq_val2; 765 const struct ltr501_chip_info *info = data->chip_info; 766 767 ret = iio_device_claim_direct_mode(indio_dev); 768 if (ret) 769 return ret; 770 771 switch (mask) { 772 case IIO_CHAN_INFO_SCALE: 773 switch (chan->type) { 774 case IIO_INTENSITY: 775 i = ltr501_get_gain_index(info->als_gain, 776 info->als_gain_tbl_size, 777 val, val2); 778 if (i < 0) { 779 ret = -EINVAL; 780 break; 781 } 782 783 data->als_contr &= ~info->als_gain_mask; 784 data->als_contr |= i << info->als_gain_shift; 785 786 ret = regmap_write(data->regmap, LTR501_ALS_CONTR, 787 data->als_contr); 788 break; 789 case IIO_PROXIMITY: 790 i = ltr501_get_gain_index(info->ps_gain, 791 info->ps_gain_tbl_size, 792 val, val2); 793 if (i < 0) { 794 ret = -EINVAL; 795 break; 796 } 797 data->ps_contr &= ~LTR501_CONTR_PS_GAIN_MASK; 798 data->ps_contr |= i << LTR501_CONTR_PS_GAIN_SHIFT; 799 800 ret = regmap_write(data->regmap, LTR501_PS_CONTR, 801 data->ps_contr); 802 break; 803 default: 804 ret = -EINVAL; 805 break; 806 } 807 break; 808 809 case IIO_CHAN_INFO_INT_TIME: 810 switch (chan->type) { 811 case IIO_INTENSITY: 812 if (val != 0) { 813 ret = -EINVAL; 814 break; 815 } 816 mutex_lock(&data->lock_als); 817 ret = ltr501_set_it_time(data, val2); 818 mutex_unlock(&data->lock_als); 819 break; 820 default: 821 ret = -EINVAL; 822 break; 823 } 824 break; 825 826 case IIO_CHAN_INFO_SAMP_FREQ: 827 switch (chan->type) { 828 case IIO_INTENSITY: 829 ret = ltr501_als_read_samp_freq(data, &freq_val, 830 &freq_val2); 831 if (ret < 0) 832 break; 833 834 ret = ltr501_als_write_samp_freq(data, val, val2); 835 if (ret < 0) 836 break; 837 838 /* update persistence count when changing frequency */ 839 ret = ltr501_write_intr_prst(data, chan->type, 840 0, data->als_period); 841 842 if (ret < 0) 843 ret = ltr501_als_write_samp_freq(data, freq_val, 844 freq_val2); 845 break; 846 case IIO_PROXIMITY: 847 ret = ltr501_ps_read_samp_freq(data, &freq_val, 848 &freq_val2); 849 if (ret < 0) 850 break; 851 852 ret = ltr501_ps_write_samp_freq(data, val, val2); 853 if (ret < 0) 854 break; 855 856 /* update persistence count when changing frequency */ 857 ret = ltr501_write_intr_prst(data, chan->type, 858 0, data->ps_period); 859 860 if (ret < 0) 861 ret = ltr501_ps_write_samp_freq(data, freq_val, 862 freq_val2); 863 break; 864 default: 865 ret = -EINVAL; 866 break; 867 } 868 break; 869 870 default: 871 ret = -EINVAL; 872 break; 873 } 874 875 iio_device_release_direct_mode(indio_dev); 876 return ret; 877 } 878 879 static int ltr501_read_thresh(const struct iio_dev *indio_dev, 880 const struct iio_chan_spec *chan, 881 enum iio_event_type type, 882 enum iio_event_direction dir, 883 enum iio_event_info info, 884 int *val, int *val2) 885 { 886 const struct ltr501_data *data = iio_priv(indio_dev); 887 int ret, thresh_data; 888 889 switch (chan->type) { 890 case IIO_INTENSITY: 891 switch (dir) { 892 case IIO_EV_DIR_RISING: 893 ret = regmap_bulk_read(data->regmap, 894 LTR501_ALS_THRESH_UP, 895 &thresh_data, 2); 896 if (ret < 0) 897 return ret; 898 *val = thresh_data & LTR501_ALS_THRESH_MASK; 899 return IIO_VAL_INT; 900 case IIO_EV_DIR_FALLING: 901 ret = regmap_bulk_read(data->regmap, 902 LTR501_ALS_THRESH_LOW, 903 &thresh_data, 2); 904 if (ret < 0) 905 return ret; 906 *val = thresh_data & LTR501_ALS_THRESH_MASK; 907 return IIO_VAL_INT; 908 default: 909 return -EINVAL; 910 } 911 case IIO_PROXIMITY: 912 switch (dir) { 913 case IIO_EV_DIR_RISING: 914 ret = regmap_bulk_read(data->regmap, 915 LTR501_PS_THRESH_UP, 916 &thresh_data, 2); 917 if (ret < 0) 918 return ret; 919 *val = thresh_data & LTR501_PS_THRESH_MASK; 920 return IIO_VAL_INT; 921 case IIO_EV_DIR_FALLING: 922 ret = regmap_bulk_read(data->regmap, 923 LTR501_PS_THRESH_LOW, 924 &thresh_data, 2); 925 if (ret < 0) 926 return ret; 927 *val = thresh_data & LTR501_PS_THRESH_MASK; 928 return IIO_VAL_INT; 929 default: 930 return -EINVAL; 931 } 932 default: 933 return -EINVAL; 934 } 935 936 return -EINVAL; 937 } 938 939 static int ltr501_write_thresh(struct iio_dev *indio_dev, 940 const struct iio_chan_spec *chan, 941 enum iio_event_type type, 942 enum iio_event_direction dir, 943 enum iio_event_info info, 944 int val, int val2) 945 { 946 struct ltr501_data *data = iio_priv(indio_dev); 947 int ret; 948 949 if (val < 0) 950 return -EINVAL; 951 952 switch (chan->type) { 953 case IIO_INTENSITY: 954 if (val > LTR501_ALS_THRESH_MASK) 955 return -EINVAL; 956 switch (dir) { 957 case IIO_EV_DIR_RISING: 958 mutex_lock(&data->lock_als); 959 ret = regmap_bulk_write(data->regmap, 960 LTR501_ALS_THRESH_UP, 961 &val, 2); 962 mutex_unlock(&data->lock_als); 963 return ret; 964 case IIO_EV_DIR_FALLING: 965 mutex_lock(&data->lock_als); 966 ret = regmap_bulk_write(data->regmap, 967 LTR501_ALS_THRESH_LOW, 968 &val, 2); 969 mutex_unlock(&data->lock_als); 970 return ret; 971 default: 972 return -EINVAL; 973 } 974 case IIO_PROXIMITY: 975 if (val > LTR501_PS_THRESH_MASK) 976 return -EINVAL; 977 switch (dir) { 978 case IIO_EV_DIR_RISING: 979 mutex_lock(&data->lock_ps); 980 ret = regmap_bulk_write(data->regmap, 981 LTR501_PS_THRESH_UP, 982 &val, 2); 983 mutex_unlock(&data->lock_ps); 984 return ret; 985 case IIO_EV_DIR_FALLING: 986 mutex_lock(&data->lock_ps); 987 ret = regmap_bulk_write(data->regmap, 988 LTR501_PS_THRESH_LOW, 989 &val, 2); 990 mutex_unlock(&data->lock_ps); 991 return ret; 992 default: 993 return -EINVAL; 994 } 995 default: 996 return -EINVAL; 997 } 998 999 return -EINVAL; 1000 } 1001 1002 static int ltr501_read_event(struct iio_dev *indio_dev, 1003 const struct iio_chan_spec *chan, 1004 enum iio_event_type type, 1005 enum iio_event_direction dir, 1006 enum iio_event_info info, 1007 int *val, int *val2) 1008 { 1009 int ret; 1010 1011 switch (info) { 1012 case IIO_EV_INFO_VALUE: 1013 return ltr501_read_thresh(indio_dev, chan, type, dir, 1014 info, val, val2); 1015 case IIO_EV_INFO_PERIOD: 1016 ret = ltr501_read_intr_prst(iio_priv(indio_dev), 1017 chan->type, val2); 1018 *val = *val2 / 1000000; 1019 *val2 = *val2 % 1000000; 1020 return ret; 1021 default: 1022 return -EINVAL; 1023 } 1024 1025 return -EINVAL; 1026 } 1027 1028 static int ltr501_write_event(struct iio_dev *indio_dev, 1029 const struct iio_chan_spec *chan, 1030 enum iio_event_type type, 1031 enum iio_event_direction dir, 1032 enum iio_event_info info, 1033 int val, int val2) 1034 { 1035 switch (info) { 1036 case IIO_EV_INFO_VALUE: 1037 if (val2 != 0) 1038 return -EINVAL; 1039 return ltr501_write_thresh(indio_dev, chan, type, dir, 1040 info, val, val2); 1041 case IIO_EV_INFO_PERIOD: 1042 return ltr501_write_intr_prst(iio_priv(indio_dev), chan->type, 1043 val, val2); 1044 default: 1045 return -EINVAL; 1046 } 1047 1048 return -EINVAL; 1049 } 1050 1051 static int ltr501_read_event_config(struct iio_dev *indio_dev, 1052 const struct iio_chan_spec *chan, 1053 enum iio_event_type type, 1054 enum iio_event_direction dir) 1055 { 1056 struct ltr501_data *data = iio_priv(indio_dev); 1057 int ret, status; 1058 1059 switch (chan->type) { 1060 case IIO_INTENSITY: 1061 ret = regmap_field_read(data->reg_als_intr, &status); 1062 if (ret < 0) 1063 return ret; 1064 return status; 1065 case IIO_PROXIMITY: 1066 ret = regmap_field_read(data->reg_ps_intr, &status); 1067 if (ret < 0) 1068 return ret; 1069 return status; 1070 default: 1071 return -EINVAL; 1072 } 1073 1074 return -EINVAL; 1075 } 1076 1077 static int ltr501_write_event_config(struct iio_dev *indio_dev, 1078 const struct iio_chan_spec *chan, 1079 enum iio_event_type type, 1080 enum iio_event_direction dir, bool state) 1081 { 1082 struct ltr501_data *data = iio_priv(indio_dev); 1083 int ret; 1084 1085 switch (chan->type) { 1086 case IIO_INTENSITY: 1087 mutex_lock(&data->lock_als); 1088 ret = regmap_field_write(data->reg_als_intr, state); 1089 mutex_unlock(&data->lock_als); 1090 return ret; 1091 case IIO_PROXIMITY: 1092 mutex_lock(&data->lock_ps); 1093 ret = regmap_field_write(data->reg_ps_intr, state); 1094 mutex_unlock(&data->lock_ps); 1095 return ret; 1096 default: 1097 return -EINVAL; 1098 } 1099 1100 return -EINVAL; 1101 } 1102 1103 static ssize_t ltr501_show_proximity_scale_avail(struct device *dev, 1104 struct device_attribute *attr, 1105 char *buf) 1106 { 1107 struct ltr501_data *data = iio_priv(dev_to_iio_dev(dev)); 1108 const struct ltr501_chip_info *info = data->chip_info; 1109 ssize_t len = 0; 1110 int i; 1111 1112 for (i = 0; i < info->ps_gain_tbl_size; i++) { 1113 if (info->ps_gain[i].scale == LTR501_RESERVED_GAIN) 1114 continue; 1115 len += scnprintf(buf + len, PAGE_SIZE - len, "%d.%06d ", 1116 info->ps_gain[i].scale, 1117 info->ps_gain[i].uscale); 1118 } 1119 1120 buf[len - 1] = '\n'; 1121 1122 return len; 1123 } 1124 1125 static ssize_t ltr501_show_intensity_scale_avail(struct device *dev, 1126 struct device_attribute *attr, 1127 char *buf) 1128 { 1129 struct ltr501_data *data = iio_priv(dev_to_iio_dev(dev)); 1130 const struct ltr501_chip_info *info = data->chip_info; 1131 ssize_t len = 0; 1132 int i; 1133 1134 for (i = 0; i < info->als_gain_tbl_size; i++) { 1135 if (info->als_gain[i].scale == LTR501_RESERVED_GAIN) 1136 continue; 1137 len += scnprintf(buf + len, PAGE_SIZE - len, "%d.%06d ", 1138 info->als_gain[i].scale, 1139 info->als_gain[i].uscale); 1140 } 1141 1142 buf[len - 1] = '\n'; 1143 1144 return len; 1145 } 1146 1147 static IIO_CONST_ATTR_INT_TIME_AVAIL("0.05 0.1 0.2 0.4"); 1148 static IIO_CONST_ATTR_SAMP_FREQ_AVAIL("20 10 5 2 1 0.5"); 1149 1150 static IIO_DEVICE_ATTR(in_proximity_scale_available, S_IRUGO, 1151 ltr501_show_proximity_scale_avail, NULL, 0); 1152 static IIO_DEVICE_ATTR(in_intensity_scale_available, S_IRUGO, 1153 ltr501_show_intensity_scale_avail, NULL, 0); 1154 1155 static struct attribute *ltr501_attributes[] = { 1156 &iio_dev_attr_in_proximity_scale_available.dev_attr.attr, 1157 &iio_dev_attr_in_intensity_scale_available.dev_attr.attr, 1158 &iio_const_attr_integration_time_available.dev_attr.attr, 1159 &iio_const_attr_sampling_frequency_available.dev_attr.attr, 1160 NULL 1161 }; 1162 1163 static struct attribute *ltr301_attributes[] = { 1164 &iio_dev_attr_in_intensity_scale_available.dev_attr.attr, 1165 &iio_const_attr_integration_time_available.dev_attr.attr, 1166 &iio_const_attr_sampling_frequency_available.dev_attr.attr, 1167 NULL 1168 }; 1169 1170 static const struct attribute_group ltr501_attribute_group = { 1171 .attrs = ltr501_attributes, 1172 }; 1173 1174 static const struct attribute_group ltr301_attribute_group = { 1175 .attrs = ltr301_attributes, 1176 }; 1177 1178 static const struct iio_info ltr501_info_no_irq = { 1179 .read_raw = ltr501_read_raw, 1180 .write_raw = ltr501_write_raw, 1181 .attrs = <r501_attribute_group, 1182 }; 1183 1184 static const struct iio_info ltr501_info = { 1185 .read_raw = ltr501_read_raw, 1186 .write_raw = ltr501_write_raw, 1187 .attrs = <r501_attribute_group, 1188 .read_event_value = <r501_read_event, 1189 .write_event_value = <r501_write_event, 1190 .read_event_config = <r501_read_event_config, 1191 .write_event_config = <r501_write_event_config, 1192 }; 1193 1194 static const struct iio_info ltr301_info_no_irq = { 1195 .read_raw = ltr501_read_raw, 1196 .write_raw = ltr501_write_raw, 1197 .attrs = <r301_attribute_group, 1198 }; 1199 1200 static const struct iio_info ltr301_info = { 1201 .read_raw = ltr501_read_raw, 1202 .write_raw = ltr501_write_raw, 1203 .attrs = <r301_attribute_group, 1204 .read_event_value = <r501_read_event, 1205 .write_event_value = <r501_write_event, 1206 .read_event_config = <r501_read_event_config, 1207 .write_event_config = <r501_write_event_config, 1208 }; 1209 1210 static const struct ltr501_chip_info ltr501_chip_info_tbl[] = { 1211 [ltr501] = { 1212 .partid = 0x08, 1213 .als_gain = ltr501_als_gain_tbl, 1214 .als_gain_tbl_size = ARRAY_SIZE(ltr501_als_gain_tbl), 1215 .ps_gain = ltr501_ps_gain_tbl, 1216 .ps_gain_tbl_size = ARRAY_SIZE(ltr501_ps_gain_tbl), 1217 .als_mode_active = BIT(0) | BIT(1), 1218 .als_gain_mask = BIT(3), 1219 .als_gain_shift = 3, 1220 .info = <r501_info, 1221 .info_no_irq = <r501_info_no_irq, 1222 .channels = ltr501_channels, 1223 .no_channels = ARRAY_SIZE(ltr501_channels), 1224 }, 1225 [ltr559] = { 1226 .partid = 0x09, 1227 .als_gain = ltr559_als_gain_tbl, 1228 .als_gain_tbl_size = ARRAY_SIZE(ltr559_als_gain_tbl), 1229 .ps_gain = ltr559_ps_gain_tbl, 1230 .ps_gain_tbl_size = ARRAY_SIZE(ltr559_ps_gain_tbl), 1231 .als_mode_active = BIT(0), 1232 .als_gain_mask = BIT(2) | BIT(3) | BIT(4), 1233 .als_gain_shift = 2, 1234 .info = <r501_info, 1235 .info_no_irq = <r501_info_no_irq, 1236 .channels = ltr501_channels, 1237 .no_channels = ARRAY_SIZE(ltr501_channels), 1238 }, 1239 [ltr301] = { 1240 .partid = 0x08, 1241 .als_gain = ltr501_als_gain_tbl, 1242 .als_gain_tbl_size = ARRAY_SIZE(ltr501_als_gain_tbl), 1243 .als_mode_active = BIT(0) | BIT(1), 1244 .als_gain_mask = BIT(3), 1245 .als_gain_shift = 3, 1246 .info = <r301_info, 1247 .info_no_irq = <r301_info_no_irq, 1248 .channels = ltr301_channels, 1249 .no_channels = ARRAY_SIZE(ltr301_channels), 1250 }, 1251 [ltr303] = { 1252 .partid = 0x0A, 1253 .als_gain = ltr559_als_gain_tbl, 1254 .als_gain_tbl_size = ARRAY_SIZE(ltr559_als_gain_tbl), 1255 .als_mode_active = BIT(0), 1256 .als_gain_mask = BIT(2) | BIT(3) | BIT(4), 1257 .als_gain_shift = 2, 1258 .info = <r301_info, 1259 .info_no_irq = <r301_info_no_irq, 1260 .channels = ltr301_channels, 1261 .no_channels = ARRAY_SIZE(ltr301_channels), 1262 }, 1263 }; 1264 1265 static int ltr501_write_contr(struct ltr501_data *data, u8 als_val, u8 ps_val) 1266 { 1267 int ret; 1268 1269 ret = regmap_write(data->regmap, LTR501_ALS_CONTR, als_val); 1270 if (ret < 0) 1271 return ret; 1272 1273 return regmap_write(data->regmap, LTR501_PS_CONTR, ps_val); 1274 } 1275 1276 static irqreturn_t ltr501_trigger_handler(int irq, void *p) 1277 { 1278 struct iio_poll_func *pf = p; 1279 struct iio_dev *indio_dev = pf->indio_dev; 1280 struct ltr501_data *data = iio_priv(indio_dev); 1281 struct { 1282 u16 channels[3]; 1283 s64 ts __aligned(8); 1284 } scan; 1285 __le16 als_buf[2]; 1286 u8 mask = 0; 1287 int j = 0; 1288 int ret, psdata; 1289 1290 memset(&scan, 0, sizeof(scan)); 1291 1292 /* figure out which data needs to be ready */ 1293 if (test_bit(0, indio_dev->active_scan_mask) || 1294 test_bit(1, indio_dev->active_scan_mask)) 1295 mask |= LTR501_STATUS_ALS_RDY; 1296 if (test_bit(2, indio_dev->active_scan_mask)) 1297 mask |= LTR501_STATUS_PS_RDY; 1298 1299 ret = ltr501_drdy(data, mask); 1300 if (ret < 0) 1301 goto done; 1302 1303 if (mask & LTR501_STATUS_ALS_RDY) { 1304 ret = regmap_bulk_read(data->regmap, LTR501_ALS_DATA1, 1305 als_buf, sizeof(als_buf)); 1306 if (ret < 0) 1307 goto done; 1308 if (test_bit(0, indio_dev->active_scan_mask)) 1309 scan.channels[j++] = le16_to_cpu(als_buf[1]); 1310 if (test_bit(1, indio_dev->active_scan_mask)) 1311 scan.channels[j++] = le16_to_cpu(als_buf[0]); 1312 } 1313 1314 if (mask & LTR501_STATUS_PS_RDY) { 1315 ret = regmap_bulk_read(data->regmap, LTR501_PS_DATA, 1316 &psdata, 2); 1317 if (ret < 0) 1318 goto done; 1319 scan.channels[j++] = psdata & LTR501_PS_DATA_MASK; 1320 } 1321 1322 iio_push_to_buffers_with_timestamp(indio_dev, &scan, 1323 iio_get_time_ns(indio_dev)); 1324 1325 done: 1326 iio_trigger_notify_done(indio_dev->trig); 1327 1328 return IRQ_HANDLED; 1329 } 1330 1331 static irqreturn_t ltr501_interrupt_handler(int irq, void *private) 1332 { 1333 struct iio_dev *indio_dev = private; 1334 struct ltr501_data *data = iio_priv(indio_dev); 1335 int ret, status; 1336 1337 ret = regmap_read(data->regmap, LTR501_ALS_PS_STATUS, &status); 1338 if (ret < 0) { 1339 dev_err(&data->client->dev, 1340 "irq read int reg failed\n"); 1341 return IRQ_HANDLED; 1342 } 1343 1344 if (status & LTR501_STATUS_ALS_INTR) 1345 iio_push_event(indio_dev, 1346 IIO_UNMOD_EVENT_CODE(IIO_INTENSITY, 0, 1347 IIO_EV_TYPE_THRESH, 1348 IIO_EV_DIR_EITHER), 1349 iio_get_time_ns(indio_dev)); 1350 1351 if (status & LTR501_STATUS_PS_INTR) 1352 iio_push_event(indio_dev, 1353 IIO_UNMOD_EVENT_CODE(IIO_PROXIMITY, 0, 1354 IIO_EV_TYPE_THRESH, 1355 IIO_EV_DIR_EITHER), 1356 iio_get_time_ns(indio_dev)); 1357 1358 return IRQ_HANDLED; 1359 } 1360 1361 static int ltr501_init(struct ltr501_data *data) 1362 { 1363 int ret, status; 1364 1365 ret = regmap_read(data->regmap, LTR501_ALS_CONTR, &status); 1366 if (ret < 0) 1367 return ret; 1368 1369 data->als_contr = status | data->chip_info->als_mode_active; 1370 1371 ret = regmap_read(data->regmap, LTR501_PS_CONTR, &status); 1372 if (ret < 0) 1373 return ret; 1374 1375 data->ps_contr = status | LTR501_CONTR_ACTIVE; 1376 1377 ret = ltr501_read_intr_prst(data, IIO_INTENSITY, &data->als_period); 1378 if (ret < 0) 1379 return ret; 1380 1381 ret = ltr501_read_intr_prst(data, IIO_PROXIMITY, &data->ps_period); 1382 if (ret < 0) 1383 return ret; 1384 1385 return ltr501_write_contr(data, data->als_contr, data->ps_contr); 1386 } 1387 1388 static bool ltr501_is_volatile_reg(struct device *dev, unsigned int reg) 1389 { 1390 switch (reg) { 1391 case LTR501_ALS_DATA1: 1392 case LTR501_ALS_DATA1_UPPER: 1393 case LTR501_ALS_DATA0: 1394 case LTR501_ALS_DATA0_UPPER: 1395 case LTR501_ALS_PS_STATUS: 1396 case LTR501_PS_DATA: 1397 case LTR501_PS_DATA_UPPER: 1398 return true; 1399 default: 1400 return false; 1401 } 1402 } 1403 1404 static const struct regmap_config ltr501_regmap_config = { 1405 .name = LTR501_REGMAP_NAME, 1406 .reg_bits = 8, 1407 .val_bits = 8, 1408 .max_register = LTR501_MAX_REG, 1409 .cache_type = REGCACHE_RBTREE, 1410 .volatile_reg = ltr501_is_volatile_reg, 1411 }; 1412 1413 static int ltr501_powerdown(struct ltr501_data *data) 1414 { 1415 return ltr501_write_contr(data, data->als_contr & 1416 ~data->chip_info->als_mode_active, 1417 data->ps_contr & ~LTR501_CONTR_ACTIVE); 1418 } 1419 1420 static int ltr501_probe(struct i2c_client *client) 1421 { 1422 const struct i2c_device_id *id = i2c_client_get_device_id(client); 1423 static const char * const regulator_names[] = { "vdd", "vddio" }; 1424 struct ltr501_data *data; 1425 struct iio_dev *indio_dev; 1426 struct regmap *regmap; 1427 const void *ddata = NULL; 1428 int partid, chip_idx; 1429 const char *name; 1430 int ret; 1431 1432 indio_dev = devm_iio_device_alloc(&client->dev, sizeof(*data)); 1433 if (!indio_dev) 1434 return -ENOMEM; 1435 1436 regmap = devm_regmap_init_i2c(client, <r501_regmap_config); 1437 if (IS_ERR(regmap)) { 1438 dev_err(&client->dev, "Regmap initialization failed.\n"); 1439 return PTR_ERR(regmap); 1440 } 1441 1442 data = iio_priv(indio_dev); 1443 i2c_set_clientdata(client, indio_dev); 1444 data->client = client; 1445 data->regmap = regmap; 1446 mutex_init(&data->lock_als); 1447 mutex_init(&data->lock_ps); 1448 1449 ret = devm_regulator_bulk_get_enable(&client->dev, 1450 ARRAY_SIZE(regulator_names), 1451 regulator_names); 1452 if (ret) 1453 return dev_err_probe(&client->dev, ret, 1454 "Failed to get regulators\n"); 1455 1456 data->reg_it = devm_regmap_field_alloc(&client->dev, regmap, 1457 reg_field_it); 1458 if (IS_ERR(data->reg_it)) { 1459 dev_err(&client->dev, "Integ time reg field init failed.\n"); 1460 return PTR_ERR(data->reg_it); 1461 } 1462 1463 data->reg_als_intr = devm_regmap_field_alloc(&client->dev, regmap, 1464 reg_field_als_intr); 1465 if (IS_ERR(data->reg_als_intr)) { 1466 dev_err(&client->dev, "ALS intr mode reg field init failed\n"); 1467 return PTR_ERR(data->reg_als_intr); 1468 } 1469 1470 data->reg_ps_intr = devm_regmap_field_alloc(&client->dev, regmap, 1471 reg_field_ps_intr); 1472 if (IS_ERR(data->reg_ps_intr)) { 1473 dev_err(&client->dev, "PS intr mode reg field init failed.\n"); 1474 return PTR_ERR(data->reg_ps_intr); 1475 } 1476 1477 data->reg_als_rate = devm_regmap_field_alloc(&client->dev, regmap, 1478 reg_field_als_rate); 1479 if (IS_ERR(data->reg_als_rate)) { 1480 dev_err(&client->dev, "ALS samp rate field init failed.\n"); 1481 return PTR_ERR(data->reg_als_rate); 1482 } 1483 1484 data->reg_ps_rate = devm_regmap_field_alloc(&client->dev, regmap, 1485 reg_field_ps_rate); 1486 if (IS_ERR(data->reg_ps_rate)) { 1487 dev_err(&client->dev, "PS samp rate field init failed.\n"); 1488 return PTR_ERR(data->reg_ps_rate); 1489 } 1490 1491 data->reg_als_prst = devm_regmap_field_alloc(&client->dev, regmap, 1492 reg_field_als_prst); 1493 if (IS_ERR(data->reg_als_prst)) { 1494 dev_err(&client->dev, "ALS prst reg field init failed\n"); 1495 return PTR_ERR(data->reg_als_prst); 1496 } 1497 1498 data->reg_ps_prst = devm_regmap_field_alloc(&client->dev, regmap, 1499 reg_field_ps_prst); 1500 if (IS_ERR(data->reg_ps_prst)) { 1501 dev_err(&client->dev, "PS prst reg field init failed.\n"); 1502 return PTR_ERR(data->reg_ps_prst); 1503 } 1504 1505 ret = regmap_read(data->regmap, LTR501_PART_ID, &partid); 1506 if (ret < 0) 1507 return ret; 1508 1509 if (id) { 1510 name = id->name; 1511 chip_idx = id->driver_data; 1512 } else { 1513 name = iio_get_acpi_device_name_and_data(&client->dev, &ddata); 1514 chip_idx = (intptr_t)ddata; 1515 } 1516 if (!name) 1517 return -ENODEV; 1518 1519 data->chip_info = <r501_chip_info_tbl[chip_idx]; 1520 1521 if ((partid >> 4) != data->chip_info->partid) 1522 return -ENODEV; 1523 1524 if (device_property_read_u32(&client->dev, "proximity-near-level", 1525 &data->near_level)) 1526 data->near_level = 0; 1527 1528 indio_dev->info = data->chip_info->info; 1529 indio_dev->channels = data->chip_info->channels; 1530 indio_dev->num_channels = data->chip_info->no_channels; 1531 indio_dev->name = name; 1532 indio_dev->modes = INDIO_DIRECT_MODE; 1533 1534 ret = ltr501_init(data); 1535 if (ret < 0) 1536 return ret; 1537 1538 if (client->irq > 0) { 1539 ret = devm_request_threaded_irq(&client->dev, client->irq, 1540 NULL, ltr501_interrupt_handler, 1541 IRQF_TRIGGER_FALLING | 1542 IRQF_ONESHOT, 1543 "ltr501_thresh_event", 1544 indio_dev); 1545 if (ret) { 1546 dev_err(&client->dev, "request irq (%d) failed\n", 1547 client->irq); 1548 return ret; 1549 } 1550 } else { 1551 indio_dev->info = data->chip_info->info_no_irq; 1552 } 1553 1554 ret = iio_triggered_buffer_setup(indio_dev, NULL, 1555 ltr501_trigger_handler, NULL); 1556 if (ret) 1557 goto powerdown_on_error; 1558 1559 ret = iio_device_register(indio_dev); 1560 if (ret) 1561 goto error_unreg_buffer; 1562 1563 return 0; 1564 1565 error_unreg_buffer: 1566 iio_triggered_buffer_cleanup(indio_dev); 1567 powerdown_on_error: 1568 ltr501_powerdown(data); 1569 return ret; 1570 } 1571 1572 static void ltr501_remove(struct i2c_client *client) 1573 { 1574 struct iio_dev *indio_dev = i2c_get_clientdata(client); 1575 1576 iio_device_unregister(indio_dev); 1577 iio_triggered_buffer_cleanup(indio_dev); 1578 ltr501_powerdown(iio_priv(indio_dev)); 1579 } 1580 1581 static int ltr501_suspend(struct device *dev) 1582 { 1583 struct ltr501_data *data = iio_priv(i2c_get_clientdata( 1584 to_i2c_client(dev))); 1585 return ltr501_powerdown(data); 1586 } 1587 1588 static int ltr501_resume(struct device *dev) 1589 { 1590 struct ltr501_data *data = iio_priv(i2c_get_clientdata( 1591 to_i2c_client(dev))); 1592 1593 return ltr501_write_contr(data, data->als_contr, 1594 data->ps_contr); 1595 } 1596 1597 static DEFINE_SIMPLE_DEV_PM_OPS(ltr501_pm_ops, ltr501_suspend, ltr501_resume); 1598 1599 static const struct acpi_device_id ltr_acpi_match[] = { 1600 { "LTER0301", ltr301 }, 1601 /* https://www.catalog.update.microsoft.com/Search.aspx?q=lter0303 */ 1602 { "LTER0303", ltr303 }, 1603 { }, 1604 }; 1605 MODULE_DEVICE_TABLE(acpi, ltr_acpi_match); 1606 1607 static const struct i2c_device_id ltr501_id[] = { 1608 { "ltr501", ltr501 }, 1609 { "ltr559", ltr559 }, 1610 { "ltr301", ltr301 }, 1611 { "ltr303", ltr303 }, 1612 { } 1613 }; 1614 MODULE_DEVICE_TABLE(i2c, ltr501_id); 1615 1616 static const struct of_device_id ltr501_of_match[] = { 1617 { .compatible = "liteon,ltr501", }, 1618 { .compatible = "liteon,ltr559", }, 1619 { .compatible = "liteon,ltr301", }, 1620 { .compatible = "liteon,ltr303", }, 1621 {} 1622 }; 1623 MODULE_DEVICE_TABLE(of, ltr501_of_match); 1624 1625 static struct i2c_driver ltr501_driver = { 1626 .driver = { 1627 .name = LTR501_DRV_NAME, 1628 .of_match_table = ltr501_of_match, 1629 .pm = pm_sleep_ptr(<r501_pm_ops), 1630 .acpi_match_table = ltr_acpi_match, 1631 }, 1632 .probe = ltr501_probe, 1633 .remove = ltr501_remove, 1634 .id_table = ltr501_id, 1635 }; 1636 1637 module_i2c_driver(ltr501_driver); 1638 1639 MODULE_AUTHOR("Peter Meerwald <pmeerw@pmeerw.net>"); 1640 MODULE_DESCRIPTION("Lite-On LTR501 ambient light and proximity sensor driver"); 1641 MODULE_LICENSE("GPL"); 1642