1d2912cb1SThomas Gleixner // SPDX-License-Identifier: GPL-2.0-only 2971672c0SKevin Tsai /* 3971672c0SKevin Tsai * Copyright (C) 2013 Capella Microsystems Inc. 4971672c0SKevin Tsai * Author: Kevin Tsai <ktsai@capellamicro.com> 5971672c0SKevin Tsai */ 6971672c0SKevin Tsai 7971672c0SKevin Tsai #include <linux/delay.h> 8971672c0SKevin Tsai #include <linux/err.h> 9971672c0SKevin Tsai #include <linux/i2c.h> 10971672c0SKevin Tsai #include <linux/mutex.h> 11971672c0SKevin Tsai #include <linux/module.h> 129065b780SJonathan Cameron #include <linux/mod_devicetable.h> 13971672c0SKevin Tsai #include <linux/interrupt.h> 14971672c0SKevin Tsai #include <linux/regulator/consumer.h> 15971672c0SKevin Tsai #include <linux/iio/iio.h> 16971672c0SKevin Tsai #include <linux/iio/sysfs.h> 17971672c0SKevin Tsai #include <linux/iio/events.h> 18971672c0SKevin Tsai #include <linux/init.h> 19971672c0SKevin Tsai 20971672c0SKevin Tsai /* Registers Address */ 21971672c0SKevin Tsai #define CM32181_REG_ADDR_CMD 0x00 223bf4a59cSHans de Goede #define CM32181_REG_ADDR_WH 0x01 233bf4a59cSHans de Goede #define CM32181_REG_ADDR_WL 0x02 243bf4a59cSHans de Goede #define CM32181_REG_ADDR_TEST 0x03 25971672c0SKevin Tsai #define CM32181_REG_ADDR_ALS 0x04 26971672c0SKevin Tsai #define CM32181_REG_ADDR_STATUS 0x06 27971672c0SKevin Tsai #define CM32181_REG_ADDR_ID 0x07 28971672c0SKevin Tsai 29971672c0SKevin Tsai /* Number of Configurable Registers */ 307574cb1dSHans de Goede #define CM32181_CONF_REG_NUM 4 31971672c0SKevin Tsai 32971672c0SKevin Tsai /* CMD register */ 333bf4a59cSHans de Goede #define CM32181_CMD_ALS_DISABLE BIT(0) 343bf4a59cSHans de Goede #define CM32181_CMD_ALS_INT_EN BIT(1) 353bf4a59cSHans de Goede #define CM32181_CMD_ALS_THRES_WINDOW BIT(2) 363bf4a59cSHans de Goede 373bf4a59cSHans de Goede #define CM32181_CMD_ALS_PERS_SHIFT 4 383bf4a59cSHans de Goede #define CM32181_CMD_ALS_PERS_MASK (0x03 << CM32181_CMD_ALS_PERS_SHIFT) 393bf4a59cSHans de Goede #define CM32181_CMD_ALS_PERS_DEFAULT (0x01 << CM32181_CMD_ALS_PERS_SHIFT) 40971672c0SKevin Tsai 41971672c0SKevin Tsai #define CM32181_CMD_ALS_IT_SHIFT 6 42971672c0SKevin Tsai #define CM32181_CMD_ALS_IT_MASK (0x0F << CM32181_CMD_ALS_IT_SHIFT) 43971672c0SKevin Tsai #define CM32181_CMD_ALS_IT_DEFAULT (0x00 << CM32181_CMD_ALS_IT_SHIFT) 44971672c0SKevin Tsai 45971672c0SKevin Tsai #define CM32181_CMD_ALS_SM_SHIFT 11 46971672c0SKevin Tsai #define CM32181_CMD_ALS_SM_MASK (0x03 << CM32181_CMD_ALS_SM_SHIFT) 47971672c0SKevin Tsai #define CM32181_CMD_ALS_SM_DEFAULT (0x01 << CM32181_CMD_ALS_SM_SHIFT) 48971672c0SKevin Tsai 49f50f9831SHans de Goede #define CM32181_LUX_PER_BIT 500 /* ALS_SM=01 IT=800ms */ 50f50f9831SHans de Goede #define CM32181_LUX_PER_BIT_RESOLUTION 100000 51f50f9831SHans de Goede #define CM32181_LUX_PER_BIT_BASE_IT 800000 /* Based on IT=800ms */ 52f50f9831SHans de Goede #define CM32181_CALIBSCALE_DEFAULT 100000 53f50f9831SHans de Goede #define CM32181_CALIBSCALE_RESOLUTION 100000 54971672c0SKevin Tsai 55c1e62062SHans de Goede #define SMBUS_ALERT_RESPONSE_ADDRESS 0x0c 56c1e62062SHans de Goede 5702cdab2aSHans de Goede /* CM3218 Family */ 5802cdab2aSHans de Goede static const int cm3218_als_it_bits[] = { 0, 1, 2, 3 }; 5902cdab2aSHans de Goede static const int cm3218_als_it_values[] = { 100000, 200000, 400000, 800000 }; 6002cdab2aSHans de Goede 6102cdab2aSHans de Goede /* CM32181 Family */ 6202cdab2aSHans de Goede static const int cm32181_als_it_bits[] = { 12, 8, 0, 1, 2, 3 }; 6302cdab2aSHans de Goede static const int cm32181_als_it_values[] = { 6402cdab2aSHans de Goede 25000, 50000, 100000, 200000, 400000, 800000 6502cdab2aSHans de Goede }; 66971672c0SKevin Tsai 67971672c0SKevin Tsai struct cm32181_chip { 68971672c0SKevin Tsai struct i2c_client *client; 69971672c0SKevin Tsai struct mutex lock; 70971672c0SKevin Tsai u16 conf_regs[CM32181_CONF_REG_NUM]; 717574cb1dSHans de Goede unsigned long init_regs_bitmap; 72971672c0SKevin Tsai int calibscale; 73*63b1be78SHans de Goede int lux_per_bit; 74*63b1be78SHans de Goede int lux_per_bit_base_it; 7502cdab2aSHans de Goede int num_als_it; 7602cdab2aSHans de Goede const int *als_it_bits; 7702cdab2aSHans de Goede const int *als_it_values; 78971672c0SKevin Tsai }; 79971672c0SKevin Tsai 80971672c0SKevin Tsai /** 81971672c0SKevin Tsai * cm32181_reg_init() - Initialize CM32181 registers 82971672c0SKevin Tsai * @cm32181: pointer of struct cm32181. 83971672c0SKevin Tsai * 84971672c0SKevin Tsai * Initialize CM32181 ambient light sensor register to default values. 85971672c0SKevin Tsai * 86971672c0SKevin Tsai * Return: 0 for success; otherwise for error code. 87971672c0SKevin Tsai */ 88971672c0SKevin Tsai static int cm32181_reg_init(struct cm32181_chip *cm32181) 89971672c0SKevin Tsai { 90971672c0SKevin Tsai struct i2c_client *client = cm32181->client; 91971672c0SKevin Tsai int i; 92971672c0SKevin Tsai s32 ret; 93971672c0SKevin Tsai 94971672c0SKevin Tsai ret = i2c_smbus_read_word_data(client, CM32181_REG_ADDR_ID); 95971672c0SKevin Tsai if (ret < 0) 96971672c0SKevin Tsai return ret; 97971672c0SKevin Tsai 98971672c0SKevin Tsai /* check device ID */ 9902cdab2aSHans de Goede switch (ret & 0xFF) { 10002cdab2aSHans de Goede case 0x18: /* CM3218 */ 10102cdab2aSHans de Goede cm32181->num_als_it = ARRAY_SIZE(cm3218_als_it_bits); 10202cdab2aSHans de Goede cm32181->als_it_bits = cm3218_als_it_bits; 10302cdab2aSHans de Goede cm32181->als_it_values = cm3218_als_it_values; 10402cdab2aSHans de Goede break; 10502cdab2aSHans de Goede case 0x81: /* CM32181 */ 10602cdab2aSHans de Goede case 0x82: /* CM32182, fully compat. with CM32181 */ 10702cdab2aSHans de Goede cm32181->num_als_it = ARRAY_SIZE(cm32181_als_it_bits); 10802cdab2aSHans de Goede cm32181->als_it_bits = cm32181_als_it_bits; 10902cdab2aSHans de Goede cm32181->als_it_values = cm32181_als_it_values; 11002cdab2aSHans de Goede break; 11102cdab2aSHans de Goede default: 112971672c0SKevin Tsai return -ENODEV; 11302cdab2aSHans de Goede } 114971672c0SKevin Tsai 115971672c0SKevin Tsai /* Default Values */ 1163bf4a59cSHans de Goede cm32181->conf_regs[CM32181_REG_ADDR_CMD] = 117971672c0SKevin Tsai CM32181_CMD_ALS_IT_DEFAULT | CM32181_CMD_ALS_SM_DEFAULT; 1187574cb1dSHans de Goede cm32181->init_regs_bitmap = BIT(CM32181_REG_ADDR_CMD); 119971672c0SKevin Tsai cm32181->calibscale = CM32181_CALIBSCALE_DEFAULT; 120*63b1be78SHans de Goede cm32181->lux_per_bit = CM32181_LUX_PER_BIT; 121*63b1be78SHans de Goede cm32181->lux_per_bit_base_it = CM32181_LUX_PER_BIT_BASE_IT; 122971672c0SKevin Tsai 123971672c0SKevin Tsai /* Initialize registers*/ 1247574cb1dSHans de Goede for_each_set_bit(i, &cm32181->init_regs_bitmap, CM32181_CONF_REG_NUM) { 1257574cb1dSHans de Goede ret = i2c_smbus_write_word_data(client, i, 126971672c0SKevin Tsai cm32181->conf_regs[i]); 127971672c0SKevin Tsai if (ret < 0) 128971672c0SKevin Tsai return ret; 129971672c0SKevin Tsai } 130971672c0SKevin Tsai 131971672c0SKevin Tsai return 0; 132971672c0SKevin Tsai } 133971672c0SKevin Tsai 134971672c0SKevin Tsai /** 135971672c0SKevin Tsai * cm32181_read_als_it() - Get sensor integration time (ms) 136971672c0SKevin Tsai * @cm32181: pointer of struct cm32181 1371463a166SBeomho Seo * @val2: pointer of int to load the als_it value. 138971672c0SKevin Tsai * 139971672c0SKevin Tsai * Report the current integartion time by millisecond. 140971672c0SKevin Tsai * 1411463a166SBeomho Seo * Return: IIO_VAL_INT_PLUS_MICRO for success, otherwise -EINVAL. 142971672c0SKevin Tsai */ 1431463a166SBeomho Seo static int cm32181_read_als_it(struct cm32181_chip *cm32181, int *val2) 144971672c0SKevin Tsai { 145971672c0SKevin Tsai u16 als_it; 146971672c0SKevin Tsai int i; 147971672c0SKevin Tsai 148971672c0SKevin Tsai als_it = cm32181->conf_regs[CM32181_REG_ADDR_CMD]; 149971672c0SKevin Tsai als_it &= CM32181_CMD_ALS_IT_MASK; 150971672c0SKevin Tsai als_it >>= CM32181_CMD_ALS_IT_SHIFT; 15102cdab2aSHans de Goede for (i = 0; i < cm32181->num_als_it; i++) { 15202cdab2aSHans de Goede if (als_it == cm32181->als_it_bits[i]) { 15302cdab2aSHans de Goede *val2 = cm32181->als_it_values[i]; 1541463a166SBeomho Seo return IIO_VAL_INT_PLUS_MICRO; 155971672c0SKevin Tsai } 156971672c0SKevin Tsai } 157971672c0SKevin Tsai 158971672c0SKevin Tsai return -EINVAL; 159971672c0SKevin Tsai } 160971672c0SKevin Tsai 161971672c0SKevin Tsai /** 162971672c0SKevin Tsai * cm32181_write_als_it() - Write sensor integration time 163971672c0SKevin Tsai * @cm32181: pointer of struct cm32181. 164971672c0SKevin Tsai * @val: integration time by millisecond. 165971672c0SKevin Tsai * 166971672c0SKevin Tsai * Convert integration time (ms) to sensor value. 167971672c0SKevin Tsai * 168971672c0SKevin Tsai * Return: i2c_smbus_write_word_data command return value. 169971672c0SKevin Tsai */ 170971672c0SKevin Tsai static int cm32181_write_als_it(struct cm32181_chip *cm32181, int val) 171971672c0SKevin Tsai { 172971672c0SKevin Tsai struct i2c_client *client = cm32181->client; 173971672c0SKevin Tsai u16 als_it; 174971672c0SKevin Tsai int ret, i, n; 175971672c0SKevin Tsai 17602cdab2aSHans de Goede n = cm32181->num_als_it; 177971672c0SKevin Tsai for (i = 0; i < n; i++) 17802cdab2aSHans de Goede if (val <= cm32181->als_it_values[i]) 179971672c0SKevin Tsai break; 180971672c0SKevin Tsai if (i >= n) 181971672c0SKevin Tsai i = n - 1; 182971672c0SKevin Tsai 18302cdab2aSHans de Goede als_it = cm32181->als_it_bits[i]; 184971672c0SKevin Tsai als_it <<= CM32181_CMD_ALS_IT_SHIFT; 185971672c0SKevin Tsai 186971672c0SKevin Tsai mutex_lock(&cm32181->lock); 187971672c0SKevin Tsai cm32181->conf_regs[CM32181_REG_ADDR_CMD] &= 188971672c0SKevin Tsai ~CM32181_CMD_ALS_IT_MASK; 189971672c0SKevin Tsai cm32181->conf_regs[CM32181_REG_ADDR_CMD] |= 190971672c0SKevin Tsai als_it; 191971672c0SKevin Tsai ret = i2c_smbus_write_word_data(client, CM32181_REG_ADDR_CMD, 192971672c0SKevin Tsai cm32181->conf_regs[CM32181_REG_ADDR_CMD]); 193971672c0SKevin Tsai mutex_unlock(&cm32181->lock); 194971672c0SKevin Tsai 195971672c0SKevin Tsai return ret; 196971672c0SKevin Tsai } 197971672c0SKevin Tsai 198971672c0SKevin Tsai /** 199971672c0SKevin Tsai * cm32181_get_lux() - report current lux value 200971672c0SKevin Tsai * @cm32181: pointer of struct cm32181. 201971672c0SKevin Tsai * 202971672c0SKevin Tsai * Convert sensor raw data to lux. It depends on integration 203a86ea557SRoberta Dobrescu * time and calibscale variable. 204971672c0SKevin Tsai * 205971672c0SKevin Tsai * Return: Positive value is lux, otherwise is error code. 206971672c0SKevin Tsai */ 207971672c0SKevin Tsai static int cm32181_get_lux(struct cm32181_chip *cm32181) 208971672c0SKevin Tsai { 209971672c0SKevin Tsai struct i2c_client *client = cm32181->client; 210971672c0SKevin Tsai int ret; 211971672c0SKevin Tsai int als_it; 212f50f9831SHans de Goede u64 lux; 213971672c0SKevin Tsai 214971672c0SKevin Tsai ret = cm32181_read_als_it(cm32181, &als_it); 215971672c0SKevin Tsai if (ret < 0) 216971672c0SKevin Tsai return -EINVAL; 217971672c0SKevin Tsai 218*63b1be78SHans de Goede lux = cm32181->lux_per_bit; 219*63b1be78SHans de Goede lux *= cm32181->lux_per_bit_base_it; 220f50f9831SHans de Goede lux = div_u64(lux, als_it); 221971672c0SKevin Tsai 222971672c0SKevin Tsai ret = i2c_smbus_read_word_data(client, CM32181_REG_ADDR_ALS); 223971672c0SKevin Tsai if (ret < 0) 224971672c0SKevin Tsai return ret; 225971672c0SKevin Tsai 226971672c0SKevin Tsai lux *= ret; 227971672c0SKevin Tsai lux *= cm32181->calibscale; 228f50f9831SHans de Goede lux = div_u64(lux, CM32181_CALIBSCALE_RESOLUTION); 229f50f9831SHans de Goede lux = div_u64(lux, CM32181_LUX_PER_BIT_RESOLUTION); 230971672c0SKevin Tsai 231971672c0SKevin Tsai if (lux > 0xFFFF) 232971672c0SKevin Tsai lux = 0xFFFF; 233971672c0SKevin Tsai 234971672c0SKevin Tsai return lux; 235971672c0SKevin Tsai } 236971672c0SKevin Tsai 237971672c0SKevin Tsai static int cm32181_read_raw(struct iio_dev *indio_dev, 238971672c0SKevin Tsai struct iio_chan_spec const *chan, 239971672c0SKevin Tsai int *val, int *val2, long mask) 240971672c0SKevin Tsai { 241971672c0SKevin Tsai struct cm32181_chip *cm32181 = iio_priv(indio_dev); 242971672c0SKevin Tsai int ret; 243971672c0SKevin Tsai 244971672c0SKevin Tsai switch (mask) { 245971672c0SKevin Tsai case IIO_CHAN_INFO_PROCESSED: 246971672c0SKevin Tsai ret = cm32181_get_lux(cm32181); 247971672c0SKevin Tsai if (ret < 0) 248971672c0SKevin Tsai return ret; 249971672c0SKevin Tsai *val = ret; 250971672c0SKevin Tsai return IIO_VAL_INT; 251971672c0SKevin Tsai case IIO_CHAN_INFO_CALIBSCALE: 252971672c0SKevin Tsai *val = cm32181->calibscale; 253971672c0SKevin Tsai return IIO_VAL_INT; 254971672c0SKevin Tsai case IIO_CHAN_INFO_INT_TIME: 25541c897f8SBeomho Seo *val = 0; 2561463a166SBeomho Seo ret = cm32181_read_als_it(cm32181, val2); 257971672c0SKevin Tsai return ret; 258971672c0SKevin Tsai } 259971672c0SKevin Tsai 260971672c0SKevin Tsai return -EINVAL; 261971672c0SKevin Tsai } 262971672c0SKevin Tsai 263971672c0SKevin Tsai static int cm32181_write_raw(struct iio_dev *indio_dev, 264971672c0SKevin Tsai struct iio_chan_spec const *chan, 265971672c0SKevin Tsai int val, int val2, long mask) 266971672c0SKevin Tsai { 267971672c0SKevin Tsai struct cm32181_chip *cm32181 = iio_priv(indio_dev); 268971672c0SKevin Tsai int ret; 269971672c0SKevin Tsai 270971672c0SKevin Tsai switch (mask) { 271971672c0SKevin Tsai case IIO_CHAN_INFO_CALIBSCALE: 272971672c0SKevin Tsai cm32181->calibscale = val; 273971672c0SKevin Tsai return val; 274971672c0SKevin Tsai case IIO_CHAN_INFO_INT_TIME: 2751463a166SBeomho Seo ret = cm32181_write_als_it(cm32181, val2); 276971672c0SKevin Tsai return ret; 277971672c0SKevin Tsai } 278971672c0SKevin Tsai 279971672c0SKevin Tsai return -EINVAL; 280971672c0SKevin Tsai } 281971672c0SKevin Tsai 282971672c0SKevin Tsai /** 283971672c0SKevin Tsai * cm32181_get_it_available() - Get available ALS IT value 284971672c0SKevin Tsai * @dev: pointer of struct device. 285971672c0SKevin Tsai * @attr: pointer of struct device_attribute. 286971672c0SKevin Tsai * @buf: pointer of return string buffer. 287971672c0SKevin Tsai * 288971672c0SKevin Tsai * Display the available integration time values by millisecond. 289971672c0SKevin Tsai * 290971672c0SKevin Tsai * Return: string length. 291971672c0SKevin Tsai */ 292971672c0SKevin Tsai static ssize_t cm32181_get_it_available(struct device *dev, 293971672c0SKevin Tsai struct device_attribute *attr, char *buf) 294971672c0SKevin Tsai { 29502cdab2aSHans de Goede struct cm32181_chip *cm32181 = iio_priv(dev_to_iio_dev(dev)); 296971672c0SKevin Tsai int i, n, len; 297971672c0SKevin Tsai 29802cdab2aSHans de Goede n = cm32181->num_als_it; 299971672c0SKevin Tsai for (i = 0, len = 0; i < n; i++) 30002cdab2aSHans de Goede len += sprintf(buf + len, "0.%06u ", cm32181->als_it_values[i]); 301971672c0SKevin Tsai return len + sprintf(buf + len, "\n"); 302971672c0SKevin Tsai } 303971672c0SKevin Tsai 304971672c0SKevin Tsai static const struct iio_chan_spec cm32181_channels[] = { 305971672c0SKevin Tsai { 306971672c0SKevin Tsai .type = IIO_LIGHT, 307971672c0SKevin Tsai .info_mask_separate = 308971672c0SKevin Tsai BIT(IIO_CHAN_INFO_PROCESSED) | 309971672c0SKevin Tsai BIT(IIO_CHAN_INFO_CALIBSCALE) | 310971672c0SKevin Tsai BIT(IIO_CHAN_INFO_INT_TIME), 311971672c0SKevin Tsai } 312971672c0SKevin Tsai }; 313971672c0SKevin Tsai 314971672c0SKevin Tsai static IIO_DEVICE_ATTR(in_illuminance_integration_time_available, 315971672c0SKevin Tsai S_IRUGO, cm32181_get_it_available, NULL, 0); 316971672c0SKevin Tsai 317971672c0SKevin Tsai static struct attribute *cm32181_attributes[] = { 318971672c0SKevin Tsai &iio_dev_attr_in_illuminance_integration_time_available.dev_attr.attr, 319971672c0SKevin Tsai NULL, 320971672c0SKevin Tsai }; 321971672c0SKevin Tsai 322971672c0SKevin Tsai static const struct attribute_group cm32181_attribute_group = { 323971672c0SKevin Tsai .attrs = cm32181_attributes 324971672c0SKevin Tsai }; 325971672c0SKevin Tsai 326971672c0SKevin Tsai static const struct iio_info cm32181_info = { 327971672c0SKevin Tsai .read_raw = &cm32181_read_raw, 328971672c0SKevin Tsai .write_raw = &cm32181_write_raw, 329971672c0SKevin Tsai .attrs = &cm32181_attribute_group, 330971672c0SKevin Tsai }; 331971672c0SKevin Tsai 33206770454SHans de Goede static int cm32181_probe(struct i2c_client *client) 333971672c0SKevin Tsai { 334b885d0faSHans de Goede struct device *dev = &client->dev; 335971672c0SKevin Tsai struct cm32181_chip *cm32181; 336971672c0SKevin Tsai struct iio_dev *indio_dev; 337971672c0SKevin Tsai int ret; 338971672c0SKevin Tsai 339b885d0faSHans de Goede indio_dev = devm_iio_device_alloc(dev, sizeof(*cm32181)); 340b885d0faSHans de Goede if (!indio_dev) 341971672c0SKevin Tsai return -ENOMEM; 342971672c0SKevin Tsai 343c1e62062SHans de Goede /* 344c1e62062SHans de Goede * Some ACPI systems list 2 I2C resources for the CM3218 sensor, the 345c1e62062SHans de Goede * SMBus Alert Response Address (ARA, 0x0c) and the actual I2C address. 346c1e62062SHans de Goede * Detect this and take the following step to deal with it: 347c1e62062SHans de Goede * 1. When a SMBus Alert capable sensor has an Alert asserted, it will 348c1e62062SHans de Goede * not respond on its actual I2C address. Read a byte from the ARA 349c1e62062SHans de Goede * to clear any pending Alerts. 350c1e62062SHans de Goede * 2. Create a "dummy" client for the actual I2C address and 351c1e62062SHans de Goede * use that client to communicate with the sensor. 352c1e62062SHans de Goede */ 353c1e62062SHans de Goede if (ACPI_HANDLE(dev) && client->addr == SMBUS_ALERT_RESPONSE_ADDRESS) { 354c1e62062SHans de Goede struct i2c_board_info board_info = { .type = "dummy" }; 355c1e62062SHans de Goede 356c1e62062SHans de Goede i2c_smbus_read_byte(client); 357c1e62062SHans de Goede 358c1e62062SHans de Goede client = i2c_acpi_new_device(dev, 1, &board_info); 359c1e62062SHans de Goede if (IS_ERR(client)) 360c1e62062SHans de Goede return PTR_ERR(client); 361c1e62062SHans de Goede } 362c1e62062SHans de Goede 363971672c0SKevin Tsai cm32181 = iio_priv(indio_dev); 364971672c0SKevin Tsai cm32181->client = client; 365971672c0SKevin Tsai 366971672c0SKevin Tsai mutex_init(&cm32181->lock); 367b885d0faSHans de Goede indio_dev->dev.parent = dev; 368971672c0SKevin Tsai indio_dev->channels = cm32181_channels; 369971672c0SKevin Tsai indio_dev->num_channels = ARRAY_SIZE(cm32181_channels); 370971672c0SKevin Tsai indio_dev->info = &cm32181_info; 371b885d0faSHans de Goede indio_dev->name = dev_name(dev); 372971672c0SKevin Tsai indio_dev->modes = INDIO_DIRECT_MODE; 373971672c0SKevin Tsai 374971672c0SKevin Tsai ret = cm32181_reg_init(cm32181); 375971672c0SKevin Tsai if (ret) { 376b885d0faSHans de Goede dev_err(dev, "%s: register init failed\n", __func__); 377971672c0SKevin Tsai return ret; 378971672c0SKevin Tsai } 379971672c0SKevin Tsai 380b885d0faSHans de Goede ret = devm_iio_device_register(dev, indio_dev); 381971672c0SKevin Tsai if (ret) { 382b885d0faSHans de Goede dev_err(dev, "%s: regist device failed\n", __func__); 383971672c0SKevin Tsai return ret; 384971672c0SKevin Tsai } 385971672c0SKevin Tsai 386971672c0SKevin Tsai return 0; 387971672c0SKevin Tsai } 388971672c0SKevin Tsai 389971672c0SKevin Tsai static const struct of_device_id cm32181_of_match[] = { 39002cdab2aSHans de Goede { .compatible = "capella,cm3218" }, 391971672c0SKevin Tsai { .compatible = "capella,cm32181" }, 392971672c0SKevin Tsai { } 393971672c0SKevin Tsai }; 394119c4fceSJavier Martinez Canillas MODULE_DEVICE_TABLE(of, cm32181_of_match); 395971672c0SKevin Tsai 39644b9409cSHans de Goede #ifdef CONFIG_ACPI 39744b9409cSHans de Goede static const struct acpi_device_id cm32181_acpi_match[] = { 39844b9409cSHans de Goede { "CPLM3218", 0 }, 39944b9409cSHans de Goede { } 40044b9409cSHans de Goede }; 40144b9409cSHans de Goede MODULE_DEVICE_TABLE(acpi, cm32181_acpi_match); 40244b9409cSHans de Goede #endif 40344b9409cSHans de Goede 404971672c0SKevin Tsai static struct i2c_driver cm32181_driver = { 405971672c0SKevin Tsai .driver = { 406971672c0SKevin Tsai .name = "cm32181", 40744b9409cSHans de Goede .acpi_match_table = ACPI_PTR(cm32181_acpi_match), 4089065b780SJonathan Cameron .of_match_table = cm32181_of_match, 409971672c0SKevin Tsai }, 41006770454SHans de Goede .probe_new = cm32181_probe, 411971672c0SKevin Tsai }; 412971672c0SKevin Tsai 413971672c0SKevin Tsai module_i2c_driver(cm32181_driver); 414971672c0SKevin Tsai 415971672c0SKevin Tsai MODULE_AUTHOR("Kevin Tsai <ktsai@capellamicro.com>"); 416971672c0SKevin Tsai MODULE_DESCRIPTION("CM32181 ambient light sensor driver"); 417971672c0SKevin Tsai MODULE_LICENSE("GPL"); 418