1 // SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2 3 #include <linux/bitfield.h> 4 #include <linux/firmware.h> 5 #include <linux/i2c.h> 6 #include <linux/module.h> 7 #include <linux/mutex.h> 8 #include <linux/regmap.h> 9 #include <linux/units.h> 10 11 #include <linux/iio/iio.h> 12 #include <linux/iio/sysfs.h> 13 #include <linux/iio/trigger.h> 14 #include <linux/iio/triggered_buffer.h> 15 #include <linux/iio/trigger_consumer.h> 16 17 #include "bmi270.h" 18 19 #define BMI270_CHIP_ID_REG 0x00 20 21 /* Checked to prevent sending incompatible firmware to BMI160 devices */ 22 #define BMI160_CHIP_ID_VAL 0xD1 23 24 #define BMI260_CHIP_ID_VAL 0x27 25 #define BMI270_CHIP_ID_VAL 0x24 26 #define BMI270_CHIP_ID_MSK GENMASK(7, 0) 27 28 #define BMI270_ACCEL_X_REG 0x0c 29 #define BMI270_ANG_VEL_X_REG 0x12 30 31 #define BMI270_INT_STATUS_1_REG 0x1d 32 #define BMI270_INT_STATUS_1_ACC_GYR_DRDY_MSK GENMASK(7, 6) 33 34 #define BMI270_INTERNAL_STATUS_REG 0x21 35 #define BMI270_INTERNAL_STATUS_MSG_MSK GENMASK(3, 0) 36 #define BMI270_INTERNAL_STATUS_MSG_INIT_OK 0x01 37 #define BMI270_INTERNAL_STATUS_AXES_REMAP_ERR_MSK BIT(5) 38 #define BMI270_INTERNAL_STATUS_ODR_50HZ_ERR_MSK BIT(6) 39 40 #define BMI270_TEMPERATURE_0_REG 0x22 41 42 #define BMI270_ACC_CONF_REG 0x40 43 #define BMI270_ACC_CONF_ODR_MSK GENMASK(3, 0) 44 #define BMI270_ACC_CONF_ODR_100HZ 0x08 45 #define BMI270_ACC_CONF_BWP_MSK GENMASK(6, 4) 46 #define BMI270_ACC_CONF_BWP_NORMAL_MODE 0x02 47 #define BMI270_ACC_CONF_FILTER_PERF_MSK BIT(7) 48 49 #define BMI270_ACC_CONF_RANGE_REG 0x41 50 #define BMI270_ACC_CONF_RANGE_MSK GENMASK(1, 0) 51 52 #define BMI270_GYR_CONF_REG 0x42 53 #define BMI270_GYR_CONF_ODR_MSK GENMASK(3, 0) 54 #define BMI270_GYR_CONF_ODR_200HZ 0x09 55 #define BMI270_GYR_CONF_BWP_MSK GENMASK(5, 4) 56 #define BMI270_GYR_CONF_BWP_NORMAL_MODE 0x02 57 #define BMI270_GYR_CONF_NOISE_PERF_MSK BIT(6) 58 #define BMI270_GYR_CONF_FILTER_PERF_MSK BIT(7) 59 60 #define BMI270_GYR_CONF_RANGE_REG 0x43 61 #define BMI270_GYR_CONF_RANGE_MSK GENMASK(2, 0) 62 63 #define BMI270_INT1_IO_CTRL_REG 0x53 64 #define BMI270_INT2_IO_CTRL_REG 0x54 65 #define BMI270_INT_IO_CTRL_LVL_MSK BIT(1) 66 #define BMI270_INT_IO_CTRL_OD_MSK BIT(2) 67 #define BMI270_INT_IO_CTRL_OP_MSK BIT(3) 68 #define BMI270_INT_IO_LVL_OD_OP_MSK GENMASK(3, 1) 69 70 #define BMI270_INT_LATCH_REG 0x55 71 #define BMI270_INT_LATCH_REG_MSK BIT(0) 72 73 #define BMI270_INT_MAP_DATA_REG 0x58 74 #define BMI270_INT_MAP_DATA_DRDY_INT1_MSK BIT(2) 75 #define BMI270_INT_MAP_DATA_DRDY_INT2_MSK BIT(6) 76 77 #define BMI270_INIT_CTRL_REG 0x59 78 #define BMI270_INIT_CTRL_LOAD_DONE_MSK BIT(0) 79 80 #define BMI270_INIT_DATA_REG 0x5e 81 82 #define BMI270_PWR_CONF_REG 0x7c 83 #define BMI270_PWR_CONF_ADV_PWR_SAVE_MSK BIT(0) 84 #define BMI270_PWR_CONF_FIFO_WKUP_MSK BIT(1) 85 #define BMI270_PWR_CONF_FUP_EN_MSK BIT(2) 86 87 #define BMI270_PWR_CTRL_REG 0x7d 88 #define BMI270_PWR_CTRL_AUX_EN_MSK BIT(0) 89 #define BMI270_PWR_CTRL_GYR_EN_MSK BIT(1) 90 #define BMI270_PWR_CTRL_ACCEL_EN_MSK BIT(2) 91 #define BMI270_PWR_CTRL_TEMP_EN_MSK BIT(3) 92 93 /* See datasheet section 4.6.14, Temperature Sensor */ 94 #define BMI270_TEMP_OFFSET 11776 95 #define BMI270_TEMP_SCALE 1953125 96 97 #define BMI260_INIT_DATA_FILE "bmi260-init-data.fw" 98 #define BMI270_INIT_DATA_FILE "bmi270-init-data.fw" 99 100 enum bmi270_irq_pin { 101 BMI270_IRQ_DISABLED, 102 BMI270_IRQ_INT1, 103 BMI270_IRQ_INT2, 104 }; 105 106 struct bmi270_data { 107 struct device *dev; 108 struct regmap *regmap; 109 const struct bmi270_chip_info *chip_info; 110 enum bmi270_irq_pin irq_pin; 111 struct iio_trigger *trig; 112 /* Protect device's private data from concurrent access */ 113 struct mutex mutex; 114 115 /* 116 * Where IIO_DMA_MINALIGN may be larger than 8 bytes, align to 117 * that to ensure a DMA safe buffer. 118 */ 119 struct { 120 __le16 channels[6]; 121 aligned_s64 timestamp; 122 } buffer __aligned(IIO_DMA_MINALIGN); 123 }; 124 125 enum bmi270_scan { 126 BMI270_SCAN_ACCEL_X, 127 BMI270_SCAN_ACCEL_Y, 128 BMI270_SCAN_ACCEL_Z, 129 BMI270_SCAN_GYRO_X, 130 BMI270_SCAN_GYRO_Y, 131 BMI270_SCAN_GYRO_Z, 132 BMI270_SCAN_TIMESTAMP, 133 }; 134 135 static const unsigned long bmi270_avail_scan_masks[] = { 136 (BIT(BMI270_SCAN_ACCEL_X) | 137 BIT(BMI270_SCAN_ACCEL_Y) | 138 BIT(BMI270_SCAN_ACCEL_Z) | 139 BIT(BMI270_SCAN_GYRO_X) | 140 BIT(BMI270_SCAN_GYRO_Y) | 141 BIT(BMI270_SCAN_GYRO_Z)), 142 0 143 }; 144 145 const struct bmi270_chip_info bmi260_chip_info = { 146 .name = "bmi260", 147 .chip_id = BMI260_CHIP_ID_VAL, 148 .fw_name = BMI260_INIT_DATA_FILE, 149 }; 150 EXPORT_SYMBOL_NS_GPL(bmi260_chip_info, "IIO_BMI270"); 151 152 const struct bmi270_chip_info bmi270_chip_info = { 153 .name = "bmi270", 154 .chip_id = BMI270_CHIP_ID_VAL, 155 .fw_name = BMI270_INIT_DATA_FILE, 156 }; 157 EXPORT_SYMBOL_NS_GPL(bmi270_chip_info, "IIO_BMI270"); 158 159 enum bmi270_sensor_type { 160 BMI270_ACCEL = 0, 161 BMI270_GYRO, 162 BMI270_TEMP, 163 }; 164 165 struct bmi270_scale { 166 int scale; 167 int uscale; 168 }; 169 170 struct bmi270_odr { 171 int odr; 172 int uodr; 173 }; 174 175 static const struct bmi270_scale bmi270_accel_scale[] = { 176 { 0, 598 }, 177 { 0, 1197 }, 178 { 0, 2394 }, 179 { 0, 4788 }, 180 }; 181 182 static const struct bmi270_scale bmi270_gyro_scale[] = { 183 { 0, 1065 }, 184 { 0, 532 }, 185 { 0, 266 }, 186 { 0, 133 }, 187 { 0, 66 }, 188 }; 189 190 static const struct bmi270_scale bmi270_temp_scale[] = { 191 { BMI270_TEMP_SCALE / MICRO, BMI270_TEMP_SCALE % MICRO }, 192 }; 193 194 struct bmi270_scale_item { 195 const struct bmi270_scale *tbl; 196 int num; 197 }; 198 199 static const struct bmi270_scale_item bmi270_scale_table[] = { 200 [BMI270_ACCEL] = { 201 .tbl = bmi270_accel_scale, 202 .num = ARRAY_SIZE(bmi270_accel_scale), 203 }, 204 [BMI270_GYRO] = { 205 .tbl = bmi270_gyro_scale, 206 .num = ARRAY_SIZE(bmi270_gyro_scale), 207 }, 208 [BMI270_TEMP] = { 209 .tbl = bmi270_temp_scale, 210 .num = ARRAY_SIZE(bmi270_temp_scale), 211 }, 212 }; 213 214 static const struct bmi270_odr bmi270_accel_odr[] = { 215 { 0, 781250 }, 216 { 1, 562500 }, 217 { 3, 125000 }, 218 { 6, 250000 }, 219 { 12, 500000 }, 220 { 25, 0 }, 221 { 50, 0 }, 222 { 100, 0 }, 223 { 200, 0 }, 224 { 400, 0 }, 225 { 800, 0 }, 226 { 1600, 0 }, 227 }; 228 229 static const u8 bmi270_accel_odr_vals[] = { 230 0x01, 231 0x02, 232 0x03, 233 0x04, 234 0x05, 235 0x06, 236 0x07, 237 0x08, 238 0x09, 239 0x0A, 240 0x0B, 241 0x0C, 242 }; 243 244 static const struct bmi270_odr bmi270_gyro_odr[] = { 245 { 25, 0 }, 246 { 50, 0 }, 247 { 100, 0 }, 248 { 200, 0 }, 249 { 400, 0 }, 250 { 800, 0 }, 251 { 1600, 0 }, 252 { 3200, 0 }, 253 }; 254 255 static const u8 bmi270_gyro_odr_vals[] = { 256 0x06, 257 0x07, 258 0x08, 259 0x09, 260 0x0A, 261 0x0B, 262 0x0C, 263 0x0D, 264 }; 265 266 struct bmi270_odr_item { 267 const struct bmi270_odr *tbl; 268 const u8 *vals; 269 int num; 270 }; 271 272 static const struct bmi270_odr_item bmi270_odr_table[] = { 273 [BMI270_ACCEL] = { 274 .tbl = bmi270_accel_odr, 275 .vals = bmi270_accel_odr_vals, 276 .num = ARRAY_SIZE(bmi270_accel_odr), 277 }, 278 [BMI270_GYRO] = { 279 .tbl = bmi270_gyro_odr, 280 .vals = bmi270_gyro_odr_vals, 281 .num = ARRAY_SIZE(bmi270_gyro_odr), 282 }, 283 }; 284 285 static int bmi270_set_scale(struct bmi270_data *data, int chan_type, int uscale) 286 { 287 int i; 288 int reg, mask; 289 struct bmi270_scale_item bmi270_scale_item; 290 291 switch (chan_type) { 292 case IIO_ACCEL: 293 reg = BMI270_ACC_CONF_RANGE_REG; 294 mask = BMI270_ACC_CONF_RANGE_MSK; 295 bmi270_scale_item = bmi270_scale_table[BMI270_ACCEL]; 296 break; 297 case IIO_ANGL_VEL: 298 reg = BMI270_GYR_CONF_RANGE_REG; 299 mask = BMI270_GYR_CONF_RANGE_MSK; 300 bmi270_scale_item = bmi270_scale_table[BMI270_GYRO]; 301 break; 302 default: 303 return -EINVAL; 304 } 305 306 guard(mutex)(&data->mutex); 307 308 for (i = 0; i < bmi270_scale_item.num; i++) { 309 if (bmi270_scale_item.tbl[i].uscale != uscale) 310 continue; 311 312 return regmap_update_bits(data->regmap, reg, mask, i); 313 } 314 315 return -EINVAL; 316 } 317 318 static int bmi270_get_scale(struct bmi270_data *data, int chan_type, int *scale, 319 int *uscale) 320 { 321 int ret; 322 unsigned int val; 323 struct bmi270_scale_item bmi270_scale_item; 324 325 guard(mutex)(&data->mutex); 326 327 switch (chan_type) { 328 case IIO_ACCEL: 329 ret = regmap_read(data->regmap, BMI270_ACC_CONF_RANGE_REG, &val); 330 if (ret) 331 return ret; 332 333 val = FIELD_GET(BMI270_ACC_CONF_RANGE_MSK, val); 334 bmi270_scale_item = bmi270_scale_table[BMI270_ACCEL]; 335 break; 336 case IIO_ANGL_VEL: 337 ret = regmap_read(data->regmap, BMI270_GYR_CONF_RANGE_REG, &val); 338 if (ret) 339 return ret; 340 341 val = FIELD_GET(BMI270_GYR_CONF_RANGE_MSK, val); 342 bmi270_scale_item = bmi270_scale_table[BMI270_GYRO]; 343 break; 344 case IIO_TEMP: 345 val = 0; 346 bmi270_scale_item = bmi270_scale_table[BMI270_TEMP]; 347 break; 348 default: 349 return -EINVAL; 350 } 351 352 if (val >= bmi270_scale_item.num) 353 return -EINVAL; 354 355 *scale = bmi270_scale_item.tbl[val].scale; 356 *uscale = bmi270_scale_item.tbl[val].uscale; 357 return 0; 358 } 359 360 static int bmi270_set_odr(struct bmi270_data *data, int chan_type, int odr, 361 int uodr) 362 { 363 int i; 364 int reg, mask; 365 struct bmi270_odr_item bmi270_odr_item; 366 367 switch (chan_type) { 368 case IIO_ACCEL: 369 reg = BMI270_ACC_CONF_REG; 370 mask = BMI270_ACC_CONF_ODR_MSK; 371 bmi270_odr_item = bmi270_odr_table[BMI270_ACCEL]; 372 break; 373 case IIO_ANGL_VEL: 374 reg = BMI270_GYR_CONF_REG; 375 mask = BMI270_GYR_CONF_ODR_MSK; 376 bmi270_odr_item = bmi270_odr_table[BMI270_GYRO]; 377 break; 378 default: 379 return -EINVAL; 380 } 381 382 guard(mutex)(&data->mutex); 383 384 for (i = 0; i < bmi270_odr_item.num; i++) { 385 if (bmi270_odr_item.tbl[i].odr != odr || 386 bmi270_odr_item.tbl[i].uodr != uodr) 387 continue; 388 389 return regmap_update_bits(data->regmap, reg, mask, 390 bmi270_odr_item.vals[i]); 391 } 392 393 return -EINVAL; 394 } 395 396 static int bmi270_get_odr(struct bmi270_data *data, int chan_type, int *odr, 397 int *uodr) 398 { 399 int i, val, ret; 400 struct bmi270_odr_item bmi270_odr_item; 401 402 guard(mutex)(&data->mutex); 403 404 switch (chan_type) { 405 case IIO_ACCEL: 406 ret = regmap_read(data->regmap, BMI270_ACC_CONF_REG, &val); 407 if (ret) 408 return ret; 409 410 val = FIELD_GET(BMI270_ACC_CONF_ODR_MSK, val); 411 bmi270_odr_item = bmi270_odr_table[BMI270_ACCEL]; 412 break; 413 case IIO_ANGL_VEL: 414 ret = regmap_read(data->regmap, BMI270_GYR_CONF_REG, &val); 415 if (ret) 416 return ret; 417 418 val = FIELD_GET(BMI270_GYR_CONF_ODR_MSK, val); 419 bmi270_odr_item = bmi270_odr_table[BMI270_GYRO]; 420 break; 421 default: 422 return -EINVAL; 423 } 424 425 for (i = 0; i < bmi270_odr_item.num; i++) { 426 if (val != bmi270_odr_item.vals[i]) 427 continue; 428 429 *odr = bmi270_odr_item.tbl[i].odr; 430 *uodr = bmi270_odr_item.tbl[i].uodr; 431 return 0; 432 } 433 434 return -EINVAL; 435 } 436 437 static irqreturn_t bmi270_irq_thread_handler(int irq, void *private) 438 { 439 struct iio_dev *indio_dev = private; 440 struct bmi270_data *data = iio_priv(indio_dev); 441 unsigned int status; 442 int ret; 443 444 scoped_guard(mutex, &data->mutex) { 445 ret = regmap_read(data->regmap, BMI270_INT_STATUS_1_REG, 446 &status); 447 if (ret) 448 return IRQ_NONE; 449 } 450 451 if (FIELD_GET(BMI270_INT_STATUS_1_ACC_GYR_DRDY_MSK, status)) 452 iio_trigger_poll_nested(data->trig); 453 454 return IRQ_HANDLED; 455 } 456 457 static int bmi270_data_rdy_trigger_set_state(struct iio_trigger *trig, 458 bool state) 459 { 460 struct bmi270_data *data = iio_trigger_get_drvdata(trig); 461 unsigned int field_value = 0; 462 unsigned int mask; 463 464 guard(mutex)(&data->mutex); 465 466 switch (data->irq_pin) { 467 case BMI270_IRQ_INT1: 468 mask = BMI270_INT_MAP_DATA_DRDY_INT1_MSK; 469 set_mask_bits(&field_value, BMI270_INT_MAP_DATA_DRDY_INT1_MSK, 470 FIELD_PREP(BMI270_INT_MAP_DATA_DRDY_INT1_MSK, 471 state)); 472 break; 473 case BMI270_IRQ_INT2: 474 mask = BMI270_INT_MAP_DATA_DRDY_INT2_MSK; 475 set_mask_bits(&field_value, BMI270_INT_MAP_DATA_DRDY_INT2_MSK, 476 FIELD_PREP(BMI270_INT_MAP_DATA_DRDY_INT2_MSK, 477 state)); 478 break; 479 default: 480 return -EINVAL; 481 } 482 483 return regmap_update_bits(data->regmap, BMI270_INT_MAP_DATA_REG, mask, 484 field_value); 485 } 486 487 static const struct iio_trigger_ops bmi270_trigger_ops = { 488 .set_trigger_state = &bmi270_data_rdy_trigger_set_state, 489 }; 490 491 static irqreturn_t bmi270_trigger_handler(int irq, void *p) 492 { 493 struct iio_poll_func *pf = p; 494 struct iio_dev *indio_dev = pf->indio_dev; 495 struct bmi270_data *data = iio_priv(indio_dev); 496 int ret; 497 498 guard(mutex)(&data->mutex); 499 500 ret = regmap_bulk_read(data->regmap, BMI270_ACCEL_X_REG, 501 &data->buffer.channels, 502 sizeof(data->buffer.channels)); 503 504 if (ret) 505 goto done; 506 507 iio_push_to_buffers_with_timestamp(indio_dev, &data->buffer, 508 pf->timestamp); 509 done: 510 iio_trigger_notify_done(indio_dev->trig); 511 return IRQ_HANDLED; 512 } 513 514 static int bmi270_get_data(struct bmi270_data *data, int chan_type, int axis, 515 int *val) 516 { 517 __le16 sample; 518 int reg; 519 int ret; 520 521 switch (chan_type) { 522 case IIO_ACCEL: 523 reg = BMI270_ACCEL_X_REG + (axis - IIO_MOD_X) * 2; 524 break; 525 case IIO_ANGL_VEL: 526 reg = BMI270_ANG_VEL_X_REG + (axis - IIO_MOD_X) * 2; 527 break; 528 case IIO_TEMP: 529 reg = BMI270_TEMPERATURE_0_REG; 530 break; 531 default: 532 return -EINVAL; 533 } 534 535 guard(mutex)(&data->mutex); 536 537 ret = regmap_bulk_read(data->regmap, reg, &sample, sizeof(sample)); 538 if (ret) 539 return ret; 540 541 *val = sign_extend32(le16_to_cpu(sample), 15); 542 543 return IIO_VAL_INT; 544 } 545 546 static int bmi270_read_raw(struct iio_dev *indio_dev, 547 struct iio_chan_spec const *chan, 548 int *val, int *val2, long mask) 549 { 550 int ret; 551 struct bmi270_data *data = iio_priv(indio_dev); 552 553 switch (mask) { 554 case IIO_CHAN_INFO_RAW: 555 if (!iio_device_claim_direct(indio_dev)) 556 return -EBUSY; 557 ret = bmi270_get_data(data, chan->type, chan->channel2, val); 558 iio_device_release_direct(indio_dev); 559 return ret; 560 case IIO_CHAN_INFO_SCALE: 561 ret = bmi270_get_scale(data, chan->type, val, val2); 562 return ret ? ret : IIO_VAL_INT_PLUS_MICRO; 563 case IIO_CHAN_INFO_OFFSET: 564 switch (chan->type) { 565 case IIO_TEMP: 566 *val = BMI270_TEMP_OFFSET; 567 return IIO_VAL_INT; 568 default: 569 return -EINVAL; 570 } 571 case IIO_CHAN_INFO_SAMP_FREQ: 572 ret = bmi270_get_odr(data, chan->type, val, val2); 573 return ret ? ret : IIO_VAL_INT_PLUS_MICRO; 574 default: 575 return -EINVAL; 576 } 577 } 578 579 static int bmi270_write_raw(struct iio_dev *indio_dev, 580 struct iio_chan_spec const *chan, 581 int val, int val2, long mask) 582 { 583 struct bmi270_data *data = iio_priv(indio_dev); 584 int ret; 585 586 switch (mask) { 587 case IIO_CHAN_INFO_SCALE: 588 if (!iio_device_claim_direct(indio_dev)) 589 return -EBUSY; 590 ret = bmi270_set_scale(data, chan->type, val2); 591 iio_device_release_direct(indio_dev); 592 return ret; 593 case IIO_CHAN_INFO_SAMP_FREQ: 594 if (!iio_device_claim_direct(indio_dev)) 595 return -EBUSY; 596 ret = bmi270_set_odr(data, chan->type, val, val2); 597 iio_device_release_direct(indio_dev); 598 return ret; 599 default: 600 return -EINVAL; 601 } 602 } 603 604 static int bmi270_read_avail(struct iio_dev *indio_dev, 605 struct iio_chan_spec const *chan, 606 const int **vals, int *type, int *length, 607 long mask) 608 { 609 switch (mask) { 610 case IIO_CHAN_INFO_SCALE: 611 *type = IIO_VAL_INT_PLUS_MICRO; 612 switch (chan->type) { 613 case IIO_ANGL_VEL: 614 *vals = (const int *)bmi270_gyro_scale; 615 *length = ARRAY_SIZE(bmi270_gyro_scale) * 2; 616 return IIO_AVAIL_LIST; 617 case IIO_ACCEL: 618 *vals = (const int *)bmi270_accel_scale; 619 *length = ARRAY_SIZE(bmi270_accel_scale) * 2; 620 return IIO_AVAIL_LIST; 621 default: 622 return -EINVAL; 623 } 624 case IIO_CHAN_INFO_SAMP_FREQ: 625 *type = IIO_VAL_INT_PLUS_MICRO; 626 switch (chan->type) { 627 case IIO_ANGL_VEL: 628 *vals = (const int *)bmi270_gyro_odr; 629 *length = ARRAY_SIZE(bmi270_gyro_odr) * 2; 630 return IIO_AVAIL_LIST; 631 case IIO_ACCEL: 632 *vals = (const int *)bmi270_accel_odr; 633 *length = ARRAY_SIZE(bmi270_accel_odr) * 2; 634 return IIO_AVAIL_LIST; 635 default: 636 return -EINVAL; 637 } 638 default: 639 return -EINVAL; 640 } 641 } 642 643 static const struct iio_info bmi270_info = { 644 .read_raw = bmi270_read_raw, 645 .write_raw = bmi270_write_raw, 646 .read_avail = bmi270_read_avail, 647 }; 648 649 #define BMI270_ACCEL_CHANNEL(_axis) { \ 650 .type = IIO_ACCEL, \ 651 .modified = 1, \ 652 .channel2 = IIO_MOD_##_axis, \ 653 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \ 654 .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE) | \ 655 BIT(IIO_CHAN_INFO_SAMP_FREQ), \ 656 .info_mask_shared_by_type_available = \ 657 BIT(IIO_CHAN_INFO_SCALE) | \ 658 BIT(IIO_CHAN_INFO_SAMP_FREQ), \ 659 .scan_index = BMI270_SCAN_ACCEL_##_axis, \ 660 .scan_type = { \ 661 .sign = 's', \ 662 .realbits = 16, \ 663 .storagebits = 16, \ 664 .endianness = IIO_LE, \ 665 }, \ 666 } 667 668 #define BMI270_ANG_VEL_CHANNEL(_axis) { \ 669 .type = IIO_ANGL_VEL, \ 670 .modified = 1, \ 671 .channel2 = IIO_MOD_##_axis, \ 672 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \ 673 .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE) | \ 674 BIT(IIO_CHAN_INFO_SAMP_FREQ), \ 675 .info_mask_shared_by_type_available = \ 676 BIT(IIO_CHAN_INFO_SCALE) | \ 677 BIT(IIO_CHAN_INFO_SAMP_FREQ), \ 678 .scan_index = BMI270_SCAN_GYRO_##_axis, \ 679 .scan_type = { \ 680 .sign = 's', \ 681 .realbits = 16, \ 682 .storagebits = 16, \ 683 .endianness = IIO_LE, \ 684 }, \ 685 } 686 687 static const struct iio_chan_spec bmi270_channels[] = { 688 BMI270_ACCEL_CHANNEL(X), 689 BMI270_ACCEL_CHANNEL(Y), 690 BMI270_ACCEL_CHANNEL(Z), 691 BMI270_ANG_VEL_CHANNEL(X), 692 BMI270_ANG_VEL_CHANNEL(Y), 693 BMI270_ANG_VEL_CHANNEL(Z), 694 { 695 .type = IIO_TEMP, 696 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | 697 BIT(IIO_CHAN_INFO_SCALE) | 698 BIT(IIO_CHAN_INFO_OFFSET), 699 .scan_index = -1, /* No buffer support */ 700 }, 701 IIO_CHAN_SOFT_TIMESTAMP(BMI270_SCAN_TIMESTAMP), 702 }; 703 704 static int bmi270_int_pin_config(struct bmi270_data *data, 705 enum bmi270_irq_pin irq_pin, 706 bool active_high, bool open_drain, bool latch) 707 { 708 unsigned int reg, field_value; 709 int ret; 710 711 ret = regmap_update_bits(data->regmap, BMI270_INT_LATCH_REG, 712 BMI270_INT_LATCH_REG_MSK, 713 FIELD_PREP(BMI270_INT_LATCH_REG_MSK, latch)); 714 if (ret) 715 return ret; 716 717 switch (irq_pin) { 718 case BMI270_IRQ_INT1: 719 reg = BMI270_INT1_IO_CTRL_REG; 720 break; 721 case BMI270_IRQ_INT2: 722 reg = BMI270_INT2_IO_CTRL_REG; 723 break; 724 default: 725 return -EINVAL; 726 } 727 728 field_value = FIELD_PREP(BMI270_INT_IO_CTRL_LVL_MSK, active_high) | 729 FIELD_PREP(BMI270_INT_IO_CTRL_OD_MSK, open_drain) | 730 FIELD_PREP(BMI270_INT_IO_CTRL_OP_MSK, 1); 731 return regmap_update_bits(data->regmap, reg, 732 BMI270_INT_IO_LVL_OD_OP_MSK, field_value); 733 } 734 735 static int bmi270_trigger_probe(struct bmi270_data *data, 736 struct iio_dev *indio_dev) 737 { 738 bool open_drain, active_high, latch; 739 struct fwnode_handle *fwnode; 740 enum bmi270_irq_pin irq_pin; 741 int ret, irq, irq_type; 742 743 fwnode = dev_fwnode(data->dev); 744 if (!fwnode) 745 return -ENODEV; 746 747 irq = fwnode_irq_get_byname(fwnode, "INT1"); 748 if (irq > 0) { 749 irq_pin = BMI270_IRQ_INT1; 750 } else { 751 irq = fwnode_irq_get_byname(fwnode, "INT2"); 752 if (irq < 0) 753 return 0; 754 755 irq_pin = BMI270_IRQ_INT2; 756 } 757 758 irq_type = irq_get_trigger_type(irq); 759 switch (irq_type) { 760 case IRQF_TRIGGER_RISING: 761 latch = false; 762 active_high = true; 763 break; 764 case IRQF_TRIGGER_HIGH: 765 latch = true; 766 active_high = true; 767 break; 768 case IRQF_TRIGGER_FALLING: 769 latch = false; 770 active_high = false; 771 break; 772 case IRQF_TRIGGER_LOW: 773 latch = true; 774 active_high = false; 775 break; 776 default: 777 return dev_err_probe(data->dev, -EINVAL, 778 "Invalid interrupt type 0x%x specified\n", 779 irq_type); 780 } 781 782 open_drain = fwnode_property_read_bool(fwnode, "drive-open-drain"); 783 784 ret = bmi270_int_pin_config(data, irq_pin, active_high, open_drain, 785 latch); 786 if (ret) 787 return dev_err_probe(data->dev, ret, 788 "Failed to configure irq line\n"); 789 790 data->trig = devm_iio_trigger_alloc(data->dev, "%s-trig-%d", 791 indio_dev->name, irq_pin); 792 if (!data->trig) 793 return -ENOMEM; 794 795 data->trig->ops = &bmi270_trigger_ops; 796 iio_trigger_set_drvdata(data->trig, data); 797 798 ret = devm_request_threaded_irq(data->dev, irq, NULL, 799 bmi270_irq_thread_handler, 800 IRQF_ONESHOT, "bmi270-int", indio_dev); 801 if (ret) 802 return dev_err_probe(data->dev, ret, "Failed to request IRQ\n"); 803 804 ret = devm_iio_trigger_register(data->dev, data->trig); 805 if (ret) 806 return dev_err_probe(data->dev, ret, 807 "Trigger registration failed\n"); 808 809 data->irq_pin = irq_pin; 810 811 return 0; 812 } 813 814 static int bmi270_validate_chip_id(struct bmi270_data *data) 815 { 816 int chip_id; 817 int ret; 818 struct device *dev = data->dev; 819 struct regmap *regmap = data->regmap; 820 821 ret = regmap_read(regmap, BMI270_CHIP_ID_REG, &chip_id); 822 if (ret) 823 return dev_err_probe(dev, ret, "Failed to read chip id"); 824 825 /* 826 * Some manufacturers use "BMI0160" for both the BMI160 and 827 * BMI260. If the device is actually a BMI160, the bmi160 828 * driver should handle it and this driver should not. 829 */ 830 if (chip_id == BMI160_CHIP_ID_VAL) 831 return -ENODEV; 832 833 if (chip_id != data->chip_info->chip_id) 834 dev_info(dev, "Unexpected chip id 0x%x", chip_id); 835 836 if (chip_id == bmi260_chip_info.chip_id) 837 data->chip_info = &bmi260_chip_info; 838 else if (chip_id == bmi270_chip_info.chip_id) 839 data->chip_info = &bmi270_chip_info; 840 841 return 0; 842 } 843 844 static int bmi270_write_calibration_data(struct bmi270_data *data) 845 { 846 int ret; 847 int status = 0; 848 const struct firmware *init_data; 849 struct device *dev = data->dev; 850 struct regmap *regmap = data->regmap; 851 852 ret = regmap_clear_bits(regmap, BMI270_PWR_CONF_REG, 853 BMI270_PWR_CONF_ADV_PWR_SAVE_MSK); 854 if (ret) 855 return dev_err_probe(dev, ret, 856 "Failed to write power configuration"); 857 858 /* 859 * After disabling advanced power save, all registers are accessible 860 * after a 450us delay. This delay is specified in table A of the 861 * datasheet. 862 */ 863 usleep_range(450, 1000); 864 865 ret = regmap_clear_bits(regmap, BMI270_INIT_CTRL_REG, 866 BMI270_INIT_CTRL_LOAD_DONE_MSK); 867 if (ret) 868 return dev_err_probe(dev, ret, 869 "Failed to prepare device to load init data"); 870 871 ret = request_firmware(&init_data, data->chip_info->fw_name, dev); 872 if (ret) 873 return dev_err_probe(dev, ret, "Failed to load init data file"); 874 875 ret = regmap_bulk_write(regmap, BMI270_INIT_DATA_REG, 876 init_data->data, init_data->size); 877 release_firmware(init_data); 878 if (ret) 879 return dev_err_probe(dev, ret, "Failed to write init data"); 880 881 ret = regmap_set_bits(regmap, BMI270_INIT_CTRL_REG, 882 BMI270_INIT_CTRL_LOAD_DONE_MSK); 883 if (ret) 884 return dev_err_probe(dev, ret, 885 "Failed to stop device initialization"); 886 887 /* 888 * Wait at least 140ms for the device to complete configuration. 889 * This delay is specified in table C of the datasheet. 890 */ 891 usleep_range(140000, 160000); 892 893 ret = regmap_read(regmap, BMI270_INTERNAL_STATUS_REG, &status); 894 if (ret) 895 return dev_err_probe(dev, ret, "Failed to read internal status"); 896 897 if (status != BMI270_INTERNAL_STATUS_MSG_INIT_OK) 898 return dev_err_probe(dev, -ENODEV, "Device failed to initialize"); 899 900 return 0; 901 } 902 903 static int bmi270_configure_imu(struct bmi270_data *data) 904 { 905 int ret; 906 struct device *dev = data->dev; 907 struct regmap *regmap = data->regmap; 908 909 ret = regmap_set_bits(regmap, BMI270_PWR_CTRL_REG, 910 BMI270_PWR_CTRL_AUX_EN_MSK | 911 BMI270_PWR_CTRL_GYR_EN_MSK | 912 BMI270_PWR_CTRL_ACCEL_EN_MSK | 913 BMI270_PWR_CTRL_TEMP_EN_MSK); 914 if (ret) 915 return dev_err_probe(dev, ret, "Failed to enable accelerometer and gyroscope"); 916 917 ret = regmap_set_bits(regmap, BMI270_ACC_CONF_REG, 918 FIELD_PREP(BMI270_ACC_CONF_ODR_MSK, 919 BMI270_ACC_CONF_ODR_100HZ) | 920 FIELD_PREP(BMI270_ACC_CONF_BWP_MSK, 921 BMI270_ACC_CONF_BWP_NORMAL_MODE) | 922 BMI270_PWR_CONF_ADV_PWR_SAVE_MSK); 923 if (ret) 924 return dev_err_probe(dev, ret, "Failed to configure accelerometer"); 925 926 ret = regmap_set_bits(regmap, BMI270_GYR_CONF_REG, 927 FIELD_PREP(BMI270_GYR_CONF_ODR_MSK, 928 BMI270_GYR_CONF_ODR_200HZ) | 929 FIELD_PREP(BMI270_GYR_CONF_BWP_MSK, 930 BMI270_GYR_CONF_BWP_NORMAL_MODE) | 931 BMI270_PWR_CONF_ADV_PWR_SAVE_MSK); 932 if (ret) 933 return dev_err_probe(dev, ret, "Failed to configure gyroscope"); 934 935 /* Enable FIFO_WKUP, Disable ADV_PWR_SAVE and FUP_EN */ 936 ret = regmap_write(regmap, BMI270_PWR_CONF_REG, 937 BMI270_PWR_CONF_FIFO_WKUP_MSK); 938 if (ret) 939 return dev_err_probe(dev, ret, "Failed to set power configuration"); 940 941 return 0; 942 } 943 944 static int bmi270_chip_init(struct bmi270_data *data) 945 { 946 int ret; 947 948 ret = bmi270_validate_chip_id(data); 949 if (ret) 950 return ret; 951 952 ret = bmi270_write_calibration_data(data); 953 if (ret) 954 return ret; 955 956 return bmi270_configure_imu(data); 957 } 958 959 int bmi270_core_probe(struct device *dev, struct regmap *regmap, 960 const struct bmi270_chip_info *chip_info) 961 { 962 int ret; 963 struct bmi270_data *data; 964 struct iio_dev *indio_dev; 965 966 indio_dev = devm_iio_device_alloc(dev, sizeof(*data)); 967 if (!indio_dev) 968 return -ENOMEM; 969 970 data = iio_priv(indio_dev); 971 data->dev = dev; 972 data->regmap = regmap; 973 data->chip_info = chip_info; 974 data->irq_pin = BMI270_IRQ_DISABLED; 975 mutex_init(&data->mutex); 976 977 ret = bmi270_chip_init(data); 978 if (ret) 979 return ret; 980 981 indio_dev->channels = bmi270_channels; 982 indio_dev->num_channels = ARRAY_SIZE(bmi270_channels); 983 indio_dev->name = chip_info->name; 984 indio_dev->available_scan_masks = bmi270_avail_scan_masks; 985 indio_dev->modes = INDIO_DIRECT_MODE; 986 indio_dev->info = &bmi270_info; 987 988 ret = bmi270_trigger_probe(data, indio_dev); 989 if (ret) 990 return ret; 991 992 ret = devm_iio_triggered_buffer_setup(dev, indio_dev, 993 iio_pollfunc_store_time, 994 bmi270_trigger_handler, NULL); 995 if (ret) 996 return ret; 997 998 return devm_iio_device_register(dev, indio_dev); 999 } 1000 EXPORT_SYMBOL_NS_GPL(bmi270_core_probe, "IIO_BMI270"); 1001 1002 MODULE_AUTHOR("Alex Lanzano"); 1003 MODULE_DESCRIPTION("BMI270 driver"); 1004 MODULE_LICENSE("GPL"); 1005