xref: /linux/drivers/iio/health/max30100.c (revision b11a34607ded9b3dfb1992da47ac94bdf5945d53)
14d33615dSMatt Ranostay /*
24d33615dSMatt Ranostay  * max30100.c - Support for MAX30100 heart rate and pulse oximeter sensor
34d33615dSMatt Ranostay  *
44d33615dSMatt Ranostay  * Copyright (C) 2015 Matt Ranostay <mranostay@gmail.com>
54d33615dSMatt Ranostay  *
64d33615dSMatt Ranostay  * This program is free software; you can redistribute it and/or modify
74d33615dSMatt Ranostay  * it under the terms of the GNU General Public License as published by
84d33615dSMatt Ranostay  * the Free Software Foundation; either version 2 of the License, or
94d33615dSMatt Ranostay  * (at your option) any later version.
104d33615dSMatt Ranostay  *
114d33615dSMatt Ranostay  * This program is distributed in the hope that it will be useful,
124d33615dSMatt Ranostay  * but WITHOUT ANY WARRANTY; without even the implied warranty of
134d33615dSMatt Ranostay  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
144d33615dSMatt Ranostay  * GNU General Public License for more details.
154d33615dSMatt Ranostay  *
16*b11a3460SMatt Ranostay  * TODO: enable pulse length controls via device tree properties
174d33615dSMatt Ranostay  */
184d33615dSMatt Ranostay 
194d33615dSMatt Ranostay #include <linux/module.h>
204d33615dSMatt Ranostay #include <linux/init.h>
214d33615dSMatt Ranostay #include <linux/interrupt.h>
224d33615dSMatt Ranostay #include <linux/delay.h>
234d33615dSMatt Ranostay #include <linux/err.h>
244d33615dSMatt Ranostay #include <linux/irq.h>
254d33615dSMatt Ranostay #include <linux/i2c.h>
264d33615dSMatt Ranostay #include <linux/mutex.h>
27*b11a3460SMatt Ranostay #include <linux/of.h>
284d33615dSMatt Ranostay #include <linux/regmap.h>
294d33615dSMatt Ranostay #include <linux/iio/iio.h>
304d33615dSMatt Ranostay #include <linux/iio/buffer.h>
314d33615dSMatt Ranostay #include <linux/iio/kfifo_buf.h>
324d33615dSMatt Ranostay 
334d33615dSMatt Ranostay #define MAX30100_REGMAP_NAME	"max30100_regmap"
344d33615dSMatt Ranostay #define MAX30100_DRV_NAME	"max30100"
354d33615dSMatt Ranostay 
364d33615dSMatt Ranostay #define MAX30100_REG_INT_STATUS			0x00
374d33615dSMatt Ranostay #define MAX30100_REG_INT_STATUS_PWR_RDY		BIT(0)
384d33615dSMatt Ranostay #define MAX30100_REG_INT_STATUS_SPO2_RDY	BIT(4)
394d33615dSMatt Ranostay #define MAX30100_REG_INT_STATUS_HR_RDY		BIT(5)
404d33615dSMatt Ranostay #define MAX30100_REG_INT_STATUS_FIFO_RDY	BIT(7)
414d33615dSMatt Ranostay 
424d33615dSMatt Ranostay #define MAX30100_REG_INT_ENABLE			0x01
434d33615dSMatt Ranostay #define MAX30100_REG_INT_ENABLE_SPO2_EN		BIT(0)
444d33615dSMatt Ranostay #define MAX30100_REG_INT_ENABLE_HR_EN		BIT(1)
454d33615dSMatt Ranostay #define MAX30100_REG_INT_ENABLE_FIFO_EN		BIT(3)
464d33615dSMatt Ranostay #define MAX30100_REG_INT_ENABLE_MASK		0xf0
474d33615dSMatt Ranostay #define MAX30100_REG_INT_ENABLE_MASK_SHIFT	4
484d33615dSMatt Ranostay 
494d33615dSMatt Ranostay #define MAX30100_REG_FIFO_WR_PTR		0x02
504d33615dSMatt Ranostay #define MAX30100_REG_FIFO_OVR_CTR		0x03
514d33615dSMatt Ranostay #define MAX30100_REG_FIFO_RD_PTR		0x04
524d33615dSMatt Ranostay #define MAX30100_REG_FIFO_DATA			0x05
534d33615dSMatt Ranostay #define MAX30100_REG_FIFO_DATA_ENTRY_COUNT	16
544d33615dSMatt Ranostay #define MAX30100_REG_FIFO_DATA_ENTRY_LEN	4
554d33615dSMatt Ranostay 
564d33615dSMatt Ranostay #define MAX30100_REG_MODE_CONFIG		0x06
574d33615dSMatt Ranostay #define MAX30100_REG_MODE_CONFIG_MODE_SPO2_EN	BIT(0)
584d33615dSMatt Ranostay #define MAX30100_REG_MODE_CONFIG_MODE_HR_EN	BIT(1)
594d33615dSMatt Ranostay #define MAX30100_REG_MODE_CONFIG_MODE_MASK	0x03
604d33615dSMatt Ranostay #define MAX30100_REG_MODE_CONFIG_TEMP_EN	BIT(3)
614d33615dSMatt Ranostay #define MAX30100_REG_MODE_CONFIG_PWR		BIT(7)
624d33615dSMatt Ranostay 
634d33615dSMatt Ranostay #define MAX30100_REG_SPO2_CONFIG		0x07
644d33615dSMatt Ranostay #define MAX30100_REG_SPO2_CONFIG_100HZ		BIT(2)
654d33615dSMatt Ranostay #define MAX30100_REG_SPO2_CONFIG_HI_RES_EN	BIT(6)
664d33615dSMatt Ranostay #define MAX30100_REG_SPO2_CONFIG_1600US		0x3
674d33615dSMatt Ranostay 
684d33615dSMatt Ranostay #define MAX30100_REG_LED_CONFIG			0x09
69*b11a3460SMatt Ranostay #define MAX30100_REG_LED_CONFIG_LED_MASK	0x0f
704d33615dSMatt Ranostay #define MAX30100_REG_LED_CONFIG_RED_LED_SHIFT	4
714d33615dSMatt Ranostay 
724d33615dSMatt Ranostay #define MAX30100_REG_LED_CONFIG_24MA		0x07
734d33615dSMatt Ranostay #define MAX30100_REG_LED_CONFIG_50MA		0x0f
744d33615dSMatt Ranostay 
754d33615dSMatt Ranostay #define MAX30100_REG_TEMP_INTEGER		0x16
764d33615dSMatt Ranostay #define MAX30100_REG_TEMP_FRACTION		0x17
774d33615dSMatt Ranostay 
784d33615dSMatt Ranostay struct max30100_data {
794d33615dSMatt Ranostay 	struct i2c_client *client;
804d33615dSMatt Ranostay 	struct iio_dev *indio_dev;
814d33615dSMatt Ranostay 	struct mutex lock;
824d33615dSMatt Ranostay 	struct regmap *regmap;
834d33615dSMatt Ranostay 
844d33615dSMatt Ranostay 	__be16 buffer[2]; /* 2 16-bit channels */
854d33615dSMatt Ranostay };
864d33615dSMatt Ranostay 
874d33615dSMatt Ranostay static bool max30100_is_volatile_reg(struct device *dev, unsigned int reg)
884d33615dSMatt Ranostay {
894d33615dSMatt Ranostay 	switch (reg) {
904d33615dSMatt Ranostay 	case MAX30100_REG_INT_STATUS:
914d33615dSMatt Ranostay 	case MAX30100_REG_MODE_CONFIG:
924d33615dSMatt Ranostay 	case MAX30100_REG_FIFO_WR_PTR:
934d33615dSMatt Ranostay 	case MAX30100_REG_FIFO_OVR_CTR:
944d33615dSMatt Ranostay 	case MAX30100_REG_FIFO_RD_PTR:
954d33615dSMatt Ranostay 	case MAX30100_REG_FIFO_DATA:
964d33615dSMatt Ranostay 	case MAX30100_REG_TEMP_INTEGER:
974d33615dSMatt Ranostay 	case MAX30100_REG_TEMP_FRACTION:
984d33615dSMatt Ranostay 		return true;
994d33615dSMatt Ranostay 	default:
1004d33615dSMatt Ranostay 		return false;
1014d33615dSMatt Ranostay 	}
1024d33615dSMatt Ranostay }
1034d33615dSMatt Ranostay 
1044d33615dSMatt Ranostay static const struct regmap_config max30100_regmap_config = {
1054d33615dSMatt Ranostay 	.name = MAX30100_REGMAP_NAME,
1064d33615dSMatt Ranostay 
1074d33615dSMatt Ranostay 	.reg_bits = 8,
1084d33615dSMatt Ranostay 	.val_bits = 8,
1094d33615dSMatt Ranostay 
1104d33615dSMatt Ranostay 	.max_register = MAX30100_REG_TEMP_FRACTION,
1114d33615dSMatt Ranostay 	.cache_type = REGCACHE_FLAT,
1124d33615dSMatt Ranostay 
1134d33615dSMatt Ranostay 	.volatile_reg = max30100_is_volatile_reg,
1144d33615dSMatt Ranostay };
1154d33615dSMatt Ranostay 
116*b11a3460SMatt Ranostay static const unsigned int max30100_led_current_mapping[] = {
117*b11a3460SMatt Ranostay 	4400, 7600, 11000, 14200, 17400,
118*b11a3460SMatt Ranostay 	20800, 24000, 27100, 30600, 33800,
119*b11a3460SMatt Ranostay 	37000, 40200, 43600, 46800, 50000
120*b11a3460SMatt Ranostay };
121*b11a3460SMatt Ranostay 
1224d33615dSMatt Ranostay static const unsigned long max30100_scan_masks[] = {0x3, 0};
1234d33615dSMatt Ranostay 
1244d33615dSMatt Ranostay static const struct iio_chan_spec max30100_channels[] = {
1254d33615dSMatt Ranostay 	{
1264d33615dSMatt Ranostay 		.type = IIO_INTENSITY,
1274d33615dSMatt Ranostay 		.channel2 = IIO_MOD_LIGHT_IR,
1284d33615dSMatt Ranostay 		.modified = 1,
1294d33615dSMatt Ranostay 
1304d33615dSMatt Ranostay 		.scan_index = 0,
1314d33615dSMatt Ranostay 		.scan_type = {
1324d33615dSMatt Ranostay 			.sign = 'u',
1334d33615dSMatt Ranostay 			.realbits = 16,
1344d33615dSMatt Ranostay 			.storagebits = 16,
1354d33615dSMatt Ranostay 			.endianness = IIO_BE,
1364d33615dSMatt Ranostay 		},
1374d33615dSMatt Ranostay 	},
1384d33615dSMatt Ranostay 	{
1394d33615dSMatt Ranostay 		.type = IIO_INTENSITY,
1404d33615dSMatt Ranostay 		.channel2 = IIO_MOD_LIGHT_RED,
1414d33615dSMatt Ranostay 		.modified = 1,
1424d33615dSMatt Ranostay 
1434d33615dSMatt Ranostay 		.scan_index = 1,
1444d33615dSMatt Ranostay 		.scan_type = {
1454d33615dSMatt Ranostay 			.sign = 'u',
1464d33615dSMatt Ranostay 			.realbits = 16,
1474d33615dSMatt Ranostay 			.storagebits = 16,
1484d33615dSMatt Ranostay 			.endianness = IIO_BE,
1494d33615dSMatt Ranostay 		},
1504d33615dSMatt Ranostay 	},
1514d33615dSMatt Ranostay 	{
1524d33615dSMatt Ranostay 		.type = IIO_TEMP,
1534d33615dSMatt Ranostay 		.info_mask_separate =
1544d33615dSMatt Ranostay 			BIT(IIO_CHAN_INFO_RAW) | BIT(IIO_CHAN_INFO_SCALE),
1554d33615dSMatt Ranostay 		.scan_index = -1,
1564d33615dSMatt Ranostay 	},
1574d33615dSMatt Ranostay };
1584d33615dSMatt Ranostay 
1594d33615dSMatt Ranostay static int max30100_set_powermode(struct max30100_data *data, bool state)
1604d33615dSMatt Ranostay {
1614d33615dSMatt Ranostay 	return regmap_update_bits(data->regmap, MAX30100_REG_MODE_CONFIG,
1624d33615dSMatt Ranostay 				  MAX30100_REG_MODE_CONFIG_PWR,
1634d33615dSMatt Ranostay 				  state ? 0 : MAX30100_REG_MODE_CONFIG_PWR);
1644d33615dSMatt Ranostay }
1654d33615dSMatt Ranostay 
1664d33615dSMatt Ranostay static int max30100_clear_fifo(struct max30100_data *data)
1674d33615dSMatt Ranostay {
1684d33615dSMatt Ranostay 	int ret;
1694d33615dSMatt Ranostay 
1704d33615dSMatt Ranostay 	ret = regmap_write(data->regmap, MAX30100_REG_FIFO_WR_PTR, 0);
1714d33615dSMatt Ranostay 	if (ret)
1724d33615dSMatt Ranostay 		return ret;
1734d33615dSMatt Ranostay 
1744d33615dSMatt Ranostay 	ret = regmap_write(data->regmap, MAX30100_REG_FIFO_OVR_CTR, 0);
1754d33615dSMatt Ranostay 	if (ret)
1764d33615dSMatt Ranostay 		return ret;
1774d33615dSMatt Ranostay 
1784d33615dSMatt Ranostay 	return regmap_write(data->regmap, MAX30100_REG_FIFO_RD_PTR, 0);
1794d33615dSMatt Ranostay }
1804d33615dSMatt Ranostay 
1814d33615dSMatt Ranostay static int max30100_buffer_postenable(struct iio_dev *indio_dev)
1824d33615dSMatt Ranostay {
1834d33615dSMatt Ranostay 	struct max30100_data *data = iio_priv(indio_dev);
1844d33615dSMatt Ranostay 	int ret;
1854d33615dSMatt Ranostay 
1864d33615dSMatt Ranostay 	ret = max30100_set_powermode(data, true);
1874d33615dSMatt Ranostay 	if (ret)
1884d33615dSMatt Ranostay 		return ret;
1894d33615dSMatt Ranostay 
1904d33615dSMatt Ranostay 	return max30100_clear_fifo(data);
1914d33615dSMatt Ranostay }
1924d33615dSMatt Ranostay 
1934d33615dSMatt Ranostay static int max30100_buffer_predisable(struct iio_dev *indio_dev)
1944d33615dSMatt Ranostay {
1954d33615dSMatt Ranostay 	struct max30100_data *data = iio_priv(indio_dev);
1964d33615dSMatt Ranostay 
1974d33615dSMatt Ranostay 	return max30100_set_powermode(data, false);
1984d33615dSMatt Ranostay }
1994d33615dSMatt Ranostay 
2004d33615dSMatt Ranostay static const struct iio_buffer_setup_ops max30100_buffer_setup_ops = {
2014d33615dSMatt Ranostay 	.postenable = max30100_buffer_postenable,
2024d33615dSMatt Ranostay 	.predisable = max30100_buffer_predisable,
2034d33615dSMatt Ranostay };
2044d33615dSMatt Ranostay 
2054d33615dSMatt Ranostay static inline int max30100_fifo_count(struct max30100_data *data)
2064d33615dSMatt Ranostay {
2074d33615dSMatt Ranostay 	unsigned int val;
2084d33615dSMatt Ranostay 	int ret;
2094d33615dSMatt Ranostay 
2104d33615dSMatt Ranostay 	ret = regmap_read(data->regmap, MAX30100_REG_INT_STATUS, &val);
2114d33615dSMatt Ranostay 	if (ret)
2124d33615dSMatt Ranostay 		return ret;
2134d33615dSMatt Ranostay 
2144d33615dSMatt Ranostay 	/* FIFO is almost full */
2154d33615dSMatt Ranostay 	if (val & MAX30100_REG_INT_STATUS_FIFO_RDY)
2164d33615dSMatt Ranostay 		return MAX30100_REG_FIFO_DATA_ENTRY_COUNT - 1;
2174d33615dSMatt Ranostay 
2184d33615dSMatt Ranostay 	return 0;
2194d33615dSMatt Ranostay }
2204d33615dSMatt Ranostay 
2214d33615dSMatt Ranostay static int max30100_read_measurement(struct max30100_data *data)
2224d33615dSMatt Ranostay {
2234d33615dSMatt Ranostay 	int ret;
2244d33615dSMatt Ranostay 
2254d33615dSMatt Ranostay 	ret = i2c_smbus_read_i2c_block_data(data->client,
2264d33615dSMatt Ranostay 					    MAX30100_REG_FIFO_DATA,
2274d33615dSMatt Ranostay 					    MAX30100_REG_FIFO_DATA_ENTRY_LEN,
2284d33615dSMatt Ranostay 					    (u8 *) &data->buffer);
2294d33615dSMatt Ranostay 
2304d33615dSMatt Ranostay 	return (ret == MAX30100_REG_FIFO_DATA_ENTRY_LEN) ? 0 : ret;
2314d33615dSMatt Ranostay }
2324d33615dSMatt Ranostay 
2334d33615dSMatt Ranostay static irqreturn_t max30100_interrupt_handler(int irq, void *private)
2344d33615dSMatt Ranostay {
2354d33615dSMatt Ranostay 	struct iio_dev *indio_dev = private;
2364d33615dSMatt Ranostay 	struct max30100_data *data = iio_priv(indio_dev);
2374d33615dSMatt Ranostay 	int ret, cnt = 0;
2384d33615dSMatt Ranostay 
2394d33615dSMatt Ranostay 	mutex_lock(&data->lock);
2404d33615dSMatt Ranostay 
2414d33615dSMatt Ranostay 	while (cnt-- || (cnt = max30100_fifo_count(data) > 0)) {
2424d33615dSMatt Ranostay 		ret = max30100_read_measurement(data);
2434d33615dSMatt Ranostay 		if (ret)
2444d33615dSMatt Ranostay 			break;
2454d33615dSMatt Ranostay 
2464d33615dSMatt Ranostay 		iio_push_to_buffers(data->indio_dev, data->buffer);
2474d33615dSMatt Ranostay 	}
2484d33615dSMatt Ranostay 
2494d33615dSMatt Ranostay 	mutex_unlock(&data->lock);
2504d33615dSMatt Ranostay 
2514d33615dSMatt Ranostay 	return IRQ_HANDLED;
2524d33615dSMatt Ranostay }
2534d33615dSMatt Ranostay 
254*b11a3460SMatt Ranostay static int max30100_get_current_idx(unsigned int val, int *reg)
255*b11a3460SMatt Ranostay {
256*b11a3460SMatt Ranostay 	int idx;
257*b11a3460SMatt Ranostay 
258*b11a3460SMatt Ranostay 	/* LED turned off */
259*b11a3460SMatt Ranostay 	if (val == 0) {
260*b11a3460SMatt Ranostay 		*reg = 0;
261*b11a3460SMatt Ranostay 		return 0;
262*b11a3460SMatt Ranostay 	}
263*b11a3460SMatt Ranostay 
264*b11a3460SMatt Ranostay 	for (idx = 0; idx < ARRAY_SIZE(max30100_led_current_mapping); idx++) {
265*b11a3460SMatt Ranostay 		if (max30100_led_current_mapping[idx] == val) {
266*b11a3460SMatt Ranostay 			*reg = idx + 1;
267*b11a3460SMatt Ranostay 			return 0;
268*b11a3460SMatt Ranostay 		}
269*b11a3460SMatt Ranostay 	}
270*b11a3460SMatt Ranostay 
271*b11a3460SMatt Ranostay 	return -EINVAL;
272*b11a3460SMatt Ranostay }
273*b11a3460SMatt Ranostay 
274*b11a3460SMatt Ranostay static int max30100_led_init(struct max30100_data *data)
275*b11a3460SMatt Ranostay {
276*b11a3460SMatt Ranostay 	struct device *dev = &data->client->dev;
277*b11a3460SMatt Ranostay 	struct device_node *np = dev->of_node;
278*b11a3460SMatt Ranostay 	unsigned int val[2];
279*b11a3460SMatt Ranostay 	int reg, ret;
280*b11a3460SMatt Ranostay 
281*b11a3460SMatt Ranostay 	ret = of_property_read_u32_array(np, "maxim,led-current-microamp",
282*b11a3460SMatt Ranostay 					(unsigned int *) &val, 2);
283*b11a3460SMatt Ranostay 	if (ret) {
284*b11a3460SMatt Ranostay 		/* Default to 24 mA RED LED, 50 mA IR LED */
285*b11a3460SMatt Ranostay 		reg = (MAX30100_REG_LED_CONFIG_24MA <<
286*b11a3460SMatt Ranostay 			MAX30100_REG_LED_CONFIG_RED_LED_SHIFT) |
287*b11a3460SMatt Ranostay 			MAX30100_REG_LED_CONFIG_50MA;
288*b11a3460SMatt Ranostay 		dev_warn(dev, "no led-current-microamp set");
289*b11a3460SMatt Ranostay 
290*b11a3460SMatt Ranostay 		return regmap_write(data->regmap, MAX30100_REG_LED_CONFIG, reg);
291*b11a3460SMatt Ranostay 	}
292*b11a3460SMatt Ranostay 
293*b11a3460SMatt Ranostay 	/* RED LED current */
294*b11a3460SMatt Ranostay 	ret = max30100_get_current_idx(val[0], &reg);
295*b11a3460SMatt Ranostay 	if (ret) {
296*b11a3460SMatt Ranostay 		dev_err(dev, "invalid RED current setting %d", val[0]);
297*b11a3460SMatt Ranostay 		return ret;
298*b11a3460SMatt Ranostay 	}
299*b11a3460SMatt Ranostay 
300*b11a3460SMatt Ranostay 	ret = regmap_update_bits(data->regmap, MAX30100_REG_LED_CONFIG,
301*b11a3460SMatt Ranostay 		MAX30100_REG_LED_CONFIG_LED_MASK <<
302*b11a3460SMatt Ranostay 		MAX30100_REG_LED_CONFIG_RED_LED_SHIFT,
303*b11a3460SMatt Ranostay 		reg << MAX30100_REG_LED_CONFIG_RED_LED_SHIFT);
304*b11a3460SMatt Ranostay 	if (ret)
305*b11a3460SMatt Ranostay 		return ret;
306*b11a3460SMatt Ranostay 
307*b11a3460SMatt Ranostay 	/* IR LED current */
308*b11a3460SMatt Ranostay 	ret = max30100_get_current_idx(val[1], &reg);
309*b11a3460SMatt Ranostay 	if (ret) {
310*b11a3460SMatt Ranostay 		dev_err(dev, "invalid IR current setting %d", val[1]);
311*b11a3460SMatt Ranostay 		return ret;
312*b11a3460SMatt Ranostay 	}
313*b11a3460SMatt Ranostay 
314*b11a3460SMatt Ranostay 	return regmap_update_bits(data->regmap, MAX30100_REG_LED_CONFIG,
315*b11a3460SMatt Ranostay 		MAX30100_REG_LED_CONFIG_LED_MASK, reg);
316*b11a3460SMatt Ranostay }
317*b11a3460SMatt Ranostay 
3184d33615dSMatt Ranostay static int max30100_chip_init(struct max30100_data *data)
3194d33615dSMatt Ranostay {
3204d33615dSMatt Ranostay 	int ret;
3214d33615dSMatt Ranostay 
322*b11a3460SMatt Ranostay 	/* setup LED current settings */
323*b11a3460SMatt Ranostay 	ret = max30100_led_init(data);
3244d33615dSMatt Ranostay 	if (ret)
3254d33615dSMatt Ranostay 		return ret;
3264d33615dSMatt Ranostay 
3274d33615dSMatt Ranostay 	/* enable hi-res SPO2 readings at 100Hz */
3284d33615dSMatt Ranostay 	ret = regmap_write(data->regmap, MAX30100_REG_SPO2_CONFIG,
3294d33615dSMatt Ranostay 				 MAX30100_REG_SPO2_CONFIG_HI_RES_EN |
3304d33615dSMatt Ranostay 				 MAX30100_REG_SPO2_CONFIG_100HZ);
3314d33615dSMatt Ranostay 	if (ret)
3324d33615dSMatt Ranostay 		return ret;
3334d33615dSMatt Ranostay 
3344d33615dSMatt Ranostay 	/* enable SPO2 mode */
3354d33615dSMatt Ranostay 	ret = regmap_update_bits(data->regmap, MAX30100_REG_MODE_CONFIG,
3364d33615dSMatt Ranostay 				 MAX30100_REG_MODE_CONFIG_MODE_MASK,
3374d33615dSMatt Ranostay 				 MAX30100_REG_MODE_CONFIG_MODE_HR_EN |
3384d33615dSMatt Ranostay 				 MAX30100_REG_MODE_CONFIG_MODE_SPO2_EN);
3394d33615dSMatt Ranostay 	if (ret)
3404d33615dSMatt Ranostay 		return ret;
3414d33615dSMatt Ranostay 
3424d33615dSMatt Ranostay 	/* enable FIFO interrupt */
3434d33615dSMatt Ranostay 	return regmap_update_bits(data->regmap, MAX30100_REG_INT_ENABLE,
3444d33615dSMatt Ranostay 				 MAX30100_REG_INT_ENABLE_MASK,
3454d33615dSMatt Ranostay 				 MAX30100_REG_INT_ENABLE_FIFO_EN
3464d33615dSMatt Ranostay 				 << MAX30100_REG_INT_ENABLE_MASK_SHIFT);
3474d33615dSMatt Ranostay }
3484d33615dSMatt Ranostay 
3494d33615dSMatt Ranostay static int max30100_read_temp(struct max30100_data *data, int *val)
3504d33615dSMatt Ranostay {
3514d33615dSMatt Ranostay 	int ret;
3524d33615dSMatt Ranostay 	unsigned int reg;
3534d33615dSMatt Ranostay 
3544d33615dSMatt Ranostay 	ret = regmap_read(data->regmap, MAX30100_REG_TEMP_INTEGER, &reg);
3554d33615dSMatt Ranostay 	if (ret < 0)
3564d33615dSMatt Ranostay 		return ret;
3574d33615dSMatt Ranostay 	*val = reg << 4;
3584d33615dSMatt Ranostay 
3594d33615dSMatt Ranostay 	ret = regmap_read(data->regmap, MAX30100_REG_TEMP_FRACTION, &reg);
3604d33615dSMatt Ranostay 	if (ret < 0)
3614d33615dSMatt Ranostay 		return ret;
3624d33615dSMatt Ranostay 
3634d33615dSMatt Ranostay 	*val |= reg & 0xf;
3644d33615dSMatt Ranostay 	*val = sign_extend32(*val, 11);
3654d33615dSMatt Ranostay 
3664d33615dSMatt Ranostay 	return 0;
3674d33615dSMatt Ranostay }
3684d33615dSMatt Ranostay 
3694d33615dSMatt Ranostay static int max30100_get_temp(struct max30100_data *data, int *val)
3704d33615dSMatt Ranostay {
3714d33615dSMatt Ranostay 	int ret;
3724d33615dSMatt Ranostay 
3734d33615dSMatt Ranostay 	/* start acquisition */
3744d33615dSMatt Ranostay 	ret = regmap_update_bits(data->regmap, MAX30100_REG_MODE_CONFIG,
3754d33615dSMatt Ranostay 				 MAX30100_REG_MODE_CONFIG_TEMP_EN,
3764d33615dSMatt Ranostay 				 MAX30100_REG_MODE_CONFIG_TEMP_EN);
3774d33615dSMatt Ranostay 	if (ret)
3784d33615dSMatt Ranostay 		return ret;
3794d33615dSMatt Ranostay 
3804d33615dSMatt Ranostay 	usleep_range(35000, 50000);
3814d33615dSMatt Ranostay 
3824d33615dSMatt Ranostay 	return max30100_read_temp(data, val);
3834d33615dSMatt Ranostay }
3844d33615dSMatt Ranostay 
3854d33615dSMatt Ranostay static int max30100_read_raw(struct iio_dev *indio_dev,
3864d33615dSMatt Ranostay 			     struct iio_chan_spec const *chan,
3874d33615dSMatt Ranostay 			     int *val, int *val2, long mask)
3884d33615dSMatt Ranostay {
3894d33615dSMatt Ranostay 	struct max30100_data *data = iio_priv(indio_dev);
3904d33615dSMatt Ranostay 	int ret = -EINVAL;
3914d33615dSMatt Ranostay 
3924d33615dSMatt Ranostay 	switch (mask) {
3934d33615dSMatt Ranostay 	case IIO_CHAN_INFO_RAW:
3944d33615dSMatt Ranostay 		/*
3954d33615dSMatt Ranostay 		 * Temperature reading can only be acquired while engine
3964d33615dSMatt Ranostay 		 * is running
3974d33615dSMatt Ranostay 		 */
3984d33615dSMatt Ranostay 		mutex_lock(&indio_dev->mlock);
3994d33615dSMatt Ranostay 
4004d33615dSMatt Ranostay 		if (!iio_buffer_enabled(indio_dev))
4014d33615dSMatt Ranostay 			ret = -EAGAIN;
4024d33615dSMatt Ranostay 		else {
4034d33615dSMatt Ranostay 			ret = max30100_get_temp(data, val);
4044d33615dSMatt Ranostay 			if (!ret)
4054d33615dSMatt Ranostay 				ret = IIO_VAL_INT;
4064d33615dSMatt Ranostay 
4074d33615dSMatt Ranostay 		}
4084d33615dSMatt Ranostay 
4094d33615dSMatt Ranostay 		mutex_unlock(&indio_dev->mlock);
4104d33615dSMatt Ranostay 		break;
4114d33615dSMatt Ranostay 	case IIO_CHAN_INFO_SCALE:
4124d33615dSMatt Ranostay 		*val = 1;  /* 0.0625 */
4134d33615dSMatt Ranostay 		*val2 = 16;
4144d33615dSMatt Ranostay 		ret = IIO_VAL_FRACTIONAL;
4154d33615dSMatt Ranostay 		break;
4164d33615dSMatt Ranostay 	}
4174d33615dSMatt Ranostay 
4184d33615dSMatt Ranostay 	return ret;
4194d33615dSMatt Ranostay }
4204d33615dSMatt Ranostay 
4214d33615dSMatt Ranostay static const struct iio_info max30100_info = {
4224d33615dSMatt Ranostay 	.driver_module = THIS_MODULE,
4234d33615dSMatt Ranostay 	.read_raw = max30100_read_raw,
4244d33615dSMatt Ranostay };
4254d33615dSMatt Ranostay 
4264d33615dSMatt Ranostay static int max30100_probe(struct i2c_client *client,
4274d33615dSMatt Ranostay 			  const struct i2c_device_id *id)
4284d33615dSMatt Ranostay {
4294d33615dSMatt Ranostay 	struct max30100_data *data;
4304d33615dSMatt Ranostay 	struct iio_buffer *buffer;
4314d33615dSMatt Ranostay 	struct iio_dev *indio_dev;
4324d33615dSMatt Ranostay 	int ret;
4334d33615dSMatt Ranostay 
4344d33615dSMatt Ranostay 	indio_dev = devm_iio_device_alloc(&client->dev, sizeof(*data));
4354d33615dSMatt Ranostay 	if (!indio_dev)
4364d33615dSMatt Ranostay 		return -ENOMEM;
4374d33615dSMatt Ranostay 
4384d33615dSMatt Ranostay 	buffer = devm_iio_kfifo_allocate(&client->dev);
4394d33615dSMatt Ranostay 	if (!buffer)
4404d33615dSMatt Ranostay 		return -ENOMEM;
4414d33615dSMatt Ranostay 
4424d33615dSMatt Ranostay 	iio_device_attach_buffer(indio_dev, buffer);
4434d33615dSMatt Ranostay 
4444d33615dSMatt Ranostay 	indio_dev->name = MAX30100_DRV_NAME;
4454d33615dSMatt Ranostay 	indio_dev->channels = max30100_channels;
4464d33615dSMatt Ranostay 	indio_dev->info = &max30100_info;
4474d33615dSMatt Ranostay 	indio_dev->num_channels = ARRAY_SIZE(max30100_channels);
4484d33615dSMatt Ranostay 	indio_dev->available_scan_masks = max30100_scan_masks;
4494d33615dSMatt Ranostay 	indio_dev->modes = (INDIO_BUFFER_SOFTWARE | INDIO_DIRECT_MODE);
4504d33615dSMatt Ranostay 	indio_dev->setup_ops = &max30100_buffer_setup_ops;
4514d33615dSMatt Ranostay 
4524d33615dSMatt Ranostay 	data = iio_priv(indio_dev);
4534d33615dSMatt Ranostay 	data->indio_dev = indio_dev;
4544d33615dSMatt Ranostay 	data->client = client;
4554d33615dSMatt Ranostay 
4564d33615dSMatt Ranostay 	mutex_init(&data->lock);
4574d33615dSMatt Ranostay 	i2c_set_clientdata(client, indio_dev);
4584d33615dSMatt Ranostay 
4594d33615dSMatt Ranostay 	data->regmap = devm_regmap_init_i2c(client, &max30100_regmap_config);
4604d33615dSMatt Ranostay 	if (IS_ERR(data->regmap)) {
4614d33615dSMatt Ranostay 		dev_err(&client->dev, "regmap initialization failed.\n");
4624d33615dSMatt Ranostay 		return PTR_ERR(data->regmap);
4634d33615dSMatt Ranostay 	}
4644d33615dSMatt Ranostay 	max30100_set_powermode(data, false);
4654d33615dSMatt Ranostay 
4664d33615dSMatt Ranostay 	ret = max30100_chip_init(data);
4674d33615dSMatt Ranostay 	if (ret)
4684d33615dSMatt Ranostay 		return ret;
4694d33615dSMatt Ranostay 
4704d33615dSMatt Ranostay 	if (client->irq <= 0) {
4714d33615dSMatt Ranostay 		dev_err(&client->dev, "no valid irq defined\n");
4724d33615dSMatt Ranostay 		return -EINVAL;
4734d33615dSMatt Ranostay 	}
4744d33615dSMatt Ranostay 	ret = devm_request_threaded_irq(&client->dev, client->irq,
4754d33615dSMatt Ranostay 					NULL, max30100_interrupt_handler,
4764d33615dSMatt Ranostay 					IRQF_TRIGGER_FALLING | IRQF_ONESHOT,
4774d33615dSMatt Ranostay 					"max30100_irq", indio_dev);
4784d33615dSMatt Ranostay 	if (ret) {
4794d33615dSMatt Ranostay 		dev_err(&client->dev, "request irq (%d) failed\n", client->irq);
4804d33615dSMatt Ranostay 		return ret;
4814d33615dSMatt Ranostay 	}
4824d33615dSMatt Ranostay 
4834d33615dSMatt Ranostay 	return iio_device_register(indio_dev);
4844d33615dSMatt Ranostay }
4854d33615dSMatt Ranostay 
4864d33615dSMatt Ranostay static int max30100_remove(struct i2c_client *client)
4874d33615dSMatt Ranostay {
4884d33615dSMatt Ranostay 	struct iio_dev *indio_dev = i2c_get_clientdata(client);
4894d33615dSMatt Ranostay 	struct max30100_data *data = iio_priv(indio_dev);
4904d33615dSMatt Ranostay 
4914d33615dSMatt Ranostay 	iio_device_unregister(indio_dev);
4924d33615dSMatt Ranostay 	max30100_set_powermode(data, false);
4934d33615dSMatt Ranostay 
4944d33615dSMatt Ranostay 	return 0;
4954d33615dSMatt Ranostay }
4964d33615dSMatt Ranostay 
4974d33615dSMatt Ranostay static const struct i2c_device_id max30100_id[] = {
4984d33615dSMatt Ranostay 	{ "max30100", 0 },
4994d33615dSMatt Ranostay 	{}
5004d33615dSMatt Ranostay };
5014d33615dSMatt Ranostay MODULE_DEVICE_TABLE(i2c, max30100_id);
5024d33615dSMatt Ranostay 
5034d33615dSMatt Ranostay static const struct of_device_id max30100_dt_ids[] = {
5044d33615dSMatt Ranostay 	{ .compatible = "maxim,max30100" },
5054d33615dSMatt Ranostay 	{ }
5064d33615dSMatt Ranostay };
5074d33615dSMatt Ranostay MODULE_DEVICE_TABLE(of, max30100_dt_ids);
5084d33615dSMatt Ranostay 
5094d33615dSMatt Ranostay static struct i2c_driver max30100_driver = {
5104d33615dSMatt Ranostay 	.driver = {
5114d33615dSMatt Ranostay 		.name	= MAX30100_DRV_NAME,
5124d33615dSMatt Ranostay 		.of_match_table	= of_match_ptr(max30100_dt_ids),
5134d33615dSMatt Ranostay 	},
5144d33615dSMatt Ranostay 	.probe		= max30100_probe,
5154d33615dSMatt Ranostay 	.remove		= max30100_remove,
5164d33615dSMatt Ranostay 	.id_table	= max30100_id,
5174d33615dSMatt Ranostay };
5184d33615dSMatt Ranostay module_i2c_driver(max30100_driver);
5194d33615dSMatt Ranostay 
5204d33615dSMatt Ranostay MODULE_AUTHOR("Matt Ranostay <mranostay@gmail.com>");
5214d33615dSMatt Ranostay MODULE_DESCRIPTION("MAX30100 heart rate and pulse oximeter sensor");
5224d33615dSMatt Ranostay MODULE_LICENSE("GPL");
523