1 // SPDX-License-Identifier: GPL-2.0-only 2 /* 3 * AFE4404 Heart Rate Monitors and Low-Cost Pulse Oximeters 4 * 5 * Copyright (C) 2015-2016 Texas Instruments Incorporated - https://www.ti.com/ 6 * Andrew F. Davis <afd@ti.com> 7 */ 8 9 #include <linux/device.h> 10 #include <linux/err.h> 11 #include <linux/interrupt.h> 12 #include <linux/i2c.h> 13 #include <linux/kernel.h> 14 #include <linux/module.h> 15 #include <linux/regmap.h> 16 #include <linux/sysfs.h> 17 #include <linux/regulator/consumer.h> 18 19 #include <linux/iio/iio.h> 20 #include <linux/iio/sysfs.h> 21 #include <linux/iio/buffer.h> 22 #include <linux/iio/trigger.h> 23 #include <linux/iio/triggered_buffer.h> 24 #include <linux/iio/trigger_consumer.h> 25 26 #include "afe440x.h" 27 28 #define AFE4404_DRIVER_NAME "afe4404" 29 30 /* AFE4404 registers */ 31 #define AFE4404_TIA_GAIN_SEP 0x20 32 #define AFE4404_TIA_GAIN 0x21 33 #define AFE4404_PROG_TG_STC 0x34 34 #define AFE4404_PROG_TG_ENDC 0x35 35 #define AFE4404_LED3LEDSTC 0x36 36 #define AFE4404_LED3LEDENDC 0x37 37 #define AFE4404_CLKDIV_PRF 0x39 38 #define AFE4404_OFFDAC 0x3a 39 #define AFE4404_DEC 0x3d 40 #define AFE4404_AVG_LED2_ALED2VAL 0x3f 41 #define AFE4404_AVG_LED1_ALED1VAL 0x40 42 43 /* AFE4404 CONTROL2 register fields */ 44 #define AFE440X_CONTROL2_OSC_ENABLE BIT(9) 45 46 enum afe4404_fields { 47 /* Gains */ 48 F_TIA_GAIN_SEP, F_TIA_CF_SEP, 49 F_TIA_GAIN, TIA_CF, 50 51 /* LED Current */ 52 F_ILED1, F_ILED2, F_ILED3, 53 54 /* Offset DAC */ 55 F_OFFDAC_AMB2, F_OFFDAC_LED1, F_OFFDAC_AMB1, F_OFFDAC_LED2, 56 57 /* sentinel */ 58 F_MAX_FIELDS 59 }; 60 61 static const struct reg_field afe4404_reg_fields[] = { 62 /* Gains */ 63 [F_TIA_GAIN_SEP] = REG_FIELD(AFE4404_TIA_GAIN_SEP, 0, 2), 64 [F_TIA_CF_SEP] = REG_FIELD(AFE4404_TIA_GAIN_SEP, 3, 5), 65 [F_TIA_GAIN] = REG_FIELD(AFE4404_TIA_GAIN, 0, 2), 66 [TIA_CF] = REG_FIELD(AFE4404_TIA_GAIN, 3, 5), 67 /* LED Current */ 68 [F_ILED1] = REG_FIELD(AFE440X_LEDCNTRL, 0, 5), 69 [F_ILED2] = REG_FIELD(AFE440X_LEDCNTRL, 6, 11), 70 [F_ILED3] = REG_FIELD(AFE440X_LEDCNTRL, 12, 17), 71 /* Offset DAC */ 72 [F_OFFDAC_AMB2] = REG_FIELD(AFE4404_OFFDAC, 0, 4), 73 [F_OFFDAC_LED1] = REG_FIELD(AFE4404_OFFDAC, 5, 9), 74 [F_OFFDAC_AMB1] = REG_FIELD(AFE4404_OFFDAC, 10, 14), 75 [F_OFFDAC_LED2] = REG_FIELD(AFE4404_OFFDAC, 15, 19), 76 }; 77 78 /** 79 * struct afe4404_data - AFE4404 device instance data 80 * @regmap: Register map of the device 81 * @fields: Register fields of the device 82 * @regulator: Pointer to the regulator for the IC 83 * @trig: IIO trigger for this device 84 * @irq: ADC_RDY line interrupt number 85 * @buffer: Used to construct a scan to push to the iio buffer. 86 */ 87 struct afe4404_data { 88 struct regmap *regmap; 89 struct regmap_field *fields[F_MAX_FIELDS]; 90 struct regulator *regulator; 91 struct iio_trigger *trig; 92 int irq; 93 s32 buffer[10] __aligned(8); 94 }; 95 96 enum afe4404_chan_id { 97 LED2 = 1, 98 ALED2, 99 LED1, 100 ALED1, 101 LED2_ALED2, 102 LED1_ALED1, 103 }; 104 105 static const unsigned int afe4404_channel_values[] = { 106 [LED2] = AFE440X_LED2VAL, 107 [ALED2] = AFE440X_ALED2VAL, 108 [LED1] = AFE440X_LED1VAL, 109 [ALED1] = AFE440X_ALED1VAL, 110 [LED2_ALED2] = AFE440X_LED2_ALED2VAL, 111 [LED1_ALED1] = AFE440X_LED1_ALED1VAL, 112 }; 113 114 static const unsigned int afe4404_channel_leds[] = { 115 [LED2] = F_ILED2, 116 [ALED2] = F_ILED3, 117 [LED1] = F_ILED1, 118 }; 119 120 static const unsigned int afe4404_channel_offdacs[] = { 121 [LED2] = F_OFFDAC_LED2, 122 [ALED2] = F_OFFDAC_AMB2, 123 [LED1] = F_OFFDAC_LED1, 124 [ALED1] = F_OFFDAC_AMB1, 125 }; 126 127 static const struct iio_chan_spec afe4404_channels[] = { 128 /* ADC values */ 129 AFE440X_INTENSITY_CHAN(LED2, BIT(IIO_CHAN_INFO_OFFSET)), 130 AFE440X_INTENSITY_CHAN(ALED2, BIT(IIO_CHAN_INFO_OFFSET)), 131 AFE440X_INTENSITY_CHAN(LED1, BIT(IIO_CHAN_INFO_OFFSET)), 132 AFE440X_INTENSITY_CHAN(ALED1, BIT(IIO_CHAN_INFO_OFFSET)), 133 AFE440X_INTENSITY_CHAN(LED2_ALED2, 0), 134 AFE440X_INTENSITY_CHAN(LED1_ALED1, 0), 135 /* LED current */ 136 AFE440X_CURRENT_CHAN(LED2), 137 AFE440X_CURRENT_CHAN(ALED2), 138 AFE440X_CURRENT_CHAN(LED1), 139 }; 140 141 static const struct afe440x_val_table afe4404_res_table[] = { 142 { .integer = 500000, .fract = 0 }, 143 { .integer = 250000, .fract = 0 }, 144 { .integer = 100000, .fract = 0 }, 145 { .integer = 50000, .fract = 0 }, 146 { .integer = 25000, .fract = 0 }, 147 { .integer = 10000, .fract = 0 }, 148 { .integer = 1000000, .fract = 0 }, 149 { .integer = 2000000, .fract = 0 }, 150 }; 151 AFE440X_TABLE_ATTR(in_intensity_resistance_available, afe4404_res_table); 152 153 static const struct afe440x_val_table afe4404_cap_table[] = { 154 { .integer = 0, .fract = 5000 }, 155 { .integer = 0, .fract = 2500 }, 156 { .integer = 0, .fract = 10000 }, 157 { .integer = 0, .fract = 7500 }, 158 { .integer = 0, .fract = 20000 }, 159 { .integer = 0, .fract = 17500 }, 160 { .integer = 0, .fract = 25000 }, 161 { .integer = 0, .fract = 22500 }, 162 }; 163 AFE440X_TABLE_ATTR(in_intensity_capacitance_available, afe4404_cap_table); 164 165 static ssize_t afe440x_show_register(struct device *dev, 166 struct device_attribute *attr, 167 char *buf) 168 { 169 struct iio_dev *indio_dev = dev_to_iio_dev(dev); 170 struct afe4404_data *afe = iio_priv(indio_dev); 171 struct afe440x_attr *afe440x_attr = to_afe440x_attr(attr); 172 unsigned int reg_val; 173 int vals[2]; 174 int ret; 175 176 ret = regmap_field_read(afe->fields[afe440x_attr->field], ®_val); 177 if (ret) 178 return ret; 179 180 if (reg_val >= afe440x_attr->table_size) 181 return -EINVAL; 182 183 vals[0] = afe440x_attr->val_table[reg_val].integer; 184 vals[1] = afe440x_attr->val_table[reg_val].fract; 185 186 return iio_format_value(buf, IIO_VAL_INT_PLUS_MICRO, 2, vals); 187 } 188 189 static ssize_t afe440x_store_register(struct device *dev, 190 struct device_attribute *attr, 191 const char *buf, size_t count) 192 { 193 struct iio_dev *indio_dev = dev_to_iio_dev(dev); 194 struct afe4404_data *afe = iio_priv(indio_dev); 195 struct afe440x_attr *afe440x_attr = to_afe440x_attr(attr); 196 int val, integer, fract, ret; 197 198 ret = iio_str_to_fixpoint(buf, 100000, &integer, &fract); 199 if (ret) 200 return ret; 201 202 for (val = 0; val < afe440x_attr->table_size; val++) 203 if (afe440x_attr->val_table[val].integer == integer && 204 afe440x_attr->val_table[val].fract == fract) 205 break; 206 if (val == afe440x_attr->table_size) 207 return -EINVAL; 208 209 ret = regmap_field_write(afe->fields[afe440x_attr->field], val); 210 if (ret) 211 return ret; 212 213 return count; 214 } 215 216 static AFE440X_ATTR(in_intensity1_resistance, F_TIA_GAIN_SEP, afe4404_res_table); 217 static AFE440X_ATTR(in_intensity1_capacitance, F_TIA_CF_SEP, afe4404_cap_table); 218 219 static AFE440X_ATTR(in_intensity2_resistance, F_TIA_GAIN_SEP, afe4404_res_table); 220 static AFE440X_ATTR(in_intensity2_capacitance, F_TIA_CF_SEP, afe4404_cap_table); 221 222 static AFE440X_ATTR(in_intensity3_resistance, F_TIA_GAIN, afe4404_res_table); 223 static AFE440X_ATTR(in_intensity3_capacitance, TIA_CF, afe4404_cap_table); 224 225 static AFE440X_ATTR(in_intensity4_resistance, F_TIA_GAIN, afe4404_res_table); 226 static AFE440X_ATTR(in_intensity4_capacitance, TIA_CF, afe4404_cap_table); 227 228 static struct attribute *afe440x_attributes[] = { 229 &dev_attr_in_intensity_resistance_available.attr, 230 &dev_attr_in_intensity_capacitance_available.attr, 231 &afe440x_attr_in_intensity1_resistance.dev_attr.attr, 232 &afe440x_attr_in_intensity1_capacitance.dev_attr.attr, 233 &afe440x_attr_in_intensity2_resistance.dev_attr.attr, 234 &afe440x_attr_in_intensity2_capacitance.dev_attr.attr, 235 &afe440x_attr_in_intensity3_resistance.dev_attr.attr, 236 &afe440x_attr_in_intensity3_capacitance.dev_attr.attr, 237 &afe440x_attr_in_intensity4_resistance.dev_attr.attr, 238 &afe440x_attr_in_intensity4_capacitance.dev_attr.attr, 239 NULL 240 }; 241 242 static const struct attribute_group afe440x_attribute_group = { 243 .attrs = afe440x_attributes 244 }; 245 246 static int afe4404_read_raw(struct iio_dev *indio_dev, 247 struct iio_chan_spec const *chan, 248 int *val, int *val2, long mask) 249 { 250 struct afe4404_data *afe = iio_priv(indio_dev); 251 unsigned int value_reg, led_field, offdac_field; 252 int ret; 253 254 switch (chan->type) { 255 case IIO_INTENSITY: 256 switch (mask) { 257 case IIO_CHAN_INFO_RAW: 258 value_reg = afe4404_channel_values[chan->address]; 259 ret = regmap_read(afe->regmap, value_reg, val); 260 if (ret) 261 return ret; 262 return IIO_VAL_INT; 263 case IIO_CHAN_INFO_OFFSET: 264 offdac_field = afe4404_channel_offdacs[chan->address]; 265 ret = regmap_field_read(afe->fields[offdac_field], val); 266 if (ret) 267 return ret; 268 return IIO_VAL_INT; 269 } 270 break; 271 case IIO_CURRENT: 272 switch (mask) { 273 case IIO_CHAN_INFO_RAW: 274 led_field = afe4404_channel_leds[chan->address]; 275 ret = regmap_field_read(afe->fields[led_field], val); 276 if (ret) 277 return ret; 278 return IIO_VAL_INT; 279 case IIO_CHAN_INFO_SCALE: 280 *val = 0; 281 *val2 = 800000; 282 return IIO_VAL_INT_PLUS_MICRO; 283 } 284 break; 285 default: 286 break; 287 } 288 289 return -EINVAL; 290 } 291 292 static int afe4404_write_raw(struct iio_dev *indio_dev, 293 struct iio_chan_spec const *chan, 294 int val, int val2, long mask) 295 { 296 struct afe4404_data *afe = iio_priv(indio_dev); 297 unsigned int led_field, offdac_field; 298 299 switch (chan->type) { 300 case IIO_INTENSITY: 301 switch (mask) { 302 case IIO_CHAN_INFO_OFFSET: 303 offdac_field = afe4404_channel_offdacs[chan->address]; 304 return regmap_field_write(afe->fields[offdac_field], val); 305 } 306 break; 307 case IIO_CURRENT: 308 switch (mask) { 309 case IIO_CHAN_INFO_RAW: 310 led_field = afe4404_channel_leds[chan->address]; 311 return regmap_field_write(afe->fields[led_field], val); 312 } 313 break; 314 default: 315 break; 316 } 317 318 return -EINVAL; 319 } 320 321 static const struct iio_info afe4404_iio_info = { 322 .attrs = &afe440x_attribute_group, 323 .read_raw = afe4404_read_raw, 324 .write_raw = afe4404_write_raw, 325 }; 326 327 static irqreturn_t afe4404_trigger_handler(int irq, void *private) 328 { 329 struct iio_poll_func *pf = private; 330 struct iio_dev *indio_dev = pf->indio_dev; 331 struct afe4404_data *afe = iio_priv(indio_dev); 332 int ret, bit, i = 0; 333 334 iio_for_each_active_channel(indio_dev, bit) { 335 ret = regmap_read(afe->regmap, afe4404_channel_values[bit], 336 &afe->buffer[i++]); 337 if (ret) 338 goto err; 339 } 340 341 iio_push_to_buffers_with_timestamp(indio_dev, afe->buffer, 342 pf->timestamp); 343 err: 344 iio_trigger_notify_done(indio_dev->trig); 345 346 return IRQ_HANDLED; 347 } 348 349 static void afe4404_regulator_disable(void *data) 350 { 351 struct regulator *regulator = data; 352 353 regulator_disable(regulator); 354 } 355 356 /* Default timings from data-sheet */ 357 #define AFE4404_TIMING_PAIRS \ 358 { AFE440X_PRPCOUNT, 39999 }, \ 359 { AFE440X_LED2LEDSTC, 0 }, \ 360 { AFE440X_LED2LEDENDC, 398 }, \ 361 { AFE440X_LED2STC, 80 }, \ 362 { AFE440X_LED2ENDC, 398 }, \ 363 { AFE440X_ADCRSTSTCT0, 5600 }, \ 364 { AFE440X_ADCRSTENDCT0, 5606 }, \ 365 { AFE440X_LED2CONVST, 5607 }, \ 366 { AFE440X_LED2CONVEND, 6066 }, \ 367 { AFE4404_LED3LEDSTC, 400 }, \ 368 { AFE4404_LED3LEDENDC, 798 }, \ 369 { AFE440X_ALED2STC, 480 }, \ 370 { AFE440X_ALED2ENDC, 798 }, \ 371 { AFE440X_ADCRSTSTCT1, 6068 }, \ 372 { AFE440X_ADCRSTENDCT1, 6074 }, \ 373 { AFE440X_ALED2CONVST, 6075 }, \ 374 { AFE440X_ALED2CONVEND, 6534 }, \ 375 { AFE440X_LED1LEDSTC, 800 }, \ 376 { AFE440X_LED1LEDENDC, 1198 }, \ 377 { AFE440X_LED1STC, 880 }, \ 378 { AFE440X_LED1ENDC, 1198 }, \ 379 { AFE440X_ADCRSTSTCT2, 6536 }, \ 380 { AFE440X_ADCRSTENDCT2, 6542 }, \ 381 { AFE440X_LED1CONVST, 6543 }, \ 382 { AFE440X_LED1CONVEND, 7003 }, \ 383 { AFE440X_ALED1STC, 1280 }, \ 384 { AFE440X_ALED1ENDC, 1598 }, \ 385 { AFE440X_ADCRSTSTCT3, 7005 }, \ 386 { AFE440X_ADCRSTENDCT3, 7011 }, \ 387 { AFE440X_ALED1CONVST, 7012 }, \ 388 { AFE440X_ALED1CONVEND, 7471 }, \ 389 { AFE440X_PDNCYCLESTC, 7671 }, \ 390 { AFE440X_PDNCYCLEENDC, 39199 } 391 392 static const struct reg_sequence afe4404_reg_sequences[] = { 393 AFE4404_TIMING_PAIRS, 394 { AFE440X_CONTROL1, AFE440X_CONTROL1_TIMEREN }, 395 { AFE4404_TIA_GAIN_SEP, AFE440X_TIAGAIN_ENSEPGAIN }, 396 { AFE440X_CONTROL2, AFE440X_CONTROL2_OSC_ENABLE }, 397 }; 398 399 static const struct regmap_range afe4404_yes_ranges[] = { 400 regmap_reg_range(AFE440X_LED2VAL, AFE440X_LED1_ALED1VAL), 401 regmap_reg_range(AFE4404_AVG_LED2_ALED2VAL, AFE4404_AVG_LED1_ALED1VAL), 402 }; 403 404 static const struct regmap_access_table afe4404_volatile_table = { 405 .yes_ranges = afe4404_yes_ranges, 406 .n_yes_ranges = ARRAY_SIZE(afe4404_yes_ranges), 407 }; 408 409 static const struct regmap_config afe4404_regmap_config = { 410 .reg_bits = 8, 411 .val_bits = 24, 412 413 .max_register = AFE4404_AVG_LED1_ALED1VAL, 414 .cache_type = REGCACHE_MAPLE, 415 .volatile_table = &afe4404_volatile_table, 416 }; 417 418 static const struct of_device_id afe4404_of_match[] = { 419 { .compatible = "ti,afe4404", }, 420 { } 421 }; 422 MODULE_DEVICE_TABLE(of, afe4404_of_match); 423 424 static int afe4404_suspend(struct device *dev) 425 { 426 struct iio_dev *indio_dev = i2c_get_clientdata(to_i2c_client(dev)); 427 struct afe4404_data *afe = iio_priv(indio_dev); 428 int ret; 429 430 ret = regmap_set_bits(afe->regmap, AFE440X_CONTROL2, 431 AFE440X_CONTROL2_PDN_AFE); 432 if (ret) 433 return ret; 434 435 ret = regulator_disable(afe->regulator); 436 if (ret) { 437 dev_err(dev, "Unable to disable regulator\n"); 438 return ret; 439 } 440 441 return 0; 442 } 443 444 static int afe4404_resume(struct device *dev) 445 { 446 struct iio_dev *indio_dev = i2c_get_clientdata(to_i2c_client(dev)); 447 struct afe4404_data *afe = iio_priv(indio_dev); 448 int ret; 449 450 ret = regulator_enable(afe->regulator); 451 if (ret) { 452 dev_err(dev, "Unable to enable regulator\n"); 453 return ret; 454 } 455 456 ret = regmap_clear_bits(afe->regmap, AFE440X_CONTROL2, 457 AFE440X_CONTROL2_PDN_AFE); 458 if (ret) 459 return ret; 460 461 return 0; 462 } 463 464 static DEFINE_SIMPLE_DEV_PM_OPS(afe4404_pm_ops, afe4404_suspend, 465 afe4404_resume); 466 467 static int afe4404_probe(struct i2c_client *client) 468 { 469 struct device *dev = &client->dev; 470 struct iio_dev *indio_dev; 471 struct afe4404_data *afe; 472 int i, ret; 473 474 indio_dev = devm_iio_device_alloc(dev, sizeof(*afe)); 475 if (!indio_dev) 476 return -ENOMEM; 477 478 afe = iio_priv(indio_dev); 479 i2c_set_clientdata(client, indio_dev); 480 481 afe->irq = client->irq; 482 483 afe->regmap = devm_regmap_init_i2c(client, &afe4404_regmap_config); 484 if (IS_ERR(afe->regmap)) { 485 dev_err(dev, "Unable to allocate register map\n"); 486 return PTR_ERR(afe->regmap); 487 } 488 489 for (i = 0; i < F_MAX_FIELDS; i++) { 490 afe->fields[i] = devm_regmap_field_alloc(dev, afe->regmap, 491 afe4404_reg_fields[i]); 492 if (IS_ERR(afe->fields[i])) { 493 dev_err(dev, "Unable to allocate regmap fields\n"); 494 return PTR_ERR(afe->fields[i]); 495 } 496 } 497 498 afe->regulator = devm_regulator_get(dev, "tx_sup"); 499 if (IS_ERR(afe->regulator)) 500 return dev_err_probe(dev, PTR_ERR(afe->regulator), 501 "Unable to get regulator\n"); 502 503 ret = regulator_enable(afe->regulator); 504 if (ret) { 505 dev_err(dev, "Unable to enable regulator\n"); 506 return ret; 507 } 508 ret = devm_add_action_or_reset(dev, afe4404_regulator_disable, afe->regulator); 509 if (ret) { 510 dev_err(dev, "Unable to enable regulator\n"); 511 return ret; 512 } 513 514 ret = regmap_write(afe->regmap, AFE440X_CONTROL0, 515 AFE440X_CONTROL0_SW_RESET); 516 if (ret) { 517 dev_err(dev, "Unable to reset device\n"); 518 return ret; 519 } 520 521 ret = regmap_multi_reg_write(afe->regmap, afe4404_reg_sequences, 522 ARRAY_SIZE(afe4404_reg_sequences)); 523 if (ret) { 524 dev_err(dev, "Unable to set register defaults\n"); 525 return ret; 526 } 527 528 indio_dev->modes = INDIO_DIRECT_MODE; 529 indio_dev->channels = afe4404_channels; 530 indio_dev->num_channels = ARRAY_SIZE(afe4404_channels); 531 indio_dev->name = AFE4404_DRIVER_NAME; 532 indio_dev->info = &afe4404_iio_info; 533 534 if (afe->irq > 0) { 535 afe->trig = devm_iio_trigger_alloc(dev, 536 "%s-dev%d", 537 indio_dev->name, 538 iio_device_id(indio_dev)); 539 if (!afe->trig) 540 return -ENOMEM; 541 542 iio_trigger_set_drvdata(afe->trig, indio_dev); 543 544 ret = devm_iio_trigger_register(dev, afe->trig); 545 if (ret) { 546 dev_err(dev, "Unable to register IIO trigger\n"); 547 return ret; 548 } 549 550 ret = devm_request_threaded_irq(dev, afe->irq, 551 iio_trigger_generic_data_rdy_poll, 552 NULL, IRQF_ONESHOT, 553 AFE4404_DRIVER_NAME, 554 afe->trig); 555 if (ret) { 556 dev_err(dev, "Unable to request IRQ\n"); 557 return ret; 558 } 559 } 560 561 ret = devm_iio_triggered_buffer_setup(dev, indio_dev, 562 &iio_pollfunc_store_time, 563 afe4404_trigger_handler, NULL); 564 if (ret) { 565 dev_err(dev, "Unable to setup buffer\n"); 566 return ret; 567 } 568 569 ret = devm_iio_device_register(dev, indio_dev); 570 if (ret) { 571 dev_err(dev, "Unable to register IIO device\n"); 572 return ret; 573 } 574 575 return 0; 576 } 577 578 static const struct i2c_device_id afe4404_ids[] = { 579 { "afe4404" }, 580 { } 581 }; 582 MODULE_DEVICE_TABLE(i2c, afe4404_ids); 583 584 static struct i2c_driver afe4404_i2c_driver = { 585 .driver = { 586 .name = AFE4404_DRIVER_NAME, 587 .of_match_table = afe4404_of_match, 588 .pm = pm_sleep_ptr(&afe4404_pm_ops), 589 }, 590 .probe = afe4404_probe, 591 .id_table = afe4404_ids, 592 }; 593 module_i2c_driver(afe4404_i2c_driver); 594 595 MODULE_AUTHOR("Andrew F. Davis <afd@ti.com>"); 596 MODULE_DESCRIPTION("TI AFE4404 Heart Rate Monitor and Pulse Oximeter AFE"); 597 MODULE_LICENSE("GPL v2"); 598