xref: /linux/drivers/iio/dac/mcp4821.c (revision b8ea7da314c2efcb9c2f559ed65b7a36c869d68e)
1 // SPDX-License-Identifier: GPL-2.0-or-later
2 /*
3  * Copyright (C) 2023 Anshul Dalal <anshulusr@gmail.com>
4  *
5  * Driver for Microchip MCP4801, MCP4802, MCP4811, MCP4812, MCP4821 and MCP4822
6  *
7  * Based on the work of:
8  *	Michael Welling (MCP4922 Driver)
9  *
10  * Datasheet:
11  *	MCP48x1: https://ww1.microchip.com/downloads/en/DeviceDoc/22244B.pdf
12  *	MCP48x2: https://ww1.microchip.com/downloads/en/DeviceDoc/20002249B.pdf
13  *
14  * TODO:
15  *	- Regulator control
16  */
17 
18 #include <linux/module.h>
19 #include <linux/mod_devicetable.h>
20 #include <linux/spi/spi.h>
21 #include <linux/units.h>
22 
23 #include <linux/iio/iio.h>
24 #include <linux/iio/types.h>
25 
26 #include <linux/unaligned.h>
27 
28 #define MCP4821_ACTIVE_MODE BIT(12)
29 #define MCP4821_GAIN_ENABLE BIT(13)
30 #define MCP4802_SECOND_CHAN BIT(15)
31 
32 /* DAC uses an internal Voltage reference of 2.048V */
33 #define MCP4821_VREF_MV 2048
34 
35 /*
36  * MCP48xx DAC output:
37  *
38  * Vout = (Vref * D / 2^N) * G
39  *
40  * where:
41  *  - Vref = 2.048V (internal reference)
42  *  - N = DAC resolution (12 bits for MCP4821)
43  *  - G = gain selection:
44  *        1x when GA bit = 1
45  *        2x when GA bit = 0 (default)
46  *
47  * Therefore full-scale voltage is:
48  *  - 1x gain: 2.048V
49  *  - 2x gain: 4.096V
50  *
51  * Scale = Vfull-scale / 2^N
52  */
53 
54 enum mcp4821_supported_device_ids {
55 	ID_MCP4801,
56 	ID_MCP4802,
57 	ID_MCP4811,
58 	ID_MCP4812,
59 	ID_MCP4821,
60 	ID_MCP4822,
61 };
62 
63 struct mcp4821_state {
64 	struct spi_device *spi;
65 	u16 dac_value[2];
66 	int gain;
67 	int scale_avail[4];
68 };
69 
70 struct mcp4821_chip_info {
71 	const char *name;
72 	int num_channels;
73 	const struct iio_chan_spec channels[2];
74 };
75 
76 #define MCP4821_CHAN(channel_id, resolution)                          \
77 	{                                                             \
78 		.type = IIO_VOLTAGE, .output = 1, .indexed = 1,       \
79 		.channel = (channel_id),                              \
80 		.info_mask_separate = BIT(IIO_CHAN_INFO_RAW),         \
81 		.info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE), \
82 		.info_mask_shared_by_type_available = BIT(IIO_CHAN_INFO_SCALE), \
83 		.scan_type = {                                        \
84 			.realbits = (resolution),                     \
85 			.shift = 12 - (resolution),                   \
86 		},                                                    \
87 	}
88 
89 static const struct mcp4821_chip_info mcp4821_chip_info_table[6] = {
90 	[ID_MCP4801] = {
91 			.name = "mcp4801",
92 			.num_channels = 1,
93 			.channels = {
94 				MCP4821_CHAN(0, 8),
95 			},
96 	},
97 	[ID_MCP4802] = {
98 			.name = "mcp4802",
99 			.num_channels = 2,
100 			.channels = {
101 				MCP4821_CHAN(0, 8),
102 				MCP4821_CHAN(1, 8),
103 			},
104 	},
105 	[ID_MCP4811] = {
106 			.name = "mcp4811",
107 			.num_channels = 1,
108 			.channels = {
109 				MCP4821_CHAN(0, 10),
110 			},
111 	},
112 	[ID_MCP4812] = {
113 			.name = "mcp4812",
114 			.num_channels = 2,
115 			.channels = {
116 				MCP4821_CHAN(0, 10),
117 				MCP4821_CHAN(1, 10),
118 			},
119 	},
120 	[ID_MCP4821] = {
121 			.name = "mcp4821",
122 			.num_channels = 1,
123 			.channels = {
124 				MCP4821_CHAN(0, 12),
125 			},
126 	},
127 	[ID_MCP4822] = {
128 			.name = "mcp4822",
129 			.num_channels = 2,
130 			.channels = {
131 				MCP4821_CHAN(0, 12),
132 				MCP4821_CHAN(1, 12),
133 			},
134 	},
135 };
136 
137 static int mcp4821_read_raw(struct iio_dev *indio_dev,
138 			    struct iio_chan_spec const *chan, int *val,
139 			    int *val2, long mask)
140 {
141 	struct mcp4821_state *state = iio_priv(indio_dev);
142 
143 	switch (mask) {
144 	case IIO_CHAN_INFO_RAW:
145 		*val = state->dac_value[chan->channel];
146 		return IIO_VAL_INT;
147 
148 	case IIO_CHAN_INFO_SCALE:
149 		*val = MCP4821_VREF_MV * state->gain;
150 		*val2 = chan->scan_type.realbits;
151 		return IIO_VAL_FRACTIONAL_LOG2;
152 	default:
153 		return -EINVAL;
154 	}
155 }
156 
157 static void mcp4821_calc_scale(int vref_mv, int resolution,
158 				int *val, int *val2)
159 {
160 	s64 tmp;
161 	int micro;
162 
163 	tmp = (s64)vref_mv * MICRO >> resolution;
164 	*val = div_s64_rem(tmp, MICRO, &micro);
165 	*val2 = micro;
166 }
167 
168 static int mcp4821_write_raw(struct iio_dev *indio_dev,
169 			     struct iio_chan_spec const *chan, int val,
170 			     int val2, long mask)
171 {
172 	struct mcp4821_state *state = iio_priv(indio_dev);
173 	u16 write_val;
174 	__be16 write_buffer;
175 	int ret;
176 	int v, v2;
177 
178 	switch (mask) {
179 	case IIO_CHAN_INFO_RAW:
180 
181 		if (val2 != 0)
182 			return -EINVAL;
183 
184 		if (val < 0 || val >= BIT(chan->scan_type.realbits))
185 			return -EINVAL;
186 
187 		write_val = MCP4821_ACTIVE_MODE | val << chan->scan_type.shift;
188 		if (chan->channel)
189 			write_val |= MCP4802_SECOND_CHAN;
190 
191 		/* GA bit = 1 -> 1x gain */
192 		if (state->gain == 1)
193 			write_val |= MCP4821_GAIN_ENABLE;
194 
195 		write_buffer = cpu_to_be16(write_val);
196 		ret = spi_write(state->spi, &write_buffer, sizeof(write_buffer));
197 		if (ret) {
198 			dev_err(&state->spi->dev, "Failed to write to device: %d", ret);
199 			return ret;
200 		}
201 
202 		state->dac_value[chan->channel] = val;
203 		return 0;
204 
205 	case IIO_CHAN_INFO_SCALE:
206 		mcp4821_calc_scale(MCP4821_VREF_MV, chan->scan_type.realbits, &v, &v2);
207 		if (val == v && val2 == v2) {
208 			state->gain = 1;
209 			return 0;
210 		}
211 
212 		mcp4821_calc_scale(MCP4821_VREF_MV * 2,
213 				chan->scan_type.realbits, &v, &v2);
214 		if (val == v && val2 == v2) {
215 			state->gain = 2;
216 			return 0;
217 		}
218 		return -EINVAL;
219 	default:
220 		return -EINVAL;
221 	}
222 }
223 
224 static inline void mcp4821_init_avail_gain(struct mcp4821_state *state,
225 				int resolution)
226 {
227 	state->scale_avail[0] = MCP4821_VREF_MV;
228 	state->scale_avail[1] = resolution;
229 	state->scale_avail[2] = MCP4821_VREF_MV * 2;
230 	state->scale_avail[3] = resolution;
231 }
232 
233 static int mcp4821_read_avail(struct iio_dev *indio_dev,
234 			     struct iio_chan_spec const *chan,
235 			     const int **vals, int *type, int *length,
236 			     long info)
237 {
238 	struct mcp4821_state *state = iio_priv(indio_dev);
239 
240 	switch (info) {
241 	case IIO_CHAN_INFO_SCALE:
242 		*vals = state->scale_avail;
243 		*type = IIO_VAL_FRACTIONAL_LOG2;
244 		*length = ARRAY_SIZE(state->scale_avail);
245 		return IIO_AVAIL_LIST;
246 	default:
247 		return -EINVAL;
248 	}
249 }
250 
251 static const struct iio_info mcp4821_info = {
252 	.read_raw = &mcp4821_read_raw,
253 	.write_raw = &mcp4821_write_raw,
254 	.read_avail = &mcp4821_read_avail,
255 };
256 
257 static int mcp4821_probe(struct spi_device *spi)
258 {
259 	struct iio_dev *indio_dev;
260 	struct mcp4821_state *state;
261 	const struct mcp4821_chip_info *info;
262 
263 	indio_dev = devm_iio_device_alloc(&spi->dev, sizeof(*state));
264 	if (indio_dev == NULL)
265 		return -ENOMEM;
266 
267 	state = iio_priv(indio_dev);
268 	state->spi = spi;
269 
270 	/* default gain is 2x */
271 	state->gain = 2;
272 	info = spi_get_device_match_data(spi);
273 	indio_dev->name = info->name;
274 	indio_dev->info = &mcp4821_info;
275 	indio_dev->modes = INDIO_DIRECT_MODE;
276 	indio_dev->channels = info->channels;
277 	indio_dev->num_channels = info->num_channels;
278 	mcp4821_init_avail_gain(state, info->channels[0].scan_type.realbits);
279 
280 	return devm_iio_device_register(&spi->dev, indio_dev);
281 }
282 
283 #define MCP4821_COMPATIBLE(of_compatible, id)        \
284 	{                                            \
285 		.compatible = of_compatible,         \
286 		.data = &mcp4821_chip_info_table[id] \
287 	}
288 
289 static const struct of_device_id mcp4821_of_table[] = {
290 	MCP4821_COMPATIBLE("microchip,mcp4801", ID_MCP4801),
291 	MCP4821_COMPATIBLE("microchip,mcp4802", ID_MCP4802),
292 	MCP4821_COMPATIBLE("microchip,mcp4811", ID_MCP4811),
293 	MCP4821_COMPATIBLE("microchip,mcp4812", ID_MCP4812),
294 	MCP4821_COMPATIBLE("microchip,mcp4821", ID_MCP4821),
295 	MCP4821_COMPATIBLE("microchip,mcp4822", ID_MCP4822),
296 	{ }
297 };
298 MODULE_DEVICE_TABLE(of, mcp4821_of_table);
299 
300 static const struct spi_device_id mcp4821_id_table[] = {
301 	{ "mcp4801", (kernel_ulong_t)&mcp4821_chip_info_table[ID_MCP4801]},
302 	{ "mcp4802", (kernel_ulong_t)&mcp4821_chip_info_table[ID_MCP4802]},
303 	{ "mcp4811", (kernel_ulong_t)&mcp4821_chip_info_table[ID_MCP4811]},
304 	{ "mcp4812", (kernel_ulong_t)&mcp4821_chip_info_table[ID_MCP4812]},
305 	{ "mcp4821", (kernel_ulong_t)&mcp4821_chip_info_table[ID_MCP4821]},
306 	{ "mcp4822", (kernel_ulong_t)&mcp4821_chip_info_table[ID_MCP4822]},
307 	{ }
308 };
309 MODULE_DEVICE_TABLE(spi, mcp4821_id_table);
310 
311 static struct spi_driver mcp4821_driver = {
312 	.driver = {
313 		.name = "mcp4821",
314 		.of_match_table = mcp4821_of_table,
315 	},
316 	.probe = mcp4821_probe,
317 	.id_table = mcp4821_id_table,
318 };
319 module_spi_driver(mcp4821_driver);
320 
321 MODULE_AUTHOR("Anshul Dalal <anshulusr@gmail.com>");
322 MODULE_DESCRIPTION("Microchip MCP4821 DAC Driver");
323 MODULE_LICENSE("GPL");
324