1 // SPDX-License-Identifier: GPL-2.0-only 2 /* 3 * Maxim MAX5522 4 * Dual, Ultra-Low-Power 10-Bit, Voltage-Output DACs 5 * 6 * Copyright 2022 Timesys Corp. 7 */ 8 9 #include <linux/device.h> 10 #include <linux/kernel.h> 11 #include <linux/module.h> 12 #include <linux/mod_devicetable.h> 13 #include <linux/regmap.h> 14 #include <linux/regulator/consumer.h> 15 #include <linux/slab.h> 16 #include <linux/spi/spi.h> 17 18 #include <linux/iio/iio.h> 19 20 #define MAX5522_MAX_ADDR 15 21 #define MAX5522_CTRL_NONE 0 22 #define MAX5522_CTRL_LOAD_IN_A 9 23 #define MAX5522_CTRL_LOAD_IN_B 10 24 25 #define MAX5522_REG_DATA(x) ((x) + MAX5522_CTRL_LOAD_IN_A) 26 27 struct max5522_chip_info { 28 const char *name; 29 const struct iio_chan_spec *channels; 30 unsigned int num_channels; 31 }; 32 33 struct max5522_state { 34 struct regmap *regmap; 35 const struct max5522_chip_info *chip_info; 36 unsigned short dac_cache[2]; 37 struct regulator *vrefin_reg; 38 }; 39 40 #define MAX5522_CHANNEL(chan) { \ 41 .type = IIO_VOLTAGE, \ 42 .indexed = 1, \ 43 .output = 1, \ 44 .channel = chan, \ 45 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | \ 46 BIT(IIO_CHAN_INFO_SCALE), \ 47 .scan_type = { \ 48 .sign = 'u', \ 49 .realbits = 10, \ 50 .storagebits = 16, \ 51 .shift = 2, \ 52 } \ 53 } 54 55 static const struct iio_chan_spec max5522_channels[] = { 56 MAX5522_CHANNEL(0), 57 MAX5522_CHANNEL(1), 58 }; 59 60 enum max5522_type { 61 ID_MAX5522, 62 }; 63 64 static const struct max5522_chip_info max5522_chip_info_tbl[] = { 65 [ID_MAX5522] = { 66 .name = "max5522", 67 .channels = max5522_channels, 68 .num_channels = 2, 69 }, 70 }; 71 72 static inline int max5522_info_to_reg(struct iio_chan_spec const *chan) 73 { 74 return MAX5522_REG_DATA(chan->channel); 75 } 76 77 static int max5522_read_raw(struct iio_dev *indio_dev, 78 struct iio_chan_spec const *chan, 79 int *val, int *val2, long info) 80 { 81 struct max5522_state *state = iio_priv(indio_dev); 82 int ret; 83 84 switch (info) { 85 case IIO_CHAN_INFO_RAW: 86 *val = state->dac_cache[chan->channel]; 87 return IIO_VAL_INT; 88 case IIO_CHAN_INFO_SCALE: 89 ret = regulator_get_voltage(state->vrefin_reg); 90 if (ret < 0) 91 return -EINVAL; 92 *val = ret / 1000; 93 *val2 = 10; 94 return IIO_VAL_FRACTIONAL_LOG2; 95 default: 96 return -EINVAL; 97 } 98 99 return -EINVAL; 100 } 101 102 static int max5522_write_raw(struct iio_dev *indio_dev, 103 struct iio_chan_spec const *chan, 104 int val, int val2, long info) 105 { 106 struct max5522_state *state = iio_priv(indio_dev); 107 int rval; 108 109 if (val > 1023 || val < 0) 110 return -EINVAL; 111 112 rval = regmap_write(state->regmap, max5522_info_to_reg(chan), 113 val << chan->scan_type.shift); 114 if (rval < 0) 115 return rval; 116 117 state->dac_cache[chan->channel] = val; 118 119 return 0; 120 } 121 122 static const struct iio_info max5522_info = { 123 .read_raw = max5522_read_raw, 124 .write_raw = max5522_write_raw, 125 }; 126 127 static const struct regmap_config max5522_regmap_config = { 128 .reg_bits = 4, 129 .val_bits = 12, 130 .max_register = MAX5522_MAX_ADDR, 131 }; 132 133 static int max5522_spi_probe(struct spi_device *spi) 134 { 135 struct iio_dev *indio_dev; 136 struct max5522_state *state; 137 int ret; 138 139 indio_dev = devm_iio_device_alloc(&spi->dev, sizeof(*state)); 140 if (indio_dev == NULL) { 141 dev_err(&spi->dev, "failed to allocate iio device\n"); 142 return -ENOMEM; 143 } 144 145 state = iio_priv(indio_dev); 146 state->chip_info = spi_get_device_match_data(spi); 147 if (!state->chip_info) 148 return -EINVAL; 149 150 state->vrefin_reg = devm_regulator_get(&spi->dev, "vrefin"); 151 if (IS_ERR(state->vrefin_reg)) 152 return dev_err_probe(&spi->dev, PTR_ERR(state->vrefin_reg), 153 "Vrefin regulator not specified\n"); 154 155 ret = regulator_enable(state->vrefin_reg); 156 if (ret) { 157 return dev_err_probe(&spi->dev, ret, 158 "Failed to enable vref regulators\n"); 159 } 160 161 state->regmap = devm_regmap_init_spi(spi, &max5522_regmap_config); 162 163 if (IS_ERR(state->regmap)) 164 return PTR_ERR(state->regmap); 165 166 indio_dev->info = &max5522_info; 167 indio_dev->modes = INDIO_DIRECT_MODE; 168 indio_dev->channels = max5522_channels; 169 indio_dev->num_channels = ARRAY_SIZE(max5522_channels); 170 indio_dev->name = max5522_chip_info_tbl[ID_MAX5522].name; 171 172 return devm_iio_device_register(&spi->dev, indio_dev); 173 } 174 175 static const struct spi_device_id max5522_ids[] = { 176 { "max5522", (kernel_ulong_t)&max5522_chip_info_tbl[ID_MAX5522] }, 177 {} 178 }; 179 MODULE_DEVICE_TABLE(spi, max5522_ids); 180 181 static const struct of_device_id max5522_of_match[] = { 182 { 183 .compatible = "maxim,max5522", 184 .data = &max5522_chip_info_tbl[ID_MAX5522], 185 }, 186 {} 187 }; 188 MODULE_DEVICE_TABLE(of, max5522_of_match); 189 190 static struct spi_driver max5522_spi_driver = { 191 .driver = { 192 .name = "max5522", 193 .of_match_table = max5522_of_match, 194 }, 195 .probe = max5522_spi_probe, 196 .id_table = max5522_ids, 197 }; 198 module_spi_driver(max5522_spi_driver); 199 200 MODULE_AUTHOR("Angelo Dureghello <angelo.dureghello@timesys.com"); 201 MODULE_DESCRIPTION("MAX5522 DAC driver"); 202 MODULE_LICENSE("GPL"); 203