1 // SPDX-License-Identifier: GPL-2.0 2 /* 3 * LTC2688 16 channel, 16 bit Voltage Output SoftSpan DAC driver 4 * 5 * Copyright 2022 Analog Devices Inc. 6 */ 7 #include <linux/bitfield.h> 8 #include <linux/bits.h> 9 #include <linux/clk.h> 10 #include <linux/device.h> 11 #include <linux/gpio/consumer.h> 12 #include <linux/iio/iio.h> 13 #include <linux/limits.h> 14 #include <linux/kernel.h> 15 #include <linux/module.h> 16 #include <linux/mod_devicetable.h> 17 #include <linux/mutex.h> 18 #include <linux/of.h> 19 #include <linux/property.h> 20 #include <linux/regmap.h> 21 #include <linux/regulator/consumer.h> 22 #include <linux/spi/spi.h> 23 24 #define LTC2688_DAC_CHANNELS 16 25 26 #define LTC2688_CMD_CH_CODE(x) (0x00 + (x)) 27 #define LTC2688_CMD_CH_SETTING(x) (0x10 + (x)) 28 #define LTC2688_CMD_CH_OFFSET(x) (0X20 + (x)) 29 #define LTC2688_CMD_CH_GAIN(x) (0x30 + (x)) 30 #define LTC2688_CMD_CH_CODE_UPDATE(x) (0x40 + (x)) 31 32 #define LTC2688_CMD_CONFIG 0x70 33 #define LTC2688_CMD_POWERDOWN 0x71 34 #define LTC2688_CMD_A_B_SELECT 0x72 35 #define LTC2688_CMD_SW_TOGGLE 0x73 36 #define LTC2688_CMD_TOGGLE_DITHER_EN 0x74 37 #define LTC2688_CMD_THERMAL_STAT 0x77 38 #define LTC2688_CMD_UPDATE_ALL 0x7C 39 #define LTC2688_CMD_NOOP 0xFF 40 41 #define LTC2688_READ_OPERATION 0x80 42 43 /* Channel Settings */ 44 #define LTC2688_CH_SPAN_MSK GENMASK(2, 0) 45 #define LTC2688_CH_OVERRANGE_MSK BIT(3) 46 #define LTC2688_CH_TD_SEL_MSK GENMASK(5, 4) 47 #define LTC2688_CH_TGP_MAX 3 48 #define LTC2688_CH_DIT_PER_MSK GENMASK(8, 6) 49 #define LTC2688_CH_DIT_PH_MSK GENMASK(10, 9) 50 #define LTC2688_CH_MODE_MSK BIT(11) 51 52 #define LTC2688_DITHER_RAW_MASK GENMASK(15, 2) 53 #define LTC2688_CH_CALIBBIAS_MASK GENMASK(15, 2) 54 #define LTC2688_DITHER_RAW_MAX_VAL (BIT(14) - 1) 55 #define LTC2688_CH_CALIBBIAS_MAX_VAL (BIT(14) - 1) 56 57 /* Configuration register */ 58 #define LTC2688_CONFIG_RST BIT(15) 59 #define LTC2688_CONFIG_EXT_REF BIT(1) 60 61 #define LTC2688_DITHER_FREQ_AVAIL_N 5 62 63 enum { 64 LTC2688_SPAN_RANGE_0V_5V, 65 LTC2688_SPAN_RANGE_0V_10V, 66 LTC2688_SPAN_RANGE_M5V_5V, 67 LTC2688_SPAN_RANGE_M10V_10V, 68 LTC2688_SPAN_RANGE_M15V_15V, 69 LTC2688_SPAN_RANGE_MAX 70 }; 71 72 enum { 73 LTC2688_MODE_DEFAULT, 74 LTC2688_MODE_DITHER_TOGGLE, 75 }; 76 77 struct ltc2688_chan { 78 long dither_frequency[LTC2688_DITHER_FREQ_AVAIL_N]; 79 bool overrange; 80 bool toggle_chan; 81 u8 mode; 82 }; 83 84 struct ltc2688_state { 85 struct spi_device *spi; 86 struct regmap *regmap; 87 struct ltc2688_chan channels[LTC2688_DAC_CHANNELS]; 88 struct iio_chan_spec *iio_chan; 89 /* lock to protect against multiple access to the device and shared data */ 90 struct mutex lock; 91 int vref; 92 /* 93 * DMA (thus cache coherency maintenance) may require the 94 * transfer buffers to live in their own cache lines. 95 */ 96 u8 tx_data[6] __aligned(IIO_DMA_MINALIGN); 97 u8 rx_data[3]; 98 }; 99 100 static int ltc2688_spi_read(void *context, const void *reg, size_t reg_size, 101 void *val, size_t val_size) 102 { 103 struct ltc2688_state *st = context; 104 struct spi_transfer xfers[] = { 105 { 106 .tx_buf = st->tx_data, 107 .len = reg_size + val_size, 108 .cs_change = 1, 109 }, { 110 .tx_buf = st->tx_data + 3, 111 .rx_buf = st->rx_data, 112 .len = reg_size + val_size, 113 }, 114 }; 115 int ret; 116 117 memcpy(st->tx_data, reg, reg_size); 118 119 ret = spi_sync_transfer(st->spi, xfers, ARRAY_SIZE(xfers)); 120 if (ret) 121 return ret; 122 123 memcpy(val, &st->rx_data[1], val_size); 124 125 return 0; 126 } 127 128 static int ltc2688_spi_write(void *context, const void *data, size_t count) 129 { 130 struct ltc2688_state *st = context; 131 132 return spi_write(st->spi, data, count); 133 } 134 135 static int ltc2688_span_get(const struct ltc2688_state *st, int c) 136 { 137 int ret, reg, span; 138 139 ret = regmap_read(st->regmap, LTC2688_CMD_CH_SETTING(c), ®); 140 if (ret) 141 return ret; 142 143 span = FIELD_GET(LTC2688_CH_SPAN_MSK, reg); 144 /* sanity check to make sure we don't get any weird value from the HW */ 145 if (span >= LTC2688_SPAN_RANGE_MAX) 146 return -EIO; 147 148 return span; 149 } 150 151 static const int ltc2688_span_helper[LTC2688_SPAN_RANGE_MAX][2] = { 152 {0, 5000}, {0, 10000}, {-5000, 5000}, {-10000, 10000}, {-15000, 15000}, 153 }; 154 155 static int ltc2688_scale_get(const struct ltc2688_state *st, int c, int *val) 156 { 157 const struct ltc2688_chan *chan = &st->channels[c]; 158 int span, fs; 159 160 span = ltc2688_span_get(st, c); 161 if (span < 0) 162 return span; 163 164 fs = ltc2688_span_helper[span][1] - ltc2688_span_helper[span][0]; 165 if (chan->overrange) 166 fs = mult_frac(fs, 105, 100); 167 168 *val = DIV_ROUND_CLOSEST(fs * st->vref, 4096); 169 170 return 0; 171 } 172 173 static int ltc2688_offset_get(const struct ltc2688_state *st, int c, int *val) 174 { 175 int span; 176 177 span = ltc2688_span_get(st, c); 178 if (span < 0) 179 return span; 180 181 if (ltc2688_span_helper[span][0] < 0) 182 *val = -32768; 183 else 184 *val = 0; 185 186 return 0; 187 } 188 189 enum { 190 LTC2688_INPUT_A, 191 LTC2688_INPUT_B, 192 LTC2688_INPUT_B_AVAIL, 193 LTC2688_DITHER_OFF, 194 LTC2688_DITHER_FREQ_AVAIL, 195 }; 196 197 static int ltc2688_dac_code_write(struct ltc2688_state *st, u32 chan, u32 input, 198 u16 code) 199 { 200 struct ltc2688_chan *c = &st->channels[chan]; 201 int ret, reg; 202 203 /* 2 LSBs set to 0 if writing dither amplitude */ 204 if (!c->toggle_chan && input == LTC2688_INPUT_B) { 205 if (code > LTC2688_DITHER_RAW_MAX_VAL) 206 return -EINVAL; 207 208 code = FIELD_PREP(LTC2688_DITHER_RAW_MASK, code); 209 } 210 211 mutex_lock(&st->lock); 212 /* select the correct input register to read from */ 213 ret = regmap_update_bits(st->regmap, LTC2688_CMD_A_B_SELECT, BIT(chan), 214 input << chan); 215 if (ret) 216 goto out_unlock; 217 218 /* 219 * If in dither/toggle mode the dac should be updated by an 220 * external signal (or sw toggle) and not here. 221 */ 222 if (c->mode == LTC2688_MODE_DEFAULT) 223 reg = LTC2688_CMD_CH_CODE_UPDATE(chan); 224 else 225 reg = LTC2688_CMD_CH_CODE(chan); 226 227 ret = regmap_write(st->regmap, reg, code); 228 out_unlock: 229 mutex_unlock(&st->lock); 230 return ret; 231 } 232 233 static int ltc2688_dac_code_read(struct ltc2688_state *st, u32 chan, u32 input, 234 u32 *code) 235 { 236 struct ltc2688_chan *c = &st->channels[chan]; 237 int ret; 238 239 mutex_lock(&st->lock); 240 ret = regmap_update_bits(st->regmap, LTC2688_CMD_A_B_SELECT, BIT(chan), 241 input << chan); 242 if (ret) 243 goto out_unlock; 244 245 ret = regmap_read(st->regmap, LTC2688_CMD_CH_CODE(chan), code); 246 out_unlock: 247 mutex_unlock(&st->lock); 248 249 if (!c->toggle_chan && input == LTC2688_INPUT_B) 250 *code = FIELD_GET(LTC2688_DITHER_RAW_MASK, *code); 251 252 return ret; 253 } 254 255 static const int ltc2688_raw_range[] = {0, 1, U16_MAX}; 256 257 static int ltc2688_read_avail(struct iio_dev *indio_dev, 258 struct iio_chan_spec const *chan, 259 const int **vals, int *type, int *length, 260 long info) 261 { 262 switch (info) { 263 case IIO_CHAN_INFO_RAW: 264 *vals = ltc2688_raw_range; 265 *type = IIO_VAL_INT; 266 return IIO_AVAIL_RANGE; 267 default: 268 return -EINVAL; 269 } 270 } 271 272 static int ltc2688_read_raw(struct iio_dev *indio_dev, 273 struct iio_chan_spec const *chan, int *val, 274 int *val2, long info) 275 { 276 struct ltc2688_state *st = iio_priv(indio_dev); 277 int ret; 278 279 switch (info) { 280 case IIO_CHAN_INFO_RAW: 281 ret = ltc2688_dac_code_read(st, chan->channel, LTC2688_INPUT_A, 282 val); 283 if (ret) 284 return ret; 285 286 return IIO_VAL_INT; 287 case IIO_CHAN_INFO_OFFSET: 288 ret = ltc2688_offset_get(st, chan->channel, val); 289 if (ret) 290 return ret; 291 292 return IIO_VAL_INT; 293 case IIO_CHAN_INFO_SCALE: 294 ret = ltc2688_scale_get(st, chan->channel, val); 295 if (ret) 296 return ret; 297 298 *val2 = 16; 299 return IIO_VAL_FRACTIONAL_LOG2; 300 case IIO_CHAN_INFO_CALIBBIAS: 301 ret = regmap_read(st->regmap, 302 LTC2688_CMD_CH_OFFSET(chan->channel), val); 303 if (ret) 304 return ret; 305 306 *val = FIELD_GET(LTC2688_CH_CALIBBIAS_MASK, *val); 307 return IIO_VAL_INT; 308 case IIO_CHAN_INFO_CALIBSCALE: 309 ret = regmap_read(st->regmap, 310 LTC2688_CMD_CH_GAIN(chan->channel), val); 311 if (ret) 312 return ret; 313 314 return IIO_VAL_INT; 315 default: 316 return -EINVAL; 317 } 318 } 319 320 static int ltc2688_write_raw(struct iio_dev *indio_dev, 321 struct iio_chan_spec const *chan, int val, 322 int val2, long info) 323 { 324 struct ltc2688_state *st = iio_priv(indio_dev); 325 326 switch (info) { 327 case IIO_CHAN_INFO_RAW: 328 if (val > U16_MAX || val < 0) 329 return -EINVAL; 330 331 return ltc2688_dac_code_write(st, chan->channel, 332 LTC2688_INPUT_A, val); 333 case IIO_CHAN_INFO_CALIBBIAS: 334 if (val > LTC2688_CH_CALIBBIAS_MAX_VAL) 335 return -EINVAL; 336 337 return regmap_write(st->regmap, 338 LTC2688_CMD_CH_OFFSET(chan->channel), 339 FIELD_PREP(LTC2688_CH_CALIBBIAS_MASK, val)); 340 case IIO_CHAN_INFO_CALIBSCALE: 341 return regmap_write(st->regmap, 342 LTC2688_CMD_CH_GAIN(chan->channel), val); 343 default: 344 return -EINVAL; 345 } 346 } 347 348 static ssize_t ltc2688_dither_toggle_set(struct iio_dev *indio_dev, 349 uintptr_t private, 350 const struct iio_chan_spec *chan, 351 const char *buf, size_t len) 352 { 353 struct ltc2688_state *st = iio_priv(indio_dev); 354 struct ltc2688_chan *c = &st->channels[chan->channel]; 355 int ret; 356 bool en; 357 358 ret = kstrtobool(buf, &en); 359 if (ret) 360 return ret; 361 362 mutex_lock(&st->lock); 363 ret = regmap_update_bits(st->regmap, LTC2688_CMD_TOGGLE_DITHER_EN, 364 BIT(chan->channel), en << chan->channel); 365 if (ret) 366 goto out_unlock; 367 368 c->mode = en ? LTC2688_MODE_DITHER_TOGGLE : LTC2688_MODE_DEFAULT; 369 out_unlock: 370 mutex_unlock(&st->lock); 371 372 return ret ?: len; 373 } 374 375 static ssize_t ltc2688_reg_bool_get(struct iio_dev *indio_dev, 376 uintptr_t private, 377 const struct iio_chan_spec *chan, 378 char *buf) 379 { 380 const struct ltc2688_state *st = iio_priv(indio_dev); 381 int ret; 382 u32 val; 383 384 ret = regmap_read(st->regmap, private, &val); 385 if (ret) 386 return ret; 387 388 return sysfs_emit(buf, "%u\n", !!(val & BIT(chan->channel))); 389 } 390 391 static ssize_t ltc2688_reg_bool_set(struct iio_dev *indio_dev, 392 uintptr_t private, 393 const struct iio_chan_spec *chan, 394 const char *buf, size_t len) 395 { 396 const struct ltc2688_state *st = iio_priv(indio_dev); 397 int ret; 398 bool en; 399 400 ret = kstrtobool(buf, &en); 401 if (ret) 402 return ret; 403 404 ret = regmap_update_bits(st->regmap, private, BIT(chan->channel), 405 en << chan->channel); 406 if (ret) 407 return ret; 408 409 return len; 410 } 411 412 static ssize_t ltc2688_dither_freq_avail(const struct ltc2688_state *st, 413 const struct ltc2688_chan *chan, 414 char *buf) 415 { 416 int sz = 0; 417 u32 f; 418 419 for (f = 0; f < ARRAY_SIZE(chan->dither_frequency); f++) 420 sz += sysfs_emit_at(buf, sz, "%ld ", chan->dither_frequency[f]); 421 422 buf[sz - 1] = '\n'; 423 424 return sz; 425 } 426 427 static ssize_t ltc2688_dither_freq_get(struct iio_dev *indio_dev, 428 uintptr_t private, 429 const struct iio_chan_spec *chan, 430 char *buf) 431 { 432 const struct ltc2688_state *st = iio_priv(indio_dev); 433 const struct ltc2688_chan *c = &st->channels[chan->channel]; 434 u32 reg, freq; 435 int ret; 436 437 if (private == LTC2688_DITHER_FREQ_AVAIL) 438 return ltc2688_dither_freq_avail(st, c, buf); 439 440 ret = regmap_read(st->regmap, LTC2688_CMD_CH_SETTING(chan->channel), 441 ®); 442 if (ret) 443 return ret; 444 445 freq = FIELD_GET(LTC2688_CH_DIT_PER_MSK, reg); 446 if (freq >= ARRAY_SIZE(c->dither_frequency)) 447 return -EIO; 448 449 return sysfs_emit(buf, "%ld\n", c->dither_frequency[freq]); 450 } 451 452 static ssize_t ltc2688_dither_freq_set(struct iio_dev *indio_dev, 453 uintptr_t private, 454 const struct iio_chan_spec *chan, 455 const char *buf, size_t len) 456 { 457 const struct ltc2688_state *st = iio_priv(indio_dev); 458 const struct ltc2688_chan *c = &st->channels[chan->channel]; 459 long val; 460 u32 freq; 461 int ret; 462 463 if (private == LTC2688_DITHER_FREQ_AVAIL) 464 return -EINVAL; 465 466 ret = kstrtol(buf, 10, &val); 467 if (ret) 468 return ret; 469 470 for (freq = 0; freq < ARRAY_SIZE(c->dither_frequency); freq++) { 471 if (val == c->dither_frequency[freq]) 472 break; 473 } 474 475 if (freq == ARRAY_SIZE(c->dither_frequency)) 476 return -EINVAL; 477 478 ret = regmap_update_bits(st->regmap, 479 LTC2688_CMD_CH_SETTING(chan->channel), 480 LTC2688_CH_DIT_PER_MSK, 481 FIELD_PREP(LTC2688_CH_DIT_PER_MSK, freq)); 482 if (ret) 483 return ret; 484 485 return len; 486 } 487 488 static ssize_t ltc2688_dac_input_read(struct iio_dev *indio_dev, 489 uintptr_t private, 490 const struct iio_chan_spec *chan, 491 char *buf) 492 { 493 struct ltc2688_state *st = iio_priv(indio_dev); 494 int ret; 495 u32 val; 496 497 if (private == LTC2688_INPUT_B_AVAIL) 498 return sysfs_emit(buf, "[%u %u %u]\n", ltc2688_raw_range[0], 499 ltc2688_raw_range[1], 500 ltc2688_raw_range[2] / 4); 501 502 if (private == LTC2688_DITHER_OFF) 503 return sysfs_emit(buf, "0\n"); 504 505 ret = ltc2688_dac_code_read(st, chan->channel, private, &val); 506 if (ret) 507 return ret; 508 509 return sysfs_emit(buf, "%u\n", val); 510 } 511 512 static ssize_t ltc2688_dac_input_write(struct iio_dev *indio_dev, 513 uintptr_t private, 514 const struct iio_chan_spec *chan, 515 const char *buf, size_t len) 516 { 517 struct ltc2688_state *st = iio_priv(indio_dev); 518 int ret; 519 u16 val; 520 521 if (private == LTC2688_INPUT_B_AVAIL || private == LTC2688_DITHER_OFF) 522 return -EINVAL; 523 524 ret = kstrtou16(buf, 10, &val); 525 if (ret) 526 return ret; 527 528 ret = ltc2688_dac_code_write(st, chan->channel, private, val); 529 if (ret) 530 return ret; 531 532 return len; 533 } 534 535 static int ltc2688_get_dither_phase(struct iio_dev *dev, 536 const struct iio_chan_spec *chan) 537 { 538 struct ltc2688_state *st = iio_priv(dev); 539 int ret, regval; 540 541 ret = regmap_read(st->regmap, LTC2688_CMD_CH_SETTING(chan->channel), 542 ®val); 543 if (ret) 544 return ret; 545 546 return FIELD_GET(LTC2688_CH_DIT_PH_MSK, regval); 547 } 548 549 static int ltc2688_set_dither_phase(struct iio_dev *dev, 550 const struct iio_chan_spec *chan, 551 unsigned int phase) 552 { 553 struct ltc2688_state *st = iio_priv(dev); 554 555 return regmap_update_bits(st->regmap, 556 LTC2688_CMD_CH_SETTING(chan->channel), 557 LTC2688_CH_DIT_PH_MSK, 558 FIELD_PREP(LTC2688_CH_DIT_PH_MSK, phase)); 559 } 560 561 static int ltc2688_reg_access(struct iio_dev *indio_dev, 562 unsigned int reg, 563 unsigned int writeval, 564 unsigned int *readval) 565 { 566 struct ltc2688_state *st = iio_priv(indio_dev); 567 568 if (readval) 569 return regmap_read(st->regmap, reg, readval); 570 571 return regmap_write(st->regmap, reg, writeval); 572 } 573 574 static const char * const ltc2688_dither_phase[] = { 575 "0", "1.5708", "3.14159", "4.71239", 576 }; 577 578 static const struct iio_enum ltc2688_dither_phase_enum = { 579 .items = ltc2688_dither_phase, 580 .num_items = ARRAY_SIZE(ltc2688_dither_phase), 581 .set = ltc2688_set_dither_phase, 582 .get = ltc2688_get_dither_phase, 583 }; 584 585 #define LTC2688_CHAN_EXT_INFO(_name, _what, _shared, _read, _write) { \ 586 .name = _name, \ 587 .read = (_read), \ 588 .write = (_write), \ 589 .private = (_what), \ 590 .shared = (_shared), \ 591 } 592 593 /* 594 * For toggle mode we only expose the symbol attr (sw_toggle) in case a TGPx is 595 * not provided in dts. 596 */ 597 static const struct iio_chan_spec_ext_info ltc2688_toggle_sym_ext_info[] = { 598 LTC2688_CHAN_EXT_INFO("raw0", LTC2688_INPUT_A, IIO_SEPARATE, 599 ltc2688_dac_input_read, ltc2688_dac_input_write), 600 LTC2688_CHAN_EXT_INFO("raw1", LTC2688_INPUT_B, IIO_SEPARATE, 601 ltc2688_dac_input_read, ltc2688_dac_input_write), 602 LTC2688_CHAN_EXT_INFO("toggle_en", LTC2688_CMD_TOGGLE_DITHER_EN, 603 IIO_SEPARATE, ltc2688_reg_bool_get, 604 ltc2688_dither_toggle_set), 605 LTC2688_CHAN_EXT_INFO("powerdown", LTC2688_CMD_POWERDOWN, IIO_SEPARATE, 606 ltc2688_reg_bool_get, ltc2688_reg_bool_set), 607 LTC2688_CHAN_EXT_INFO("symbol", LTC2688_CMD_SW_TOGGLE, IIO_SEPARATE, 608 ltc2688_reg_bool_get, ltc2688_reg_bool_set), 609 { } 610 }; 611 612 static const struct iio_chan_spec_ext_info ltc2688_toggle_ext_info[] = { 613 LTC2688_CHAN_EXT_INFO("raw0", LTC2688_INPUT_A, IIO_SEPARATE, 614 ltc2688_dac_input_read, ltc2688_dac_input_write), 615 LTC2688_CHAN_EXT_INFO("raw1", LTC2688_INPUT_B, IIO_SEPARATE, 616 ltc2688_dac_input_read, ltc2688_dac_input_write), 617 LTC2688_CHAN_EXT_INFO("toggle_en", LTC2688_CMD_TOGGLE_DITHER_EN, 618 IIO_SEPARATE, ltc2688_reg_bool_get, 619 ltc2688_dither_toggle_set), 620 LTC2688_CHAN_EXT_INFO("powerdown", LTC2688_CMD_POWERDOWN, IIO_SEPARATE, 621 ltc2688_reg_bool_get, ltc2688_reg_bool_set), 622 { } 623 }; 624 625 static const struct iio_chan_spec_ext_info ltc2688_dither_ext_info[] = { 626 LTC2688_CHAN_EXT_INFO("dither_raw", LTC2688_INPUT_B, IIO_SEPARATE, 627 ltc2688_dac_input_read, ltc2688_dac_input_write), 628 LTC2688_CHAN_EXT_INFO("dither_raw_available", LTC2688_INPUT_B_AVAIL, 629 IIO_SEPARATE, ltc2688_dac_input_read, 630 ltc2688_dac_input_write), 631 LTC2688_CHAN_EXT_INFO("dither_offset", LTC2688_DITHER_OFF, IIO_SEPARATE, 632 ltc2688_dac_input_read, ltc2688_dac_input_write), 633 /* 634 * Not IIO_ENUM because the available freq needs to be computed at 635 * probe. We could still use it, but it didn't felt much right. 636 */ 637 LTC2688_CHAN_EXT_INFO("dither_frequency", 0, IIO_SEPARATE, 638 ltc2688_dither_freq_get, ltc2688_dither_freq_set), 639 LTC2688_CHAN_EXT_INFO("dither_frequency_available", 640 LTC2688_DITHER_FREQ_AVAIL, IIO_SEPARATE, 641 ltc2688_dither_freq_get, ltc2688_dither_freq_set), 642 IIO_ENUM("dither_phase", IIO_SEPARATE, <c2688_dither_phase_enum), 643 IIO_ENUM_AVAILABLE("dither_phase", IIO_SEPARATE, 644 <c2688_dither_phase_enum), 645 LTC2688_CHAN_EXT_INFO("dither_en", LTC2688_CMD_TOGGLE_DITHER_EN, 646 IIO_SEPARATE, ltc2688_reg_bool_get, 647 ltc2688_dither_toggle_set), 648 LTC2688_CHAN_EXT_INFO("powerdown", LTC2688_CMD_POWERDOWN, IIO_SEPARATE, 649 ltc2688_reg_bool_get, ltc2688_reg_bool_set), 650 { } 651 }; 652 653 static const struct iio_chan_spec_ext_info ltc2688_ext_info[] = { 654 LTC2688_CHAN_EXT_INFO("powerdown", LTC2688_CMD_POWERDOWN, IIO_SEPARATE, 655 ltc2688_reg_bool_get, ltc2688_reg_bool_set), 656 { } 657 }; 658 659 #define LTC2688_CHANNEL(_chan) { \ 660 .type = IIO_VOLTAGE, \ 661 .indexed = 1, \ 662 .output = 1, \ 663 .channel = (_chan), \ 664 .info_mask_separate = BIT(IIO_CHAN_INFO_CALIBSCALE) | \ 665 BIT(IIO_CHAN_INFO_SCALE) | BIT(IIO_CHAN_INFO_OFFSET) | \ 666 BIT(IIO_CHAN_INFO_CALIBBIAS) | BIT(IIO_CHAN_INFO_RAW), \ 667 .info_mask_separate_available = BIT(IIO_CHAN_INFO_RAW), \ 668 .ext_info = ltc2688_ext_info, \ 669 } 670 671 static const struct iio_chan_spec ltc2688_channels[] = { 672 LTC2688_CHANNEL(0), 673 LTC2688_CHANNEL(1), 674 LTC2688_CHANNEL(2), 675 LTC2688_CHANNEL(3), 676 LTC2688_CHANNEL(4), 677 LTC2688_CHANNEL(5), 678 LTC2688_CHANNEL(6), 679 LTC2688_CHANNEL(7), 680 LTC2688_CHANNEL(8), 681 LTC2688_CHANNEL(9), 682 LTC2688_CHANNEL(10), 683 LTC2688_CHANNEL(11), 684 LTC2688_CHANNEL(12), 685 LTC2688_CHANNEL(13), 686 LTC2688_CHANNEL(14), 687 LTC2688_CHANNEL(15), 688 }; 689 690 static void ltc2688_clk_disable(void *clk) 691 { 692 clk_disable_unprepare(clk); 693 } 694 695 static const int ltc2688_period[LTC2688_DITHER_FREQ_AVAIL_N] = { 696 4, 8, 16, 32, 64, 697 }; 698 699 static int ltc2688_tgp_clk_setup(struct ltc2688_state *st, 700 struct ltc2688_chan *chan, 701 struct fwnode_handle *node, int tgp) 702 { 703 struct device *dev = &st->spi->dev; 704 unsigned long rate; 705 struct clk *clk; 706 int ret, f; 707 708 clk = devm_get_clk_from_child(dev, to_of_node(node), NULL); 709 if (IS_ERR(clk)) 710 return dev_err_probe(dev, PTR_ERR(clk), "failed to get tgp clk.\n"); 711 712 ret = clk_prepare_enable(clk); 713 if (ret) 714 return dev_err_probe(dev, ret, "failed to enable tgp clk.\n"); 715 716 ret = devm_add_action_or_reset(dev, ltc2688_clk_disable, clk); 717 if (ret) 718 return ret; 719 720 if (chan->toggle_chan) 721 return 0; 722 723 /* calculate available dither frequencies */ 724 rate = clk_get_rate(clk); 725 for (f = 0; f < ARRAY_SIZE(chan->dither_frequency); f++) 726 chan->dither_frequency[f] = DIV_ROUND_CLOSEST(rate, ltc2688_period[f]); 727 728 return 0; 729 } 730 731 static int ltc2688_span_lookup(const struct ltc2688_state *st, int min, int max) 732 { 733 u32 span; 734 735 for (span = 0; span < ARRAY_SIZE(ltc2688_span_helper); span++) { 736 if (min == ltc2688_span_helper[span][0] && 737 max == ltc2688_span_helper[span][1]) 738 return span; 739 } 740 741 return -EINVAL; 742 } 743 744 static int ltc2688_channel_config(struct ltc2688_state *st) 745 { 746 struct device *dev = &st->spi->dev; 747 u32 reg, clk_input, val, tmp[2]; 748 int ret, span; 749 750 device_for_each_child_node_scoped(dev, child) { 751 struct ltc2688_chan *chan; 752 753 ret = fwnode_property_read_u32(child, "reg", ®); 754 if (ret) 755 return dev_err_probe(dev, ret, 756 "Failed to get reg property\n"); 757 758 if (reg >= LTC2688_DAC_CHANNELS) 759 return dev_err_probe(dev, -EINVAL, 760 "reg bigger than: %d\n", 761 LTC2688_DAC_CHANNELS); 762 763 val = 0; 764 chan = &st->channels[reg]; 765 if (fwnode_property_read_bool(child, "adi,toggle-mode")) { 766 chan->toggle_chan = true; 767 /* assume sw toggle ABI */ 768 st->iio_chan[reg].ext_info = ltc2688_toggle_sym_ext_info; 769 /* 770 * Clear IIO_CHAN_INFO_RAW bit as toggle channels expose 771 * out_voltage_raw{0|1} files. 772 */ 773 __clear_bit(IIO_CHAN_INFO_RAW, 774 &st->iio_chan[reg].info_mask_separate); 775 } 776 777 ret = fwnode_property_read_u32_array(child, "adi,output-range-microvolt", 778 tmp, ARRAY_SIZE(tmp)); 779 if (!ret) { 780 span = ltc2688_span_lookup(st, (int)tmp[0] / 1000, 781 tmp[1] / 1000); 782 if (span < 0) 783 return dev_err_probe(dev, span, 784 "output range not valid:[%d %d]\n", 785 tmp[0], tmp[1]); 786 787 val |= FIELD_PREP(LTC2688_CH_SPAN_MSK, span); 788 } 789 790 ret = fwnode_property_read_u32(child, "adi,toggle-dither-input", 791 &clk_input); 792 if (!ret) { 793 if (clk_input >= LTC2688_CH_TGP_MAX) { 794 return dev_err_probe(dev, -EINVAL, 795 "toggle-dither-input inv value(%d)\n", 796 clk_input); 797 } 798 799 ret = ltc2688_tgp_clk_setup(st, chan, child, clk_input); 800 if (ret) 801 return ret; 802 803 /* 804 * 0 means software toggle which is the default mode. 805 * Hence the +1. 806 */ 807 val |= FIELD_PREP(LTC2688_CH_TD_SEL_MSK, clk_input + 1); 808 809 /* 810 * If a TGPx is given, we automatically assume a dither 811 * capable channel (unless toggle is already enabled). 812 * On top of this we just set here the dither bit in the 813 * channel settings. It won't have any effect until the 814 * global toggle/dither bit is enabled. 815 */ 816 if (!chan->toggle_chan) { 817 val |= FIELD_PREP(LTC2688_CH_MODE_MSK, 1); 818 st->iio_chan[reg].ext_info = ltc2688_dither_ext_info; 819 } else { 820 /* wait, no sw toggle after all */ 821 st->iio_chan[reg].ext_info = ltc2688_toggle_ext_info; 822 } 823 } 824 825 if (fwnode_property_read_bool(child, "adi,overrange")) { 826 chan->overrange = true; 827 val |= LTC2688_CH_OVERRANGE_MSK; 828 } 829 830 if (!val) 831 continue; 832 833 ret = regmap_write(st->regmap, LTC2688_CMD_CH_SETTING(reg), 834 val); 835 if (ret) 836 return dev_err_probe(dev, ret, 837 "failed to set chan settings\n"); 838 } 839 840 return 0; 841 } 842 843 static int ltc2688_setup(struct ltc2688_state *st, bool has_external_vref) 844 { 845 struct device *dev = &st->spi->dev; 846 struct gpio_desc *gpio; 847 int ret; 848 849 /* 850 * If we have a reset pin, use that to reset the board, If not, use 851 * the reset bit. 852 */ 853 gpio = devm_gpiod_get_optional(dev, "clr", GPIOD_OUT_HIGH); 854 if (IS_ERR(gpio)) 855 return dev_err_probe(dev, PTR_ERR(gpio), "Failed to get reset gpio"); 856 if (gpio) { 857 usleep_range(1000, 1200); 858 /* bring device out of reset */ 859 gpiod_set_value_cansleep(gpio, 0); 860 } else { 861 ret = regmap_set_bits(st->regmap, LTC2688_CMD_CONFIG, 862 LTC2688_CONFIG_RST); 863 if (ret) 864 return ret; 865 } 866 867 usleep_range(10000, 12000); 868 869 /* 870 * Duplicate the default channel configuration as it can change during 871 * @ltc2688_channel_config() 872 */ 873 st->iio_chan = devm_kmemdup(dev, ltc2688_channels, 874 sizeof(ltc2688_channels), GFP_KERNEL); 875 if (!st->iio_chan) 876 return -ENOMEM; 877 878 ret = ltc2688_channel_config(st); 879 if (ret) 880 return ret; 881 882 if (!has_external_vref) 883 return 0; 884 885 return regmap_set_bits(st->regmap, LTC2688_CMD_CONFIG, 886 LTC2688_CONFIG_EXT_REF); 887 } 888 889 static bool ltc2688_reg_readable(struct device *dev, unsigned int reg) 890 { 891 switch (reg) { 892 case LTC2688_CMD_CH_CODE(0) ... LTC2688_CMD_CH_GAIN(15): 893 return true; 894 case LTC2688_CMD_CONFIG ... LTC2688_CMD_THERMAL_STAT: 895 return true; 896 default: 897 return false; 898 } 899 } 900 901 static bool ltc2688_reg_writable(struct device *dev, unsigned int reg) 902 { 903 /* 904 * There's a jump from 0x76 to 0x78 in the write codes and the thermal 905 * status code is 0x77 (which is read only) so that we need to check 906 * that special condition. 907 */ 908 if (reg <= LTC2688_CMD_UPDATE_ALL && reg != LTC2688_CMD_THERMAL_STAT) 909 return true; 910 911 return false; 912 } 913 914 static const struct regmap_bus ltc2688_regmap_bus = { 915 .read = ltc2688_spi_read, 916 .write = ltc2688_spi_write, 917 .read_flag_mask = LTC2688_READ_OPERATION, 918 .reg_format_endian_default = REGMAP_ENDIAN_BIG, 919 .val_format_endian_default = REGMAP_ENDIAN_BIG, 920 }; 921 922 static const struct regmap_config ltc2688_regmap_config = { 923 .reg_bits = 8, 924 .val_bits = 16, 925 .readable_reg = ltc2688_reg_readable, 926 .writeable_reg = ltc2688_reg_writable, 927 /* ignoring the no op command */ 928 .max_register = LTC2688_CMD_UPDATE_ALL, 929 }; 930 931 static const struct iio_info ltc2688_info = { 932 .write_raw = ltc2688_write_raw, 933 .read_raw = ltc2688_read_raw, 934 .read_avail = ltc2688_read_avail, 935 .debugfs_reg_access = ltc2688_reg_access, 936 }; 937 938 static int ltc2688_probe(struct spi_device *spi) 939 { 940 static const char * const regulators[] = { "vcc", "iovcc" }; 941 struct ltc2688_state *st; 942 struct iio_dev *indio_dev; 943 struct device *dev = &spi->dev; 944 bool has_external_vref; 945 int ret; 946 947 indio_dev = devm_iio_device_alloc(dev, sizeof(*st)); 948 if (!indio_dev) 949 return -ENOMEM; 950 951 st = iio_priv(indio_dev); 952 st->spi = spi; 953 954 /* Just write this once. No need to do it in every regmap read. */ 955 st->tx_data[3] = LTC2688_CMD_NOOP; 956 mutex_init(&st->lock); 957 958 st->regmap = devm_regmap_init(dev, <c2688_regmap_bus, st, 959 <c2688_regmap_config); 960 if (IS_ERR(st->regmap)) 961 return dev_err_probe(dev, PTR_ERR(st->regmap), 962 "Failed to init regmap"); 963 964 ret = devm_regulator_bulk_get_enable(dev, ARRAY_SIZE(regulators), 965 regulators); 966 if (ret) 967 return dev_err_probe(dev, ret, "Failed to enable regulators\n"); 968 969 ret = devm_regulator_get_enable_read_voltage(dev, "vref"); 970 if (ret < 0 && ret != -ENODEV) 971 return dev_err_probe(dev, ret, 972 "Failed to get vref regulator voltage\n"); 973 974 has_external_vref = ret != -ENODEV; 975 st->vref = has_external_vref ? ret / 1000 : 0; 976 977 ret = ltc2688_setup(st, has_external_vref); 978 if (ret) 979 return ret; 980 981 indio_dev->name = "ltc2688"; 982 indio_dev->info = <c2688_info; 983 indio_dev->modes = INDIO_DIRECT_MODE; 984 indio_dev->channels = st->iio_chan; 985 indio_dev->num_channels = ARRAY_SIZE(ltc2688_channels); 986 987 return devm_iio_device_register(dev, indio_dev); 988 } 989 990 static const struct of_device_id ltc2688_of_id[] = { 991 { .compatible = "adi,ltc2688" }, 992 { } 993 }; 994 MODULE_DEVICE_TABLE(of, ltc2688_of_id); 995 996 static const struct spi_device_id ltc2688_id[] = { 997 { "ltc2688" }, 998 { } 999 }; 1000 MODULE_DEVICE_TABLE(spi, ltc2688_id); 1001 1002 static struct spi_driver ltc2688_driver = { 1003 .driver = { 1004 .name = "ltc2688", 1005 .of_match_table = ltc2688_of_id, 1006 }, 1007 .probe = ltc2688_probe, 1008 .id_table = ltc2688_id, 1009 }; 1010 module_spi_driver(ltc2688_driver); 1011 1012 MODULE_AUTHOR("Nuno Sá <nuno.sa@analog.com>"); 1013 MODULE_DESCRIPTION("Analog Devices LTC2688 DAC"); 1014 MODULE_LICENSE("GPL"); 1015