xref: /linux/drivers/iio/dac/ad5791.c (revision 7f71507851fc7764b36a3221839607d3a45c2025)
1 // SPDX-License-Identifier: GPL-2.0-only
2 /*
3  * AD5760, AD5780, AD5781, AD5790, AD5791 Voltage Output Digital to Analog
4  * Converter
5  *
6  * Copyright 2011 Analog Devices Inc.
7  */
8 
9 #include <linux/interrupt.h>
10 #include <linux/fs.h>
11 #include <linux/device.h>
12 #include <linux/delay.h>
13 #include <linux/kernel.h>
14 #include <linux/spi/spi.h>
15 #include <linux/slab.h>
16 #include <linux/sysfs.h>
17 #include <linux/regulator/consumer.h>
18 #include <linux/module.h>
19 #include <linux/bitops.h>
20 
21 #include <linux/iio/iio.h>
22 #include <linux/iio/sysfs.h>
23 #include <linux/iio/dac/ad5791.h>
24 
25 #define AD5791_DAC_MASK			GENMASK(19, 0)
26 
27 #define AD5791_CMD_READ			BIT(23)
28 #define AD5791_CMD_WRITE		0
29 #define AD5791_ADDR(addr)		((addr) << 20)
30 
31 /* Registers */
32 #define AD5791_ADDR_NOOP		0
33 #define AD5791_ADDR_DAC0		1
34 #define AD5791_ADDR_CTRL		2
35 #define AD5791_ADDR_CLRCODE		3
36 #define AD5791_ADDR_SW_CTRL		4
37 
38 /* Control Register */
39 #define AD5791_CTRL_RBUF		BIT(1)
40 #define AD5791_CTRL_OPGND		BIT(2)
41 #define AD5791_CTRL_DACTRI		BIT(3)
42 #define AD5791_CTRL_BIN2SC		BIT(4)
43 #define AD5791_CTRL_SDODIS		BIT(5)
44 #define AD5761_CTRL_LINCOMP(x)		((x) << 6)
45 
46 #define AD5791_LINCOMP_0_10		0
47 #define AD5791_LINCOMP_10_12		1
48 #define AD5791_LINCOMP_12_16		2
49 #define AD5791_LINCOMP_16_19		3
50 #define AD5791_LINCOMP_19_20		12
51 
52 #define AD5780_LINCOMP_0_10		0
53 #define AD5780_LINCOMP_10_20		12
54 
55 /* Software Control Register */
56 #define AD5791_SWCTRL_LDAC		BIT(0)
57 #define AD5791_SWCTRL_CLR		BIT(1)
58 #define AD5791_SWCTRL_RESET		BIT(2)
59 
60 #define AD5791_DAC_PWRDN_6K		0
61 #define AD5791_DAC_PWRDN_3STATE		1
62 
63 /**
64  * struct ad5791_chip_info - chip specific information
65  * @name:		name of the dac chip
66  * @channel:		channel specification
67  * @get_lin_comp:	function pointer to the device specific function
68  */
69 struct ad5791_chip_info {
70 	const char *name;
71 	const struct iio_chan_spec channel;
72 	int (*get_lin_comp)(unsigned int span);
73 };
74 
75 /**
76  * struct ad5791_state - driver instance specific data
77  * @spi:			spi_device
78  * @reg_vdd:		positive supply regulator
79  * @reg_vss:		negative supply regulator
80  * @gpio_reset:		reset gpio
81  * @gpio_clear:		clear gpio
82  * @gpio_ldac:		load dac gpio
83  * @chip_info:		chip model specific constants
84  * @vref_mv:		actual reference voltage used
85  * @vref_neg_mv:	voltage of the negative supply
86  * @ctrl:		control register cache
87  * @pwr_down_mode:	current power down mode
88  * @pwr_down:		true if device is powered down
89  * @data:		spi transfer buffers
90  */
91 struct ad5791_state {
92 	struct spi_device		*spi;
93 	struct regulator		*reg_vdd;
94 	struct regulator		*reg_vss;
95 	struct gpio_desc		*gpio_reset;
96 	struct gpio_desc		*gpio_clear;
97 	struct gpio_desc		*gpio_ldac;
98 	const struct ad5791_chip_info	*chip_info;
99 	unsigned short			vref_mv;
100 	unsigned int			vref_neg_mv;
101 	unsigned			ctrl;
102 	unsigned			pwr_down_mode;
103 	bool				pwr_down;
104 
105 	union {
106 		__be32 d32;
107 		u8 d8[4];
108 	} data[3] __aligned(IIO_DMA_MINALIGN);
109 };
110 
111 static int ad5791_spi_write(struct ad5791_state *st, u8 addr, u32 val)
112 {
113 	st->data[0].d32 = cpu_to_be32(AD5791_CMD_WRITE |
114 			      AD5791_ADDR(addr) |
115 			      (val & AD5791_DAC_MASK));
116 
117 	return spi_write(st->spi, &st->data[0].d8[1], 3);
118 }
119 
120 static int ad5791_spi_read(struct ad5791_state *st, u8 addr, u32 *val)
121 {
122 	int ret;
123 	struct spi_transfer xfers[] = {
124 		{
125 			.tx_buf = &st->data[0].d8[1],
126 			.bits_per_word = 8,
127 			.len = 3,
128 			.cs_change = 1,
129 		}, {
130 			.tx_buf = &st->data[1].d8[1],
131 			.rx_buf = &st->data[2].d8[1],
132 			.bits_per_word = 8,
133 			.len = 3,
134 		},
135 	};
136 
137 	st->data[0].d32 = cpu_to_be32(AD5791_CMD_READ |
138 			      AD5791_ADDR(addr));
139 	st->data[1].d32 = cpu_to_be32(AD5791_ADDR(AD5791_ADDR_NOOP));
140 
141 	ret = spi_sync_transfer(st->spi, xfers, ARRAY_SIZE(xfers));
142 
143 	*val = be32_to_cpu(st->data[2].d32);
144 
145 	return ret;
146 }
147 
148 static const char * const ad5791_powerdown_modes[] = {
149 	"6kohm_to_gnd",
150 	"three_state",
151 };
152 
153 static int ad5791_get_powerdown_mode(struct iio_dev *indio_dev,
154 	const struct iio_chan_spec *chan)
155 {
156 	struct ad5791_state *st = iio_priv(indio_dev);
157 
158 	return st->pwr_down_mode;
159 }
160 
161 static int ad5791_set_powerdown_mode(struct iio_dev *indio_dev,
162 	const struct iio_chan_spec *chan, unsigned int mode)
163 {
164 	struct ad5791_state *st = iio_priv(indio_dev);
165 
166 	st->pwr_down_mode = mode;
167 
168 	return 0;
169 }
170 
171 static const struct iio_enum ad5791_powerdown_mode_enum = {
172 	.items = ad5791_powerdown_modes,
173 	.num_items = ARRAY_SIZE(ad5791_powerdown_modes),
174 	.get = ad5791_get_powerdown_mode,
175 	.set = ad5791_set_powerdown_mode,
176 };
177 
178 static ssize_t ad5791_read_dac_powerdown(struct iio_dev *indio_dev,
179 	uintptr_t private, const struct iio_chan_spec *chan, char *buf)
180 {
181 	struct ad5791_state *st = iio_priv(indio_dev);
182 
183 	return sysfs_emit(buf, "%d\n", st->pwr_down);
184 }
185 
186 static ssize_t ad5791_write_dac_powerdown(struct iio_dev *indio_dev,
187 	 uintptr_t private, const struct iio_chan_spec *chan, const char *buf,
188 	 size_t len)
189 {
190 	bool pwr_down;
191 	int ret;
192 	struct ad5791_state *st = iio_priv(indio_dev);
193 
194 	ret = kstrtobool(buf, &pwr_down);
195 	if (ret)
196 		return ret;
197 
198 	if (!pwr_down) {
199 		st->ctrl &= ~(AD5791_CTRL_OPGND | AD5791_CTRL_DACTRI);
200 	} else {
201 		if (st->pwr_down_mode == AD5791_DAC_PWRDN_6K)
202 			st->ctrl |= AD5791_CTRL_OPGND;
203 		else if (st->pwr_down_mode == AD5791_DAC_PWRDN_3STATE)
204 			st->ctrl |= AD5791_CTRL_DACTRI;
205 	}
206 	st->pwr_down = pwr_down;
207 
208 	ret = ad5791_spi_write(st, AD5791_ADDR_CTRL, st->ctrl);
209 
210 	return ret ? ret : len;
211 }
212 
213 static int ad5791_get_lin_comp(unsigned int span)
214 {
215 	if (span <= 10000)
216 		return AD5791_LINCOMP_0_10;
217 	else if (span <= 12000)
218 		return AD5791_LINCOMP_10_12;
219 	else if (span <= 16000)
220 		return AD5791_LINCOMP_12_16;
221 	else if (span <= 19000)
222 		return AD5791_LINCOMP_16_19;
223 	else
224 		return AD5791_LINCOMP_19_20;
225 }
226 
227 static int ad5780_get_lin_comp(unsigned int span)
228 {
229 	if (span <= 10000)
230 		return AD5780_LINCOMP_0_10;
231 	else
232 		return AD5780_LINCOMP_10_20;
233 }
234 
235 static int ad5791_read_raw(struct iio_dev *indio_dev,
236 			   struct iio_chan_spec const *chan,
237 			   int *val,
238 			   int *val2,
239 			   long m)
240 {
241 	struct ad5791_state *st = iio_priv(indio_dev);
242 	u64 val64;
243 	int ret;
244 
245 	switch (m) {
246 	case IIO_CHAN_INFO_RAW:
247 		ret = ad5791_spi_read(st, chan->address, val);
248 		if (ret)
249 			return ret;
250 		*val &= AD5791_DAC_MASK;
251 		*val >>= chan->scan_type.shift;
252 		return IIO_VAL_INT;
253 	case IIO_CHAN_INFO_SCALE:
254 		*val = st->vref_mv;
255 		*val2 = (1 << chan->scan_type.realbits) - 1;
256 		return IIO_VAL_FRACTIONAL;
257 	case IIO_CHAN_INFO_OFFSET:
258 		val64 = (((u64)st->vref_neg_mv) << chan->scan_type.realbits);
259 		do_div(val64, st->vref_mv);
260 		*val = -val64;
261 		return IIO_VAL_INT;
262 	default:
263 		return -EINVAL;
264 	}
265 
266 };
267 
268 static const struct iio_chan_spec_ext_info ad5791_ext_info[] = {
269 	{
270 		.name = "powerdown",
271 		.shared = IIO_SHARED_BY_TYPE,
272 		.read = ad5791_read_dac_powerdown,
273 		.write = ad5791_write_dac_powerdown,
274 	},
275 	IIO_ENUM("powerdown_mode", IIO_SHARED_BY_TYPE,
276 		 &ad5791_powerdown_mode_enum),
277 	IIO_ENUM_AVAILABLE("powerdown_mode", IIO_SHARED_BY_TYPE, &ad5791_powerdown_mode_enum),
278 	{ },
279 };
280 
281 #define AD5791_DEFINE_CHIP_INFO(_name, bits, _shift, _lin_comp)		\
282 static const struct ad5791_chip_info _name##_chip_info = {		\
283 	.name = #_name,							\
284 	.get_lin_comp = &(_lin_comp),					\
285 	.channel = {							\
286 			.type = IIO_VOLTAGE,				\
287 			.output = 1,					\
288 			.indexed = 1,					\
289 			.address = AD5791_ADDR_DAC0,			\
290 			.channel = 0,					\
291 			.info_mask_separate = BIT(IIO_CHAN_INFO_RAW),	\
292 			.info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE) |	\
293 				BIT(IIO_CHAN_INFO_OFFSET),		\
294 			.scan_type = {					\
295 				.sign = 'u',				\
296 				.realbits = (bits),			\
297 				.storagebits = 24,			\
298 				.shift = (_shift),			\
299 			},						\
300 			.ext_info = ad5791_ext_info,			\
301 	},								\
302 }
303 
304 AD5791_DEFINE_CHIP_INFO(ad5760, 16, 4, ad5780_get_lin_comp);
305 AD5791_DEFINE_CHIP_INFO(ad5780, 18, 2, ad5780_get_lin_comp);
306 AD5791_DEFINE_CHIP_INFO(ad5781, 18, 2, ad5791_get_lin_comp);
307 AD5791_DEFINE_CHIP_INFO(ad5790, 20, 0, ad5791_get_lin_comp);
308 AD5791_DEFINE_CHIP_INFO(ad5791, 20, 0, ad5791_get_lin_comp);
309 
310 static int ad5791_write_raw(struct iio_dev *indio_dev,
311 			    struct iio_chan_spec const *chan,
312 			    int val,
313 			    int val2,
314 			    long mask)
315 {
316 	struct ad5791_state *st = iio_priv(indio_dev);
317 
318 	switch (mask) {
319 	case IIO_CHAN_INFO_RAW:
320 		val &= GENMASK(chan->scan_type.realbits - 1, 0);
321 		val <<= chan->scan_type.shift;
322 
323 		return ad5791_spi_write(st, chan->address, val);
324 
325 	default:
326 		return -EINVAL;
327 	}
328 }
329 
330 static const struct iio_info ad5791_info = {
331 	.read_raw = &ad5791_read_raw,
332 	.write_raw = &ad5791_write_raw,
333 };
334 
335 static int ad5791_probe(struct spi_device *spi)
336 {
337 	const struct ad5791_platform_data *pdata = dev_get_platdata(&spi->dev);
338 	struct iio_dev *indio_dev;
339 	struct ad5791_state *st;
340 	int ret, pos_voltage_uv = 0, neg_voltage_uv = 0;
341 	bool use_rbuf_gain2;
342 
343 	indio_dev = devm_iio_device_alloc(&spi->dev, sizeof(*st));
344 	if (!indio_dev)
345 		return -ENOMEM;
346 	st = iio_priv(indio_dev);
347 
348 	st->gpio_reset = devm_gpiod_get_optional(&spi->dev, "reset",
349 						 GPIOD_OUT_HIGH);
350 	if (IS_ERR(st->gpio_reset))
351 		return PTR_ERR(st->gpio_reset);
352 
353 	st->gpio_clear = devm_gpiod_get_optional(&spi->dev, "clear",
354 						 GPIOD_OUT_LOW);
355 	if (IS_ERR(st->gpio_clear))
356 		return PTR_ERR(st->gpio_clear);
357 
358 	st->gpio_ldac = devm_gpiod_get_optional(&spi->dev, "ldac",
359 						GPIOD_OUT_HIGH);
360 	if (IS_ERR(st->gpio_ldac))
361 		return PTR_ERR(st->gpio_ldac);
362 
363 	st->pwr_down = true;
364 	st->spi = spi;
365 
366 	if (pdata)
367 		use_rbuf_gain2 = pdata->use_rbuf_gain2;
368 	else
369 		use_rbuf_gain2 = device_property_read_bool(&spi->dev,
370 							   "adi,rbuf-gain2-en");
371 
372 	pos_voltage_uv = devm_regulator_get_enable_read_voltage(&spi->dev, "vdd");
373 	if (pos_voltage_uv < 0 && pos_voltage_uv != -ENODEV)
374 		return dev_err_probe(&spi->dev, pos_voltage_uv,
375 				     "failed to get vdd voltage\n");
376 
377 	neg_voltage_uv = devm_regulator_get_enable_read_voltage(&spi->dev, "vss");
378 	if (neg_voltage_uv < 0 && neg_voltage_uv != -ENODEV)
379 		return dev_err_probe(&spi->dev, neg_voltage_uv,
380 				     "failed to get vss voltage\n");
381 
382 	if (neg_voltage_uv >= 0 && pos_voltage_uv >= 0) {
383 		st->vref_mv = (pos_voltage_uv + neg_voltage_uv) / 1000;
384 		st->vref_neg_mv = neg_voltage_uv / 1000;
385 	} else if (pdata) {
386 		st->vref_mv = pdata->vref_pos_mv + pdata->vref_neg_mv;
387 		st->vref_neg_mv = pdata->vref_neg_mv;
388 	} else {
389 		dev_warn(&spi->dev, "reference voltage unspecified\n");
390 	}
391 
392 	if (st->gpio_reset) {
393 		fsleep(20);
394 		gpiod_set_value_cansleep(st->gpio_reset, 0);
395 	} else {
396 		ret = ad5791_spi_write(st, AD5791_ADDR_SW_CTRL, AD5791_SWCTRL_RESET);
397 		if (ret)
398 			return dev_err_probe(&spi->dev, ret, "fail to reset\n");
399 	}
400 
401 	st->chip_info = spi_get_device_match_data(spi);
402 	if (!st->chip_info)
403 		return dev_err_probe(&spi->dev, -EINVAL, "no chip info\n");
404 
405 	st->ctrl = AD5761_CTRL_LINCOMP(st->chip_info->get_lin_comp(st->vref_mv))
406 		  | (use_rbuf_gain2 ? 0 : AD5791_CTRL_RBUF) |
407 		  AD5791_CTRL_BIN2SC;
408 
409 	ret = ad5791_spi_write(st, AD5791_ADDR_CTRL, st->ctrl |
410 		AD5791_CTRL_OPGND | AD5791_CTRL_DACTRI);
411 	if (ret)
412 		return dev_err_probe(&spi->dev, ret, "fail to write ctrl register\n");
413 
414 	indio_dev->info = &ad5791_info;
415 	indio_dev->modes = INDIO_DIRECT_MODE;
416 	indio_dev->channels = &st->chip_info->channel;
417 	indio_dev->num_channels = 1;
418 	indio_dev->name = st->chip_info->name;
419 	return devm_iio_device_register(&spi->dev, indio_dev);
420 }
421 
422 static const struct of_device_id ad5791_of_match[] = {
423 	{ .compatible = "adi,ad5760", .data = &ad5760_chip_info },
424 	{ .compatible = "adi,ad5780", .data = &ad5780_chip_info },
425 	{ .compatible = "adi,ad5781", .data = &ad5781_chip_info },
426 	{ .compatible = "adi,ad5790", .data = &ad5790_chip_info },
427 	{ .compatible = "adi,ad5791", .data = &ad5791_chip_info },
428 	{ }
429 };
430 MODULE_DEVICE_TABLE(of, ad5791_of_match);
431 
432 static const struct spi_device_id ad5791_id[] = {
433 	{ "ad5760", (kernel_ulong_t)&ad5760_chip_info },
434 	{ "ad5780", (kernel_ulong_t)&ad5780_chip_info },
435 	{ "ad5781", (kernel_ulong_t)&ad5781_chip_info },
436 	{ "ad5790", (kernel_ulong_t)&ad5790_chip_info },
437 	{ "ad5791", (kernel_ulong_t)&ad5791_chip_info },
438 	{ }
439 };
440 MODULE_DEVICE_TABLE(spi, ad5791_id);
441 
442 static struct spi_driver ad5791_driver = {
443 	.driver = {
444 		   .name = "ad5791",
445 		   .of_match_table = ad5791_of_match,
446 		   },
447 	.probe = ad5791_probe,
448 	.id_table = ad5791_id,
449 };
450 module_spi_driver(ad5791_driver);
451 
452 MODULE_AUTHOR("Michael Hennerich <michael.hennerich@analog.com>");
453 MODULE_DESCRIPTION("Analog Devices AD5760/AD5780/AD5781/AD5790/AD5791 DAC");
454 MODULE_LICENSE("GPL v2");
455