1 // SPDX-License-Identifier: GPL-2.0+ 2 /* 3 * AD5770R Digital to analog converters driver 4 * 5 * Copyright 2018 Analog Devices Inc. 6 */ 7 8 #include <linux/bits.h> 9 #include <linux/delay.h> 10 #include <linux/device.h> 11 #include <linux/gpio/consumer.h> 12 #include <linux/iio/iio.h> 13 #include <linux/iio/sysfs.h> 14 #include <linux/kernel.h> 15 #include <linux/module.h> 16 #include <linux/property.h> 17 #include <linux/regmap.h> 18 #include <linux/regulator/consumer.h> 19 #include <linux/spi/spi.h> 20 #include <linux/unaligned.h> 21 22 #define ADI_SPI_IF_CONFIG_A 0x00 23 #define ADI_SPI_IF_CONFIG_B 0x01 24 #define ADI_SPI_IF_DEVICE_CONFIG 0x02 25 #define ADI_SPI_IF_CHIP_TYPE 0x03 26 #define ADI_SPI_IF_PRODUCT_ID_L 0x04 27 #define ADI_SPI_IF_PRODUCT_ID_H 0x05 28 #define ADI_SPI_IF_CHIP_GRADE 0x06 29 #define ADI_SPI_IF_SCRACTH_PAD 0x0A 30 #define ADI_SPI_IF_SPI_REVISION 0x0B 31 #define ADI_SPI_IF_SPI_VENDOR_L 0x0C 32 #define ADI_SPI_IF_SPI_VENDOR_H 0x0D 33 #define ADI_SPI_IF_SPI_STREAM_MODE 0x0E 34 #define ADI_SPI_IF_CONFIG_C 0x10 35 #define ADI_SPI_IF_STATUS_A 0x11 36 37 /* ADI_SPI_IF_CONFIG_A */ 38 #define ADI_SPI_IF_SW_RESET_MSK (BIT(0) | BIT(7)) 39 #define ADI_SPI_IF_SW_RESET_SEL(x) ((x) & ADI_SPI_IF_SW_RESET_MSK) 40 #define ADI_SPI_IF_ADDR_ASC_MSK (BIT(2) | BIT(5)) 41 #define ADI_SPI_IF_ADDR_ASC_SEL(x) (((x) << 2) & ADI_SPI_IF_ADDR_ASC_MSK) 42 43 /* ADI_SPI_IF_CONFIG_B */ 44 #define ADI_SPI_IF_SINGLE_INS_MSK BIT(7) 45 #define ADI_SPI_IF_SINGLE_INS_SEL(x) FIELD_PREP(ADI_SPI_IF_SINGLE_INS_MSK, x) 46 #define ADI_SPI_IF_SHORT_INS_MSK BIT(7) 47 #define ADI_SPI_IF_SHORT_INS_SEL(x) FIELD_PREP(ADI_SPI_IF_SINGLE_INS_MSK, x) 48 49 /* ADI_SPI_IF_CONFIG_C */ 50 #define ADI_SPI_IF_STRICT_REG_MSK BIT(5) 51 #define ADI_SPI_IF_STRICT_REG_GET(x) FIELD_GET(ADI_SPI_IF_STRICT_REG_MSK, x) 52 53 /* AD5770R configuration registers */ 54 #define AD5770R_CHANNEL_CONFIG 0x14 55 #define AD5770R_OUTPUT_RANGE(ch) (0x15 + (ch)) 56 #define AD5770R_FILTER_RESISTOR(ch) (0x1D + (ch)) 57 #define AD5770R_REFERENCE 0x1B 58 #define AD5770R_DAC_LSB(ch) (0x26 + 2 * (ch)) 59 #define AD5770R_DAC_MSB(ch) (0x27 + 2 * (ch)) 60 #define AD5770R_CH_SELECT 0x34 61 #define AD5770R_CH_ENABLE 0x44 62 63 /* AD5770R_CHANNEL_CONFIG */ 64 #define AD5770R_CFG_CH0_SINK_EN(x) (((x) & 0x1) << 7) 65 #define AD5770R_CFG_SHUTDOWN_B(x, ch) (((x) & 0x1) << (ch)) 66 67 /* AD5770R_OUTPUT_RANGE */ 68 #define AD5770R_RANGE_OUTPUT_SCALING(x) (((x) & GENMASK(5, 0)) << 2) 69 #define AD5770R_RANGE_MODE(x) ((x) & GENMASK(1, 0)) 70 71 /* AD5770R_REFERENCE */ 72 #define AD5770R_REF_RESISTOR_SEL(x) (((x) & 0x1) << 2) 73 #define AD5770R_REF_SEL(x) ((x) & GENMASK(1, 0)) 74 75 /* AD5770R_CH_ENABLE */ 76 #define AD5770R_CH_SET(x, ch) (((x) & 0x1) << (ch)) 77 78 #define AD5770R_MAX_CHANNELS 6 79 #define AD5770R_MAX_CH_MODES 14 80 #define AD5770R_LOW_VREF_mV 1250 81 #define AD5770R_HIGH_VREF_mV 2500 82 83 enum ad5770r_ch0_modes { 84 AD5770R_CH0_0_300 = 0, 85 AD5770R_CH0_NEG_60_0, 86 AD5770R_CH0_NEG_60_300 87 }; 88 89 enum ad5770r_ch1_modes { 90 AD5770R_CH1_0_140_LOW_HEAD = 1, 91 AD5770R_CH1_0_140_LOW_NOISE, 92 AD5770R_CH1_0_250 93 }; 94 95 enum ad5770r_ch2_5_modes { 96 AD5770R_CH_LOW_RANGE = 0, 97 AD5770R_CH_HIGH_RANGE 98 }; 99 100 enum ad5770r_ref_v { 101 AD5770R_EXT_2_5_V = 0, 102 AD5770R_INT_1_25_V_OUT_ON, 103 AD5770R_EXT_1_25_V, 104 AD5770R_INT_1_25_V_OUT_OFF 105 }; 106 107 enum ad5770r_output_filter_resistor { 108 AD5770R_FILTER_60_OHM = 0x0, 109 AD5770R_FILTER_5_6_KOHM = 0x5, 110 AD5770R_FILTER_11_2_KOHM, 111 AD5770R_FILTER_22_2_KOHM, 112 AD5770R_FILTER_44_4_KOHM, 113 AD5770R_FILTER_104_KOHM, 114 }; 115 116 struct ad5770r_out_range { 117 u8 out_scale; 118 u8 out_range_mode; 119 }; 120 121 /** 122 * struct ad5770r_state - driver instance specific data 123 * @spi: spi_device 124 * @regmap: regmap 125 * @vref_reg: fixed regulator for reference configuration 126 * @gpio_reset: gpio descriptor 127 * @output_mode: array contains channels output ranges 128 * @vref: reference value 129 * @ch_pwr_down: powerdown flags 130 * @internal_ref: internal reference flag 131 * @external_res: external 2.5k resistor flag 132 * @transf_buf: cache aligned buffer for spi read/write 133 */ 134 struct ad5770r_state { 135 struct spi_device *spi; 136 struct regmap *regmap; 137 struct regulator *vref_reg; 138 struct gpio_desc *gpio_reset; 139 struct ad5770r_out_range output_mode[AD5770R_MAX_CHANNELS]; 140 int vref; 141 bool ch_pwr_down[AD5770R_MAX_CHANNELS]; 142 bool internal_ref; 143 bool external_res; 144 u8 transf_buf[2] __aligned(IIO_DMA_MINALIGN); 145 }; 146 147 static const struct regmap_config ad5770r_spi_regmap_config = { 148 .reg_bits = 8, 149 .val_bits = 8, 150 .read_flag_mask = BIT(7), 151 }; 152 153 struct ad5770r_output_modes { 154 unsigned int ch; 155 u8 mode; 156 int min; 157 int max; 158 }; 159 160 static struct ad5770r_output_modes ad5770r_rng_tbl[] = { 161 { 0, AD5770R_CH0_0_300, 0, 300 }, 162 { 0, AD5770R_CH0_NEG_60_0, -60, 0 }, 163 { 0, AD5770R_CH0_NEG_60_300, -60, 300 }, 164 { 1, AD5770R_CH1_0_140_LOW_HEAD, 0, 140 }, 165 { 1, AD5770R_CH1_0_140_LOW_NOISE, 0, 140 }, 166 { 1, AD5770R_CH1_0_250, 0, 250 }, 167 { 2, AD5770R_CH_LOW_RANGE, 0, 55 }, 168 { 2, AD5770R_CH_HIGH_RANGE, 0, 150 }, 169 { 3, AD5770R_CH_LOW_RANGE, 0, 45 }, 170 { 3, AD5770R_CH_HIGH_RANGE, 0, 100 }, 171 { 4, AD5770R_CH_LOW_RANGE, 0, 45 }, 172 { 4, AD5770R_CH_HIGH_RANGE, 0, 100 }, 173 { 5, AD5770R_CH_LOW_RANGE, 0, 45 }, 174 { 5, AD5770R_CH_HIGH_RANGE, 0, 100 }, 175 }; 176 177 static const unsigned int ad5770r_filter_freqs[] = { 178 153, 357, 715, 1400, 2800, 262000, 179 }; 180 181 static const unsigned int ad5770r_filter_reg_vals[] = { 182 AD5770R_FILTER_104_KOHM, 183 AD5770R_FILTER_44_4_KOHM, 184 AD5770R_FILTER_22_2_KOHM, 185 AD5770R_FILTER_11_2_KOHM, 186 AD5770R_FILTER_5_6_KOHM, 187 AD5770R_FILTER_60_OHM 188 }; 189 190 static int ad5770r_set_output_mode(struct ad5770r_state *st, 191 const struct ad5770r_out_range *out_mode, 192 int channel) 193 { 194 unsigned int regval; 195 196 regval = AD5770R_RANGE_OUTPUT_SCALING(out_mode->out_scale) | 197 AD5770R_RANGE_MODE(out_mode->out_range_mode); 198 199 return regmap_write(st->regmap, 200 AD5770R_OUTPUT_RANGE(channel), regval); 201 } 202 203 static int ad5770r_set_reference(struct ad5770r_state *st) 204 { 205 unsigned int regval; 206 207 regval = AD5770R_REF_RESISTOR_SEL(st->external_res); 208 209 if (st->internal_ref) { 210 regval |= AD5770R_REF_SEL(AD5770R_INT_1_25_V_OUT_OFF); 211 } else { 212 switch (st->vref) { 213 case AD5770R_LOW_VREF_mV: 214 regval |= AD5770R_REF_SEL(AD5770R_EXT_1_25_V); 215 break; 216 case AD5770R_HIGH_VREF_mV: 217 regval |= AD5770R_REF_SEL(AD5770R_EXT_2_5_V); 218 break; 219 default: 220 regval = AD5770R_REF_SEL(AD5770R_INT_1_25_V_OUT_OFF); 221 break; 222 } 223 } 224 225 return regmap_write(st->regmap, AD5770R_REFERENCE, regval); 226 } 227 228 static int ad5770r_soft_reset(struct ad5770r_state *st) 229 { 230 return regmap_write(st->regmap, ADI_SPI_IF_CONFIG_A, 231 ADI_SPI_IF_SW_RESET_SEL(1)); 232 } 233 234 static int ad5770r_reset(struct ad5770r_state *st) 235 { 236 /* Perform software reset if no GPIO provided */ 237 if (!st->gpio_reset) 238 return ad5770r_soft_reset(st); 239 240 gpiod_set_value_cansleep(st->gpio_reset, 0); 241 usleep_range(10, 20); 242 gpiod_set_value_cansleep(st->gpio_reset, 1); 243 244 /* data must not be written during reset timeframe */ 245 usleep_range(100, 200); 246 247 return 0; 248 } 249 250 static int ad5770r_get_range(struct ad5770r_state *st, 251 int ch, int *min, int *max) 252 { 253 int i; 254 u8 tbl_ch, tbl_mode, out_range; 255 256 out_range = st->output_mode[ch].out_range_mode; 257 258 for (i = 0; i < AD5770R_MAX_CH_MODES; i++) { 259 tbl_ch = ad5770r_rng_tbl[i].ch; 260 tbl_mode = ad5770r_rng_tbl[i].mode; 261 if (tbl_ch == ch && tbl_mode == out_range) { 262 *min = ad5770r_rng_tbl[i].min; 263 *max = ad5770r_rng_tbl[i].max; 264 return 0; 265 } 266 } 267 268 return -EINVAL; 269 } 270 271 static int ad5770r_get_filter_freq(struct iio_dev *indio_dev, 272 const struct iio_chan_spec *chan, int *freq) 273 { 274 struct ad5770r_state *st = iio_priv(indio_dev); 275 int ret; 276 unsigned int regval, i; 277 278 ret = regmap_read(st->regmap, 279 AD5770R_FILTER_RESISTOR(chan->channel), ®val); 280 if (ret < 0) 281 return ret; 282 283 for (i = 0; i < ARRAY_SIZE(ad5770r_filter_reg_vals); i++) 284 if (regval == ad5770r_filter_reg_vals[i]) 285 break; 286 if (i == ARRAY_SIZE(ad5770r_filter_reg_vals)) 287 return -EINVAL; 288 289 *freq = ad5770r_filter_freqs[i]; 290 291 return IIO_VAL_INT; 292 } 293 294 static int ad5770r_set_filter_freq(struct iio_dev *indio_dev, 295 const struct iio_chan_spec *chan, 296 unsigned int freq) 297 { 298 struct ad5770r_state *st = iio_priv(indio_dev); 299 unsigned int regval, i; 300 301 for (i = 0; i < ARRAY_SIZE(ad5770r_filter_freqs); i++) 302 if (ad5770r_filter_freqs[i] >= freq) 303 break; 304 if (i == ARRAY_SIZE(ad5770r_filter_freqs)) 305 return -EINVAL; 306 307 regval = ad5770r_filter_reg_vals[i]; 308 309 return regmap_write(st->regmap, AD5770R_FILTER_RESISTOR(chan->channel), 310 regval); 311 } 312 313 static int ad5770r_read_raw(struct iio_dev *indio_dev, 314 struct iio_chan_spec const *chan, 315 int *val, int *val2, long info) 316 { 317 struct ad5770r_state *st = iio_priv(indio_dev); 318 int max, min, ret; 319 u16 buf16; 320 321 switch (info) { 322 case IIO_CHAN_INFO_RAW: 323 ret = regmap_bulk_read(st->regmap, 324 chan->address, 325 st->transf_buf, 2); 326 if (ret) 327 return 0; 328 329 buf16 = get_unaligned_le16(st->transf_buf); 330 *val = buf16 >> 2; 331 return IIO_VAL_INT; 332 case IIO_CHAN_INFO_SCALE: 333 ret = ad5770r_get_range(st, chan->channel, &min, &max); 334 if (ret < 0) 335 return ret; 336 *val = max - min; 337 /* There is no sign bit. (negative current is mapped from 0) 338 * (sourced/sinked) current = raw * scale + offset 339 * where offset in case of CH0 can be negative. 340 */ 341 *val2 = 14; 342 return IIO_VAL_FRACTIONAL_LOG2; 343 case IIO_CHAN_INFO_LOW_PASS_FILTER_3DB_FREQUENCY: 344 return ad5770r_get_filter_freq(indio_dev, chan, val); 345 case IIO_CHAN_INFO_OFFSET: 346 ret = ad5770r_get_range(st, chan->channel, &min, &max); 347 if (ret < 0) 348 return ret; 349 *val = min; 350 return IIO_VAL_INT; 351 default: 352 return -EINVAL; 353 } 354 } 355 356 static int ad5770r_write_raw(struct iio_dev *indio_dev, 357 struct iio_chan_spec const *chan, 358 int val, int val2, long info) 359 { 360 struct ad5770r_state *st = iio_priv(indio_dev); 361 362 switch (info) { 363 case IIO_CHAN_INFO_RAW: 364 st->transf_buf[0] = ((u16)val >> 6); 365 st->transf_buf[1] = (val & GENMASK(5, 0)) << 2; 366 return regmap_bulk_write(st->regmap, chan->address, 367 st->transf_buf, 2); 368 case IIO_CHAN_INFO_LOW_PASS_FILTER_3DB_FREQUENCY: 369 return ad5770r_set_filter_freq(indio_dev, chan, val); 370 default: 371 return -EINVAL; 372 } 373 } 374 375 static int ad5770r_read_freq_avail(struct iio_dev *indio_dev, 376 struct iio_chan_spec const *chan, 377 const int **vals, int *type, int *length, 378 long mask) 379 { 380 switch (mask) { 381 case IIO_CHAN_INFO_LOW_PASS_FILTER_3DB_FREQUENCY: 382 *type = IIO_VAL_INT; 383 *vals = ad5770r_filter_freqs; 384 *length = ARRAY_SIZE(ad5770r_filter_freqs); 385 return IIO_AVAIL_LIST; 386 } 387 388 return -EINVAL; 389 } 390 391 static int ad5770r_reg_access(struct iio_dev *indio_dev, 392 unsigned int reg, 393 unsigned int writeval, 394 unsigned int *readval) 395 { 396 struct ad5770r_state *st = iio_priv(indio_dev); 397 398 if (readval) 399 return regmap_read(st->regmap, reg, readval); 400 else 401 return regmap_write(st->regmap, reg, writeval); 402 } 403 404 static const struct iio_info ad5770r_info = { 405 .read_raw = ad5770r_read_raw, 406 .write_raw = ad5770r_write_raw, 407 .read_avail = ad5770r_read_freq_avail, 408 .debugfs_reg_access = &ad5770r_reg_access, 409 }; 410 411 static int ad5770r_store_output_range(struct ad5770r_state *st, 412 int min, int max, int index) 413 { 414 int i; 415 416 for (i = 0; i < AD5770R_MAX_CH_MODES; i++) { 417 if (ad5770r_rng_tbl[i].ch != index) 418 continue; 419 if (ad5770r_rng_tbl[i].min != min || 420 ad5770r_rng_tbl[i].max != max) 421 continue; 422 st->output_mode[index].out_range_mode = ad5770r_rng_tbl[i].mode; 423 424 return 0; 425 } 426 427 return -EINVAL; 428 } 429 430 static ssize_t ad5770r_read_dac_powerdown(struct iio_dev *indio_dev, 431 uintptr_t private, 432 const struct iio_chan_spec *chan, 433 char *buf) 434 { 435 struct ad5770r_state *st = iio_priv(indio_dev); 436 437 return sysfs_emit(buf, "%d\n", st->ch_pwr_down[chan->channel]); 438 } 439 440 static ssize_t ad5770r_write_dac_powerdown(struct iio_dev *indio_dev, 441 uintptr_t private, 442 const struct iio_chan_spec *chan, 443 const char *buf, size_t len) 444 { 445 struct ad5770r_state *st = iio_priv(indio_dev); 446 unsigned int regval; 447 unsigned int mask; 448 bool readin; 449 int ret; 450 451 ret = kstrtobool(buf, &readin); 452 if (ret) 453 return ret; 454 455 readin = !readin; 456 457 regval = AD5770R_CFG_SHUTDOWN_B(readin, chan->channel); 458 if (chan->channel == 0 && 459 st->output_mode[0].out_range_mode > AD5770R_CH0_0_300) { 460 regval |= AD5770R_CFG_CH0_SINK_EN(readin); 461 mask = BIT(chan->channel) + BIT(7); 462 } else { 463 mask = BIT(chan->channel); 464 } 465 ret = regmap_update_bits(st->regmap, AD5770R_CHANNEL_CONFIG, mask, 466 regval); 467 if (ret) 468 return ret; 469 470 regval = AD5770R_CH_SET(readin, chan->channel); 471 ret = regmap_update_bits(st->regmap, AD5770R_CH_ENABLE, 472 BIT(chan->channel), regval); 473 if (ret) 474 return ret; 475 476 st->ch_pwr_down[chan->channel] = !readin; 477 478 return len; 479 } 480 481 static const struct iio_chan_spec_ext_info ad5770r_ext_info[] = { 482 { 483 .name = "powerdown", 484 .read = ad5770r_read_dac_powerdown, 485 .write = ad5770r_write_dac_powerdown, 486 .shared = IIO_SEPARATE, 487 }, 488 { } 489 }; 490 491 #define AD5770R_IDAC_CHANNEL(index, reg) { \ 492 .type = IIO_CURRENT, \ 493 .address = reg, \ 494 .indexed = 1, \ 495 .channel = index, \ 496 .output = 1, \ 497 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | \ 498 BIT(IIO_CHAN_INFO_SCALE) | \ 499 BIT(IIO_CHAN_INFO_OFFSET) | \ 500 BIT(IIO_CHAN_INFO_LOW_PASS_FILTER_3DB_FREQUENCY), \ 501 .info_mask_shared_by_type_available = \ 502 BIT(IIO_CHAN_INFO_LOW_PASS_FILTER_3DB_FREQUENCY), \ 503 .ext_info = ad5770r_ext_info, \ 504 } 505 506 static const struct iio_chan_spec ad5770r_channels[] = { 507 AD5770R_IDAC_CHANNEL(0, AD5770R_DAC_MSB(0)), 508 AD5770R_IDAC_CHANNEL(1, AD5770R_DAC_MSB(1)), 509 AD5770R_IDAC_CHANNEL(2, AD5770R_DAC_MSB(2)), 510 AD5770R_IDAC_CHANNEL(3, AD5770R_DAC_MSB(3)), 511 AD5770R_IDAC_CHANNEL(4, AD5770R_DAC_MSB(4)), 512 AD5770R_IDAC_CHANNEL(5, AD5770R_DAC_MSB(5)), 513 }; 514 515 static int ad5770r_channel_config(struct ad5770r_state *st) 516 { 517 int ret, tmp[2], min, max; 518 unsigned int num; 519 520 num = device_get_child_node_count(&st->spi->dev); 521 if (num != AD5770R_MAX_CHANNELS) 522 return -EINVAL; 523 524 device_for_each_child_node_scoped(&st->spi->dev, child) { 525 ret = fwnode_property_read_u32(child, "reg", &num); 526 if (ret) 527 return ret; 528 if (num >= AD5770R_MAX_CHANNELS) 529 return -EINVAL; 530 531 ret = fwnode_property_read_u32_array(child, 532 "adi,range-microamp", 533 tmp, 2); 534 if (ret) 535 return ret; 536 537 min = tmp[0] / 1000; 538 max = tmp[1] / 1000; 539 ret = ad5770r_store_output_range(st, min, max, num); 540 if (ret) 541 return ret; 542 } 543 544 return 0; 545 } 546 547 static int ad5770r_init(struct ad5770r_state *st) 548 { 549 int ret, i; 550 551 st->gpio_reset = devm_gpiod_get_optional(&st->spi->dev, "reset", 552 GPIOD_OUT_HIGH); 553 if (IS_ERR(st->gpio_reset)) 554 return PTR_ERR(st->gpio_reset); 555 556 /* Perform a reset */ 557 ret = ad5770r_reset(st); 558 if (ret) 559 return ret; 560 561 /* Set output range */ 562 ret = ad5770r_channel_config(st); 563 if (ret) 564 return ret; 565 566 for (i = 0; i < AD5770R_MAX_CHANNELS; i++) { 567 ret = ad5770r_set_output_mode(st, &st->output_mode[i], i); 568 if (ret) 569 return ret; 570 } 571 572 st->external_res = fwnode_property_read_bool(st->spi->dev.fwnode, 573 "adi,external-resistor"); 574 575 ret = ad5770r_set_reference(st); 576 if (ret) 577 return ret; 578 579 /* Set outputs off */ 580 ret = regmap_write(st->regmap, AD5770R_CHANNEL_CONFIG, 0x00); 581 if (ret) 582 return ret; 583 584 ret = regmap_write(st->regmap, AD5770R_CH_ENABLE, 0x00); 585 if (ret) 586 return ret; 587 588 for (i = 0; i < AD5770R_MAX_CHANNELS; i++) 589 st->ch_pwr_down[i] = true; 590 591 return ret; 592 } 593 594 static void ad5770r_disable_regulator(void *data) 595 { 596 struct ad5770r_state *st = data; 597 598 regulator_disable(st->vref_reg); 599 } 600 601 static int ad5770r_probe(struct spi_device *spi) 602 { 603 struct ad5770r_state *st; 604 struct iio_dev *indio_dev; 605 struct regmap *regmap; 606 int ret; 607 608 indio_dev = devm_iio_device_alloc(&spi->dev, sizeof(*st)); 609 if (!indio_dev) 610 return -ENOMEM; 611 612 st = iio_priv(indio_dev); 613 spi_set_drvdata(spi, indio_dev); 614 615 st->spi = spi; 616 617 regmap = devm_regmap_init_spi(spi, &ad5770r_spi_regmap_config); 618 if (IS_ERR(regmap)) { 619 dev_err(&spi->dev, "Error initializing spi regmap: %ld\n", 620 PTR_ERR(regmap)); 621 return PTR_ERR(regmap); 622 } 623 st->regmap = regmap; 624 625 st->vref_reg = devm_regulator_get_optional(&spi->dev, "vref"); 626 if (!IS_ERR(st->vref_reg)) { 627 ret = regulator_enable(st->vref_reg); 628 if (ret) { 629 dev_err(&spi->dev, 630 "Failed to enable vref regulators: %d\n", ret); 631 return ret; 632 } 633 634 ret = devm_add_action_or_reset(&spi->dev, 635 ad5770r_disable_regulator, 636 st); 637 if (ret < 0) 638 return ret; 639 640 ret = regulator_get_voltage(st->vref_reg); 641 if (ret < 0) 642 return ret; 643 644 st->vref = ret / 1000; 645 } else { 646 if (PTR_ERR(st->vref_reg) == -ENODEV) { 647 st->vref = AD5770R_LOW_VREF_mV; 648 st->internal_ref = true; 649 } else { 650 return PTR_ERR(st->vref_reg); 651 } 652 } 653 654 indio_dev->name = spi_get_device_id(spi)->name; 655 indio_dev->info = &ad5770r_info; 656 indio_dev->modes = INDIO_DIRECT_MODE; 657 indio_dev->channels = ad5770r_channels; 658 indio_dev->num_channels = ARRAY_SIZE(ad5770r_channels); 659 660 ret = ad5770r_init(st); 661 if (ret < 0) { 662 dev_err(&spi->dev, "AD5770R init failed\n"); 663 return ret; 664 } 665 666 return devm_iio_device_register(&st->spi->dev, indio_dev); 667 } 668 669 static const struct of_device_id ad5770r_of_id[] = { 670 { .compatible = "adi,ad5770r", }, 671 {}, 672 }; 673 MODULE_DEVICE_TABLE(of, ad5770r_of_id); 674 675 static const struct spi_device_id ad5770r_id[] = { 676 { "ad5770r", 0 }, 677 {}, 678 }; 679 MODULE_DEVICE_TABLE(spi, ad5770r_id); 680 681 static struct spi_driver ad5770r_driver = { 682 .driver = { 683 .name = KBUILD_MODNAME, 684 .of_match_table = ad5770r_of_id, 685 }, 686 .probe = ad5770r_probe, 687 .id_table = ad5770r_id, 688 }; 689 690 module_spi_driver(ad5770r_driver); 691 692 MODULE_AUTHOR("Mircea Caprioru <mircea.caprioru@analog.com>"); 693 MODULE_DESCRIPTION("Analog Devices AD5770R IDAC"); 694 MODULE_LICENSE("GPL v2"); 695