xref: /linux/drivers/iio/dac/ad5686.h (revision 331ca76fe5cee0df5a025d97d68fee53140053c7)
1 /* SPDX-License-Identifier: GPL-2.0 */
2 /*
3  * This file is part of AD5686 DAC driver
4  *
5  * Copyright 2018 Analog Devices Inc.
6  */
7 
8 #ifndef __DRIVERS_IIO_DAC_AD5686_H__
9 #define __DRIVERS_IIO_DAC_AD5686_H__
10 
11 #include <linux/bits.h>
12 #include <linux/mutex.h>
13 #include <linux/types.h>
14 
15 #include <linux/iio/iio.h>
16 
17 #define AD5310_CMD(x)				((x) << 12)
18 
19 #define AD5683_DATA(x)				((x) << 4)
20 
21 #define AD5686_ADDR(x)				((x) << 16)
22 #define AD5686_CMD(x)				((x) << 20)
23 
24 #define AD5686_ADDR_DAC(chan)			(0x1 << (chan))
25 #define AD5686_ADDR_ALL_DAC			0xF
26 
27 #define AD5686_CMD_NOOP				0x0
28 #define AD5686_CMD_WRITE_INPUT_N		0x1
29 #define AD5686_CMD_UPDATE_DAC_N			0x2
30 #define AD5686_CMD_WRITE_INPUT_N_UPDATE_N	0x3
31 #define AD5686_CMD_POWERDOWN_DAC		0x4
32 #define AD5686_CMD_LDAC_MASK			0x5
33 #define AD5686_CMD_RESET			0x6
34 #define AD5686_CMD_INTERNAL_REFER_SETUP		0x7
35 #define AD5686_CMD_DAISY_CHAIN_ENABLE		0x8
36 #define AD5686_CMD_READBACK_ENABLE		0x9
37 
38 #define AD5686_CMD_CONTROL_REG			0x4
39 #define AD5686_CMD_READBACK_ENABLE_V2		0x5
40 
41 #define AD5310_REF_BIT_MSK			BIT(8)
42 #define AD5310_PD_MSK				GENMASK(10, 9)
43 
44 #define AD5683_REF_BIT_MSK			BIT(12)
45 #define AD5683_PD_MSK				GENMASK(14, 13)
46 
47 #define AD5686_REF_BIT_MSK			BIT(0)
48 #define AD5686_PD_MSK				GENMASK(1, 0)
49 
50 #define AD5686_PD_MODE_1K_TO_GND		0x1
51 #define AD5686_PD_MODE_100K_TO_GND		0x2
52 #define AD5686_PD_MODE_THREE_STATE		0x3
53 
54 #define AD5686_PD_MSK_PWR_UP			0x0
55 #define AD5686_PD_MSK_PWR_DOWN			0x3
56 
57 enum ad5686_regmap_type {
58 	AD5310_REGMAP,
59 	AD5683_REGMAP,
60 	AD5686_REGMAP,
61 };
62 
63 struct gpio_desc;
64 
65 struct ad5686_state;
66 
67 /**
68  * struct ad5686_bus_ops - bus specific read/write operations
69  * @read: read a register value at the given address
70  * @write: write a command, address and value to the device
71  */
72 struct ad5686_bus_ops {
73 	int (*read)(struct ad5686_state *st, u8 addr);
74 	int (*write)(struct ad5686_state *st, u8 cmd, u8 addr, u16 val);
75 };
76 
77 /**
78  * struct ad5686_chip_info - chip specific information
79  * @int_vref_mv:	the internal reference voltage
80  * @num_channels:	number of channels
81  * @channel:		channel specification
82  * @regmap_type:	register map layout variant
83  */
84 struct ad5686_chip_info {
85 	u16				int_vref_mv;
86 	unsigned int			num_channels;
87 	const struct iio_chan_spec	*channels;
88 	enum ad5686_regmap_type		regmap_type;
89 };
90 
91 /* single-channel instances */
92 extern const struct ad5686_chip_info ad5310r_chip_info;
93 extern const struct ad5686_chip_info ad5311r_chip_info;
94 extern const struct ad5686_chip_info ad5681r_chip_info;
95 extern const struct ad5686_chip_info ad5682r_chip_info;
96 extern const struct ad5686_chip_info ad5683_chip_info;
97 extern const struct ad5686_chip_info ad5683r_chip_info;
98 
99 /* dual-channel instances */
100 extern const struct ad5686_chip_info ad5337r_chip_info;
101 extern const struct ad5686_chip_info ad5338r_chip_info;
102 
103 /* quad-channel instances */
104 extern const struct ad5686_chip_info ad5684_chip_info;
105 extern const struct ad5686_chip_info ad5684r_chip_info;
106 extern const struct ad5686_chip_info ad5685r_chip_info;
107 extern const struct ad5686_chip_info ad5686_chip_info;
108 extern const struct ad5686_chip_info ad5686r_chip_info;
109 
110 /* 8-channel instances */
111 extern const struct ad5686_chip_info ad5672r_chip_info;
112 extern const struct ad5686_chip_info ad5676_chip_info;
113 extern const struct ad5686_chip_info ad5676r_chip_info;
114 
115 /* 16-channel instances */
116 extern const struct ad5686_chip_info ad5674r_chip_info;
117 extern const struct ad5686_chip_info ad5679r_chip_info;
118 
119 /**
120  * struct ad5686_state - driver instance specific data
121  * @dev:		device instance
122  * @chip_info:		chip model specific constants, available modes etc
123  * @ops:		bus specific operations
124  * @ldac_gpio:		LDAC pin GPIO descriptor
125  * @vref_mv:		actual reference voltage used
126  * @pwr_down_mask:	power down mask
127  * @pwr_down_mode:	current power down mode
128  * @use_internal_vref:	set to true if the internal reference voltage is used
129  * @lock:		lock to protect access to state fields, which includes
130  *			the data buffer during regmap ops
131  * @data:		transfer buffers
132  */
133 struct ad5686_state {
134 	struct device			*dev;
135 	const struct ad5686_chip_info	*chip_info;
136 	const struct ad5686_bus_ops	*ops;
137 	struct gpio_desc		*ldac_gpio;
138 	unsigned short			vref_mv;
139 	unsigned int			pwr_down_mask;
140 	unsigned int			pwr_down_mode;
141 	bool				use_internal_vref;
142 	struct mutex			lock;
143 
144 	/*
145 	 * DMA (thus cache coherency maintenance) may require the
146 	 * transfer buffers to live in their own cache lines.
147 	 */
148 
149 	union {
150 		__be32 d32;
151 		__be16 d16;
152 		u8 d8[4];
153 	} data[3] __aligned(IIO_DMA_MINALIGN);
154 };
155 
156 
157 int ad5686_probe(struct device *dev,
158 		 const struct ad5686_chip_info *chip_info,
159 		 const char *name, const struct ad5686_bus_ops *ops);
160 
161 static inline int ad5686_write(struct ad5686_state *st, u8 cmd, u8 addr, u16 val)
162 {
163 	return st->ops->write(st, cmd, addr, val);
164 }
165 
166 static inline int ad5686_read(struct ad5686_state *st, u8 addr)
167 {
168 	return st->ops->read(st, addr);
169 }
170 
171 #endif /* __DRIVERS_IIO_DAC_AD5686_H__ */
172