1 // SPDX-License-Identifier: GPL-2.0+ 2 /* 3 * AD5686R, AD5685R, AD5684R Digital to analog converters driver 4 * 5 * Copyright 2011 Analog Devices Inc. 6 */ 7 8 #include <linux/interrupt.h> 9 #include <linux/fs.h> 10 #include <linux/device.h> 11 #include <linux/module.h> 12 #include <linux/kernel.h> 13 #include <linux/slab.h> 14 #include <linux/sysfs.h> 15 #include <linux/regulator/consumer.h> 16 17 #include <linux/iio/iio.h> 18 #include <linux/iio/sysfs.h> 19 20 #include "ad5686.h" 21 22 static const char * const ad5686_powerdown_modes[] = { 23 "1kohm_to_gnd", 24 "100kohm_to_gnd", 25 "three_state" 26 }; 27 28 static int ad5686_get_powerdown_mode(struct iio_dev *indio_dev, 29 const struct iio_chan_spec *chan) 30 { 31 struct ad5686_state *st = iio_priv(indio_dev); 32 33 return ((st->pwr_down_mode >> (chan->channel * 2)) & 0x3) - 1; 34 } 35 36 static int ad5686_set_powerdown_mode(struct iio_dev *indio_dev, 37 const struct iio_chan_spec *chan, 38 unsigned int mode) 39 { 40 struct ad5686_state *st = iio_priv(indio_dev); 41 42 st->pwr_down_mode &= ~(0x3 << (chan->channel * 2)); 43 st->pwr_down_mode |= ((mode + 1) << (chan->channel * 2)); 44 45 return 0; 46 } 47 48 static const struct iio_enum ad5686_powerdown_mode_enum = { 49 .items = ad5686_powerdown_modes, 50 .num_items = ARRAY_SIZE(ad5686_powerdown_modes), 51 .get = ad5686_get_powerdown_mode, 52 .set = ad5686_set_powerdown_mode, 53 }; 54 55 static ssize_t ad5686_read_dac_powerdown(struct iio_dev *indio_dev, 56 uintptr_t private, const struct iio_chan_spec *chan, char *buf) 57 { 58 struct ad5686_state *st = iio_priv(indio_dev); 59 60 return sprintf(buf, "%d\n", !!(st->pwr_down_mask & 61 (0x3 << (chan->channel * 2)))); 62 } 63 64 static ssize_t ad5686_write_dac_powerdown(struct iio_dev *indio_dev, 65 uintptr_t private, 66 const struct iio_chan_spec *chan, 67 const char *buf, 68 size_t len) 69 { 70 bool readin; 71 int ret; 72 struct ad5686_state *st = iio_priv(indio_dev); 73 unsigned int val, ref_bit_msk; 74 u8 shift; 75 76 ret = strtobool(buf, &readin); 77 if (ret) 78 return ret; 79 80 if (readin) 81 st->pwr_down_mask |= (0x3 << (chan->channel * 2)); 82 else 83 st->pwr_down_mask &= ~(0x3 << (chan->channel * 2)); 84 85 switch (st->chip_info->regmap_type) { 86 case AD5683_REGMAP: 87 shift = 13; 88 ref_bit_msk = AD5683_REF_BIT_MSK; 89 break; 90 case AD5686_REGMAP: 91 shift = 0; 92 ref_bit_msk = 0; 93 break; 94 case AD5693_REGMAP: 95 shift = 13; 96 ref_bit_msk = AD5693_REF_BIT_MSK; 97 break; 98 default: 99 return -EINVAL; 100 } 101 102 val = ((st->pwr_down_mask & st->pwr_down_mode) << shift); 103 if (!st->use_internal_vref) 104 val |= ref_bit_msk; 105 106 ret = st->write(st, AD5686_CMD_POWERDOWN_DAC, 0, val); 107 108 return ret ? ret : len; 109 } 110 111 static int ad5686_read_raw(struct iio_dev *indio_dev, 112 struct iio_chan_spec const *chan, 113 int *val, 114 int *val2, 115 long m) 116 { 117 struct ad5686_state *st = iio_priv(indio_dev); 118 int ret; 119 120 switch (m) { 121 case IIO_CHAN_INFO_RAW: 122 mutex_lock(&indio_dev->mlock); 123 ret = st->read(st, chan->address); 124 mutex_unlock(&indio_dev->mlock); 125 if (ret < 0) 126 return ret; 127 *val = ret; 128 return IIO_VAL_INT; 129 case IIO_CHAN_INFO_SCALE: 130 *val = st->vref_mv; 131 *val2 = chan->scan_type.realbits; 132 return IIO_VAL_FRACTIONAL_LOG2; 133 } 134 return -EINVAL; 135 } 136 137 static int ad5686_write_raw(struct iio_dev *indio_dev, 138 struct iio_chan_spec const *chan, 139 int val, 140 int val2, 141 long mask) 142 { 143 struct ad5686_state *st = iio_priv(indio_dev); 144 int ret; 145 146 switch (mask) { 147 case IIO_CHAN_INFO_RAW: 148 if (val > (1 << chan->scan_type.realbits) || val < 0) 149 return -EINVAL; 150 151 mutex_lock(&indio_dev->mlock); 152 ret = st->write(st, 153 AD5686_CMD_WRITE_INPUT_N_UPDATE_N, 154 chan->address, 155 val << chan->scan_type.shift); 156 mutex_unlock(&indio_dev->mlock); 157 break; 158 default: 159 ret = -EINVAL; 160 } 161 162 return ret; 163 } 164 165 static const struct iio_info ad5686_info = { 166 .read_raw = ad5686_read_raw, 167 .write_raw = ad5686_write_raw, 168 }; 169 170 static const struct iio_chan_spec_ext_info ad5686_ext_info[] = { 171 { 172 .name = "powerdown", 173 .read = ad5686_read_dac_powerdown, 174 .write = ad5686_write_dac_powerdown, 175 .shared = IIO_SEPARATE, 176 }, 177 IIO_ENUM("powerdown_mode", IIO_SEPARATE, &ad5686_powerdown_mode_enum), 178 IIO_ENUM_AVAILABLE("powerdown_mode", &ad5686_powerdown_mode_enum), 179 { }, 180 }; 181 182 #define AD5868_CHANNEL(chan, addr, bits, _shift) { \ 183 .type = IIO_VOLTAGE, \ 184 .indexed = 1, \ 185 .output = 1, \ 186 .channel = chan, \ 187 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \ 188 .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE),\ 189 .address = addr, \ 190 .scan_type = { \ 191 .sign = 'u', \ 192 .realbits = (bits), \ 193 .storagebits = 16, \ 194 .shift = (_shift), \ 195 }, \ 196 .ext_info = ad5686_ext_info, \ 197 } 198 199 #define DECLARE_AD5693_CHANNELS(name, bits, _shift) \ 200 static struct iio_chan_spec name[] = { \ 201 AD5868_CHANNEL(0, 0, bits, _shift), \ 202 } 203 204 #define DECLARE_AD5686_CHANNELS(name, bits, _shift) \ 205 static struct iio_chan_spec name[] = { \ 206 AD5868_CHANNEL(0, 1, bits, _shift), \ 207 AD5868_CHANNEL(1, 2, bits, _shift), \ 208 AD5868_CHANNEL(2, 4, bits, _shift), \ 209 AD5868_CHANNEL(3, 8, bits, _shift), \ 210 } 211 212 #define DECLARE_AD5676_CHANNELS(name, bits, _shift) \ 213 static struct iio_chan_spec name[] = { \ 214 AD5868_CHANNEL(0, 0, bits, _shift), \ 215 AD5868_CHANNEL(1, 1, bits, _shift), \ 216 AD5868_CHANNEL(2, 2, bits, _shift), \ 217 AD5868_CHANNEL(3, 3, bits, _shift), \ 218 AD5868_CHANNEL(4, 4, bits, _shift), \ 219 AD5868_CHANNEL(5, 5, bits, _shift), \ 220 AD5868_CHANNEL(6, 6, bits, _shift), \ 221 AD5868_CHANNEL(7, 7, bits, _shift), \ 222 } 223 224 DECLARE_AD5676_CHANNELS(ad5672_channels, 12, 4); 225 DECLARE_AD5676_CHANNELS(ad5676_channels, 16, 0); 226 DECLARE_AD5686_CHANNELS(ad5684_channels, 12, 4); 227 DECLARE_AD5686_CHANNELS(ad5685r_channels, 14, 2); 228 DECLARE_AD5686_CHANNELS(ad5686_channels, 16, 0); 229 DECLARE_AD5693_CHANNELS(ad5693_channels, 16, 0); 230 DECLARE_AD5693_CHANNELS(ad5692r_channels, 14, 2); 231 DECLARE_AD5693_CHANNELS(ad5691r_channels, 12, 4); 232 233 static const struct ad5686_chip_info ad5686_chip_info_tbl[] = { 234 [ID_AD5671R] = { 235 .channels = ad5672_channels, 236 .int_vref_mv = 2500, 237 .num_channels = 8, 238 .regmap_type = AD5686_REGMAP, 239 }, 240 [ID_AD5672R] = { 241 .channels = ad5672_channels, 242 .int_vref_mv = 2500, 243 .num_channels = 8, 244 .regmap_type = AD5686_REGMAP, 245 }, 246 [ID_AD5675R] = { 247 .channels = ad5676_channels, 248 .int_vref_mv = 2500, 249 .num_channels = 8, 250 .regmap_type = AD5686_REGMAP, 251 }, 252 [ID_AD5676] = { 253 .channels = ad5676_channels, 254 .num_channels = 8, 255 .regmap_type = AD5686_REGMAP, 256 }, 257 [ID_AD5676R] = { 258 .channels = ad5676_channels, 259 .int_vref_mv = 2500, 260 .num_channels = 8, 261 .regmap_type = AD5686_REGMAP, 262 }, 263 [ID_AD5681R] = { 264 .channels = ad5691r_channels, 265 .int_vref_mv = 2500, 266 .num_channels = 1, 267 .regmap_type = AD5683_REGMAP, 268 }, 269 [ID_AD5682R] = { 270 .channels = ad5692r_channels, 271 .int_vref_mv = 2500, 272 .num_channels = 1, 273 .regmap_type = AD5683_REGMAP, 274 }, 275 [ID_AD5683] = { 276 .channels = ad5693_channels, 277 .num_channels = 1, 278 .regmap_type = AD5683_REGMAP, 279 }, 280 [ID_AD5683R] = { 281 .channels = ad5693_channels, 282 .int_vref_mv = 2500, 283 .num_channels = 1, 284 .regmap_type = AD5683_REGMAP, 285 }, 286 [ID_AD5684] = { 287 .channels = ad5684_channels, 288 .num_channels = 4, 289 .regmap_type = AD5686_REGMAP, 290 }, 291 [ID_AD5684R] = { 292 .channels = ad5684_channels, 293 .int_vref_mv = 2500, 294 .num_channels = 4, 295 .regmap_type = AD5686_REGMAP, 296 }, 297 [ID_AD5685R] = { 298 .channels = ad5685r_channels, 299 .int_vref_mv = 2500, 300 .num_channels = 4, 301 .regmap_type = AD5686_REGMAP, 302 }, 303 [ID_AD5686] = { 304 .channels = ad5686_channels, 305 .num_channels = 4, 306 .regmap_type = AD5686_REGMAP, 307 }, 308 [ID_AD5686R] = { 309 .channels = ad5686_channels, 310 .int_vref_mv = 2500, 311 .num_channels = 4, 312 .regmap_type = AD5686_REGMAP, 313 }, 314 [ID_AD5691R] = { 315 .channels = ad5691r_channels, 316 .int_vref_mv = 2500, 317 .num_channels = 1, 318 .regmap_type = AD5693_REGMAP, 319 }, 320 [ID_AD5692R] = { 321 .channels = ad5692r_channels, 322 .int_vref_mv = 2500, 323 .num_channels = 1, 324 .regmap_type = AD5693_REGMAP, 325 }, 326 [ID_AD5693] = { 327 .channels = ad5693_channels, 328 .num_channels = 1, 329 .regmap_type = AD5693_REGMAP, 330 }, 331 [ID_AD5693R] = { 332 .channels = ad5693_channels, 333 .int_vref_mv = 2500, 334 .num_channels = 1, 335 .regmap_type = AD5693_REGMAP, 336 }, 337 [ID_AD5694] = { 338 .channels = ad5684_channels, 339 .num_channels = 4, 340 .regmap_type = AD5686_REGMAP, 341 }, 342 [ID_AD5694R] = { 343 .channels = ad5684_channels, 344 .int_vref_mv = 2500, 345 .num_channels = 4, 346 .regmap_type = AD5686_REGMAP, 347 }, 348 [ID_AD5696] = { 349 .channels = ad5686_channels, 350 .num_channels = 4, 351 .regmap_type = AD5686_REGMAP, 352 }, 353 [ID_AD5696R] = { 354 .channels = ad5686_channels, 355 .int_vref_mv = 2500, 356 .num_channels = 4, 357 .regmap_type = AD5686_REGMAP, 358 }, 359 }; 360 361 int ad5686_probe(struct device *dev, 362 enum ad5686_supported_device_ids chip_type, 363 const char *name, ad5686_write_func write, 364 ad5686_read_func read) 365 { 366 struct ad5686_state *st; 367 struct iio_dev *indio_dev; 368 unsigned int val, ref_bit_msk; 369 u8 cmd; 370 int ret, i, voltage_uv = 0; 371 372 indio_dev = devm_iio_device_alloc(dev, sizeof(*st)); 373 if (indio_dev == NULL) 374 return -ENOMEM; 375 376 st = iio_priv(indio_dev); 377 dev_set_drvdata(dev, indio_dev); 378 379 st->dev = dev; 380 st->write = write; 381 st->read = read; 382 383 st->reg = devm_regulator_get_optional(dev, "vcc"); 384 if (!IS_ERR(st->reg)) { 385 ret = regulator_enable(st->reg); 386 if (ret) 387 return ret; 388 389 ret = regulator_get_voltage(st->reg); 390 if (ret < 0) 391 goto error_disable_reg; 392 393 voltage_uv = ret; 394 } 395 396 st->chip_info = &ad5686_chip_info_tbl[chip_type]; 397 398 if (voltage_uv) 399 st->vref_mv = voltage_uv / 1000; 400 else 401 st->vref_mv = st->chip_info->int_vref_mv; 402 403 /* Set all the power down mode for all channels to 1K pulldown */ 404 for (i = 0; i < st->chip_info->num_channels; i++) 405 st->pwr_down_mode |= (0x01 << (i * 2)); 406 407 indio_dev->dev.parent = dev; 408 indio_dev->name = name; 409 indio_dev->info = &ad5686_info; 410 indio_dev->modes = INDIO_DIRECT_MODE; 411 indio_dev->channels = st->chip_info->channels; 412 indio_dev->num_channels = st->chip_info->num_channels; 413 414 switch (st->chip_info->regmap_type) { 415 case AD5683_REGMAP: 416 cmd = AD5686_CMD_CONTROL_REG; 417 ref_bit_msk = AD5683_REF_BIT_MSK; 418 st->use_internal_vref = !voltage_uv; 419 break; 420 case AD5686_REGMAP: 421 cmd = AD5686_CMD_INTERNAL_REFER_SETUP; 422 ref_bit_msk = 0; 423 break; 424 case AD5693_REGMAP: 425 cmd = AD5686_CMD_CONTROL_REG; 426 ref_bit_msk = AD5693_REF_BIT_MSK; 427 st->use_internal_vref = !voltage_uv; 428 break; 429 default: 430 ret = -EINVAL; 431 goto error_disable_reg; 432 } 433 434 val = (voltage_uv | ref_bit_msk); 435 436 ret = st->write(st, cmd, 0, !!val); 437 if (ret) 438 goto error_disable_reg; 439 440 ret = iio_device_register(indio_dev); 441 if (ret) 442 goto error_disable_reg; 443 444 return 0; 445 446 error_disable_reg: 447 if (!IS_ERR(st->reg)) 448 regulator_disable(st->reg); 449 return ret; 450 } 451 EXPORT_SYMBOL_GPL(ad5686_probe); 452 453 int ad5686_remove(struct device *dev) 454 { 455 struct iio_dev *indio_dev = dev_get_drvdata(dev); 456 struct ad5686_state *st = iio_priv(indio_dev); 457 458 iio_device_unregister(indio_dev); 459 if (!IS_ERR(st->reg)) 460 regulator_disable(st->reg); 461 462 return 0; 463 } 464 EXPORT_SYMBOL_GPL(ad5686_remove); 465 466 MODULE_AUTHOR("Michael Hennerich <hennerich@blackfin.uclinux.org>"); 467 MODULE_DESCRIPTION("Analog Devices AD5686/85/84 DAC"); 468 MODULE_LICENSE("GPL v2"); 469