1 // SPDX-License-Identifier: GPL-2.0-or-later 2 /* 3 * AD5446 SPI DAC driver 4 * 5 * Copyright 2010 Analog Devices Inc. 6 */ 7 8 #include <linux/interrupt.h> 9 #include <linux/workqueue.h> 10 #include <linux/device.h> 11 #include <linux/kernel.h> 12 #include <linux/slab.h> 13 #include <linux/sysfs.h> 14 #include <linux/list.h> 15 #include <linux/spi/spi.h> 16 #include <linux/i2c.h> 17 #include <linux/regulator/consumer.h> 18 #include <linux/err.h> 19 #include <linux/module.h> 20 #include <linux/mod_devicetable.h> 21 22 #include <linux/iio/iio.h> 23 #include <linux/iio/sysfs.h> 24 25 #include <linux/unaligned.h> 26 27 #define MODE_PWRDWN_1k 0x1 28 #define MODE_PWRDWN_100k 0x2 29 #define MODE_PWRDWN_TRISTATE 0x3 30 31 /** 32 * struct ad5446_state - driver instance specific data 33 * @dev: this device 34 * @chip_info: chip model specific constants, available modes etc 35 * @vref_mv: actual reference voltage used 36 * @cached_val: store/retrieve values during power down 37 * @pwr_down_mode: power down mode (1k, 100k or tristate) 38 * @pwr_down: true if the device is in power down 39 * @lock: lock to protect the data buffer during write ops 40 */ 41 42 struct ad5446_state { 43 struct device *dev; 44 const struct ad5446_chip_info *chip_info; 45 unsigned short vref_mv; 46 unsigned cached_val; 47 unsigned pwr_down_mode; 48 unsigned pwr_down; 49 struct mutex lock; 50 }; 51 52 /** 53 * struct ad5446_chip_info - chip specific information 54 * @channel: channel spec for the DAC 55 * @int_vref_mv: AD5620/40/60: the internal reference voltage 56 * @write: chip specific helper function to write to the register 57 */ 58 59 struct ad5446_chip_info { 60 struct iio_chan_spec channel; 61 u16 int_vref_mv; 62 int (*write)(struct ad5446_state *st, unsigned val); 63 }; 64 65 static const char * const ad5446_powerdown_modes[] = { 66 "1kohm_to_gnd", "100kohm_to_gnd", "three_state" 67 }; 68 69 static int ad5446_set_powerdown_mode(struct iio_dev *indio_dev, 70 const struct iio_chan_spec *chan, unsigned int mode) 71 { 72 struct ad5446_state *st = iio_priv(indio_dev); 73 74 st->pwr_down_mode = mode + 1; 75 76 return 0; 77 } 78 79 static int ad5446_get_powerdown_mode(struct iio_dev *indio_dev, 80 const struct iio_chan_spec *chan) 81 { 82 struct ad5446_state *st = iio_priv(indio_dev); 83 84 return st->pwr_down_mode - 1; 85 } 86 87 static const struct iio_enum ad5446_powerdown_mode_enum = { 88 .items = ad5446_powerdown_modes, 89 .num_items = ARRAY_SIZE(ad5446_powerdown_modes), 90 .get = ad5446_get_powerdown_mode, 91 .set = ad5446_set_powerdown_mode, 92 }; 93 94 static ssize_t ad5446_read_dac_powerdown(struct iio_dev *indio_dev, 95 uintptr_t private, 96 const struct iio_chan_spec *chan, 97 char *buf) 98 { 99 struct ad5446_state *st = iio_priv(indio_dev); 100 101 return sysfs_emit(buf, "%d\n", st->pwr_down); 102 } 103 104 static ssize_t ad5446_write_dac_powerdown(struct iio_dev *indio_dev, 105 uintptr_t private, 106 const struct iio_chan_spec *chan, 107 const char *buf, size_t len) 108 { 109 struct ad5446_state *st = iio_priv(indio_dev); 110 unsigned int shift; 111 unsigned int val; 112 bool powerdown; 113 int ret; 114 115 ret = kstrtobool(buf, &powerdown); 116 if (ret) 117 return ret; 118 119 mutex_lock(&st->lock); 120 st->pwr_down = powerdown; 121 122 if (st->pwr_down) { 123 shift = chan->scan_type.realbits + chan->scan_type.shift; 124 val = st->pwr_down_mode << shift; 125 } else { 126 val = st->cached_val; 127 } 128 129 ret = st->chip_info->write(st, val); 130 mutex_unlock(&st->lock); 131 132 return ret ? ret : len; 133 } 134 135 static const struct iio_chan_spec_ext_info ad5446_ext_info_powerdown[] = { 136 { 137 .name = "powerdown", 138 .read = ad5446_read_dac_powerdown, 139 .write = ad5446_write_dac_powerdown, 140 .shared = IIO_SEPARATE, 141 }, 142 IIO_ENUM("powerdown_mode", IIO_SEPARATE, &ad5446_powerdown_mode_enum), 143 IIO_ENUM_AVAILABLE("powerdown_mode", IIO_SHARED_BY_TYPE, &ad5446_powerdown_mode_enum), 144 { }, 145 }; 146 147 #define _AD5446_CHANNEL(bits, storage, _shift, ext) { \ 148 .type = IIO_VOLTAGE, \ 149 .indexed = 1, \ 150 .output = 1, \ 151 .channel = 0, \ 152 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \ 153 .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE), \ 154 .scan_type = { \ 155 .sign = 'u', \ 156 .realbits = (bits), \ 157 .storagebits = (storage), \ 158 .shift = (_shift), \ 159 }, \ 160 .ext_info = (ext), \ 161 } 162 163 #define AD5446_CHANNEL(bits, storage, shift) \ 164 _AD5446_CHANNEL(bits, storage, shift, NULL) 165 166 #define AD5446_CHANNEL_POWERDOWN(bits, storage, shift) \ 167 _AD5446_CHANNEL(bits, storage, shift, ad5446_ext_info_powerdown) 168 169 static int ad5446_read_raw(struct iio_dev *indio_dev, 170 struct iio_chan_spec const *chan, 171 int *val, 172 int *val2, 173 long m) 174 { 175 struct ad5446_state *st = iio_priv(indio_dev); 176 177 switch (m) { 178 case IIO_CHAN_INFO_RAW: 179 *val = st->cached_val >> chan->scan_type.shift; 180 return IIO_VAL_INT; 181 case IIO_CHAN_INFO_SCALE: 182 *val = st->vref_mv; 183 *val2 = chan->scan_type.realbits; 184 return IIO_VAL_FRACTIONAL_LOG2; 185 } 186 return -EINVAL; 187 } 188 189 static int ad5446_write_raw(struct iio_dev *indio_dev, 190 struct iio_chan_spec const *chan, 191 int val, 192 int val2, 193 long mask) 194 { 195 struct ad5446_state *st = iio_priv(indio_dev); 196 int ret = 0; 197 198 switch (mask) { 199 case IIO_CHAN_INFO_RAW: 200 if (val >= (1 << chan->scan_type.realbits) || val < 0) 201 return -EINVAL; 202 203 val <<= chan->scan_type.shift; 204 mutex_lock(&st->lock); 205 st->cached_val = val; 206 if (!st->pwr_down) 207 ret = st->chip_info->write(st, val); 208 mutex_unlock(&st->lock); 209 break; 210 default: 211 ret = -EINVAL; 212 } 213 214 return ret; 215 } 216 217 static const struct iio_info ad5446_info = { 218 .read_raw = ad5446_read_raw, 219 .write_raw = ad5446_write_raw, 220 }; 221 222 static int ad5446_probe(struct device *dev, const char *name, 223 const struct ad5446_chip_info *chip_info) 224 { 225 struct ad5446_state *st; 226 struct iio_dev *indio_dev; 227 int ret; 228 229 indio_dev = devm_iio_device_alloc(dev, sizeof(*st)); 230 if (!indio_dev) 231 return -ENOMEM; 232 233 st = iio_priv(indio_dev); 234 st->chip_info = chip_info; 235 236 st->dev = dev; 237 238 indio_dev->name = name; 239 indio_dev->info = &ad5446_info; 240 indio_dev->modes = INDIO_DIRECT_MODE; 241 indio_dev->channels = &st->chip_info->channel; 242 indio_dev->num_channels = 1; 243 244 mutex_init(&st->lock); 245 246 st->pwr_down_mode = MODE_PWRDWN_1k; 247 248 ret = devm_regulator_get_enable_read_voltage(dev, "vcc"); 249 if (ret < 0 && ret != -ENODEV) 250 return ret; 251 if (ret == -ENODEV) { 252 if (chip_info->int_vref_mv) 253 st->vref_mv = chip_info->int_vref_mv; 254 else 255 dev_warn(dev, "reference voltage unspecified\n"); 256 } else { 257 st->vref_mv = ret / 1000; 258 } 259 260 return devm_iio_device_register(dev, indio_dev); 261 } 262 263 #if IS_ENABLED(CONFIG_SPI_MASTER) 264 265 static int ad5446_write(struct ad5446_state *st, unsigned val) 266 { 267 struct spi_device *spi = to_spi_device(st->dev); 268 __be16 data = cpu_to_be16(val); 269 270 return spi_write(spi, &data, sizeof(data)); 271 } 272 273 static int ad5660_write(struct ad5446_state *st, unsigned val) 274 { 275 struct spi_device *spi = to_spi_device(st->dev); 276 uint8_t data[3]; 277 278 put_unaligned_be24(val, &data[0]); 279 280 return spi_write(spi, data, sizeof(data)); 281 } 282 283 /* 284 * ad5446_supported_spi_device_ids: 285 * The AD5620/40/60 parts are available in different fixed internal reference 286 * voltage options. The actual part numbers may look differently 287 * (and a bit cryptic), however this style is used to make clear which 288 * parts are supported here. 289 */ 290 enum ad5446_supported_spi_device_ids { 291 ID_AD5300, 292 ID_AD5310, 293 ID_AD5320, 294 ID_AD5444, 295 ID_AD5446, 296 ID_AD5450, 297 ID_AD5451, 298 ID_AD5541A, 299 ID_AD5512A, 300 ID_AD5553, 301 ID_AD5600, 302 ID_AD5601, 303 ID_AD5611, 304 ID_AD5621, 305 ID_AD5641, 306 ID_AD5620_2500, 307 ID_AD5620_1250, 308 ID_AD5640_2500, 309 ID_AD5640_1250, 310 ID_AD5660_2500, 311 ID_AD5660_1250, 312 ID_AD5662, 313 }; 314 315 static const struct ad5446_chip_info ad5446_spi_chip_info[] = { 316 [ID_AD5300] = { 317 .channel = AD5446_CHANNEL_POWERDOWN(8, 16, 4), 318 .write = ad5446_write, 319 }, 320 [ID_AD5310] = { 321 .channel = AD5446_CHANNEL_POWERDOWN(10, 16, 2), 322 .write = ad5446_write, 323 }, 324 [ID_AD5320] = { 325 .channel = AD5446_CHANNEL_POWERDOWN(12, 16, 0), 326 .write = ad5446_write, 327 }, 328 [ID_AD5444] = { 329 .channel = AD5446_CHANNEL(12, 16, 2), 330 .write = ad5446_write, 331 }, 332 [ID_AD5446] = { 333 .channel = AD5446_CHANNEL(14, 16, 0), 334 .write = ad5446_write, 335 }, 336 [ID_AD5450] = { 337 .channel = AD5446_CHANNEL(8, 16, 6), 338 .write = ad5446_write, 339 }, 340 [ID_AD5451] = { 341 .channel = AD5446_CHANNEL(10, 16, 4), 342 .write = ad5446_write, 343 }, 344 [ID_AD5541A] = { 345 .channel = AD5446_CHANNEL(16, 16, 0), 346 .write = ad5446_write, 347 }, 348 [ID_AD5512A] = { 349 .channel = AD5446_CHANNEL(12, 16, 4), 350 .write = ad5446_write, 351 }, 352 [ID_AD5553] = { 353 .channel = AD5446_CHANNEL(14, 16, 0), 354 .write = ad5446_write, 355 }, 356 [ID_AD5600] = { 357 .channel = AD5446_CHANNEL(16, 16, 0), 358 .write = ad5446_write, 359 }, 360 [ID_AD5601] = { 361 .channel = AD5446_CHANNEL_POWERDOWN(8, 16, 6), 362 .write = ad5446_write, 363 }, 364 [ID_AD5611] = { 365 .channel = AD5446_CHANNEL_POWERDOWN(10, 16, 4), 366 .write = ad5446_write, 367 }, 368 [ID_AD5621] = { 369 .channel = AD5446_CHANNEL_POWERDOWN(12, 16, 2), 370 .write = ad5446_write, 371 }, 372 [ID_AD5641] = { 373 .channel = AD5446_CHANNEL_POWERDOWN(14, 16, 0), 374 .write = ad5446_write, 375 }, 376 [ID_AD5620_2500] = { 377 .channel = AD5446_CHANNEL_POWERDOWN(12, 16, 2), 378 .int_vref_mv = 2500, 379 .write = ad5446_write, 380 }, 381 [ID_AD5620_1250] = { 382 .channel = AD5446_CHANNEL_POWERDOWN(12, 16, 2), 383 .int_vref_mv = 1250, 384 .write = ad5446_write, 385 }, 386 [ID_AD5640_2500] = { 387 .channel = AD5446_CHANNEL_POWERDOWN(14, 16, 0), 388 .int_vref_mv = 2500, 389 .write = ad5446_write, 390 }, 391 [ID_AD5640_1250] = { 392 .channel = AD5446_CHANNEL_POWERDOWN(14, 16, 0), 393 .int_vref_mv = 1250, 394 .write = ad5446_write, 395 }, 396 [ID_AD5660_2500] = { 397 .channel = AD5446_CHANNEL_POWERDOWN(16, 16, 0), 398 .int_vref_mv = 2500, 399 .write = ad5660_write, 400 }, 401 [ID_AD5660_1250] = { 402 .channel = AD5446_CHANNEL_POWERDOWN(16, 16, 0), 403 .int_vref_mv = 1250, 404 .write = ad5660_write, 405 }, 406 [ID_AD5662] = { 407 .channel = AD5446_CHANNEL_POWERDOWN(16, 16, 0), 408 .write = ad5660_write, 409 }, 410 }; 411 412 static const struct spi_device_id ad5446_spi_ids[] = { 413 {"ad5300", ID_AD5300}, 414 {"ad5310", ID_AD5310}, 415 {"ad5320", ID_AD5320}, 416 {"ad5444", ID_AD5444}, 417 {"ad5446", ID_AD5446}, 418 {"ad5450", ID_AD5450}, 419 {"ad5451", ID_AD5451}, 420 {"ad5452", ID_AD5444}, /* ad5452 is compatible to the ad5444 */ 421 {"ad5453", ID_AD5446}, /* ad5453 is compatible to the ad5446 */ 422 {"ad5512a", ID_AD5512A}, 423 {"ad5541a", ID_AD5541A}, 424 {"ad5542a", ID_AD5541A}, /* ad5541a and ad5542a are compatible */ 425 {"ad5543", ID_AD5541A}, /* ad5541a and ad5543 are compatible */ 426 {"ad5553", ID_AD5553}, 427 {"ad5600", ID_AD5600}, 428 {"ad5601", ID_AD5601}, 429 {"ad5611", ID_AD5611}, 430 {"ad5621", ID_AD5621}, 431 {"ad5641", ID_AD5641}, 432 {"ad5620-2500", ID_AD5620_2500}, /* AD5620/40/60: */ 433 {"ad5620-1250", ID_AD5620_1250}, /* part numbers may look differently */ 434 {"ad5640-2500", ID_AD5640_2500}, 435 {"ad5640-1250", ID_AD5640_1250}, 436 {"ad5660-2500", ID_AD5660_2500}, 437 {"ad5660-1250", ID_AD5660_1250}, 438 {"ad5662", ID_AD5662}, 439 {"dac081s101", ID_AD5300}, /* compatible Texas Instruments chips */ 440 {"dac101s101", ID_AD5310}, 441 {"dac121s101", ID_AD5320}, 442 {"dac7512", ID_AD5320}, 443 {} 444 }; 445 MODULE_DEVICE_TABLE(spi, ad5446_spi_ids); 446 447 static const struct of_device_id ad5446_of_ids[] = { 448 { .compatible = "ti,dac7512" }, 449 { } 450 }; 451 MODULE_DEVICE_TABLE(of, ad5446_of_ids); 452 453 static int ad5446_spi_probe(struct spi_device *spi) 454 { 455 const struct spi_device_id *id = spi_get_device_id(spi); 456 457 return ad5446_probe(&spi->dev, id->name, 458 &ad5446_spi_chip_info[id->driver_data]); 459 } 460 461 static struct spi_driver ad5446_spi_driver = { 462 .driver = { 463 .name = "ad5446", 464 .of_match_table = ad5446_of_ids, 465 }, 466 .probe = ad5446_spi_probe, 467 .id_table = ad5446_spi_ids, 468 }; 469 470 static int __init ad5446_spi_register_driver(void) 471 { 472 return spi_register_driver(&ad5446_spi_driver); 473 } 474 475 static void ad5446_spi_unregister_driver(void) 476 { 477 spi_unregister_driver(&ad5446_spi_driver); 478 } 479 480 #else 481 482 static inline int ad5446_spi_register_driver(void) { return 0; } 483 static inline void ad5446_spi_unregister_driver(void) { } 484 485 #endif 486 487 #if IS_ENABLED(CONFIG_I2C) 488 489 static int ad5622_write(struct ad5446_state *st, unsigned val) 490 { 491 struct i2c_client *client = to_i2c_client(st->dev); 492 __be16 data = cpu_to_be16(val); 493 int ret; 494 495 ret = i2c_master_send(client, (char *)&data, sizeof(data)); 496 if (ret < 0) 497 return ret; 498 if (ret != sizeof(data)) 499 return -EIO; 500 501 return 0; 502 } 503 504 /* 505 * ad5446_supported_i2c_device_ids: 506 * The AD5620/40/60 parts are available in different fixed internal reference 507 * voltage options. The actual part numbers may look differently 508 * (and a bit cryptic), however this style is used to make clear which 509 * parts are supported here. 510 */ 511 enum ad5446_supported_i2c_device_ids { 512 ID_AD5602, 513 ID_AD5612, 514 ID_AD5622, 515 }; 516 517 static const struct ad5446_chip_info ad5446_i2c_chip_info[] = { 518 [ID_AD5602] = { 519 .channel = AD5446_CHANNEL_POWERDOWN(8, 16, 4), 520 .write = ad5622_write, 521 }, 522 [ID_AD5612] = { 523 .channel = AD5446_CHANNEL_POWERDOWN(10, 16, 2), 524 .write = ad5622_write, 525 }, 526 [ID_AD5622] = { 527 .channel = AD5446_CHANNEL_POWERDOWN(12, 16, 0), 528 .write = ad5622_write, 529 }, 530 }; 531 532 static int ad5446_i2c_probe(struct i2c_client *i2c) 533 { 534 const struct i2c_device_id *id = i2c_client_get_device_id(i2c); 535 return ad5446_probe(&i2c->dev, id->name, 536 &ad5446_i2c_chip_info[id->driver_data]); 537 } 538 539 static const struct i2c_device_id ad5446_i2c_ids[] = { 540 {"ad5301", ID_AD5602}, 541 {"ad5311", ID_AD5612}, 542 {"ad5321", ID_AD5622}, 543 {"ad5602", ID_AD5602}, 544 {"ad5612", ID_AD5612}, 545 {"ad5622", ID_AD5622}, 546 {} 547 }; 548 MODULE_DEVICE_TABLE(i2c, ad5446_i2c_ids); 549 550 static struct i2c_driver ad5446_i2c_driver = { 551 .driver = { 552 .name = "ad5446", 553 }, 554 .probe = ad5446_i2c_probe, 555 .id_table = ad5446_i2c_ids, 556 }; 557 558 static int __init ad5446_i2c_register_driver(void) 559 { 560 return i2c_add_driver(&ad5446_i2c_driver); 561 } 562 563 static void __exit ad5446_i2c_unregister_driver(void) 564 { 565 i2c_del_driver(&ad5446_i2c_driver); 566 } 567 568 #else 569 570 static inline int ad5446_i2c_register_driver(void) { return 0; } 571 static inline void ad5446_i2c_unregister_driver(void) { } 572 573 #endif 574 575 static int __init ad5446_init(void) 576 { 577 int ret; 578 579 ret = ad5446_spi_register_driver(); 580 if (ret) 581 return ret; 582 583 ret = ad5446_i2c_register_driver(); 584 if (ret) { 585 ad5446_spi_unregister_driver(); 586 return ret; 587 } 588 589 return 0; 590 } 591 module_init(ad5446_init); 592 593 static void __exit ad5446_exit(void) 594 { 595 ad5446_i2c_unregister_driver(); 596 ad5446_spi_unregister_driver(); 597 } 598 module_exit(ad5446_exit); 599 600 MODULE_AUTHOR("Michael Hennerich <michael.hennerich@analog.com>"); 601 MODULE_DESCRIPTION("Analog Devices AD5444/AD5446 DAC"); 602 MODULE_LICENSE("GPL v2"); 603